Removed v850eq sanitization.
[deliverable/binutils-gdb.git] / gdb / d10v-tdep.c
1 /* Target-dependent code for Mitsubishi D10V, for GDB.
2 Copyright (C) 1996, 1997 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 /* Contributed by Martin Hunt, hunt@cygnus.com */
21
22 #include "defs.h"
23 #include "frame.h"
24 #include "obstack.h"
25 #include "symtab.h"
26 #include "gdbtypes.h"
27 #include "gdbcmd.h"
28 #include "gdbcore.h"
29 #include "gdb_string.h"
30 #include "value.h"
31 #include "inferior.h"
32 #include "dis-asm.h"
33 #include "symfile.h"
34 #include "objfiles.h"
35
36 void d10v_frame_find_saved_regs PARAMS ((struct frame_info *fi,
37 struct frame_saved_regs *fsr));
38 static void d10v_pop_dummy_frame PARAMS ((struct frame_info *fi));
39
40 /* Discard from the stack the innermost frame, restoring all saved
41 registers. */
42
43 void
44 d10v_pop_frame ()
45 {
46 struct frame_info *frame = get_current_frame ();
47 CORE_ADDR fp;
48 int regnum;
49 struct frame_saved_regs fsr;
50 char raw_buffer[8];
51
52 fp = FRAME_FP (frame);
53 if (frame->dummy)
54 {
55 d10v_pop_dummy_frame(frame);
56 return;
57 }
58
59 /* fill out fsr with the address of where each */
60 /* register was stored in the frame */
61 get_frame_saved_regs (frame, &fsr);
62
63 /* now update the current registers with the old values */
64 for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++)
65 {
66 if (fsr.regs[regnum])
67 {
68 read_memory (fsr.regs[regnum], raw_buffer, 8);
69 write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 8);
70 }
71 }
72 for (regnum = 0; regnum < SP_REGNUM; regnum++)
73 {
74 if (fsr.regs[regnum])
75 {
76 write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], 2));
77 }
78 }
79 if (fsr.regs[PSW_REGNUM])
80 {
81 write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], 2));
82 }
83
84 write_register (PC_REGNUM, read_register(13));
85 write_register (SP_REGNUM, fp + frame->size);
86 target_store_registers (-1);
87 flush_cached_frames ();
88 }
89
90 static int
91 check_prologue (op)
92 unsigned short op;
93 {
94 /* st rn, @-sp */
95 if ((op & 0x7E1F) == 0x6C1F)
96 return 1;
97
98 /* st2w rn, @-sp */
99 if ((op & 0x7E3F) == 0x6E1F)
100 return 1;
101
102 /* subi sp, n */
103 if ((op & 0x7FE1) == 0x01E1)
104 return 1;
105
106 /* mv r11, sp */
107 if (op == 0x417E)
108 return 1;
109
110 /* nop */
111 if (op == 0x5E00)
112 return 1;
113
114 /* st rn, @sp */
115 if ((op & 0x7E1F) == 0x681E)
116 return 1;
117
118 /* st2w rn, @sp */
119 if ((op & 0x7E3F) == 0x3A1E)
120 return 1;
121
122 return 0;
123 }
124
125 CORE_ADDR
126 d10v_skip_prologue (pc)
127 CORE_ADDR pc;
128 {
129 unsigned long op;
130 unsigned short op1, op2;
131 CORE_ADDR func_addr, func_end;
132 struct symtab_and_line sal;
133
134 /* If we have line debugging information, then the end of the */
135 /* prologue should the first assembly instruction of the first source line */
136 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
137 {
138 sal = find_pc_line (func_addr, 0);
139 if ( sal.end && sal.end < func_end)
140 return sal.end;
141 }
142
143 if (target_read_memory (pc, (char *)&op, 4))
144 return pc; /* Can't access it -- assume no prologue. */
145
146 while (1)
147 {
148 op = (unsigned long)read_memory_integer (pc, 4);
149 if ((op & 0xC0000000) == 0xC0000000)
150 {
151 /* long instruction */
152 if ( ((op & 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
153 ((op & 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
154 ((op & 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
155 break;
156 }
157 else
158 {
159 /* short instructions */
160 if ((op & 0xC0000000) == 0x80000000)
161 {
162 op2 = (op & 0x3FFF8000) >> 15;
163 op1 = op & 0x7FFF;
164 }
165 else
166 {
167 op1 = (op & 0x3FFF8000) >> 15;
168 op2 = op & 0x7FFF;
169 }
170 if (check_prologue(op1))
171 {
172 if (!check_prologue(op2))
173 {
174 /* if the previous opcode was really part of the prologue */
175 /* and not just a NOP, then we want to break after both instructions */
176 if (op1 != 0x5E00)
177 pc += 4;
178 break;
179 }
180 }
181 else
182 break;
183 }
184 pc += 4;
185 }
186 return pc;
187 }
188
189 /* Given a GDB frame, determine the address of the calling function's frame.
190 This will be used to create a new GDB frame struct, and then
191 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
192 */
193
194 CORE_ADDR
195 d10v_frame_chain (frame)
196 struct frame_info *frame;
197 {
198 struct frame_saved_regs fsr;
199
200 d10v_frame_find_saved_regs (frame, &fsr);
201
202 if (frame->return_pc == IMEM_START)
203 return (CORE_ADDR)0;
204
205 if (!fsr.regs[FP_REGNUM])
206 {
207 if (!fsr.regs[SP_REGNUM] || fsr.regs[SP_REGNUM] == STACK_START)
208 return (CORE_ADDR)0;
209
210 return fsr.regs[SP_REGNUM];
211 }
212
213 if (!read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2))
214 return (CORE_ADDR)0;
215
216 return read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2)| DMEM_START;
217 }
218
219 static int next_addr, uses_frame;
220
221 static int
222 prologue_find_regs (op, fsr, addr)
223 unsigned short op;
224 struct frame_saved_regs *fsr;
225 CORE_ADDR addr;
226 {
227 int n;
228
229 /* st rn, @-sp */
230 if ((op & 0x7E1F) == 0x6C1F)
231 {
232 n = (op & 0x1E0) >> 5;
233 next_addr -= 2;
234 fsr->regs[n] = next_addr;
235 return 1;
236 }
237
238 /* st2w rn, @-sp */
239 else if ((op & 0x7E3F) == 0x6E1F)
240 {
241 n = (op & 0x1E0) >> 5;
242 next_addr -= 4;
243 fsr->regs[n] = next_addr;
244 fsr->regs[n+1] = next_addr+2;
245 return 1;
246 }
247
248 /* subi sp, n */
249 if ((op & 0x7FE1) == 0x01E1)
250 {
251 n = (op & 0x1E) >> 1;
252 if (n == 0)
253 n = 16;
254 next_addr -= n;
255 return 1;
256 }
257
258 /* mv r11, sp */
259 if (op == 0x417E)
260 {
261 uses_frame = 1;
262 return 1;
263 }
264
265 /* nop */
266 if (op == 0x5E00)
267 return 1;
268
269 /* st rn, @sp */
270 if ((op & 0x7E1F) == 0x681E)
271 {
272 n = (op & 0x1E0) >> 5;
273 fsr->regs[n] = next_addr;
274 return 1;
275 }
276
277 /* st2w rn, @sp */
278 if ((op & 0x7E3F) == 0x3A1E)
279 {
280 n = (op & 0x1E0) >> 5;
281 fsr->regs[n] = next_addr;
282 fsr->regs[n+1] = next_addr+2;
283 return 1;
284 }
285
286 return 0;
287 }
288
289 /* Put here the code to store, into a struct frame_saved_regs, the
290 addresses of the saved registers of frame described by FRAME_INFO.
291 This includes special registers such as pc and fp saved in special
292 ways in the stack frame. sp is even more special: the address we
293 return for it IS the sp for the next frame. */
294 void
295 d10v_frame_find_saved_regs (fi, fsr)
296 struct frame_info *fi;
297 struct frame_saved_regs *fsr;
298 {
299 CORE_ADDR fp, pc;
300 unsigned long op;
301 unsigned short op1, op2;
302 int i;
303
304 fp = fi->frame;
305 memset (fsr, 0, sizeof (*fsr));
306 next_addr = 0;
307
308 pc = get_pc_function_start (fi->pc);
309
310 uses_frame = 0;
311 while (1)
312 {
313 op = (unsigned long)read_memory_integer (pc, 4);
314 if ((op & 0xC0000000) == 0xC0000000)
315 {
316 /* long instruction */
317 if ((op & 0x3FFF0000) == 0x01FF0000)
318 {
319 /* add3 sp,sp,n */
320 short n = op & 0xFFFF;
321 next_addr += n;
322 }
323 else if ((op & 0x3F0F0000) == 0x340F0000)
324 {
325 /* st rn, @(offset,sp) */
326 short offset = op & 0xFFFF;
327 short n = (op >> 20) & 0xF;
328 fsr->regs[n] = next_addr + offset;
329 }
330 else if ((op & 0x3F1F0000) == 0x350F0000)
331 {
332 /* st2w rn, @(offset,sp) */
333 short offset = op & 0xFFFF;
334 short n = (op >> 20) & 0xF;
335 fsr->regs[n] = next_addr + offset;
336 fsr->regs[n+1] = next_addr + offset + 2;
337 }
338 else
339 break;
340 }
341 else
342 {
343 /* short instructions */
344 if ((op & 0xC0000000) == 0x80000000)
345 {
346 op2 = (op & 0x3FFF8000) >> 15;
347 op1 = op & 0x7FFF;
348 }
349 else
350 {
351 op1 = (op & 0x3FFF8000) >> 15;
352 op2 = op & 0x7FFF;
353 }
354 if (!prologue_find_regs(op1,fsr,pc) || !prologue_find_regs(op2,fsr,pc))
355 break;
356 }
357 pc += 4;
358 }
359
360 fi->size = -next_addr;
361
362 if (!(fp & 0xffff))
363 fp = read_register(SP_REGNUM) | DMEM_START;
364
365 for (i=0; i<NUM_REGS-1; i++)
366 if (fsr->regs[i])
367 {
368 fsr->regs[i] = fp - (next_addr - fsr->regs[i]);
369 }
370
371 if (fsr->regs[LR_REGNUM])
372 fi->return_pc = ((read_memory_unsigned_integer(fsr->regs[LR_REGNUM],2) - 1) << 2) | IMEM_START;
373 else
374 fi->return_pc = ((read_register(LR_REGNUM) - 1) << 2) | IMEM_START;
375
376 /* th SP is not normally (ever?) saved, but check anyway */
377 if (!fsr->regs[SP_REGNUM])
378 {
379 /* if the FP was saved, that means the current FP is valid, */
380 /* otherwise, it isn't being used, so we use the SP instead */
381 if (uses_frame)
382 fsr->regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->size;
383 else
384 {
385 fsr->regs[SP_REGNUM] = fp + fi->size;
386 fi->frameless = 1;
387 fsr->regs[FP_REGNUM] = 0;
388 }
389 }
390 }
391
392 void
393 d10v_init_extra_frame_info (fromleaf, fi)
394 int fromleaf;
395 struct frame_info *fi;
396 {
397 struct frame_saved_regs dummy;
398
399 if (fi->next && ((fi->pc & 0xffff) == 0))
400 fi->pc = fi->next->return_pc;
401
402 d10v_frame_find_saved_regs (fi, &dummy);
403 }
404
405 static void
406 show_regs (args, from_tty)
407 char *args;
408 int from_tty;
409 {
410 long long num1, num2;
411 printf_filtered ("PC=%04x (0x%x) PSW=%04x RPT_S=%04x RPT_E=%04x RPT_C=%04x\n",
412 read_register (PC_REGNUM), (read_register (PC_REGNUM) << 2) + IMEM_START,
413 read_register (PSW_REGNUM),
414 read_register (24),
415 read_register (25),
416 read_register (23));
417 printf_filtered ("R0-R7 %04x %04x %04x %04x %04x %04x %04x %04x\n",
418 read_register (0),
419 read_register (1),
420 read_register (2),
421 read_register (3),
422 read_register (4),
423 read_register (5),
424 read_register (6),
425 read_register (7));
426 printf_filtered ("R8-R15 %04x %04x %04x %04x %04x %04x %04x %04x\n",
427 read_register (8),
428 read_register (9),
429 read_register (10),
430 read_register (11),
431 read_register (12),
432 read_register (13),
433 read_register (14),
434 read_register (15));
435 printf_filtered ("IMAP0 %04x IMAP1 %04x DMAP %04x\n",
436 read_register (IMAP0_REGNUM),
437 read_register (IMAP1_REGNUM),
438 read_register (DMAP_REGNUM));
439 read_register_gen (A0_REGNUM, (char *)&num1);
440 read_register_gen (A0_REGNUM+1, (char *)&num2);
441 printf_filtered ("A0-A1 %010llx %010llx\n",num1, num2);
442 }
443
444 static CORE_ADDR
445 d10v_xlate_addr (addr)
446 int addr;
447 {
448 int imap;
449
450 if (addr < 0x20000)
451 imap = (int)read_register(IMAP0_REGNUM);
452 else
453 imap = (int)read_register(IMAP1_REGNUM);
454
455 if (imap & 0x1000)
456 return (CORE_ADDR)(addr + 0x1000000);
457 return (CORE_ADDR)(addr + (imap & 0xff)*0x20000);
458 }
459
460
461 CORE_ADDR
462 d10v_read_pc (pid)
463 int pid;
464 {
465 int save_pid, retval;
466
467 save_pid = inferior_pid;
468 inferior_pid = pid;
469 retval = (int)read_register (PC_REGNUM);
470 inferior_pid = save_pid;
471 return d10v_xlate_addr(retval << 2);
472 }
473
474 void
475 d10v_write_pc (val, pid)
476 CORE_ADDR val;
477 int pid;
478 {
479 int save_pid;
480
481 save_pid = inferior_pid;
482 inferior_pid = pid;
483 write_register (PC_REGNUM, (val & 0x3ffff) >> 2);
484 inferior_pid = save_pid;
485 }
486
487 CORE_ADDR
488 d10v_read_sp ()
489 {
490 return (read_register(SP_REGNUM) | DMEM_START);
491 }
492
493 void
494 d10v_write_sp (val)
495 CORE_ADDR val;
496 {
497 write_register (SP_REGNUM, (LONGEST)(val & 0xffff));
498 }
499
500 CORE_ADDR
501 d10v_fix_call_dummy (dummyname, start_sp, fun, nargs, args, type, gcc_p)
502 char *dummyname;
503 CORE_ADDR start_sp;
504 CORE_ADDR fun;
505 int nargs;
506 value_ptr *args;
507 struct type *type;
508 int gcc_p;
509 {
510 int regnum;
511 CORE_ADDR sp;
512 char buffer[MAX_REGISTER_RAW_SIZE];
513 struct frame_info *frame = get_current_frame ();
514 frame->dummy = start_sp;
515 start_sp |= DMEM_START;
516
517 sp = start_sp;
518 for (regnum = 0; regnum < NUM_REGS; regnum++)
519 {
520 sp -= REGISTER_RAW_SIZE(regnum);
521 store_address (buffer, REGISTER_RAW_SIZE(regnum), read_register(regnum));
522 write_memory (sp, buffer, REGISTER_RAW_SIZE(regnum));
523 }
524 write_register (SP_REGNUM, (LONGEST)(sp & 0xffff));
525 /* now we need to load LR with the return address */
526 write_register (LR_REGNUM, (LONGEST)(d10v_call_dummy_address() & 0xffff) >> 2);
527 return sp;
528 }
529
530 static void
531 d10v_pop_dummy_frame (fi)
532 struct frame_info *fi;
533 {
534 CORE_ADDR sp = fi->dummy;
535 int regnum;
536
537 for (regnum = 0; regnum < NUM_REGS; regnum++)
538 {
539 sp -= REGISTER_RAW_SIZE(regnum);
540 write_register(regnum, read_memory_unsigned_integer (sp, REGISTER_RAW_SIZE(regnum)));
541 }
542 flush_cached_frames (); /* needed? */
543 }
544
545
546 CORE_ADDR
547 d10v_push_arguments (nargs, args, sp, struct_return, struct_addr)
548 int nargs;
549 value_ptr *args;
550 CORE_ADDR sp;
551 int struct_return;
552 CORE_ADDR struct_addr;
553 {
554 int i, len, index=0, regnum=2;
555 char buffer[4], *contents;
556 LONGEST val;
557 CORE_ADDR ptrs[10];
558
559 /* Pass 1. Put all large args on stack */
560 for (i = 0; i < nargs; i++)
561 {
562 value_ptr arg = args[i];
563 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
564 len = TYPE_LENGTH (arg_type);
565 contents = VALUE_CONTENTS(arg);
566 val = extract_signed_integer (contents, len);
567 if (len > 4)
568 {
569 /* put on stack and pass pointers */
570 sp -= len;
571 write_memory (sp, contents, len);
572 ptrs[index++] = sp;
573 }
574 }
575
576 index = 0;
577
578 for (i = 0; i < nargs; i++)
579 {
580 value_ptr arg = args[i];
581 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
582 len = TYPE_LENGTH (arg_type);
583 contents = VALUE_CONTENTS(arg);
584 val = extract_signed_integer (contents, len);
585 if (len > 4)
586 {
587 /* use a pointer to previously saved data */
588 if (regnum < 6)
589 write_register (regnum++, ptrs[index++]);
590 else
591 {
592 /* no more registers available. put it on the stack */
593 sp -= 2;
594 store_address (buffer, 2, ptrs[index++]);
595 write_memory (sp, buffer, 2);
596 }
597 }
598 else
599 {
600 if (regnum < 6 )
601 {
602 if (len == 4)
603 write_register (regnum++, val>>16);
604 write_register (regnum++, val & 0xffff);
605 }
606 else
607 {
608 sp -= len;
609 store_address (buffer, len, val);
610 write_memory (sp, buffer, len);
611 }
612 }
613 }
614 return sp;
615 }
616
617
618 /* pick an out-of-the-way place to set the return value */
619 /* for an inferior function call. The link register is set to this */
620 /* value and a momentary breakpoint is set there. When the breakpoint */
621 /* is hit, the dummy frame is popped and the previous environment is */
622 /* restored. */
623
624 CORE_ADDR
625 d10v_call_dummy_address ()
626 {
627 CORE_ADDR entry;
628 struct minimal_symbol *sym;
629
630 entry = entry_point_address ();
631
632 if (entry != 0)
633 return entry;
634
635 sym = lookup_minimal_symbol ("_start", NULL, symfile_objfile);
636
637 if (!sym || MSYMBOL_TYPE (sym) != mst_text)
638 return 0;
639 else
640 return SYMBOL_VALUE_ADDRESS (sym);
641 }
642
643 /* Given a return value in `regbuf' with a type `valtype',
644 extract and copy its value into `valbuf'. */
645
646 void
647 d10v_extract_return_value (valtype, regbuf, valbuf)
648 struct type *valtype;
649 char regbuf[REGISTER_BYTES];
650 char *valbuf;
651 {
652 memcpy (valbuf, regbuf + REGISTER_BYTE (2), TYPE_LENGTH (valtype));
653 }
654
655 /* The following code implements access to, and display of, the D10V's
656 instruction trace buffer. The buffer consists of 64K or more
657 4-byte words of data, of which each words includes an 8-bit count,
658 an 8-bit segment number, and a 16-bit instruction address.
659
660 In theory, the trace buffer is continuously capturing instruction
661 data that the CPU presents on its "debug bus", but in practice, the
662 ROMified GDB stub only enables tracing when it continues or steps
663 the program, and stops tracing when the program stops; so it
664 actually works for GDB to read the buffer counter out of memory and
665 then read each trace word. The counter records where the tracing
666 stops, but there is no record of where it started, so we remember
667 the PC when we resumed and then search backwards in the trace
668 buffer for a word that includes that address. This is not perfect,
669 because you will miss trace data if the resumption PC is the target
670 of a branch. (The value of the buffer counter is semi-random, any
671 trace data from a previous program stop is gone.) */
672
673 /* The address of the last word recorded in the trace buffer. */
674
675 #define DBBC_ADDR (0xd80000)
676
677 /* The base of the trace buffer, at least for the "Board_0". */
678
679 #define TRACE_BUFFER_BASE (0xf40000)
680
681 static void trace_command PARAMS ((char *, int));
682
683 static void untrace_command PARAMS ((char *, int));
684
685 static void trace_info PARAMS ((char *, int));
686
687 static void tdisassemble_command PARAMS ((char *, int));
688
689 static void display_trace PARAMS ((int, int));
690
691 /* True when instruction traces are being collected. */
692
693 static int tracing;
694
695 /* Remembered PC. */
696
697 static CORE_ADDR last_pc;
698
699 /* True when trace output should be displayed whenever program stops. */
700
701 static int trace_display;
702
703 /* True when trace listing should include source lines. */
704
705 static int default_trace_show_source = 1;
706
707 struct trace_buffer {
708 int size;
709 short *counts;
710 CORE_ADDR *addrs;
711 } trace_data;
712
713 static void
714 trace_command (args, from_tty)
715 char *args;
716 int from_tty;
717 {
718 /* Clear the host-side trace buffer, allocating space if needed. */
719 trace_data.size = 0;
720 if (trace_data.counts == NULL)
721 trace_data.counts = (short *) xmalloc (65536 * sizeof(short));
722 if (trace_data.addrs == NULL)
723 trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof(CORE_ADDR));
724
725 tracing = 1;
726
727 printf_filtered ("Tracing is now on.\n");
728 }
729
730 static void
731 untrace_command (args, from_tty)
732 char *args;
733 int from_tty;
734 {
735 tracing = 0;
736
737 printf_filtered ("Tracing is now off.\n");
738 }
739
740 static void
741 trace_info (args, from_tty)
742 char *args;
743 int from_tty;
744 {
745 int i;
746
747 if (trace_data.size)
748 {
749 printf_filtered ("%d entries in trace buffer:\n", trace_data.size);
750
751 for (i = 0; i < trace_data.size; ++i)
752 {
753 printf_filtered ("%d: %d instruction%s at 0x%x\n",
754 i, trace_data.counts[i],
755 (trace_data.counts[i] == 1 ? "" : "s"),
756 trace_data.addrs[i]);
757 }
758 }
759 else
760 printf_filtered ("No entries in trace buffer.\n");
761
762 printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off"));
763 }
764
765 /* Print the instruction at address MEMADDR in debugged memory,
766 on STREAM. Returns length of the instruction, in bytes. */
767
768 static int
769 print_insn (memaddr, stream)
770 CORE_ADDR memaddr;
771 GDB_FILE *stream;
772 {
773 /* If there's no disassembler, something is very wrong. */
774 if (tm_print_insn == NULL)
775 abort ();
776
777 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
778 tm_print_insn_info.endian = BFD_ENDIAN_BIG;
779 else
780 tm_print_insn_info.endian = BFD_ENDIAN_LITTLE;
781 return (*tm_print_insn) (memaddr, &tm_print_insn_info);
782 }
783
784 void
785 d10v_eva_prepare_to_trace ()
786 {
787 if (!tracing)
788 return;
789
790 last_pc = read_register (PC_REGNUM);
791 }
792
793 /* Collect trace data from the target board and format it into a form
794 more useful for display. */
795
796 void
797 d10v_eva_get_trace_data ()
798 {
799 int count, i, j, oldsize;
800 int trace_addr, trace_seg, trace_cnt, next_cnt;
801 unsigned int last_trace, trace_word, next_word;
802 unsigned int *tmpspace;
803
804 if (!tracing)
805 return;
806
807 tmpspace = xmalloc (65536 * sizeof(unsigned int));
808
809 last_trace = read_memory_unsigned_integer (DBBC_ADDR, 2) << 2;
810
811 /* Collect buffer contents from the target, stopping when we reach
812 the word recorded when execution resumed. */
813
814 count = 0;
815 while (last_trace > 0)
816 {
817 QUIT;
818 trace_word =
819 read_memory_unsigned_integer (TRACE_BUFFER_BASE + last_trace, 4);
820 trace_addr = trace_word & 0xffff;
821 last_trace -= 4;
822 /* Ignore an apparently nonsensical entry. */
823 if (trace_addr == 0xffd5)
824 continue;
825 tmpspace[count++] = trace_word;
826 if (trace_addr == last_pc)
827 break;
828 if (count > 65535)
829 break;
830 }
831
832 /* Move the data to the host-side trace buffer, adjusting counts to
833 include the last instruction executed and transforming the address
834 into something that GDB likes. */
835
836 for (i = 0; i < count; ++i)
837 {
838 trace_word = tmpspace[i];
839 next_word = ((i == 0) ? 0 : tmpspace[i - 1]);
840 trace_addr = trace_word & 0xffff;
841 next_cnt = (next_word >> 24) & 0xff;
842 j = trace_data.size + count - i - 1;
843 trace_data.addrs[j] = (trace_addr << 2) + 0x1000000;
844 trace_data.counts[j] = next_cnt + 1;
845 }
846
847 oldsize = trace_data.size;
848 trace_data.size += count;
849
850 free (tmpspace);
851
852 if (trace_display)
853 display_trace (oldsize, trace_data.size);
854 }
855
856 static void
857 tdisassemble_command (arg, from_tty)
858 char *arg;
859 int from_tty;
860 {
861 int i, count;
862 CORE_ADDR low, high;
863 char *space_index;
864
865 if (!arg)
866 {
867 low = 0;
868 high = trace_data.size;
869 }
870 else if (!(space_index = (char *) strchr (arg, ' ')))
871 {
872 low = parse_and_eval_address (arg);
873 high = low + 5;
874 }
875 else
876 {
877 /* Two arguments. */
878 *space_index = '\0';
879 low = parse_and_eval_address (arg);
880 high = parse_and_eval_address (space_index + 1);
881 if (high < low)
882 high = low;
883 }
884
885 printf_filtered ("Dump of trace from %d to %d:\n", low, high);
886
887 display_trace (low, high);
888
889 printf_filtered ("End of trace dump.\n");
890 gdb_flush (gdb_stdout);
891 }
892
893 static void
894 display_trace (low, high)
895 int low, high;
896 {
897 int i, count, trace_show_source, first, suppress;
898 CORE_ADDR next_address;
899
900 trace_show_source = default_trace_show_source;
901 if (!have_full_symbols () && !have_partial_symbols())
902 {
903 trace_show_source = 0;
904 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
905 printf_filtered ("Trace will not display any source.\n");
906 }
907
908 first = 1;
909 suppress = 0;
910 for (i = low; i < high; ++i)
911 {
912 next_address = trace_data.addrs[i];
913 count = trace_data.counts[i];
914 while (count-- > 0)
915 {
916 QUIT;
917 if (trace_show_source)
918 {
919 struct symtab_and_line sal, sal_prev;
920
921 sal_prev = find_pc_line (next_address - 4, 0);
922 sal = find_pc_line (next_address, 0);
923
924 if (sal.symtab)
925 {
926 if (first || sal.line != sal_prev.line)
927 print_source_lines (sal.symtab, sal.line, sal.line + 1, 0);
928 suppress = 0;
929 }
930 else
931 {
932 if (!suppress)
933 /* FIXME-32x64--assumes sal.pc fits in long. */
934 printf_filtered ("No source file for address %s.\n",
935 local_hex_string((unsigned long) sal.pc));
936 suppress = 1;
937 }
938 }
939 first = 0;
940 print_address (next_address, gdb_stdout);
941 printf_filtered (":");
942 printf_filtered ("\t");
943 wrap_here (" ");
944 next_address = next_address + print_insn (next_address, gdb_stdout);
945 printf_filtered ("\n");
946 gdb_flush (gdb_stdout);
947 }
948 }
949 }
950
951 extern void (*target_resume_hook) PARAMS ((void));
952 extern void (*target_wait_loop_hook) PARAMS ((void));
953
954 void
955 _initialize_d10v_tdep ()
956 {
957 tm_print_insn = print_insn_d10v;
958
959 target_resume_hook = d10v_eva_prepare_to_trace;
960 target_wait_loop_hook = d10v_eva_get_trace_data;
961
962 add_com ("regs", class_vars, show_regs, "Print all registers");
963
964 add_com ("trace", class_support, trace_command,
965 "Enable tracing of instruction execution.");
966
967 add_com ("untrace", class_support, untrace_command,
968 "Disable tracing of instruction execution.");
969
970 add_com ("tdisassemble", class_vars, tdisassemble_command,
971 "Disassemble the trace buffer.\n\
972 Two optional arguments specify a range of trace buffer entries\n\
973 as reported by info trace (NOT addresses!).");
974
975 add_info ("trace", trace_info,
976 "Display info about the trace data buffer.");
977
978 add_show_from_set (add_set_cmd ("tracedisplay", no_class,
979 var_integer, (char *)&trace_display,
980 "Set automatic display of trace.\n", &setlist),
981 &showlist);
982 add_show_from_set (add_set_cmd ("tracesource", no_class,
983 var_integer, (char *)&default_trace_show_source,
984 "Set display of source code with trace.\n", &setlist),
985 &showlist);
986
987 }
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