import gdb-1999-09-08 snapshot
[deliverable/binutils-gdb.git] / gdb / d10v-tdep.c
1 /* Target-dependent code for Mitsubishi D10V, for GDB.
2 Copyright (C) 1996, 1997 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 /* Contributed by Martin Hunt, hunt@cygnus.com */
22
23 #include "defs.h"
24 #include "frame.h"
25 #include "obstack.h"
26 #include "symtab.h"
27 #include "gdbtypes.h"
28 #include "gdbcmd.h"
29 #include "gdbcore.h"
30 #include "gdb_string.h"
31 #include "value.h"
32 #include "inferior.h"
33 #include "dis-asm.h"
34 #include "symfile.h"
35 #include "objfiles.h"
36 #include "language.h"
37
38 struct frame_extra_info
39 {
40 CORE_ADDR return_pc;
41 int frameless;
42 int size;
43 };
44
45 /* these are the addresses the D10V-EVA board maps data */
46 /* and instruction memory to. */
47
48 #define DMEM_START 0x0000000
49 #define IMEM_START 0x1000000
50 #define STACK_START 0x0007ffe
51
52 /* d10v register naming conventions */
53
54 #define ARG1_REGNUM R0_REGNUM
55 #define ARGN_REGNUM 3
56 #define RET1_REGNUM R0_REGNUM
57
58 /* Local functions */
59
60 extern void _initialize_d10v_tdep PARAMS ((void));
61
62 static void d10v_eva_prepare_to_trace PARAMS ((void));
63
64 static void d10v_eva_get_trace_data PARAMS ((void));
65
66 static int prologue_find_regs PARAMS ((unsigned short op, struct frame_info * fi, CORE_ADDR addr));
67
68 extern void d10v_frame_init_saved_regs PARAMS ((struct frame_info *));
69
70 static void do_d10v_pop_frame PARAMS ((struct frame_info * fi));
71
72 /* FIXME */
73 extern void remote_d10v_translate_xfer_address PARAMS ((CORE_ADDR gdb_addr, int gdb_len, CORE_ADDR * rem_addr, int *rem_len));
74
75 int
76 d10v_frame_chain_valid (chain, frame)
77 CORE_ADDR chain;
78 struct frame_info *frame; /* not used here */
79 {
80 return ((chain) != 0 && (frame) != 0 && (frame)->pc > IMEM_START);
81 }
82
83
84 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
85 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
86 and TYPE is the type (which is known to be struct, union or array).
87
88 The d10v returns anything less than 8 bytes in size in
89 registers. */
90
91 int
92 d10v_use_struct_convention (gcc_p, type)
93 int gcc_p;
94 struct type *type;
95 {
96 return (TYPE_LENGTH (type) > 8);
97 }
98
99
100 unsigned char *
101 d10v_breakpoint_from_pc (pcptr, lenptr)
102 CORE_ADDR *pcptr;
103 int *lenptr;
104 {
105 static unsigned char breakpoint[] =
106 {0x2f, 0x90, 0x5e, 0x00};
107 *lenptr = sizeof (breakpoint);
108 return breakpoint;
109 }
110
111 char *
112 d10v_register_name (reg_nr)
113 int reg_nr;
114 {
115 static char *register_names[] =
116 {
117 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
118 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
119 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
120 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
121 "imap0", "imap1", "dmap", "a0", "a1"
122 };
123 if (reg_nr < 0)
124 return NULL;
125 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
126 return NULL;
127 return register_names[reg_nr];
128 }
129
130
131 /* Index within `registers' of the first byte of the space for
132 register REG_NR. */
133
134 int
135 d10v_register_byte (reg_nr)
136 int reg_nr;
137 {
138 if (reg_nr > A0_REGNUM)
139 return ((reg_nr - A0_REGNUM) * 8 + (A0_REGNUM * 2));
140 else
141 return (reg_nr * 2);
142 }
143
144 /* Number of bytes of storage in the actual machine representation for
145 register REG_NR. */
146
147 int
148 d10v_register_raw_size (reg_nr)
149 int reg_nr;
150 {
151 if (reg_nr >= A0_REGNUM)
152 return 8;
153 else
154 return 2;
155 }
156
157 /* Number of bytes of storage in the program's representation
158 for register N. */
159
160 int
161 d10v_register_virtual_size (reg_nr)
162 int reg_nr;
163 {
164 if (reg_nr >= A0_REGNUM)
165 return 8;
166 else if (reg_nr == PC_REGNUM || reg_nr == SP_REGNUM)
167 return 4;
168 else
169 return 2;
170 }
171
172 /* Return the GDB type object for the "standard" data type
173 of data in register N. */
174
175 struct type *
176 d10v_register_virtual_type (reg_nr)
177 int reg_nr;
178 {
179 if (reg_nr >= A0_REGNUM)
180 return builtin_type_long_long;
181 else if (reg_nr == PC_REGNUM || reg_nr == SP_REGNUM)
182 return builtin_type_long;
183 else
184 return builtin_type_short;
185 }
186
187 /* convert $pc and $sp to/from virtual addresses */
188 int
189 d10v_register_convertible (nr)
190 int nr;
191 {
192 return ((nr) == PC_REGNUM || (nr) == SP_REGNUM);
193 }
194
195 void
196 d10v_register_convert_to_virtual (regnum, type, from, to)
197 int regnum;
198 struct type *type;
199 char *from;
200 char *to;
201 {
202 ULONGEST x = extract_unsigned_integer (from, REGISTER_RAW_SIZE (regnum));
203 if (regnum == PC_REGNUM)
204 x = (x << 2) | IMEM_START;
205 else
206 x |= DMEM_START;
207 store_unsigned_integer (to, TYPE_LENGTH (type), x);
208 }
209
210 void
211 d10v_register_convert_to_raw (type, regnum, from, to)
212 struct type *type;
213 int regnum;
214 char *from;
215 char *to;
216 {
217 ULONGEST x = extract_unsigned_integer (from, TYPE_LENGTH (type));
218 x &= 0x3ffff;
219 if (regnum == PC_REGNUM)
220 x >>= 2;
221 store_unsigned_integer (to, 2, x);
222 }
223
224
225 CORE_ADDR
226 d10v_make_daddr (x)
227 CORE_ADDR x;
228 {
229 return ((x) | DMEM_START);
230 }
231
232 CORE_ADDR
233 d10v_make_iaddr (x)
234 CORE_ADDR x;
235 {
236 return (((x) << 2) | IMEM_START);
237 }
238
239 int
240 d10v_daddr_p (x)
241 CORE_ADDR x;
242 {
243 return (((x) & 0x3000000) == DMEM_START);
244 }
245
246 int
247 d10v_iaddr_p (x)
248 CORE_ADDR x;
249 {
250 return (((x) & 0x3000000) == IMEM_START);
251 }
252
253
254 CORE_ADDR
255 d10v_convert_iaddr_to_raw (x)
256 CORE_ADDR x;
257 {
258 return (((x) >> 2) & 0xffff);
259 }
260
261 CORE_ADDR
262 d10v_convert_daddr_to_raw (x)
263 CORE_ADDR x;
264 {
265 return ((x) & 0xffff);
266 }
267
268 /* Store the address of the place in which to copy the structure the
269 subroutine will return. This is called from call_function.
270
271 We store structs through a pointer passed in the first Argument
272 register. */
273
274 void
275 d10v_store_struct_return (addr, sp)
276 CORE_ADDR addr;
277 CORE_ADDR sp;
278 {
279 write_register (ARG1_REGNUM, (addr));
280 }
281
282 /* Write into appropriate registers a function return value
283 of type TYPE, given in virtual format.
284
285 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
286
287 void
288 d10v_store_return_value (type, valbuf)
289 struct type *type;
290 char *valbuf;
291 {
292 write_register_bytes (REGISTER_BYTE (RET1_REGNUM),
293 valbuf,
294 TYPE_LENGTH (type));
295 }
296
297 /* Extract from an array REGBUF containing the (raw) register state
298 the address in which a function should return its structure value,
299 as a CORE_ADDR (or an expression that can be used as one). */
300
301 CORE_ADDR
302 d10v_extract_struct_value_address (regbuf)
303 char *regbuf;
304 {
305 return (extract_address ((regbuf) + REGISTER_BYTE (ARG1_REGNUM),
306 REGISTER_RAW_SIZE (ARG1_REGNUM))
307 | DMEM_START);
308 }
309
310 CORE_ADDR
311 d10v_frame_saved_pc (frame)
312 struct frame_info *frame;
313 {
314 return ((frame)->extra_info->return_pc);
315 }
316
317 CORE_ADDR
318 d10v_frame_args_address (fi)
319 struct frame_info *fi;
320 {
321 return (fi)->frame;
322 }
323
324 CORE_ADDR
325 d10v_frame_locals_address (fi)
326 struct frame_info *fi;
327 {
328 return (fi)->frame;
329 }
330
331 /* Immediately after a function call, return the saved pc. We can't
332 use frame->return_pc beause that is determined by reading R13 off
333 the stack and that may not be written yet. */
334
335 CORE_ADDR
336 d10v_saved_pc_after_call (frame)
337 struct frame_info *frame;
338 {
339 return ((read_register (LR_REGNUM) << 2)
340 | IMEM_START);
341 }
342
343 /* Discard from the stack the innermost frame, restoring all saved
344 registers. */
345
346 void
347 d10v_pop_frame ()
348 {
349 generic_pop_current_frame (do_d10v_pop_frame);
350 }
351
352 static void
353 do_d10v_pop_frame (fi)
354 struct frame_info *fi;
355 {
356 CORE_ADDR fp;
357 int regnum;
358 char raw_buffer[8];
359
360 fp = FRAME_FP (fi);
361 /* fill out fsr with the address of where each */
362 /* register was stored in the frame */
363 d10v_frame_init_saved_regs (fi);
364
365 /* now update the current registers with the old values */
366 for (regnum = A0_REGNUM; regnum < A0_REGNUM + 2; regnum++)
367 {
368 if (fi->saved_regs[regnum])
369 {
370 read_memory (fi->saved_regs[regnum], raw_buffer, REGISTER_RAW_SIZE (regnum));
371 write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, REGISTER_RAW_SIZE (regnum));
372 }
373 }
374 for (regnum = 0; regnum < SP_REGNUM; regnum++)
375 {
376 if (fi->saved_regs[regnum])
377 {
378 write_register (regnum, read_memory_unsigned_integer (fi->saved_regs[regnum], REGISTER_RAW_SIZE (regnum)));
379 }
380 }
381 if (fi->saved_regs[PSW_REGNUM])
382 {
383 write_register (PSW_REGNUM, read_memory_unsigned_integer (fi->saved_regs[PSW_REGNUM], REGISTER_RAW_SIZE (PSW_REGNUM)));
384 }
385
386 write_register (PC_REGNUM, read_register (LR_REGNUM));
387 write_register (SP_REGNUM, fp + fi->extra_info->size);
388 target_store_registers (-1);
389 flush_cached_frames ();
390 }
391
392 static int
393 check_prologue (op)
394 unsigned short op;
395 {
396 /* st rn, @-sp */
397 if ((op & 0x7E1F) == 0x6C1F)
398 return 1;
399
400 /* st2w rn, @-sp */
401 if ((op & 0x7E3F) == 0x6E1F)
402 return 1;
403
404 /* subi sp, n */
405 if ((op & 0x7FE1) == 0x01E1)
406 return 1;
407
408 /* mv r11, sp */
409 if (op == 0x417E)
410 return 1;
411
412 /* nop */
413 if (op == 0x5E00)
414 return 1;
415
416 /* st rn, @sp */
417 if ((op & 0x7E1F) == 0x681E)
418 return 1;
419
420 /* st2w rn, @sp */
421 if ((op & 0x7E3F) == 0x3A1E)
422 return 1;
423
424 return 0;
425 }
426
427 CORE_ADDR
428 d10v_skip_prologue (pc)
429 CORE_ADDR pc;
430 {
431 unsigned long op;
432 unsigned short op1, op2;
433 CORE_ADDR func_addr, func_end;
434 struct symtab_and_line sal;
435
436 /* If we have line debugging information, then the end of the */
437 /* prologue should the first assembly instruction of the first source line */
438 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
439 {
440 sal = find_pc_line (func_addr, 0);
441 if (sal.end && sal.end < func_end)
442 return sal.end;
443 }
444
445 if (target_read_memory (pc, (char *) &op, 4))
446 return pc; /* Can't access it -- assume no prologue. */
447
448 while (1)
449 {
450 op = (unsigned long) read_memory_integer (pc, 4);
451 if ((op & 0xC0000000) == 0xC0000000)
452 {
453 /* long instruction */
454 if (((op & 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
455 ((op & 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
456 ((op & 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
457 break;
458 }
459 else
460 {
461 /* short instructions */
462 if ((op & 0xC0000000) == 0x80000000)
463 {
464 op2 = (op & 0x3FFF8000) >> 15;
465 op1 = op & 0x7FFF;
466 }
467 else
468 {
469 op1 = (op & 0x3FFF8000) >> 15;
470 op2 = op & 0x7FFF;
471 }
472 if (check_prologue (op1))
473 {
474 if (!check_prologue (op2))
475 {
476 /* if the previous opcode was really part of the prologue */
477 /* and not just a NOP, then we want to break after both instructions */
478 if (op1 != 0x5E00)
479 pc += 4;
480 break;
481 }
482 }
483 else
484 break;
485 }
486 pc += 4;
487 }
488 return pc;
489 }
490
491 /* Given a GDB frame, determine the address of the calling function's frame.
492 This will be used to create a new GDB frame struct, and then
493 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
494 */
495
496 CORE_ADDR
497 d10v_frame_chain (fi)
498 struct frame_info *fi;
499 {
500 d10v_frame_init_saved_regs (fi);
501
502 if (fi->extra_info->return_pc == IMEM_START
503 || inside_entry_file (fi->extra_info->return_pc))
504 return (CORE_ADDR) 0;
505
506 if (!fi->saved_regs[FP_REGNUM])
507 {
508 if (!fi->saved_regs[SP_REGNUM]
509 || fi->saved_regs[SP_REGNUM] == STACK_START)
510 return (CORE_ADDR) 0;
511
512 return fi->saved_regs[SP_REGNUM];
513 }
514
515 if (!read_memory_unsigned_integer (fi->saved_regs[FP_REGNUM],
516 REGISTER_RAW_SIZE (FP_REGNUM)))
517 return (CORE_ADDR) 0;
518
519 return D10V_MAKE_DADDR (read_memory_unsigned_integer (fi->saved_regs[FP_REGNUM],
520 REGISTER_RAW_SIZE (FP_REGNUM)));
521 }
522
523 static int next_addr, uses_frame;
524
525 static int
526 prologue_find_regs (op, fi, addr)
527 unsigned short op;
528 struct frame_info *fi;
529 CORE_ADDR addr;
530 {
531 int n;
532
533 /* st rn, @-sp */
534 if ((op & 0x7E1F) == 0x6C1F)
535 {
536 n = (op & 0x1E0) >> 5;
537 next_addr -= 2;
538 fi->saved_regs[n] = next_addr;
539 return 1;
540 }
541
542 /* st2w rn, @-sp */
543 else if ((op & 0x7E3F) == 0x6E1F)
544 {
545 n = (op & 0x1E0) >> 5;
546 next_addr -= 4;
547 fi->saved_regs[n] = next_addr;
548 fi->saved_regs[n + 1] = next_addr + 2;
549 return 1;
550 }
551
552 /* subi sp, n */
553 if ((op & 0x7FE1) == 0x01E1)
554 {
555 n = (op & 0x1E) >> 1;
556 if (n == 0)
557 n = 16;
558 next_addr -= n;
559 return 1;
560 }
561
562 /* mv r11, sp */
563 if (op == 0x417E)
564 {
565 uses_frame = 1;
566 return 1;
567 }
568
569 /* nop */
570 if (op == 0x5E00)
571 return 1;
572
573 /* st rn, @sp */
574 if ((op & 0x7E1F) == 0x681E)
575 {
576 n = (op & 0x1E0) >> 5;
577 fi->saved_regs[n] = next_addr;
578 return 1;
579 }
580
581 /* st2w rn, @sp */
582 if ((op & 0x7E3F) == 0x3A1E)
583 {
584 n = (op & 0x1E0) >> 5;
585 fi->saved_regs[n] = next_addr;
586 fi->saved_regs[n + 1] = next_addr + 2;
587 return 1;
588 }
589
590 return 0;
591 }
592
593 /* Put here the code to store, into fi->saved_regs, the addresses of
594 the saved registers of frame described by FRAME_INFO. This
595 includes special registers such as pc and fp saved in special ways
596 in the stack frame. sp is even more special: the address we return
597 for it IS the sp for the next frame. */
598
599 void
600 d10v_frame_init_saved_regs (fi)
601 struct frame_info *fi;
602 {
603 CORE_ADDR fp, pc;
604 unsigned long op;
605 unsigned short op1, op2;
606 int i;
607
608 fp = fi->frame;
609 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
610 next_addr = 0;
611
612 pc = get_pc_function_start (fi->pc);
613
614 uses_frame = 0;
615 while (1)
616 {
617 op = (unsigned long) read_memory_integer (pc, 4);
618 if ((op & 0xC0000000) == 0xC0000000)
619 {
620 /* long instruction */
621 if ((op & 0x3FFF0000) == 0x01FF0000)
622 {
623 /* add3 sp,sp,n */
624 short n = op & 0xFFFF;
625 next_addr += n;
626 }
627 else if ((op & 0x3F0F0000) == 0x340F0000)
628 {
629 /* st rn, @(offset,sp) */
630 short offset = op & 0xFFFF;
631 short n = (op >> 20) & 0xF;
632 fi->saved_regs[n] = next_addr + offset;
633 }
634 else if ((op & 0x3F1F0000) == 0x350F0000)
635 {
636 /* st2w rn, @(offset,sp) */
637 short offset = op & 0xFFFF;
638 short n = (op >> 20) & 0xF;
639 fi->saved_regs[n] = next_addr + offset;
640 fi->saved_regs[n + 1] = next_addr + offset + 2;
641 }
642 else
643 break;
644 }
645 else
646 {
647 /* short instructions */
648 if ((op & 0xC0000000) == 0x80000000)
649 {
650 op2 = (op & 0x3FFF8000) >> 15;
651 op1 = op & 0x7FFF;
652 }
653 else
654 {
655 op1 = (op & 0x3FFF8000) >> 15;
656 op2 = op & 0x7FFF;
657 }
658 if (!prologue_find_regs (op1, fi, pc) || !prologue_find_regs (op2, fi, pc))
659 break;
660 }
661 pc += 4;
662 }
663
664 fi->extra_info->size = -next_addr;
665
666 if (!(fp & 0xffff))
667 fp = D10V_MAKE_DADDR (read_register (SP_REGNUM));
668
669 for (i = 0; i < NUM_REGS - 1; i++)
670 if (fi->saved_regs[i])
671 {
672 fi->saved_regs[i] = fp - (next_addr - fi->saved_regs[i]);
673 }
674
675 if (fi->saved_regs[LR_REGNUM])
676 {
677 CORE_ADDR return_pc = read_memory_unsigned_integer (fi->saved_regs[LR_REGNUM], REGISTER_RAW_SIZE (LR_REGNUM));
678 fi->extra_info->return_pc = D10V_MAKE_IADDR (return_pc);
679 }
680 else
681 {
682 fi->extra_info->return_pc = D10V_MAKE_IADDR (read_register (LR_REGNUM));
683 }
684
685 /* th SP is not normally (ever?) saved, but check anyway */
686 if (!fi->saved_regs[SP_REGNUM])
687 {
688 /* if the FP was saved, that means the current FP is valid, */
689 /* otherwise, it isn't being used, so we use the SP instead */
690 if (uses_frame)
691 fi->saved_regs[SP_REGNUM] = read_register (FP_REGNUM) + fi->extra_info->size;
692 else
693 {
694 fi->saved_regs[SP_REGNUM] = fp + fi->extra_info->size;
695 fi->extra_info->frameless = 1;
696 fi->saved_regs[FP_REGNUM] = 0;
697 }
698 }
699 }
700
701 void
702 d10v_init_extra_frame_info (fromleaf, fi)
703 int fromleaf;
704 struct frame_info *fi;
705 {
706 fi->extra_info = (struct frame_extra_info *)
707 frame_obstack_alloc (sizeof (struct frame_extra_info));
708 frame_saved_regs_zalloc (fi);
709
710 fi->extra_info->frameless = 0;
711 fi->extra_info->size = 0;
712 fi->extra_info->return_pc = 0;
713
714 /* The call dummy doesn't save any registers on the stack, so we can
715 return now. */
716 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
717 {
718 return;
719 }
720 else
721 {
722 d10v_frame_init_saved_regs (fi);
723 }
724 }
725
726 static void
727 show_regs (args, from_tty)
728 char *args;
729 int from_tty;
730 {
731 int a;
732 printf_filtered ("PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
733 (long) read_register (PC_REGNUM),
734 (long) D10V_MAKE_IADDR (read_register (PC_REGNUM)),
735 (long) read_register (PSW_REGNUM),
736 (long) read_register (24),
737 (long) read_register (25),
738 (long) read_register (23));
739 printf_filtered ("R0-R7 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
740 (long) read_register (0),
741 (long) read_register (1),
742 (long) read_register (2),
743 (long) read_register (3),
744 (long) read_register (4),
745 (long) read_register (5),
746 (long) read_register (6),
747 (long) read_register (7));
748 printf_filtered ("R8-R15 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
749 (long) read_register (8),
750 (long) read_register (9),
751 (long) read_register (10),
752 (long) read_register (11),
753 (long) read_register (12),
754 (long) read_register (13),
755 (long) read_register (14),
756 (long) read_register (15));
757 printf_filtered ("IMAP0 %04lx IMAP1 %04lx DMAP %04lx\n",
758 (long) read_register (IMAP0_REGNUM),
759 (long) read_register (IMAP1_REGNUM),
760 (long) read_register (DMAP_REGNUM));
761 printf_filtered ("A0-A1");
762 for (a = A0_REGNUM; a <= A0_REGNUM + 1; a++)
763 {
764 char num[MAX_REGISTER_RAW_SIZE];
765 int i;
766 printf_filtered (" ");
767 read_register_gen (a, (char *) &num);
768 for (i = 0; i < MAX_REGISTER_RAW_SIZE; i++)
769 {
770 printf_filtered ("%02x", (num[i] & 0xff));
771 }
772 }
773 printf_filtered ("\n");
774 }
775
776 CORE_ADDR
777 d10v_read_pc (pid)
778 int pid;
779 {
780 int save_pid;
781 CORE_ADDR pc;
782 CORE_ADDR retval;
783
784 save_pid = inferior_pid;
785 inferior_pid = pid;
786 pc = (int) read_register (PC_REGNUM);
787 inferior_pid = save_pid;
788 retval = D10V_MAKE_IADDR (pc);
789 return retval;
790 }
791
792 void
793 d10v_write_pc (val, pid)
794 CORE_ADDR val;
795 int pid;
796 {
797 int save_pid;
798
799 save_pid = inferior_pid;
800 inferior_pid = pid;
801 write_register (PC_REGNUM, D10V_CONVERT_IADDR_TO_RAW (val));
802 inferior_pid = save_pid;
803 }
804
805 CORE_ADDR
806 d10v_read_sp ()
807 {
808 return (D10V_MAKE_DADDR (read_register (SP_REGNUM)));
809 }
810
811 void
812 d10v_write_sp (val)
813 CORE_ADDR val;
814 {
815 write_register (SP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val));
816 }
817
818 void
819 d10v_write_fp (val)
820 CORE_ADDR val;
821 {
822 write_register (FP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val));
823 }
824
825 CORE_ADDR
826 d10v_read_fp ()
827 {
828 return (D10V_MAKE_DADDR (read_register (FP_REGNUM)));
829 }
830
831 /* Function: push_return_address (pc)
832 Set up the return address for the inferior function call.
833 Needed for targets where we don't actually execute a JSR/BSR instruction */
834
835 CORE_ADDR
836 d10v_push_return_address (pc, sp)
837 CORE_ADDR pc;
838 CORE_ADDR sp;
839 {
840 write_register (LR_REGNUM, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ()));
841 return sp;
842 }
843
844
845 /* When arguments must be pushed onto the stack, they go on in reverse
846 order. The below implements a FILO (stack) to do this. */
847
848 struct stack_item
849 {
850 int len;
851 struct stack_item *prev;
852 void *data;
853 };
854
855 static struct stack_item *push_stack_item PARAMS ((struct stack_item * prev, void *contents, int len));
856 static struct stack_item *
857 push_stack_item (prev, contents, len)
858 struct stack_item *prev;
859 void *contents;
860 int len;
861 {
862 struct stack_item *si;
863 si = xmalloc (sizeof (struct stack_item));
864 si->data = xmalloc (len);
865 si->len = len;
866 si->prev = prev;
867 memcpy (si->data, contents, len);
868 return si;
869 }
870
871 static struct stack_item *pop_stack_item PARAMS ((struct stack_item * si));
872 static struct stack_item *
873 pop_stack_item (si)
874 struct stack_item *si;
875 {
876 struct stack_item *dead = si;
877 si = si->prev;
878 free (dead->data);
879 free (dead);
880 return si;
881 }
882
883
884 CORE_ADDR
885 d10v_push_arguments (nargs, args, sp, struct_return, struct_addr)
886 int nargs;
887 value_ptr *args;
888 CORE_ADDR sp;
889 int struct_return;
890 CORE_ADDR struct_addr;
891 {
892 int i;
893 int regnum = ARG1_REGNUM;
894 struct stack_item *si = NULL;
895
896 /* Fill in registers and arg lists */
897 for (i = 0; i < nargs; i++)
898 {
899 value_ptr arg = args[i];
900 struct type *type = check_typedef (VALUE_TYPE (arg));
901 char *contents = VALUE_CONTENTS (arg);
902 int len = TYPE_LENGTH (type);
903 /* printf ("push: type=%d len=%d\n", type->code, len); */
904 if (TYPE_CODE (type) == TYPE_CODE_PTR)
905 {
906 /* pointers require special handling - first convert and
907 then store */
908 long val = extract_signed_integer (contents, len);
909 len = 2;
910 if (TYPE_TARGET_TYPE (type)
911 && (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC))
912 {
913 /* function pointer */
914 val = D10V_CONVERT_IADDR_TO_RAW (val);
915 }
916 else if (D10V_IADDR_P (val))
917 {
918 /* also function pointer! */
919 val = D10V_CONVERT_DADDR_TO_RAW (val);
920 }
921 else
922 {
923 /* data pointer */
924 val &= 0xFFFF;
925 }
926 if (regnum <= ARGN_REGNUM)
927 write_register (regnum++, val & 0xffff);
928 else
929 {
930 char ptr[2];
931 /* arg will go onto stack */
932 store_address (ptr, 2, val & 0xffff);
933 si = push_stack_item (si, ptr, 2);
934 }
935 }
936 else
937 {
938 int aligned_regnum = (regnum + 1) & ~1;
939 if (len <= 2 && regnum <= ARGN_REGNUM)
940 /* fits in a single register, do not align */
941 {
942 long val = extract_unsigned_integer (contents, len);
943 write_register (regnum++, val);
944 }
945 else if (len <= (ARGN_REGNUM - aligned_regnum + 1) * 2)
946 /* value fits in remaining registers, store keeping left
947 aligned */
948 {
949 int b;
950 regnum = aligned_regnum;
951 for (b = 0; b < (len & ~1); b += 2)
952 {
953 long val = extract_unsigned_integer (&contents[b], 2);
954 write_register (regnum++, val);
955 }
956 if (b < len)
957 {
958 long val = extract_unsigned_integer (&contents[b], 1);
959 write_register (regnum++, (val << 8));
960 }
961 }
962 else
963 {
964 /* arg will go onto stack */
965 regnum = ARGN_REGNUM + 1;
966 si = push_stack_item (si, contents, len);
967 }
968 }
969 }
970
971 while (si)
972 {
973 sp = (sp - si->len) & ~1;
974 write_memory (sp, si->data, si->len);
975 si = pop_stack_item (si);
976 }
977
978 return sp;
979 }
980
981
982 /* Given a return value in `regbuf' with a type `valtype',
983 extract and copy its value into `valbuf'. */
984
985 void
986 d10v_extract_return_value (type, regbuf, valbuf)
987 struct type *type;
988 char regbuf[REGISTER_BYTES];
989 char *valbuf;
990 {
991 int len;
992 /* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */
993 if (TYPE_CODE (type) == TYPE_CODE_PTR
994 && TYPE_TARGET_TYPE (type)
995 && (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC))
996 {
997 /* pointer to function */
998 int num;
999 short snum;
1000 snum = extract_address (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM));
1001 store_address (valbuf, 4, D10V_MAKE_IADDR (snum));
1002 }
1003 else if (TYPE_CODE (type) == TYPE_CODE_PTR)
1004 {
1005 /* pointer to data */
1006 int num;
1007 short snum;
1008 snum = extract_address (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM));
1009 store_address (valbuf, 4, D10V_MAKE_DADDR (snum));
1010 }
1011 else
1012 {
1013 len = TYPE_LENGTH (type);
1014 if (len == 1)
1015 {
1016 unsigned short c = extract_unsigned_integer (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM));
1017 store_unsigned_integer (valbuf, 1, c);
1018 }
1019 else if ((len & 1) == 0)
1020 memcpy (valbuf, regbuf + REGISTER_BYTE (RET1_REGNUM), len);
1021 else
1022 {
1023 /* For return values of odd size, the first byte is in the
1024 least significant part of the first register. The
1025 remaining bytes in remaining registers. Interestingly,
1026 when such values are passed in, the last byte is in the
1027 most significant byte of that same register - wierd. */
1028 memcpy (valbuf, regbuf + REGISTER_BYTE (RET1_REGNUM) + 1, len);
1029 }
1030 }
1031 }
1032
1033 /* The following code implements access to, and display of, the D10V's
1034 instruction trace buffer. The buffer consists of 64K or more
1035 4-byte words of data, of which each words includes an 8-bit count,
1036 an 8-bit segment number, and a 16-bit instruction address.
1037
1038 In theory, the trace buffer is continuously capturing instruction
1039 data that the CPU presents on its "debug bus", but in practice, the
1040 ROMified GDB stub only enables tracing when it continues or steps
1041 the program, and stops tracing when the program stops; so it
1042 actually works for GDB to read the buffer counter out of memory and
1043 then read each trace word. The counter records where the tracing
1044 stops, but there is no record of where it started, so we remember
1045 the PC when we resumed and then search backwards in the trace
1046 buffer for a word that includes that address. This is not perfect,
1047 because you will miss trace data if the resumption PC is the target
1048 of a branch. (The value of the buffer counter is semi-random, any
1049 trace data from a previous program stop is gone.) */
1050
1051 /* The address of the last word recorded in the trace buffer. */
1052
1053 #define DBBC_ADDR (0xd80000)
1054
1055 /* The base of the trace buffer, at least for the "Board_0". */
1056
1057 #define TRACE_BUFFER_BASE (0xf40000)
1058
1059 static void trace_command PARAMS ((char *, int));
1060
1061 static void untrace_command PARAMS ((char *, int));
1062
1063 static void trace_info PARAMS ((char *, int));
1064
1065 static void tdisassemble_command PARAMS ((char *, int));
1066
1067 static void display_trace PARAMS ((int, int));
1068
1069 /* True when instruction traces are being collected. */
1070
1071 static int tracing;
1072
1073 /* Remembered PC. */
1074
1075 static CORE_ADDR last_pc;
1076
1077 /* True when trace output should be displayed whenever program stops. */
1078
1079 static int trace_display;
1080
1081 /* True when trace listing should include source lines. */
1082
1083 static int default_trace_show_source = 1;
1084
1085 struct trace_buffer
1086 {
1087 int size;
1088 short *counts;
1089 CORE_ADDR *addrs;
1090 }
1091 trace_data;
1092
1093 static void
1094 trace_command (args, from_tty)
1095 char *args;
1096 int from_tty;
1097 {
1098 /* Clear the host-side trace buffer, allocating space if needed. */
1099 trace_data.size = 0;
1100 if (trace_data.counts == NULL)
1101 trace_data.counts = (short *) xmalloc (65536 * sizeof (short));
1102 if (trace_data.addrs == NULL)
1103 trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof (CORE_ADDR));
1104
1105 tracing = 1;
1106
1107 printf_filtered ("Tracing is now on.\n");
1108 }
1109
1110 static void
1111 untrace_command (args, from_tty)
1112 char *args;
1113 int from_tty;
1114 {
1115 tracing = 0;
1116
1117 printf_filtered ("Tracing is now off.\n");
1118 }
1119
1120 static void
1121 trace_info (args, from_tty)
1122 char *args;
1123 int from_tty;
1124 {
1125 int i;
1126
1127 if (trace_data.size)
1128 {
1129 printf_filtered ("%d entries in trace buffer:\n", trace_data.size);
1130
1131 for (i = 0; i < trace_data.size; ++i)
1132 {
1133 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1134 i,
1135 trace_data.counts[i],
1136 (trace_data.counts[i] == 1 ? "" : "s"),
1137 paddr_nz (trace_data.addrs[i]));
1138 }
1139 }
1140 else
1141 printf_filtered ("No entries in trace buffer.\n");
1142
1143 printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off"));
1144 }
1145
1146 /* Print the instruction at address MEMADDR in debugged memory,
1147 on STREAM. Returns length of the instruction, in bytes. */
1148
1149 static int
1150 print_insn (memaddr, stream)
1151 CORE_ADDR memaddr;
1152 GDB_FILE *stream;
1153 {
1154 /* If there's no disassembler, something is very wrong. */
1155 if (tm_print_insn == NULL)
1156 abort ();
1157
1158 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1159 tm_print_insn_info.endian = BFD_ENDIAN_BIG;
1160 else
1161 tm_print_insn_info.endian = BFD_ENDIAN_LITTLE;
1162 return (*tm_print_insn) (memaddr, &tm_print_insn_info);
1163 }
1164
1165 static void
1166 d10v_eva_prepare_to_trace ()
1167 {
1168 if (!tracing)
1169 return;
1170
1171 last_pc = read_register (PC_REGNUM);
1172 }
1173
1174 /* Collect trace data from the target board and format it into a form
1175 more useful for display. */
1176
1177 static void
1178 d10v_eva_get_trace_data ()
1179 {
1180 int count, i, j, oldsize;
1181 int trace_addr, trace_seg, trace_cnt, next_cnt;
1182 unsigned int last_trace, trace_word, next_word;
1183 unsigned int *tmpspace;
1184
1185 if (!tracing)
1186 return;
1187
1188 tmpspace = xmalloc (65536 * sizeof (unsigned int));
1189
1190 last_trace = read_memory_unsigned_integer (DBBC_ADDR, 2) << 2;
1191
1192 /* Collect buffer contents from the target, stopping when we reach
1193 the word recorded when execution resumed. */
1194
1195 count = 0;
1196 while (last_trace > 0)
1197 {
1198 QUIT;
1199 trace_word =
1200 read_memory_unsigned_integer (TRACE_BUFFER_BASE + last_trace, 4);
1201 trace_addr = trace_word & 0xffff;
1202 last_trace -= 4;
1203 /* Ignore an apparently nonsensical entry. */
1204 if (trace_addr == 0xffd5)
1205 continue;
1206 tmpspace[count++] = trace_word;
1207 if (trace_addr == last_pc)
1208 break;
1209 if (count > 65535)
1210 break;
1211 }
1212
1213 /* Move the data to the host-side trace buffer, adjusting counts to
1214 include the last instruction executed and transforming the address
1215 into something that GDB likes. */
1216
1217 for (i = 0; i < count; ++i)
1218 {
1219 trace_word = tmpspace[i];
1220 next_word = ((i == 0) ? 0 : tmpspace[i - 1]);
1221 trace_addr = trace_word & 0xffff;
1222 next_cnt = (next_word >> 24) & 0xff;
1223 j = trace_data.size + count - i - 1;
1224 trace_data.addrs[j] = (trace_addr << 2) + 0x1000000;
1225 trace_data.counts[j] = next_cnt + 1;
1226 }
1227
1228 oldsize = trace_data.size;
1229 trace_data.size += count;
1230
1231 free (tmpspace);
1232
1233 if (trace_display)
1234 display_trace (oldsize, trace_data.size);
1235 }
1236
1237 static void
1238 tdisassemble_command (arg, from_tty)
1239 char *arg;
1240 int from_tty;
1241 {
1242 int i, count;
1243 CORE_ADDR low, high;
1244 char *space_index;
1245
1246 if (!arg)
1247 {
1248 low = 0;
1249 high = trace_data.size;
1250 }
1251 else if (!(space_index = (char *) strchr (arg, ' ')))
1252 {
1253 low = parse_and_eval_address (arg);
1254 high = low + 5;
1255 }
1256 else
1257 {
1258 /* Two arguments. */
1259 *space_index = '\0';
1260 low = parse_and_eval_address (arg);
1261 high = parse_and_eval_address (space_index + 1);
1262 if (high < low)
1263 high = low;
1264 }
1265
1266 printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low), paddr_u (high));
1267
1268 display_trace (low, high);
1269
1270 printf_filtered ("End of trace dump.\n");
1271 gdb_flush (gdb_stdout);
1272 }
1273
1274 static void
1275 display_trace (low, high)
1276 int low, high;
1277 {
1278 int i, count, trace_show_source, first, suppress;
1279 CORE_ADDR next_address;
1280
1281 trace_show_source = default_trace_show_source;
1282 if (!have_full_symbols () && !have_partial_symbols ())
1283 {
1284 trace_show_source = 0;
1285 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1286 printf_filtered ("Trace will not display any source.\n");
1287 }
1288
1289 first = 1;
1290 suppress = 0;
1291 for (i = low; i < high; ++i)
1292 {
1293 next_address = trace_data.addrs[i];
1294 count = trace_data.counts[i];
1295 while (count-- > 0)
1296 {
1297 QUIT;
1298 if (trace_show_source)
1299 {
1300 struct symtab_and_line sal, sal_prev;
1301
1302 sal_prev = find_pc_line (next_address - 4, 0);
1303 sal = find_pc_line (next_address, 0);
1304
1305 if (sal.symtab)
1306 {
1307 if (first || sal.line != sal_prev.line)
1308 print_source_lines (sal.symtab, sal.line, sal.line + 1, 0);
1309 suppress = 0;
1310 }
1311 else
1312 {
1313 if (!suppress)
1314 /* FIXME-32x64--assumes sal.pc fits in long. */
1315 printf_filtered ("No source file for address %s.\n",
1316 local_hex_string ((unsigned long) sal.pc));
1317 suppress = 1;
1318 }
1319 }
1320 first = 0;
1321 print_address (next_address, gdb_stdout);
1322 printf_filtered (":");
1323 printf_filtered ("\t");
1324 wrap_here (" ");
1325 next_address = next_address + print_insn (next_address, gdb_stdout);
1326 printf_filtered ("\n");
1327 gdb_flush (gdb_stdout);
1328 }
1329 }
1330 }
1331
1332
1333 static gdbarch_init_ftype d10v_gdbarch_init;
1334 static struct gdbarch *
1335 d10v_gdbarch_init (info, arches)
1336 struct gdbarch_info info;
1337 struct gdbarch_list *arches;
1338 {
1339 static LONGEST d10v_call_dummy_words[] =
1340 {0};
1341 struct gdbarch *gdbarch;
1342 int d10v_num_regs = 37;
1343
1344 /* there is only one d10v architecture */
1345 if (arches != NULL)
1346 return arches->gdbarch;
1347 gdbarch = gdbarch_alloc (&info, NULL);
1348
1349 set_gdbarch_read_pc (gdbarch, d10v_read_pc);
1350 set_gdbarch_write_pc (gdbarch, d10v_write_pc);
1351 set_gdbarch_read_fp (gdbarch, d10v_read_fp);
1352 set_gdbarch_write_fp (gdbarch, d10v_write_fp);
1353 set_gdbarch_read_sp (gdbarch, d10v_read_sp);
1354 set_gdbarch_write_sp (gdbarch, d10v_write_sp);
1355
1356 set_gdbarch_num_regs (gdbarch, d10v_num_regs);
1357 set_gdbarch_sp_regnum (gdbarch, 15);
1358 set_gdbarch_fp_regnum (gdbarch, 11);
1359 set_gdbarch_pc_regnum (gdbarch, 18);
1360 set_gdbarch_register_name (gdbarch, d10v_register_name);
1361 set_gdbarch_register_size (gdbarch, 2);
1362 set_gdbarch_register_bytes (gdbarch, (d10v_num_regs - 2) * 2 + 16);
1363 set_gdbarch_register_byte (gdbarch, d10v_register_byte);
1364 set_gdbarch_register_raw_size (gdbarch, d10v_register_raw_size);
1365 set_gdbarch_max_register_raw_size (gdbarch, 8);
1366 set_gdbarch_register_virtual_size (gdbarch, d10v_register_virtual_size);
1367 set_gdbarch_max_register_virtual_size (gdbarch, 8);
1368 set_gdbarch_register_virtual_type (gdbarch, d10v_register_virtual_type);
1369
1370 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1371 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1372 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1373 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1374 set_gdbarch_long_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1375 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1376 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1377 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1378
1379 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1380 set_gdbarch_call_dummy_length (gdbarch, 0);
1381 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1382 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1383 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1384 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1385 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1386 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
1387 set_gdbarch_call_dummy_words (gdbarch, d10v_call_dummy_words);
1388 set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (d10v_call_dummy_words));
1389 set_gdbarch_call_dummy_p (gdbarch, 1);
1390 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1391 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
1392 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1393
1394 set_gdbarch_register_convertible (gdbarch, d10v_register_convertible);
1395 set_gdbarch_register_convert_to_virtual (gdbarch, d10v_register_convert_to_virtual);
1396 set_gdbarch_register_convert_to_raw (gdbarch, d10v_register_convert_to_raw);
1397
1398 set_gdbarch_extract_return_value (gdbarch, d10v_extract_return_value);
1399 set_gdbarch_push_arguments (gdbarch, d10v_push_arguments);
1400 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1401 set_gdbarch_push_return_address (gdbarch, d10v_push_return_address);
1402
1403 set_gdbarch_d10v_make_daddr (gdbarch, d10v_make_daddr);
1404 set_gdbarch_d10v_make_iaddr (gdbarch, d10v_make_iaddr);
1405 set_gdbarch_d10v_daddr_p (gdbarch, d10v_daddr_p);
1406 set_gdbarch_d10v_iaddr_p (gdbarch, d10v_iaddr_p);
1407 set_gdbarch_d10v_convert_daddr_to_raw (gdbarch, d10v_convert_daddr_to_raw);
1408 set_gdbarch_d10v_convert_iaddr_to_raw (gdbarch, d10v_convert_iaddr_to_raw);
1409
1410 set_gdbarch_store_struct_return (gdbarch, d10v_store_struct_return);
1411 set_gdbarch_store_return_value (gdbarch, d10v_store_return_value);
1412 set_gdbarch_extract_struct_value_address (gdbarch, d10v_extract_struct_value_address);
1413 set_gdbarch_use_struct_convention (gdbarch, d10v_use_struct_convention);
1414
1415 set_gdbarch_frame_init_saved_regs (gdbarch, d10v_frame_init_saved_regs);
1416 set_gdbarch_init_extra_frame_info (gdbarch, d10v_init_extra_frame_info);
1417
1418 set_gdbarch_pop_frame (gdbarch, d10v_pop_frame);
1419
1420 set_gdbarch_skip_prologue (gdbarch, d10v_skip_prologue);
1421 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1422 set_gdbarch_decr_pc_after_break (gdbarch, 4);
1423 set_gdbarch_function_start_offset (gdbarch, 0);
1424 set_gdbarch_breakpoint_from_pc (gdbarch, d10v_breakpoint_from_pc);
1425
1426 set_gdbarch_remote_translate_xfer_address (gdbarch, remote_d10v_translate_xfer_address);
1427
1428 set_gdbarch_frame_args_skip (gdbarch, 0);
1429 set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
1430 set_gdbarch_frame_chain (gdbarch, d10v_frame_chain);
1431 set_gdbarch_frame_chain_valid (gdbarch, d10v_frame_chain_valid);
1432 set_gdbarch_frame_saved_pc (gdbarch, d10v_frame_saved_pc);
1433 set_gdbarch_frame_args_address (gdbarch, d10v_frame_args_address);
1434 set_gdbarch_frame_locals_address (gdbarch, d10v_frame_locals_address);
1435 set_gdbarch_saved_pc_after_call (gdbarch, d10v_saved_pc_after_call);
1436 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1437
1438 return gdbarch;
1439 }
1440
1441
1442 extern void (*target_resume_hook) PARAMS ((void));
1443 extern void (*target_wait_loop_hook) PARAMS ((void));
1444
1445 void
1446 _initialize_d10v_tdep ()
1447 {
1448 register_gdbarch_init (bfd_arch_d10v, d10v_gdbarch_init);
1449
1450 tm_print_insn = print_insn_d10v;
1451
1452 target_resume_hook = d10v_eva_prepare_to_trace;
1453 target_wait_loop_hook = d10v_eva_get_trace_data;
1454
1455 add_com ("regs", class_vars, show_regs, "Print all registers");
1456
1457 add_com ("trace", class_support, trace_command,
1458 "Enable tracing of instruction execution.");
1459
1460 add_com ("untrace", class_support, untrace_command,
1461 "Disable tracing of instruction execution.");
1462
1463 add_com ("tdisassemble", class_vars, tdisassemble_command,
1464 "Disassemble the trace buffer.\n\
1465 Two optional arguments specify a range of trace buffer entries\n\
1466 as reported by info trace (NOT addresses!).");
1467
1468 add_info ("trace", trace_info,
1469 "Display info about the trace data buffer.");
1470
1471 add_show_from_set (add_set_cmd ("tracedisplay", no_class,
1472 var_integer, (char *) &trace_display,
1473 "Set automatic display of trace.\n", &setlist),
1474 &showlist);
1475 add_show_from_set (add_set_cmd ("tracesource", no_class,
1476 var_integer, (char *) &default_trace_show_source,
1477 "Set display of source code with trace.\n", &setlist),
1478 &showlist);
1479
1480 }
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