gdb/d10v-tdep.c

   1 /* Target-dependent code for Mitsubishi D10V, for GDB.
   2    Copyright (C) 1996, 1997 Free Software Foundation, Inc.
   3
   4 This file is part of GDB.
   5
   6 This program is free software; you can redistribute it and/or modify
   7 it under the terms of the GNU General Public License as published by
   8 the Free Software Foundation; either version 2 of the License, or
   9 (at your option) any later version.
  10
  11 This program is distributed in the hope that it will be useful,
  12 but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 GNU General Public License for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with this program; if not, write to the Free Software
  18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  19
  20 /*  Contributed by Martin Hunt, hunt@cygnus.com */
  21
  22 #include "defs.h"
  23 #include "frame.h"
  24 #include "obstack.h"
  25 #include "symtab.h"
  26 #include "gdbtypes.h"
  27 #include "gdbcmd.h"
  28 #include "gdbcore.h"
  29 #include "gdb_string.h"
  30 #include "value.h"
  31 #include "inferior.h"
  32 #include "dis-asm.h"
  33 #include "symfile.h"
  34 #include "objfiles.h"
  35
  36 /* Local functions */
  37
  38 extern void _initialize_d10v_tdep PARAMS ((void));
  39
  40 static void d10v_eva_prepare_to_trace PARAMS ((void));
  41
  42 static void d10v_eva_get_trace_data PARAMS ((void));
  43
  44 int
  45 d10v_frame_chain_valid (chain, frame)
  46      CORE_ADDR chain;
  47      struct frame_info *frame;      /* not used here */
  48 {
  49   return ((chain) != 0 && (frame) != 0 && (frame)->pc > IMEM_START);
  50 }
  51
  52
  53 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
  54    EXTRACT_RETURN_VALUE?  GCC_P is true if compiled with gcc
  55    and TYPE is the type (which is known to be struct, union or array).
  56
  57    The d10v returns anything less than 8 bytes in size in
  58    registers. */
  59
  60 int
  61 d10v_use_struct_convention (gcc_p, type)
  62      int gcc_p;
  63      struct type *type;
  64 {
  65   return (TYPE_LENGTH (type) > 8);
  66 }
  67
  68
  69 unsigned char *
  70 d10v_breakpoint_from_pc (pcptr, lenptr)
  71      CORE_ADDR *pcptr;
  72      int *lenptr;
  73 {
  74   static unsigned char breakpoint [] = {0x2f, 0x90, 0x5e, 0x00};
  75   *lenptr = sizeof (breakpoint);
  76   return breakpoint;
  77 }
  78
  79 char *
  80 d10v_register_name (reg_nr)
  81      int reg_nr;
  82 {
  83   static char *register_names[] = {
  84     "r0", "r1", "r2", "r3", "r4", "r5",  "r6", "r7",
  85     "r8", "r9", "r10","r11","r12", "r13", "r14","r15",
  86     "psw","bpsw","pc","bpc", "cr4", "cr5", "cr6", "rpt_c",
  87     "rpt_s","rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
  88     "imap0","imap1","dmap","a0", "a1"
  89   };
  90   if (reg_nr < 0)
  91     return NULL;
  92   if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
  93     return NULL;
  94   return register_names [reg_nr];
  95 }
  96
  97
  98 /* Index within `registers' of the first byte of the space for
  99    register REG_NR.  */
 100
 101 int
 102 d10v_register_byte (reg_nr)
 103      int reg_nr;
 104 {
 105   if (reg_nr > A0_REGNUM)
 106     return ((reg_nr - A0_REGNUM) * 8 + (A0_REGNUM * 2));
 107   else
 108     return (reg_nr * 2);
 109 }
 110
 111 /* Number of bytes of storage in the actual machine representation for
 112    register REG_NR.  */
 113
 114 int
 115 d10v_register_raw_size (reg_nr)
 116      int reg_nr;
 117 {
 118   if (reg_nr >= A0_REGNUM)
 119     return 8;
 120   else
 121     return 2;
 122 }
 123
 124 /* Number of bytes of storage in the program's representation
 125    for register N.  */
 126
 127 int
 128 d10v_register_virtual_size (reg_nr)
 129      int reg_nr;
 130 {
 131   if (reg_nr >= A0_REGNUM)
 132     return 8;
 133   else if (reg_nr == PC_REGNUM || reg_nr == SP_REGNUM)
 134     return 4;
 135   else
 136     return 2;
 137 }
 138
 139 /* Return the GDB type object for the "standard" data type
 140    of data in register N.  */
 141
 142 struct type *
 143 d10v_register_virtual_type (reg_nr)
 144      int reg_nr;
 145 {
 146   if (reg_nr >= A0_REGNUM)
 147     return builtin_type_long_long;
 148   else if (reg_nr == PC_REGNUM || reg_nr == SP_REGNUM)
 149     return builtin_type_long;
 150   else
 151     return builtin_type_short;
 152 }
 153
 154 /* convert $pc and $sp to/from virtual addresses */
 155 int
 156 d10v_register_convertible (nr)
 157      int nr;
 158 {
 159   return ((nr) == PC_REGNUM || (nr) == SP_REGNUM);
 160 }
 161
 162 void
 163 d10v_register_convert_to_virtual (regnum, type, from, to)
 164      int regnum;
 165      struct type *type;
 166      char *from;
 167      char *to;
 168 {
 169   ULONGEST x = extract_unsigned_integer (from, REGISTER_RAW_SIZE (regnum));
 170   if (regnum == PC_REGNUM)
 171     x = (x << 2) | IMEM_START;
 172   else
 173     x |= DMEM_START;
 174   store_unsigned_integer (to, TYPE_LENGTH (type), x);
 175 }
 176
 177 void
 178 d10v_register_convert_to_raw (type, regnum, from, to)
 179      struct type *type;
 180      int regnum;
 181      char *from;
 182      char *to;
 183 {
 184   ULONGEST x = extract_unsigned_integer (from, TYPE_LENGTH (type));
 185   x &= 0x3ffff;
 186   if (regnum == PC_REGNUM)
 187     x >>= 2;
 188   store_unsigned_integer (to, 2, x);
 189 }
 190
 191
 192 CORE_ADDR
 193 d10v_make_daddr (x)
 194      CORE_ADDR x;
 195 {
 196   return ((x) | DMEM_START);
 197 }
 198
 199 CORE_ADDR
 200 d10v_make_iaddr (x)
 201      CORE_ADDR x;
 202 {
 203   return (((x) << 2) | IMEM_START);
 204 }
 205
 206 int
 207 d10v_daddr_p (x)
 208      CORE_ADDR x;
 209 {
 210   return (((x) & 0x3000000) == DMEM_START);
 211 }
 212
 213 int
 214 d10v_iaddr_p (x)
 215      CORE_ADDR x;
 216 {
 217   return (((x) & 0x3000000) == IMEM_START);
 218 }
 219
 220
 221 CORE_ADDR
 222 d10v_convert_iaddr_to_raw (x)
 223      CORE_ADDR x;
 224 {
 225   return (((x) >> 2) & 0xffff);
 226 }
 227
 228 CORE_ADDR
 229 d10v_convert_daddr_to_raw(x)
 230      CORE_ADDR x;
 231 {
 232   return ((x) & 0xffff);
 233 }
 234
 235 /* Store the address of the place in which to copy the structure the
 236    subroutine will return.  This is called from call_function.
 237
 238    We store structs through a pointer passed in the first Argument
 239    register. */
 240
 241 void
 242 d10v_store_struct_return (addr, sp)
 243      CORE_ADDR addr;
 244      CORE_ADDR sp;
 245 {
 246   write_register (ARG1_REGNUM, (addr));
 247 }
 248
 249 /* Write into appropriate registers a function return value
 250    of type TYPE, given in virtual format.
 251
 252    Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
 253
 254 void
 255 d10v_store_return_value (type,valbuf)
 256      struct type *type;
 257      char *valbuf;
 258 {
 259   write_register_bytes (REGISTER_BYTE (RET1_REGNUM),
 260                         valbuf,
 261                         TYPE_LENGTH (type));
 262 }
 263
 264 /* Extract from an array REGBUF containing the (raw) register state
 265    the address in which a function should return its structure value,
 266    as a CORE_ADDR (or an expression that can be used as one).  */
 267
 268 CORE_ADDR
 269 d10v_extract_struct_value_address (regbuf)
 270      char *regbuf;
 271 {
 272   return (extract_address ((regbuf) + REGISTER_BYTE (ARG1_REGNUM),
 273                            REGISTER_RAW_SIZE (ARG1_REGNUM))
 274           | DMEM_START);
 275 }
 276
 277 CORE_ADDR
 278 d10v_frame_saved_pc (frame)
 279      struct frame_info *frame;
 280 {
 281   return ((frame)->return_pc);
 282 }
 283
 284 CORE_ADDR
 285 d10v_frame_args_address (fi)
 286      struct frame_info *fi;
 287 {
 288   return (fi)->frame;
 289 }
 290
 291 CORE_ADDR
 292 d10v_frame_locals_address (fi)
 293      struct frame_info *fi;
 294 {
 295   return (fi)->frame;
 296 }
 297
 298 /* Immediately after a function call, return the saved pc.  We can't
 299    use frame->return_pc beause that is determined by reading R13 off
 300    the stack and that may not be written yet. */
 301
 302 CORE_ADDR
 303 d10v_saved_pc_after_call (frame)
 304      struct frame_info *frame;
 305 {
 306   return ((read_register(LR_REGNUM) << 2)
 307           | IMEM_START);
 308 }
 309
 310 /* Discard from the stack the innermost frame, restoring all saved
 311    registers.  */
 312
 313 void
 314 d10v_pop_frame (frame)
 315      struct frame_info *frame;
 316 {
 317   CORE_ADDR fp;
 318   int regnum;
 319   struct frame_saved_regs fsr;
 320   char raw_buffer[8];
 321
 322   fp = FRAME_FP (frame);
 323   /* fill out fsr with the address of where each */
 324   /* register was stored in the frame */
 325   get_frame_saved_regs (frame, &fsr);
 326
 327   /* now update the current registers with the old values */
 328   for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++)
 329     {
 330       if (fsr.regs[regnum])
 331         {
 332           read_memory (fsr.regs[regnum], raw_buffer,  REGISTER_RAW_SIZE(regnum));
 333           write_register_bytes (REGISTER_BYTE (regnum), raw_buffer,  REGISTER_RAW_SIZE(regnum));
 334         }
 335     }
 336   for (regnum = 0; regnum < SP_REGNUM; regnum++)
 337     {
 338       if (fsr.regs[regnum])
 339         {
 340           write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], REGISTER_RAW_SIZE(regnum)));
 341         }
 342     }
 343   if (fsr.regs[PSW_REGNUM])
 344     {
 345       write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], REGISTER_RAW_SIZE(PSW_REGNUM)));
 346     }
 347
 348   write_register (PC_REGNUM, read_register (LR_REGNUM));
 349   write_register (SP_REGNUM, fp + frame->size);
 350   target_store_registers (-1);
 351   flush_cached_frames ();
 352 }
 353
 354 static int
 355 check_prologue (op)
 356      unsigned short op;
 357 {
 358   /* st  rn, @-sp */
 359   if ((op & 0x7E1F) == 0x6C1F)
 360     return 1;
 361
 362   /* st2w  rn, @-sp */
 363   if ((op & 0x7E3F) == 0x6E1F)
 364     return 1;
 365
 366   /* subi  sp, n */
 367   if ((op & 0x7FE1) == 0x01E1)
 368     return 1;
 369
 370   /* mv  r11, sp */
 371   if (op == 0x417E)
 372     return 1;
 373
 374   /* nop */
 375   if (op == 0x5E00)
 376     return 1;
 377
 378   /* st  rn, @sp */
 379   if ((op & 0x7E1F) == 0x681E)
 380     return 1;
 381
 382   /* st2w  rn, @sp */
 383  if ((op & 0x7E3F) == 0x3A1E)
 384    return 1;
 385
 386   return 0;
 387 }
 388
 389 CORE_ADDR
 390 d10v_skip_prologue (pc)
 391      CORE_ADDR pc;
 392 {
 393   unsigned long op;
 394   unsigned short op1, op2;
 395   CORE_ADDR func_addr, func_end;
 396   struct symtab_and_line sal;
 397
 398   /* If we have line debugging information, then the end of the */
 399   /* prologue should the first assembly instruction of  the first source line */
 400   if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
 401     {
 402       sal = find_pc_line (func_addr, 0);
 403       if ( sal.end && sal.end < func_end)
 404         return sal.end;
 405     }
 406
 407   if (target_read_memory (pc, (char *)&op, 4))
 408     return pc;                  /* Can't access it -- assume no prologue. */
 409
 410   while (1)
 411     {
 412       op = (unsigned long)read_memory_integer (pc, 4);
 413       if ((op & 0xC0000000) == 0xC0000000)
 414         {
 415           /* long instruction */
 416           if ( ((op & 0x3FFF0000) != 0x01FF0000) &&   /* add3 sp,sp,n */
 417                ((op & 0x3F0F0000) != 0x340F0000) &&   /* st  rn, @(offset,sp) */
 418                ((op & 0x3F1F0000) != 0x350F0000))     /* st2w  rn, @(offset,sp) */
 419             break;
 420         }
 421       else
 422         {
 423           /* short instructions */
 424           if ((op & 0xC0000000) == 0x80000000)
 425             {
 426               op2 = (op & 0x3FFF8000) >> 15;
 427               op1 = op & 0x7FFF;
 428             }
 429           else
 430             {
 431               op1 = (op & 0x3FFF8000) >> 15;
 432               op2 = op & 0x7FFF;
 433             }
 434           if (check_prologue(op1))
 435             {
 436               if (!check_prologue(op2))
 437                 {
 438                   /* if the previous opcode was really part of the prologue */
 439                   /* and not just a NOP, then we want to break after both instructions */
 440                   if (op1 != 0x5E00)
 441                     pc += 4;
 442                   break;
 443                 }
 444             }
 445           else
 446             break;
 447         }
 448       pc += 4;
 449     }
 450   return pc;
 451 }
 452
 453 /* Given a GDB frame, determine the address of the calling function's frame.
 454    This will be used to create a new GDB frame struct, and then
 455    INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
 456 */
 457
 458 CORE_ADDR
 459 d10v_frame_chain (frame)
 460      struct frame_info *frame;
 461 {
 462   struct frame_saved_regs fsr;
 463
 464   d10v_frame_find_saved_regs (frame, &fsr);
 465
 466   if (frame->return_pc == IMEM_START || inside_entry_file(frame->return_pc))
 467     return (CORE_ADDR)0;
 468
 469   if (!fsr.regs[FP_REGNUM])
 470     {
 471       if (!fsr.regs[SP_REGNUM] || fsr.regs[SP_REGNUM] == STACK_START)
 472         return (CORE_ADDR)0;
 473
 474       return fsr.regs[SP_REGNUM];
 475     }
 476
 477   if (!read_memory_unsigned_integer(fsr.regs[FP_REGNUM], REGISTER_RAW_SIZE(FP_REGNUM)))
 478     return (CORE_ADDR)0;
 479
 480   return D10V_MAKE_DADDR (read_memory_unsigned_integer (fsr.regs[FP_REGNUM], REGISTER_RAW_SIZE (FP_REGNUM)));
 481 }
 482
 483 static int next_addr, uses_frame;
 484
 485 static int
 486 prologue_find_regs (op, fsr, addr)
 487      unsigned short op;
 488      struct frame_saved_regs *fsr;
 489      CORE_ADDR addr;
 490 {
 491   int n;
 492
 493   /* st  rn, @-sp */
 494   if ((op & 0x7E1F) == 0x6C1F)
 495     {
 496       n = (op & 0x1E0) >> 5;
 497       next_addr -= 2;
 498       fsr->regs[n] = next_addr;
 499       return 1;
 500     }
 501
 502   /* st2w  rn, @-sp */
 503   else if ((op & 0x7E3F) == 0x6E1F)
 504     {
 505       n = (op & 0x1E0) >> 5;
 506       next_addr -= 4;
 507       fsr->regs[n] = next_addr;
 508       fsr->regs[n+1] = next_addr+2;
 509       return 1;
 510     }
 511
 512   /* subi  sp, n */
 513   if ((op & 0x7FE1) == 0x01E1)
 514     {
 515       n = (op & 0x1E) >> 1;
 516       if (n == 0)
 517         n = 16;
 518       next_addr -= n;
 519       return 1;
 520     }
 521
 522   /* mv  r11, sp */
 523   if (op == 0x417E)
 524     {
 525       uses_frame = 1;
 526       return 1;
 527     }
 528
 529   /* nop */
 530   if (op == 0x5E00)
 531     return 1;
 532
 533   /* st  rn, @sp */
 534   if ((op & 0x7E1F) == 0x681E)
 535     {
 536       n = (op & 0x1E0) >> 5;
 537       fsr->regs[n] = next_addr;
 538       return 1;
 539     }
 540
 541   /* st2w  rn, @sp */
 542   if ((op & 0x7E3F) == 0x3A1E)
 543     {
 544       n = (op & 0x1E0) >> 5;
 545       fsr->regs[n] = next_addr;
 546       fsr->regs[n+1] = next_addr+2;
 547       return 1;
 548     }
 549
 550   return 0;
 551 }
 552
 553 /* Put here the code to store, into a struct frame_saved_regs, the
 554    addresses of the saved registers of frame described by FRAME_INFO.
 555    This includes special registers such as pc and fp saved in special
 556    ways in the stack frame.  sp is even more special: the address we
 557    return for it IS the sp for the next frame. */
 558 void
 559 d10v_frame_find_saved_regs (fi, fsr)
 560      struct frame_info *fi;
 561      struct frame_saved_regs *fsr;
 562 {
 563   CORE_ADDR fp, pc;
 564   unsigned long op;
 565   unsigned short op1, op2;
 566   int i;
 567
 568   fp = fi->frame;
 569   memset (fsr, 0, sizeof (*fsr));
 570   next_addr = 0;
 571
 572   pc = get_pc_function_start (fi->pc);
 573
 574   uses_frame = 0;
 575   while (1)
 576     {
 577       op = (unsigned long)read_memory_integer (pc, 4);
 578       if ((op & 0xC0000000) == 0xC0000000)
 579         {
 580           /* long instruction */
 581           if ((op & 0x3FFF0000) == 0x01FF0000)
 582             {
 583               /* add3 sp,sp,n */
 584               short n = op & 0xFFFF;
 585               next_addr += n;
 586             }
 587           else if ((op & 0x3F0F0000) == 0x340F0000)
 588             {
 589               /* st  rn, @(offset,sp) */
 590               short offset = op & 0xFFFF;
 591               short n = (op >> 20) & 0xF;
 592               fsr->regs[n] = next_addr + offset;
 593             }
 594           else if ((op & 0x3F1F0000) == 0x350F0000)
 595             {
 596               /* st2w  rn, @(offset,sp) */
 597               short offset = op & 0xFFFF;
 598               short n = (op >> 20) & 0xF;
 599               fsr->regs[n] = next_addr + offset;
 600               fsr->regs[n+1] = next_addr + offset + 2;
 601             }
 602           else
 603             break;
 604         }
 605       else
 606         {
 607           /* short instructions */
 608           if ((op & 0xC0000000) == 0x80000000)
 609             {
 610               op2 = (op & 0x3FFF8000) >> 15;
 611               op1 = op & 0x7FFF;
 612             }
 613           else
 614             {
 615               op1 = (op & 0x3FFF8000) >> 15;
 616               op2 = op & 0x7FFF;
 617             }
 618           if (!prologue_find_regs(op1,fsr,pc) || !prologue_find_regs(op2,fsr,pc))
 619             break;
 620         }
 621       pc += 4;
 622     }
 623
 624   fi->size = -next_addr;
 625
 626   if (!(fp & 0xffff))
 627     fp = D10V_MAKE_DADDR (read_register(SP_REGNUM));
 628
 629   for (i=0; i<NUM_REGS-1; i++)
 630     if (fsr->regs[i])
 631       {
 632         fsr->regs[i] = fp - (next_addr - fsr->regs[i]);
 633       }
 634
 635   if (fsr->regs[LR_REGNUM])
 636     {
 637       CORE_ADDR return_pc = read_memory_unsigned_integer (fsr->regs[LR_REGNUM], REGISTER_RAW_SIZE (LR_REGNUM));
 638       fi->return_pc = D10V_MAKE_IADDR (return_pc);
 639     }
 640   else
 641     {
 642       fi->return_pc = D10V_MAKE_IADDR (read_register(LR_REGNUM));
 643     }
 644
 645   /* th SP is not normally (ever?) saved, but check anyway */
 646   if (!fsr->regs[SP_REGNUM])
 647     {
 648       /* if the FP was saved, that means the current FP is valid, */
 649       /* otherwise, it isn't being used, so we use the SP instead */
 650       if (uses_frame)
 651         fsr->regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->size;
 652       else
 653         {
 654           fsr->regs[SP_REGNUM] = fp + fi->size;
 655           fi->frameless = 1;
 656           fsr->regs[FP_REGNUM] = 0;
 657         }
 658     }
 659 }
 660
 661 void
 662 d10v_init_extra_frame_info (fromleaf, fi)
 663      int fromleaf;
 664      struct frame_info *fi;
 665 {
 666   fi->frameless = 0;
 667   fi->size = 0;
 668   fi->return_pc = 0;
 669
 670   /* The call dummy doesn't save any registers on the stack, so we can
 671      return now.  */
 672   if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
 673     {
 674       return;
 675     }
 676   else
 677     {
 678       struct frame_saved_regs dummy;
 679       d10v_frame_find_saved_regs (fi, &dummy);
 680     }
 681 }
 682
 683 static void
 684 show_regs (args, from_tty)
 685      char *args;
 686      int from_tty;
 687 {
 688   int a;
 689   printf_filtered ("PC=%04x (0x%x) PSW=%04x RPT_S=%04x RPT_E=%04x RPT_C=%04x\n",
 690                    read_register (PC_REGNUM), D10V_MAKE_IADDR (read_register (PC_REGNUM)),
 691                    read_register (PSW_REGNUM),
 692                    read_register (24),
 693                    read_register (25),
 694                    read_register (23));
 695   printf_filtered ("R0-R7  %04x %04x %04x %04x %04x %04x %04x %04x\n",
 696                    read_register (0),
 697                    read_register (1),
 698                    read_register (2),
 699                    read_register (3),
 700                    read_register (4),
 701                    read_register (5),
 702                    read_register (6),
 703                    read_register (7));
 704   printf_filtered ("R8-R15 %04x %04x %04x %04x %04x %04x %04x %04x\n",
 705                    read_register (8),
 706                    read_register (9),
 707                    read_register (10),
 708                    read_register (11),
 709                    read_register (12),
 710                    read_register (13),
 711                    read_register (14),
 712                    read_register (15));
 713   printf_filtered ("IMAP0 %04x    IMAP1 %04x    DMAP %04x\n",
 714                    read_register (IMAP0_REGNUM),
 715                    read_register (IMAP1_REGNUM),
 716                    read_register (DMAP_REGNUM));
 717   printf_filtered ("A0-A1");
 718   for (a = A0_REGNUM; a <= A0_REGNUM + 1; a++)
 719     {
 720       char num[MAX_REGISTER_RAW_SIZE];
 721       int i;
 722       printf_filtered ("  ");
 723       read_register_gen (a, (char *)&num);
 724       for (i = 0; i < MAX_REGISTER_RAW_SIZE; i++)
 725         {
 726           printf_filtered ("%02x", (num[i] & 0xff));
 727         }
 728     }
 729   printf_filtered ("\n");
 730 }
 731
 732 CORE_ADDR
 733 d10v_read_pc (pid)
 734      int pid;
 735 {
 736   int save_pid;
 737   CORE_ADDR pc;
 738   CORE_ADDR retval;
 739
 740   save_pid = inferior_pid;
 741   inferior_pid = pid;
 742   pc = (int) read_register (PC_REGNUM);
 743   inferior_pid = save_pid;
 744   retval = D10V_MAKE_IADDR (pc);
 745   return retval;
 746 }
 747
 748 void
 749 d10v_write_pc (val, pid)
 750      CORE_ADDR val;
 751      int pid;
 752 {
 753   int save_pid;
 754
 755   save_pid = inferior_pid;
 756   inferior_pid = pid;
 757   write_register (PC_REGNUM, D10V_CONVERT_IADDR_TO_RAW (val));
 758   inferior_pid = save_pid;
 759 }
 760
 761 CORE_ADDR
 762 d10v_read_sp ()
 763 {
 764   return (D10V_MAKE_DADDR (read_register (SP_REGNUM)));
 765 }
 766
 767 void
 768 d10v_write_sp (val)
 769      CORE_ADDR val;
 770 {
 771   write_register (SP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val));
 772 }
 773
 774 void
 775 d10v_write_fp (val)
 776      CORE_ADDR val;
 777 {
 778   write_register (FP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val));
 779 }
 780
 781 CORE_ADDR
 782 d10v_read_fp ()
 783 {
 784   return (D10V_MAKE_DADDR (read_register(FP_REGNUM)));
 785 }
 786
 787 /* Function: push_return_address (pc)
 788    Set up the return address for the inferior function call.
 789    Needed for targets where we don't actually execute a JSR/BSR instruction */
 790
 791 CORE_ADDR
 792 d10v_push_return_address (pc, sp)
 793      CORE_ADDR pc;
 794      CORE_ADDR sp;
 795 {
 796   write_register (LR_REGNUM, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ()));
 797   return sp;
 798 }
 799
 800
 801 /* When arguments must be pushed onto the stack, they go on in reverse
 802    order.  The below implements a FILO (stack) to do this. */
 803
 804 struct stack_item
 805 {
 806   int len;
 807   struct stack_item *prev;
 808   void *data;
 809 };
 810
 811 static struct stack_item *push_stack_item PARAMS ((struct stack_item *prev, void *contents, int len));
 812 static struct stack_item *
 813 push_stack_item (prev, contents, len)
 814      struct stack_item *prev;
 815      void *contents;
 816      int len;
 817 {
 818   struct stack_item *si;
 819   si = xmalloc (sizeof (struct stack_item));
 820   si->data = xmalloc (len);
 821   si->len = len;
 822   si->prev = prev;
 823   memcpy (si->data, contents, len);
 824   return si;
 825 }
 826
 827 static struct stack_item *pop_stack_item PARAMS ((struct stack_item *si));
 828 static struct stack_item *
 829 pop_stack_item (si)
 830      struct stack_item *si;
 831 {
 832   struct stack_item *dead = si;
 833   si = si->prev;
 834   free (dead->data);
 835   free (dead);
 836   return si;
 837 }
 838
 839
 840 CORE_ADDR
 841 d10v_push_arguments (nargs, args, sp, struct_return, struct_addr)
 842      int nargs;
 843      value_ptr *args;
 844      CORE_ADDR sp;
 845      int struct_return;
 846      CORE_ADDR struct_addr;
 847 {
 848   int i;
 849   int regnum = ARG1_REGNUM;
 850   struct stack_item *si = NULL;
 851
 852   /* Fill in registers and arg lists */
 853   for (i = 0; i < nargs; i++)
 854     {
 855       value_ptr arg = args[i];
 856       struct type *type = check_typedef (VALUE_TYPE (arg));
 857       char *contents = VALUE_CONTENTS (arg);
 858       int len = TYPE_LENGTH (type);
 859       /* printf ("push: type=%d len=%d\n", type->code, len); */
 860       if (TYPE_CODE (type) == TYPE_CODE_PTR)
 861         {
 862           /* pointers require special handling - first convert and
 863              then store */
 864           long val = extract_signed_integer (contents, len);
 865           len = 2;
 866           if (TYPE_TARGET_TYPE (type)
 867               && (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC))
 868             {
 869               /* function pointer */
 870               val = D10V_CONVERT_IADDR_TO_RAW (val);
 871             }
 872           else if (D10V_IADDR_P (val))
 873             {
 874               /* also function pointer! */
 875               val = D10V_CONVERT_DADDR_TO_RAW (val);
 876             }
 877           else
 878             {
 879               /* data pointer */
 880               val &= 0xFFFF;
 881             }
 882           if (regnum <= ARGN_REGNUM)
 883             write_register (regnum++, val & 0xffff);
 884           else
 885             {
 886               char ptr[2];
 887               /* arg will go onto stack */
 888               store_address (ptr, val & 0xffff, 2);
 889               si = push_stack_item (si, ptr, 2);
 890             }
 891         }
 892       else
 893         {
 894           int aligned_regnum = (regnum + 1) & ~1;
 895           if (len <= 2 && regnum <= ARGN_REGNUM)
 896             /* fits in a single register, do not align */
 897             {
 898               long val = extract_unsigned_integer (contents, len);
 899               write_register (regnum++, val);
 900             }
 901           else if (len <= (ARGN_REGNUM - aligned_regnum + 1) * 2)
 902             /* value fits in remaining registers, store keeping left
 903                aligned */
 904             {
 905               int b;
 906               regnum = aligned_regnum;
 907               for (b = 0; b < (len & ~1); b += 2)
 908                 {
 909                   long val = extract_unsigned_integer (&contents[b], 2);
 910                   write_register (regnum++, val);
 911                 }
 912               if (b < len)
 913                 {
 914                   long val = extract_unsigned_integer (&contents[b], 1);
 915                   write_register (regnum++, (val << 8));
 916                 }
 917             }
 918           else
 919             {
 920               /* arg will go onto stack */
 921               regnum = ARGN_REGNUM + 1;
 922               si = push_stack_item (si, contents, len);
 923             }
 924         }
 925     }
 926
 927   while (si)
 928     {
 929       sp = (sp - si->len) & ~1;
 930       write_memory (sp, si->data, si->len);
 931       si = pop_stack_item (si);
 932     }
 933
 934   return sp;
 935 }
 936
 937
 938 /* Given a return value in `regbuf' with a type `valtype',
 939    extract and copy its value into `valbuf'.  */
 940
 941 void
 942 d10v_extract_return_value (type, regbuf, valbuf)
 943      struct type *type;
 944      char regbuf[REGISTER_BYTES];
 945      char *valbuf;
 946 {
 947   int len;
 948   /*    printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM)));  */
 949   if (TYPE_CODE (type) == TYPE_CODE_PTR
 950       && TYPE_TARGET_TYPE (type)
 951       && (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC))
 952     {
 953       /* pointer to function */
 954       int num;
 955       short snum;
 956       snum = extract_address (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM));
 957       store_address ( valbuf, 4, D10V_MAKE_IADDR(snum));
 958     }
 959   else if (TYPE_CODE(type) == TYPE_CODE_PTR)
 960     {
 961       /* pointer to data */
 962       int num;
 963       short snum;
 964       snum = extract_address (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM));
 965       store_address ( valbuf, 4, D10V_MAKE_DADDR(snum));
 966     }
 967   else
 968     {
 969       len = TYPE_LENGTH (type);
 970       if (len == 1)
 971         {
 972           unsigned short c = extract_unsigned_integer (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM));
 973           store_unsigned_integer (valbuf, 1, c);
 974         }
 975       else if ((len & 1) == 0)
 976         memcpy (valbuf, regbuf + REGISTER_BYTE (RET1_REGNUM), len);
 977       else
 978         {
 979           /* For return values of odd size, the first byte is in the
 980              least significant part of the first register.  The
 981              remaining bytes in remaining registers. Interestingly,
 982              when such values are passed in, the last byte is in the
 983              most significant byte of that same register - wierd. */
 984           memcpy (valbuf, regbuf + REGISTER_BYTE (RET1_REGNUM) + 1, len);
 985         }
 986     }
 987 }
 988
 989 /* The following code implements access to, and display of, the D10V's
 990    instruction trace buffer.  The buffer consists of 64K or more
 991    4-byte words of data, of which each words includes an 8-bit count,
 992    an 8-bit segment number, and a 16-bit instruction address.
 993
 994    In theory, the trace buffer is continuously capturing instruction
 995    data that the CPU presents on its "debug bus", but in practice, the
 996    ROMified GDB stub only enables tracing when it continues or steps
 997    the program, and stops tracing when the program stops; so it
 998    actually works for GDB to read the buffer counter out of memory and
 999    then read each trace word.  The counter records where the tracing
1000    stops, but there is no record of where it started, so we remember
1001    the PC when we resumed and then search backwards in the trace
1002    buffer for a word that includes that address.  This is not perfect,
1003    because you will miss trace data if the resumption PC is the target
1004    of a branch.  (The value of the buffer counter is semi-random, any
1005    trace data from a previous program stop is gone.)  */
1006
1007 /* The address of the last word recorded in the trace buffer.  */
1008
1009 #define DBBC_ADDR (0xd80000)
1010
1011 /* The base of the trace buffer, at least for the "Board_0".  */
1012
1013 #define TRACE_BUFFER_BASE (0xf40000)
1014
1015 static void trace_command PARAMS ((char *, int));
1016
1017 static void untrace_command PARAMS ((char *, int));
1018
1019 static void trace_info PARAMS ((char *, int));
1020
1021 static void tdisassemble_command PARAMS ((char *, int));
1022
1023 static void display_trace PARAMS ((int, int));
1024
1025 /* True when instruction traces are being collected.  */
1026
1027 static int tracing;
1028
1029 /* Remembered PC.  */
1030
1031 static CORE_ADDR last_pc;
1032
1033 /* True when trace output should be displayed whenever program stops.  */
1034
1035 static int trace_display;
1036
1037 /* True when trace listing should include source lines.  */
1038
1039 static int default_trace_show_source = 1;
1040
1041 struct trace_buffer {
1042   int size;
1043   short *counts;
1044   CORE_ADDR *addrs;
1045 } trace_data;
1046
1047 static void
1048 trace_command (args, from_tty)
1049      char *args;
1050      int from_tty;
1051 {
1052   /* Clear the host-side trace buffer, allocating space if needed.  */
1053   trace_data.size = 0;
1054   if (trace_data.counts == NULL)
1055     trace_data.counts = (short *) xmalloc (65536 * sizeof(short));
1056   if (trace_data.addrs == NULL)
1057     trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof(CORE_ADDR));
1058
1059   tracing = 1;
1060
1061   printf_filtered ("Tracing is now on.\n");
1062 }
1063
1064 static void
1065 untrace_command (args, from_tty)
1066      char *args;
1067      int from_tty;
1068 {
1069   tracing = 0;
1070
1071   printf_filtered ("Tracing is now off.\n");
1072 }
1073
1074 static void
1075 trace_info (args, from_tty)
1076      char *args;
1077      int from_tty;
1078 {
1079   int i;
1080
1081   if (trace_data.size)
1082     {
1083       printf_filtered ("%d entries in trace buffer:\n", trace_data.size);
1084
1085       for (i = 0; i < trace_data.size; ++i)
1086         {
1087           printf_filtered ("%d: %d instruction%s at 0x%x\n",
1088                            i, trace_data.counts[i],
1089                            (trace_data.counts[i] == 1 ? "" : "s"),
1090                            trace_data.addrs[i]);
1091         }
1092     }
1093   else
1094     printf_filtered ("No entries in trace buffer.\n");
1095
1096   printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off"));
1097 }
1098
1099 /* Print the instruction at address MEMADDR in debugged memory,
1100    on STREAM.  Returns length of the instruction, in bytes.  */
1101
1102 static int
1103 print_insn (memaddr, stream)
1104      CORE_ADDR memaddr;
1105      GDB_FILE *stream;
1106 {
1107   /* If there's no disassembler, something is very wrong.  */
1108   if (tm_print_insn == NULL)
1109     abort ();
1110
1111   if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1112     tm_print_insn_info.endian = BFD_ENDIAN_BIG;
1113   else
1114     tm_print_insn_info.endian = BFD_ENDIAN_LITTLE;
1115   return (*tm_print_insn) (memaddr, &tm_print_insn_info);
1116 }
1117
1118 static void
1119 d10v_eva_prepare_to_trace ()
1120 {
1121   if (!tracing)
1122     return;
1123
1124   last_pc = read_register (PC_REGNUM);
1125 }
1126
1127 /* Collect trace data from the target board and format it into a form
1128    more useful for display.  */
1129
1130 static void
1131 d10v_eva_get_trace_data ()
1132 {
1133   int count, i, j, oldsize;
1134   int trace_addr, trace_seg, trace_cnt, next_cnt;
1135   unsigned int last_trace, trace_word, next_word;
1136   unsigned int *tmpspace;
1137
1138   if (!tracing)
1139     return;
1140
1141   tmpspace = xmalloc (65536 * sizeof(unsigned int));
1142
1143   last_trace = read_memory_unsigned_integer (DBBC_ADDR, 2) << 2;
1144
1145   /* Collect buffer contents from the target, stopping when we reach
1146      the word recorded when execution resumed.  */
1147
1148   count = 0;
1149   while (last_trace > 0)
1150     {
1151       QUIT;
1152       trace_word =
1153         read_memory_unsigned_integer (TRACE_BUFFER_BASE + last_trace, 4);
1154       trace_addr = trace_word & 0xffff;
1155       last_trace -= 4;
1156       /* Ignore an apparently nonsensical entry.  */
1157       if (trace_addr == 0xffd5)
1158         continue;
1159       tmpspace[count++] = trace_word;
1160       if (trace_addr == last_pc)
1161         break;
1162       if (count > 65535)
1163         break;
1164     }
1165
1166   /* Move the data to the host-side trace buffer, adjusting counts to
1167      include the last instruction executed and transforming the address
1168      into something that GDB likes.  */
1169
1170   for (i = 0; i < count; ++i)
1171     {
1172       trace_word = tmpspace[i];
1173       next_word = ((i == 0) ? 0 : tmpspace[i - 1]);
1174       trace_addr = trace_word & 0xffff;
1175       next_cnt = (next_word >> 24) & 0xff;
1176       j = trace_data.size + count - i - 1;
1177       trace_data.addrs[j] = (trace_addr << 2) + 0x1000000;
1178       trace_data.counts[j] = next_cnt + 1;
1179     }
1180
1181   oldsize = trace_data.size;
1182   trace_data.size += count;
1183
1184   free (tmpspace);
1185
1186   if (trace_display)
1187     display_trace (oldsize, trace_data.size);
1188 }
1189
1190 static void
1191 tdisassemble_command (arg, from_tty)
1192      char *arg;
1193      int from_tty;
1194 {
1195   int i, count;
1196   CORE_ADDR low, high;
1197   char *space_index;
1198
1199   if (!arg)
1200     {
1201       low = 0;
1202       high = trace_data.size;
1203     }
1204   else if (!(space_index = (char *) strchr (arg, ' ')))
1205     {
1206       low = parse_and_eval_address (arg);
1207       high = low + 5;
1208     }
1209   else
1210     {
1211       /* Two arguments.  */
1212       *space_index = '\0';
1213       low = parse_and_eval_address (arg);
1214       high = parse_and_eval_address (space_index + 1);
1215       if (high < low)
1216         high = low;
1217     }
1218
1219   printf_filtered ("Dump of trace from %d to %d:\n", low, high);
1220
1221   display_trace (low, high);
1222
1223   printf_filtered ("End of trace dump.\n");
1224   gdb_flush (gdb_stdout);
1225 }
1226
1227 static void
1228 display_trace (low, high)
1229      int low, high;
1230 {
1231   int i, count, trace_show_source, first, suppress;
1232   CORE_ADDR next_address;
1233
1234   trace_show_source = default_trace_show_source;
1235   if (!have_full_symbols () && !have_partial_symbols())
1236     {
1237       trace_show_source = 0;
1238       printf_filtered ("No symbol table is loaded.  Use the \"file\" command.\n");
1239       printf_filtered ("Trace will not display any source.\n");
1240     }
1241
1242   first = 1;
1243   suppress = 0;
1244   for (i = low; i < high; ++i)
1245     {
1246       next_address = trace_data.addrs[i];
1247       count = trace_data.counts[i];
1248       while (count-- > 0)
1249         {
1250           QUIT;
1251           if (trace_show_source)
1252             {
1253               struct symtab_and_line sal, sal_prev;
1254
1255               sal_prev = find_pc_line (next_address - 4, 0);
1256               sal = find_pc_line (next_address, 0);
1257
1258               if (sal.symtab)
1259                 {
1260                   if (first || sal.line != sal_prev.line)
1261                     print_source_lines (sal.symtab, sal.line, sal.line + 1, 0);
1262                   suppress = 0;
1263                 }
1264               else
1265                 {
1266                   if (!suppress)
1267                     /* FIXME-32x64--assumes sal.pc fits in long.  */
1268                     printf_filtered ("No source file for address %s.\n",
1269                                      local_hex_string((unsigned long) sal.pc));
1270                   suppress = 1;
1271                 }
1272             }
1273           first = 0;
1274           print_address (next_address, gdb_stdout);
1275           printf_filtered (":");
1276           printf_filtered ("\t");
1277           wrap_here ("    ");
1278           next_address = next_address + print_insn (next_address, gdb_stdout);
1279           printf_filtered ("\n");
1280           gdb_flush (gdb_stdout);
1281         }
1282     }
1283 }
1284
1285
1286 extern void (*target_resume_hook) PARAMS ((void));
1287 extern void (*target_wait_loop_hook) PARAMS ((void));
1288
1289 void
1290 _initialize_d10v_tdep ()
1291 {
1292   tm_print_insn = print_insn_d10v;
1293
1294   target_resume_hook = d10v_eva_prepare_to_trace;
1295   target_wait_loop_hook = d10v_eva_get_trace_data;
1296
1297   add_com ("regs", class_vars, show_regs, "Print all registers");
1298
1299   add_com ("trace", class_support, trace_command,
1300            "Enable tracing of instruction execution.");
1301
1302   add_com ("untrace", class_support, untrace_command,
1303            "Disable tracing of instruction execution.");
1304
1305   add_com ("tdisassemble", class_vars, tdisassemble_command,
1306            "Disassemble the trace buffer.\n\
1307 Two optional arguments specify a range of trace buffer entries\n\
1308 as reported by info trace (NOT addresses!).");
1309
1310   add_info ("trace", trace_info,
1311             "Display info about the trace data buffer.");
1312
1313   add_show_from_set (add_set_cmd ("tracedisplay", no_class,
1314                                   var_integer, (char *)&trace_display,
1315                                   "Set automatic display of trace.\n", &setlist),
1316                      &showlist);
1317   add_show_from_set (add_set_cmd ("tracesource", no_class,
1318                                   var_integer, (char *)&default_trace_show_source,
1319                                   "Set display of source code with trace.\n", &setlist),
1320                      &showlist);
1321
1322 }