1 /* Target-dependent code for Mitsubishi D10V, for GDB.
2 Copyright (C) 1996, 1997, 2000, 2001 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* Contributed by Martin Hunt, hunt@cygnus.com */
30 #include "gdb_string.h"
37 #include "arch-utils.h"
39 #include "floatformat.h"
43 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
45 struct frame_extra_info
56 unsigned long (*dmap_register
) (int nr
);
57 unsigned long (*imap_register
) (int nr
);
60 /* These are the addresses the D10V-EVA board maps data and
61 instruction memory to. */
63 #define DMEM_START 0x2000000
64 #define IMEM_START 0x1000000
65 #define STACK_START 0x0007ffe
67 /* d10v register names. */
77 #define NR_DMAP_REGS (gdbarch_tdep (current_gdbarch)->nr_dmap_regs)
78 #define A0_REGNUM (gdbarch_tdep (current_gdbarch)->a0_regnum)
80 /* d10v calling convention. */
82 #define ARG1_REGNUM R0_REGNUM
84 #define RET1_REGNUM R0_REGNUM
88 extern void _initialize_d10v_tdep (void);
90 static void d10v_eva_prepare_to_trace (void);
92 static void d10v_eva_get_trace_data (void);
94 static int prologue_find_regs (unsigned short op
, struct frame_info
*fi
,
97 extern void d10v_frame_init_saved_regs (struct frame_info
*);
99 static void do_d10v_pop_frame (struct frame_info
*fi
);
102 d10v_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*frame
)
104 return ((chain
) != 0 && (frame
) != 0 && (frame
)->pc
> IMEM_START
);
108 d10v_stack_align (CORE_ADDR len
)
110 return (len
+ 1) & ~1;
113 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
114 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
115 and TYPE is the type (which is known to be struct, union or array).
117 The d10v returns anything less than 8 bytes in size in
121 d10v_use_struct_convention (int gcc_p
, struct type
*type
)
123 return (TYPE_LENGTH (type
) > 8);
128 d10v_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
130 static unsigned char breakpoint
[] =
131 {0x2f, 0x90, 0x5e, 0x00};
132 *lenptr
= sizeof (breakpoint
);
136 /* Map the REG_NR onto an ascii name. Return NULL or an empty string
137 when the reg_nr isn't valid. */
141 TS2_IMAP0_REGNUM
= 32,
142 TS2_DMAP_REGNUM
= 34,
143 TS2_NR_DMAP_REGS
= 1,
148 d10v_ts2_register_name (int reg_nr
)
150 static char *register_names
[] =
152 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
153 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
154 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
155 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
156 "imap0", "imap1", "dmap", "a0", "a1"
160 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
162 return register_names
[reg_nr
];
167 TS3_IMAP0_REGNUM
= 36,
168 TS3_DMAP0_REGNUM
= 38,
169 TS3_NR_DMAP_REGS
= 4,
174 d10v_ts3_register_name (int reg_nr
)
176 static char *register_names
[] =
178 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
179 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
180 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
181 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
185 "dmap0", "dmap1", "dmap2", "dmap3"
189 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
191 return register_names
[reg_nr
];
194 /* Access the DMAP/IMAP registers in a target independent way. */
197 d10v_ts2_dmap_register (int reg_nr
)
205 return read_register (TS2_DMAP_REGNUM
);
212 d10v_ts3_dmap_register (int reg_nr
)
214 return read_register (TS3_DMAP0_REGNUM
+ reg_nr
);
218 d10v_dmap_register (int reg_nr
)
220 return gdbarch_tdep (current_gdbarch
)->dmap_register (reg_nr
);
224 d10v_ts2_imap_register (int reg_nr
)
226 return read_register (TS2_IMAP0_REGNUM
+ reg_nr
);
230 d10v_ts3_imap_register (int reg_nr
)
232 return read_register (TS3_IMAP0_REGNUM
+ reg_nr
);
236 d10v_imap_register (int reg_nr
)
238 return gdbarch_tdep (current_gdbarch
)->imap_register (reg_nr
);
241 /* MAP GDB's internal register numbering (determined by the layout fo
242 the REGISTER_BYTE array) onto the simulator's register
246 d10v_ts2_register_sim_regno (int nr
)
248 if (nr
>= TS2_IMAP0_REGNUM
249 && nr
< TS2_IMAP0_REGNUM
+ NR_IMAP_REGS
)
250 return nr
- TS2_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
251 if (nr
== TS2_DMAP_REGNUM
)
252 return nr
- TS2_DMAP_REGNUM
+ SIM_D10V_TS2_DMAP_REGNUM
;
253 if (nr
>= TS2_A0_REGNUM
254 && nr
< TS2_A0_REGNUM
+ NR_A_REGS
)
255 return nr
- TS2_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
260 d10v_ts3_register_sim_regno (int nr
)
262 if (nr
>= TS3_IMAP0_REGNUM
263 && nr
< TS3_IMAP0_REGNUM
+ NR_IMAP_REGS
)
264 return nr
- TS3_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
265 if (nr
>= TS3_DMAP0_REGNUM
266 && nr
< TS3_DMAP0_REGNUM
+ TS3_NR_DMAP_REGS
)
267 return nr
- TS3_DMAP0_REGNUM
+ SIM_D10V_DMAP0_REGNUM
;
268 if (nr
>= TS3_A0_REGNUM
269 && nr
< TS3_A0_REGNUM
+ NR_A_REGS
)
270 return nr
- TS3_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
274 /* Index within `registers' of the first byte of the space for
278 d10v_register_byte (int reg_nr
)
280 if (reg_nr
< A0_REGNUM
)
282 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
283 return (A0_REGNUM
* 2
284 + (reg_nr
- A0_REGNUM
) * 8);
286 return (A0_REGNUM
* 2
288 + (reg_nr
- A0_REGNUM
- NR_A_REGS
) * 2);
291 /* Number of bytes of storage in the actual machine representation for
295 d10v_register_raw_size (int reg_nr
)
297 if (reg_nr
< A0_REGNUM
)
299 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
305 /* Number of bytes of storage in the program's representation
309 d10v_register_virtual_size (int reg_nr
)
311 return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (reg_nr
));
314 /* Return the GDB type object for the "standard" data type
315 of data in register N. */
318 d10v_register_virtual_type (int reg_nr
)
320 if (reg_nr
>= A0_REGNUM
321 && reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
322 return builtin_type_int64
;
323 else if (reg_nr
== PC_REGNUM
324 || reg_nr
== SP_REGNUM
)
325 return builtin_type_int32
;
327 return builtin_type_int16
;
330 /* convert $pc and $sp to/from virtual addresses */
332 d10v_register_convertible (int nr
)
334 return ((nr
) == PC_REGNUM
|| (nr
) == SP_REGNUM
);
338 d10v_register_convert_to_virtual (int regnum
, struct type
*type
, char *from
,
341 ULONGEST x
= extract_unsigned_integer (from
, REGISTER_RAW_SIZE (regnum
));
342 if (regnum
== PC_REGNUM
)
343 x
= (x
<< 2) | IMEM_START
;
346 store_unsigned_integer (to
, TYPE_LENGTH (type
), x
);
350 d10v_register_convert_to_raw (struct type
*type
, int regnum
, char *from
,
353 ULONGEST x
= extract_unsigned_integer (from
, TYPE_LENGTH (type
));
355 if (regnum
== PC_REGNUM
)
357 store_unsigned_integer (to
, 2, x
);
362 d10v_make_daddr (CORE_ADDR x
)
364 return ((x
) | DMEM_START
);
368 d10v_make_iaddr (CORE_ADDR x
)
370 return (((x
) << 2) | IMEM_START
);
374 d10v_daddr_p (CORE_ADDR x
)
376 return (((x
) & 0x3000000) == DMEM_START
);
380 d10v_iaddr_p (CORE_ADDR x
)
382 return (((x
) & 0x3000000) == IMEM_START
);
387 d10v_convert_iaddr_to_raw (CORE_ADDR x
)
389 return (((x
) >> 2) & 0xffff);
393 d10v_convert_daddr_to_raw (CORE_ADDR x
)
395 return ((x
) & 0xffff);
398 /* Store the address of the place in which to copy the structure the
399 subroutine will return. This is called from call_function.
401 We store structs through a pointer passed in the first Argument
405 d10v_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
407 write_register (ARG1_REGNUM
, (addr
));
410 /* Write into appropriate registers a function return value
411 of type TYPE, given in virtual format.
413 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
416 d10v_store_return_value (struct type
*type
, char *valbuf
)
418 write_register_bytes (REGISTER_BYTE (RET1_REGNUM
),
423 /* Extract from an array REGBUF containing the (raw) register state
424 the address in which a function should return its structure value,
425 as a CORE_ADDR (or an expression that can be used as one). */
428 d10v_extract_struct_value_address (char *regbuf
)
430 return (extract_address ((regbuf
) + REGISTER_BYTE (ARG1_REGNUM
),
431 REGISTER_RAW_SIZE (ARG1_REGNUM
))
436 d10v_frame_saved_pc (struct frame_info
*frame
)
438 return ((frame
)->extra_info
->return_pc
);
441 /* Immediately after a function call, return the saved pc. We can't
442 use frame->return_pc beause that is determined by reading R13 off
443 the stack and that may not be written yet. */
446 d10v_saved_pc_after_call (struct frame_info
*frame
)
448 return ((read_register (LR_REGNUM
) << 2)
452 /* Discard from the stack the innermost frame, restoring all saved
456 d10v_pop_frame (void)
458 generic_pop_current_frame (do_d10v_pop_frame
);
462 do_d10v_pop_frame (struct frame_info
*fi
)
469 /* fill out fsr with the address of where each */
470 /* register was stored in the frame */
471 d10v_frame_init_saved_regs (fi
);
473 /* now update the current registers with the old values */
474 for (regnum
= A0_REGNUM
; regnum
< A0_REGNUM
+ NR_A_REGS
; regnum
++)
476 if (fi
->saved_regs
[regnum
])
478 read_memory (fi
->saved_regs
[regnum
], raw_buffer
, REGISTER_RAW_SIZE (regnum
));
479 write_register_bytes (REGISTER_BYTE (regnum
), raw_buffer
, REGISTER_RAW_SIZE (regnum
));
482 for (regnum
= 0; regnum
< SP_REGNUM
; regnum
++)
484 if (fi
->saved_regs
[regnum
])
486 write_register (regnum
, read_memory_unsigned_integer (fi
->saved_regs
[regnum
], REGISTER_RAW_SIZE (regnum
)));
489 if (fi
->saved_regs
[PSW_REGNUM
])
491 write_register (PSW_REGNUM
, read_memory_unsigned_integer (fi
->saved_regs
[PSW_REGNUM
], REGISTER_RAW_SIZE (PSW_REGNUM
)));
494 write_register (PC_REGNUM
, read_register (LR_REGNUM
));
495 write_register (SP_REGNUM
, fp
+ fi
->extra_info
->size
);
496 target_store_registers (-1);
497 flush_cached_frames ();
501 check_prologue (unsigned short op
)
504 if ((op
& 0x7E1F) == 0x6C1F)
508 if ((op
& 0x7E3F) == 0x6E1F)
512 if ((op
& 0x7FE1) == 0x01E1)
524 if ((op
& 0x7E1F) == 0x681E)
528 if ((op
& 0x7E3F) == 0x3A1E)
535 d10v_skip_prologue (CORE_ADDR pc
)
538 unsigned short op1
, op2
;
539 CORE_ADDR func_addr
, func_end
;
540 struct symtab_and_line sal
;
542 /* If we have line debugging information, then the end of the */
543 /* prologue should the first assembly instruction of the first source line */
544 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
546 sal
= find_pc_line (func_addr
, 0);
547 if (sal
.end
&& sal
.end
< func_end
)
551 if (target_read_memory (pc
, (char *) &op
, 4))
552 return pc
; /* Can't access it -- assume no prologue. */
556 op
= (unsigned long) read_memory_integer (pc
, 4);
557 if ((op
& 0xC0000000) == 0xC0000000)
559 /* long instruction */
560 if (((op
& 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
561 ((op
& 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
562 ((op
& 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
567 /* short instructions */
568 if ((op
& 0xC0000000) == 0x80000000)
570 op2
= (op
& 0x3FFF8000) >> 15;
575 op1
= (op
& 0x3FFF8000) >> 15;
578 if (check_prologue (op1
))
580 if (!check_prologue (op2
))
582 /* if the previous opcode was really part of the prologue */
583 /* and not just a NOP, then we want to break after both instructions */
597 /* Given a GDB frame, determine the address of the calling function's frame.
598 This will be used to create a new GDB frame struct, and then
599 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
603 d10v_frame_chain (struct frame_info
*fi
)
605 d10v_frame_init_saved_regs (fi
);
607 if (fi
->extra_info
->return_pc
== IMEM_START
608 || inside_entry_file (fi
->extra_info
->return_pc
))
609 return (CORE_ADDR
) 0;
611 if (!fi
->saved_regs
[FP_REGNUM
])
613 if (!fi
->saved_regs
[SP_REGNUM
]
614 || fi
->saved_regs
[SP_REGNUM
] == STACK_START
)
615 return (CORE_ADDR
) 0;
617 return fi
->saved_regs
[SP_REGNUM
];
620 if (!read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
621 REGISTER_RAW_SIZE (FP_REGNUM
)))
622 return (CORE_ADDR
) 0;
624 return D10V_MAKE_DADDR (read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
625 REGISTER_RAW_SIZE (FP_REGNUM
)));
628 static int next_addr
, uses_frame
;
631 prologue_find_regs (unsigned short op
, struct frame_info
*fi
, CORE_ADDR addr
)
636 if ((op
& 0x7E1F) == 0x6C1F)
638 n
= (op
& 0x1E0) >> 5;
640 fi
->saved_regs
[n
] = next_addr
;
645 else if ((op
& 0x7E3F) == 0x6E1F)
647 n
= (op
& 0x1E0) >> 5;
649 fi
->saved_regs
[n
] = next_addr
;
650 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
655 if ((op
& 0x7FE1) == 0x01E1)
657 n
= (op
& 0x1E) >> 1;
676 if ((op
& 0x7E1F) == 0x681E)
678 n
= (op
& 0x1E0) >> 5;
679 fi
->saved_regs
[n
] = next_addr
;
684 if ((op
& 0x7E3F) == 0x3A1E)
686 n
= (op
& 0x1E0) >> 5;
687 fi
->saved_regs
[n
] = next_addr
;
688 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
695 /* Put here the code to store, into fi->saved_regs, the addresses of
696 the saved registers of frame described by FRAME_INFO. This
697 includes special registers such as pc and fp saved in special ways
698 in the stack frame. sp is even more special: the address we return
699 for it IS the sp for the next frame. */
702 d10v_frame_init_saved_regs (struct frame_info
*fi
)
706 unsigned short op1
, op2
;
710 memset (fi
->saved_regs
, 0, SIZEOF_FRAME_SAVED_REGS
);
713 pc
= get_pc_function_start (fi
->pc
);
718 op
= (unsigned long) read_memory_integer (pc
, 4);
719 if ((op
& 0xC0000000) == 0xC0000000)
721 /* long instruction */
722 if ((op
& 0x3FFF0000) == 0x01FF0000)
725 short n
= op
& 0xFFFF;
728 else if ((op
& 0x3F0F0000) == 0x340F0000)
730 /* st rn, @(offset,sp) */
731 short offset
= op
& 0xFFFF;
732 short n
= (op
>> 20) & 0xF;
733 fi
->saved_regs
[n
] = next_addr
+ offset
;
735 else if ((op
& 0x3F1F0000) == 0x350F0000)
737 /* st2w rn, @(offset,sp) */
738 short offset
= op
& 0xFFFF;
739 short n
= (op
>> 20) & 0xF;
740 fi
->saved_regs
[n
] = next_addr
+ offset
;
741 fi
->saved_regs
[n
+ 1] = next_addr
+ offset
+ 2;
748 /* short instructions */
749 if ((op
& 0xC0000000) == 0x80000000)
751 op2
= (op
& 0x3FFF8000) >> 15;
756 op1
= (op
& 0x3FFF8000) >> 15;
759 if (!prologue_find_regs (op1
, fi
, pc
) || !prologue_find_regs (op2
, fi
, pc
))
765 fi
->extra_info
->size
= -next_addr
;
768 fp
= D10V_MAKE_DADDR (read_register (SP_REGNUM
));
770 for (i
= 0; i
< NUM_REGS
- 1; i
++)
771 if (fi
->saved_regs
[i
])
773 fi
->saved_regs
[i
] = fp
- (next_addr
- fi
->saved_regs
[i
]);
776 if (fi
->saved_regs
[LR_REGNUM
])
778 CORE_ADDR return_pc
= read_memory_unsigned_integer (fi
->saved_regs
[LR_REGNUM
], REGISTER_RAW_SIZE (LR_REGNUM
));
779 fi
->extra_info
->return_pc
= D10V_MAKE_IADDR (return_pc
);
783 fi
->extra_info
->return_pc
= D10V_MAKE_IADDR (read_register (LR_REGNUM
));
786 /* th SP is not normally (ever?) saved, but check anyway */
787 if (!fi
->saved_regs
[SP_REGNUM
])
789 /* if the FP was saved, that means the current FP is valid, */
790 /* otherwise, it isn't being used, so we use the SP instead */
792 fi
->saved_regs
[SP_REGNUM
] = read_register (FP_REGNUM
) + fi
->extra_info
->size
;
795 fi
->saved_regs
[SP_REGNUM
] = fp
+ fi
->extra_info
->size
;
796 fi
->extra_info
->frameless
= 1;
797 fi
->saved_regs
[FP_REGNUM
] = 0;
803 d10v_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
805 fi
->extra_info
= (struct frame_extra_info
*)
806 frame_obstack_alloc (sizeof (struct frame_extra_info
));
807 frame_saved_regs_zalloc (fi
);
809 fi
->extra_info
->frameless
= 0;
810 fi
->extra_info
->size
= 0;
811 fi
->extra_info
->return_pc
= 0;
813 /* The call dummy doesn't save any registers on the stack, so we can
815 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
821 d10v_frame_init_saved_regs (fi
);
826 show_regs (char *args
, int from_tty
)
829 printf_filtered ("PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
830 (long) read_register (PC_REGNUM
),
831 (long) D10V_MAKE_IADDR (read_register (PC_REGNUM
)),
832 (long) read_register (PSW_REGNUM
),
833 (long) read_register (24),
834 (long) read_register (25),
835 (long) read_register (23));
836 printf_filtered ("R0-R7 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
837 (long) read_register (0),
838 (long) read_register (1),
839 (long) read_register (2),
840 (long) read_register (3),
841 (long) read_register (4),
842 (long) read_register (5),
843 (long) read_register (6),
844 (long) read_register (7));
845 printf_filtered ("R8-R15 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
846 (long) read_register (8),
847 (long) read_register (9),
848 (long) read_register (10),
849 (long) read_register (11),
850 (long) read_register (12),
851 (long) read_register (13),
852 (long) read_register (14),
853 (long) read_register (15));
854 for (a
= 0; a
< NR_IMAP_REGS
; a
++)
857 printf_filtered (" ");
858 printf_filtered ("IMAP%d %04lx", a
, d10v_imap_register (a
));
860 if (NR_DMAP_REGS
== 1)
861 printf_filtered (" DMAP %04lx\n", d10v_dmap_register (2));
864 for (a
= 0; a
< NR_DMAP_REGS
; a
++)
866 printf_filtered (" DMAP%d %04lx", a
, d10v_dmap_register (a
));
868 printf_filtered ("\n");
870 printf_filtered ("A0-A%d", NR_A_REGS
- 1);
871 for (a
= A0_REGNUM
; a
< A0_REGNUM
+ NR_A_REGS
; a
++)
873 char num
[MAX_REGISTER_RAW_SIZE
];
875 printf_filtered (" ");
876 read_register_gen (a
, (char *) &num
);
877 for (i
= 0; i
< MAX_REGISTER_RAW_SIZE
; i
++)
879 printf_filtered ("%02x", (num
[i
] & 0xff));
882 printf_filtered ("\n");
886 d10v_read_pc (int pid
)
892 save_pid
= inferior_pid
;
894 pc
= (int) read_register (PC_REGNUM
);
895 inferior_pid
= save_pid
;
896 retval
= D10V_MAKE_IADDR (pc
);
901 d10v_write_pc (CORE_ADDR val
, int pid
)
905 save_pid
= inferior_pid
;
907 write_register (PC_REGNUM
, D10V_CONVERT_IADDR_TO_RAW (val
));
908 inferior_pid
= save_pid
;
914 return (D10V_MAKE_DADDR (read_register (SP_REGNUM
)));
918 d10v_write_sp (CORE_ADDR val
)
920 write_register (SP_REGNUM
, D10V_CONVERT_DADDR_TO_RAW (val
));
924 d10v_write_fp (CORE_ADDR val
)
926 write_register (FP_REGNUM
, D10V_CONVERT_DADDR_TO_RAW (val
));
932 return (D10V_MAKE_DADDR (read_register (FP_REGNUM
)));
935 /* Function: push_return_address (pc)
936 Set up the return address for the inferior function call.
937 Needed for targets where we don't actually execute a JSR/BSR instruction */
940 d10v_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
942 write_register (LR_REGNUM
, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ()));
947 /* When arguments must be pushed onto the stack, they go on in reverse
948 order. The below implements a FILO (stack) to do this. */
953 struct stack_item
*prev
;
957 static struct stack_item
*push_stack_item (struct stack_item
*prev
,
958 void *contents
, int len
);
959 static struct stack_item
*
960 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
962 struct stack_item
*si
;
963 si
= xmalloc (sizeof (struct stack_item
));
964 si
->data
= xmalloc (len
);
967 memcpy (si
->data
, contents
, len
);
971 static struct stack_item
*pop_stack_item (struct stack_item
*si
);
972 static struct stack_item
*
973 pop_stack_item (struct stack_item
*si
)
975 struct stack_item
*dead
= si
;
984 d10v_push_arguments (int nargs
, value_ptr
*args
, CORE_ADDR sp
,
985 int struct_return
, CORE_ADDR struct_addr
)
988 int regnum
= ARG1_REGNUM
;
989 struct stack_item
*si
= NULL
;
991 /* Fill in registers and arg lists */
992 for (i
= 0; i
< nargs
; i
++)
994 value_ptr arg
= args
[i
];
995 struct type
*type
= check_typedef (VALUE_TYPE (arg
));
996 char *contents
= VALUE_CONTENTS (arg
);
997 int len
= TYPE_LENGTH (type
);
998 /* printf ("push: type=%d len=%d\n", type->code, len); */
999 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
1001 /* pointers require special handling - first convert and
1003 long val
= extract_signed_integer (contents
, len
);
1005 if (TYPE_TARGET_TYPE (type
)
1006 && (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
))
1008 /* function pointer */
1009 val
= D10V_CONVERT_IADDR_TO_RAW (val
);
1011 else if (D10V_IADDR_P (val
))
1013 /* also function pointer! */
1014 val
= D10V_CONVERT_DADDR_TO_RAW (val
);
1021 if (regnum
<= ARGN_REGNUM
)
1022 write_register (regnum
++, val
& 0xffff);
1026 /* arg will go onto stack */
1027 store_address (ptr
, 2, val
& 0xffff);
1028 si
= push_stack_item (si
, ptr
, 2);
1033 int aligned_regnum
= (regnum
+ 1) & ~1;
1034 if (len
<= 2 && regnum
<= ARGN_REGNUM
)
1035 /* fits in a single register, do not align */
1037 long val
= extract_unsigned_integer (contents
, len
);
1038 write_register (regnum
++, val
);
1040 else if (len
<= (ARGN_REGNUM
- aligned_regnum
+ 1) * 2)
1041 /* value fits in remaining registers, store keeping left
1045 regnum
= aligned_regnum
;
1046 for (b
= 0; b
< (len
& ~1); b
+= 2)
1048 long val
= extract_unsigned_integer (&contents
[b
], 2);
1049 write_register (regnum
++, val
);
1053 long val
= extract_unsigned_integer (&contents
[b
], 1);
1054 write_register (regnum
++, (val
<< 8));
1059 /* arg will go onto stack */
1060 regnum
= ARGN_REGNUM
+ 1;
1061 si
= push_stack_item (si
, contents
, len
);
1068 sp
= (sp
- si
->len
) & ~1;
1069 write_memory (sp
, si
->data
, si
->len
);
1070 si
= pop_stack_item (si
);
1077 /* Given a return value in `regbuf' with a type `valtype',
1078 extract and copy its value into `valbuf'. */
1081 d10v_extract_return_value (struct type
*type
, char regbuf
[REGISTER_BYTES
],
1085 /* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */
1086 if (TYPE_CODE (type
) == TYPE_CODE_PTR
1087 && TYPE_TARGET_TYPE (type
)
1088 && (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
))
1090 /* pointer to function */
1093 snum
= extract_address (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1094 store_address (valbuf
, 4, D10V_MAKE_IADDR (snum
));
1096 else if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
1098 /* pointer to data */
1101 snum
= extract_address (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1102 store_address (valbuf
, 4, D10V_MAKE_DADDR (snum
));
1106 len
= TYPE_LENGTH (type
);
1109 unsigned short c
= extract_unsigned_integer (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1110 store_unsigned_integer (valbuf
, 1, c
);
1112 else if ((len
& 1) == 0)
1113 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
), len
);
1116 /* For return values of odd size, the first byte is in the
1117 least significant part of the first register. The
1118 remaining bytes in remaining registers. Interestingly,
1119 when such values are passed in, the last byte is in the
1120 most significant byte of that same register - wierd. */
1121 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
) + 1, len
);
1126 /* Translate a GDB virtual ADDR/LEN into a format the remote target
1127 understands. Returns number of bytes that can be transfered
1128 starting at TARG_ADDR. Return ZERO if no bytes can be transfered
1129 (segmentation fault). Since the simulator knows all about how the
1130 VM system works, we just call that to do the translation. */
1133 remote_d10v_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1134 CORE_ADDR
*targ_addr
, int *targ_len
)
1138 out_len
= sim_d10v_translate_addr (memaddr
, nr_bytes
,
1141 d10v_imap_register
);
1142 *targ_addr
= out_addr
;
1143 *targ_len
= out_len
;
1147 /* The following code implements access to, and display of, the D10V's
1148 instruction trace buffer. The buffer consists of 64K or more
1149 4-byte words of data, of which each words includes an 8-bit count,
1150 an 8-bit segment number, and a 16-bit instruction address.
1152 In theory, the trace buffer is continuously capturing instruction
1153 data that the CPU presents on its "debug bus", but in practice, the
1154 ROMified GDB stub only enables tracing when it continues or steps
1155 the program, and stops tracing when the program stops; so it
1156 actually works for GDB to read the buffer counter out of memory and
1157 then read each trace word. The counter records where the tracing
1158 stops, but there is no record of where it started, so we remember
1159 the PC when we resumed and then search backwards in the trace
1160 buffer for a word that includes that address. This is not perfect,
1161 because you will miss trace data if the resumption PC is the target
1162 of a branch. (The value of the buffer counter is semi-random, any
1163 trace data from a previous program stop is gone.) */
1165 /* The address of the last word recorded in the trace buffer. */
1167 #define DBBC_ADDR (0xd80000)
1169 /* The base of the trace buffer, at least for the "Board_0". */
1171 #define TRACE_BUFFER_BASE (0xf40000)
1173 static void trace_command (char *, int);
1175 static void untrace_command (char *, int);
1177 static void trace_info (char *, int);
1179 static void tdisassemble_command (char *, int);
1181 static void display_trace (int, int);
1183 /* True when instruction traces are being collected. */
1187 /* Remembered PC. */
1189 static CORE_ADDR last_pc
;
1191 /* True when trace output should be displayed whenever program stops. */
1193 static int trace_display
;
1195 /* True when trace listing should include source lines. */
1197 static int default_trace_show_source
= 1;
1208 trace_command (char *args
, int from_tty
)
1210 /* Clear the host-side trace buffer, allocating space if needed. */
1211 trace_data
.size
= 0;
1212 if (trace_data
.counts
== NULL
)
1213 trace_data
.counts
= (short *) xmalloc (65536 * sizeof (short));
1214 if (trace_data
.addrs
== NULL
)
1215 trace_data
.addrs
= (CORE_ADDR
*) xmalloc (65536 * sizeof (CORE_ADDR
));
1219 printf_filtered ("Tracing is now on.\n");
1223 untrace_command (char *args
, int from_tty
)
1227 printf_filtered ("Tracing is now off.\n");
1231 trace_info (char *args
, int from_tty
)
1235 if (trace_data
.size
)
1237 printf_filtered ("%d entries in trace buffer:\n", trace_data
.size
);
1239 for (i
= 0; i
< trace_data
.size
; ++i
)
1241 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1243 trace_data
.counts
[i
],
1244 (trace_data
.counts
[i
] == 1 ? "" : "s"),
1245 paddr_nz (trace_data
.addrs
[i
]));
1249 printf_filtered ("No entries in trace buffer.\n");
1251 printf_filtered ("Tracing is currently %s.\n", (tracing
? "on" : "off"));
1254 /* Print the instruction at address MEMADDR in debugged memory,
1255 on STREAM. Returns length of the instruction, in bytes. */
1258 print_insn (CORE_ADDR memaddr
, struct ui_file
*stream
)
1260 /* If there's no disassembler, something is very wrong. */
1261 if (tm_print_insn
== NULL
)
1262 internal_error (__FILE__
, __LINE__
,
1263 "print_insn: no disassembler");
1265 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1266 tm_print_insn_info
.endian
= BFD_ENDIAN_BIG
;
1268 tm_print_insn_info
.endian
= BFD_ENDIAN_LITTLE
;
1269 return (*tm_print_insn
) (memaddr
, &tm_print_insn_info
);
1273 d10v_eva_prepare_to_trace (void)
1278 last_pc
= read_register (PC_REGNUM
);
1281 /* Collect trace data from the target board and format it into a form
1282 more useful for display. */
1285 d10v_eva_get_trace_data (void)
1287 int count
, i
, j
, oldsize
;
1288 int trace_addr
, trace_seg
, trace_cnt
, next_cnt
;
1289 unsigned int last_trace
, trace_word
, next_word
;
1290 unsigned int *tmpspace
;
1295 tmpspace
= xmalloc (65536 * sizeof (unsigned int));
1297 last_trace
= read_memory_unsigned_integer (DBBC_ADDR
, 2) << 2;
1299 /* Collect buffer contents from the target, stopping when we reach
1300 the word recorded when execution resumed. */
1303 while (last_trace
> 0)
1307 read_memory_unsigned_integer (TRACE_BUFFER_BASE
+ last_trace
, 4);
1308 trace_addr
= trace_word
& 0xffff;
1310 /* Ignore an apparently nonsensical entry. */
1311 if (trace_addr
== 0xffd5)
1313 tmpspace
[count
++] = trace_word
;
1314 if (trace_addr
== last_pc
)
1320 /* Move the data to the host-side trace buffer, adjusting counts to
1321 include the last instruction executed and transforming the address
1322 into something that GDB likes. */
1324 for (i
= 0; i
< count
; ++i
)
1326 trace_word
= tmpspace
[i
];
1327 next_word
= ((i
== 0) ? 0 : tmpspace
[i
- 1]);
1328 trace_addr
= trace_word
& 0xffff;
1329 next_cnt
= (next_word
>> 24) & 0xff;
1330 j
= trace_data
.size
+ count
- i
- 1;
1331 trace_data
.addrs
[j
] = (trace_addr
<< 2) + 0x1000000;
1332 trace_data
.counts
[j
] = next_cnt
+ 1;
1335 oldsize
= trace_data
.size
;
1336 trace_data
.size
+= count
;
1341 display_trace (oldsize
, trace_data
.size
);
1345 tdisassemble_command (char *arg
, int from_tty
)
1348 CORE_ADDR low
, high
;
1354 high
= trace_data
.size
;
1356 else if (!(space_index
= (char *) strchr (arg
, ' ')))
1358 low
= parse_and_eval_address (arg
);
1363 /* Two arguments. */
1364 *space_index
= '\0';
1365 low
= parse_and_eval_address (arg
);
1366 high
= parse_and_eval_address (space_index
+ 1);
1371 printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low
), paddr_u (high
));
1373 display_trace (low
, high
);
1375 printf_filtered ("End of trace dump.\n");
1376 gdb_flush (gdb_stdout
);
1380 display_trace (int low
, int high
)
1382 int i
, count
, trace_show_source
, first
, suppress
;
1383 CORE_ADDR next_address
;
1385 trace_show_source
= default_trace_show_source
;
1386 if (!have_full_symbols () && !have_partial_symbols ())
1388 trace_show_source
= 0;
1389 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1390 printf_filtered ("Trace will not display any source.\n");
1395 for (i
= low
; i
< high
; ++i
)
1397 next_address
= trace_data
.addrs
[i
];
1398 count
= trace_data
.counts
[i
];
1402 if (trace_show_source
)
1404 struct symtab_and_line sal
, sal_prev
;
1406 sal_prev
= find_pc_line (next_address
- 4, 0);
1407 sal
= find_pc_line (next_address
, 0);
1411 if (first
|| sal
.line
!= sal_prev
.line
)
1412 print_source_lines (sal
.symtab
, sal
.line
, sal
.line
+ 1, 0);
1418 /* FIXME-32x64--assumes sal.pc fits in long. */
1419 printf_filtered ("No source file for address %s.\n",
1420 local_hex_string ((unsigned long) sal
.pc
));
1425 print_address (next_address
, gdb_stdout
);
1426 printf_filtered (":");
1427 printf_filtered ("\t");
1429 next_address
= next_address
+ print_insn (next_address
, gdb_stdout
);
1430 printf_filtered ("\n");
1431 gdb_flush (gdb_stdout
);
1437 static gdbarch_init_ftype d10v_gdbarch_init
;
1439 static struct gdbarch
*
1440 d10v_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1442 static LONGEST d10v_call_dummy_words
[] =
1444 struct gdbarch
*gdbarch
;
1446 struct gdbarch_tdep
*tdep
;
1447 gdbarch_register_name_ftype
*d10v_register_name
;
1448 gdbarch_register_sim_regno_ftype
*d10v_register_sim_regno
;
1450 /* Find a candidate among the list of pre-declared architectures. */
1451 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1453 return arches
->gdbarch
;
1455 /* None found, create a new architecture from the information
1457 tdep
= XMALLOC (struct gdbarch_tdep
);
1458 gdbarch
= gdbarch_alloc (&info
, tdep
);
1460 switch (info
.bfd_arch_info
->mach
)
1462 case bfd_mach_d10v_ts2
:
1464 d10v_register_name
= d10v_ts2_register_name
;
1465 d10v_register_sim_regno
= d10v_ts2_register_sim_regno
;
1466 tdep
->a0_regnum
= TS2_A0_REGNUM
;
1467 tdep
->nr_dmap_regs
= TS2_NR_DMAP_REGS
;
1468 tdep
->dmap_register
= d10v_ts2_dmap_register
;
1469 tdep
->imap_register
= d10v_ts2_imap_register
;
1472 case bfd_mach_d10v_ts3
:
1474 d10v_register_name
= d10v_ts3_register_name
;
1475 d10v_register_sim_regno
= d10v_ts3_register_sim_regno
;
1476 tdep
->a0_regnum
= TS3_A0_REGNUM
;
1477 tdep
->nr_dmap_regs
= TS3_NR_DMAP_REGS
;
1478 tdep
->dmap_register
= d10v_ts3_dmap_register
;
1479 tdep
->imap_register
= d10v_ts3_imap_register
;
1483 set_gdbarch_read_pc (gdbarch
, d10v_read_pc
);
1484 set_gdbarch_write_pc (gdbarch
, d10v_write_pc
);
1485 set_gdbarch_read_fp (gdbarch
, d10v_read_fp
);
1486 set_gdbarch_write_fp (gdbarch
, d10v_write_fp
);
1487 set_gdbarch_read_sp (gdbarch
, d10v_read_sp
);
1488 set_gdbarch_write_sp (gdbarch
, d10v_write_sp
);
1490 set_gdbarch_num_regs (gdbarch
, d10v_num_regs
);
1491 set_gdbarch_sp_regnum (gdbarch
, 15);
1492 set_gdbarch_fp_regnum (gdbarch
, 11);
1493 set_gdbarch_pc_regnum (gdbarch
, 18);
1494 set_gdbarch_register_name (gdbarch
, d10v_register_name
);
1495 set_gdbarch_register_size (gdbarch
, 2);
1496 set_gdbarch_register_bytes (gdbarch
, (d10v_num_regs
- 2) * 2 + 16);
1497 set_gdbarch_register_byte (gdbarch
, d10v_register_byte
);
1498 set_gdbarch_register_raw_size (gdbarch
, d10v_register_raw_size
);
1499 set_gdbarch_max_register_raw_size (gdbarch
, 8);
1500 set_gdbarch_register_virtual_size (gdbarch
, d10v_register_virtual_size
);
1501 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
1502 set_gdbarch_register_virtual_type (gdbarch
, d10v_register_virtual_type
);
1504 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1505 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1506 set_gdbarch_int_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1507 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1508 set_gdbarch_long_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1509 /* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long
1510 double'' is 64 bits. */
1511 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1512 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1513 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1514 switch (info
.byte_order
)
1517 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
1518 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_big
);
1519 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
1522 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
1523 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_little
);
1524 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_little
);
1527 internal_error (__FILE__
, __LINE__
,
1528 "d10v_gdbarch_init: bad byte order for float format");
1531 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
1532 set_gdbarch_call_dummy_length (gdbarch
, 0);
1533 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
1534 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
1535 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
1536 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
1537 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
1538 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
1539 set_gdbarch_call_dummy_words (gdbarch
, d10v_call_dummy_words
);
1540 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (d10v_call_dummy_words
));
1541 set_gdbarch_call_dummy_p (gdbarch
, 1);
1542 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
1543 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
1544 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
1546 set_gdbarch_register_convertible (gdbarch
, d10v_register_convertible
);
1547 set_gdbarch_register_convert_to_virtual (gdbarch
, d10v_register_convert_to_virtual
);
1548 set_gdbarch_register_convert_to_raw (gdbarch
, d10v_register_convert_to_raw
);
1550 set_gdbarch_extract_return_value (gdbarch
, d10v_extract_return_value
);
1551 set_gdbarch_push_arguments (gdbarch
, d10v_push_arguments
);
1552 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
1553 set_gdbarch_push_return_address (gdbarch
, d10v_push_return_address
);
1555 set_gdbarch_d10v_make_daddr (gdbarch
, d10v_make_daddr
);
1556 set_gdbarch_d10v_make_iaddr (gdbarch
, d10v_make_iaddr
);
1557 set_gdbarch_d10v_daddr_p (gdbarch
, d10v_daddr_p
);
1558 set_gdbarch_d10v_iaddr_p (gdbarch
, d10v_iaddr_p
);
1559 set_gdbarch_d10v_convert_daddr_to_raw (gdbarch
, d10v_convert_daddr_to_raw
);
1560 set_gdbarch_d10v_convert_iaddr_to_raw (gdbarch
, d10v_convert_iaddr_to_raw
);
1562 set_gdbarch_store_struct_return (gdbarch
, d10v_store_struct_return
);
1563 set_gdbarch_store_return_value (gdbarch
, d10v_store_return_value
);
1564 set_gdbarch_extract_struct_value_address (gdbarch
, d10v_extract_struct_value_address
);
1565 set_gdbarch_use_struct_convention (gdbarch
, d10v_use_struct_convention
);
1567 set_gdbarch_frame_init_saved_regs (gdbarch
, d10v_frame_init_saved_regs
);
1568 set_gdbarch_init_extra_frame_info (gdbarch
, d10v_init_extra_frame_info
);
1570 set_gdbarch_pop_frame (gdbarch
, d10v_pop_frame
);
1572 set_gdbarch_skip_prologue (gdbarch
, d10v_skip_prologue
);
1573 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1574 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
1575 set_gdbarch_function_start_offset (gdbarch
, 0);
1576 set_gdbarch_breakpoint_from_pc (gdbarch
, d10v_breakpoint_from_pc
);
1578 set_gdbarch_remote_translate_xfer_address (gdbarch
, remote_d10v_translate_xfer_address
);
1580 set_gdbarch_frame_args_skip (gdbarch
, 0);
1581 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
1582 set_gdbarch_frame_chain (gdbarch
, d10v_frame_chain
);
1583 set_gdbarch_frame_chain_valid (gdbarch
, d10v_frame_chain_valid
);
1584 set_gdbarch_frame_saved_pc (gdbarch
, d10v_frame_saved_pc
);
1585 set_gdbarch_frame_args_address (gdbarch
, default_frame_address
);
1586 set_gdbarch_frame_locals_address (gdbarch
, default_frame_address
);
1587 set_gdbarch_saved_pc_after_call (gdbarch
, d10v_saved_pc_after_call
);
1588 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1589 set_gdbarch_stack_align (gdbarch
, d10v_stack_align
);
1591 set_gdbarch_register_sim_regno (gdbarch
, d10v_register_sim_regno
);
1592 set_gdbarch_extra_stack_alignment_needed (gdbarch
, 0);
1598 extern void (*target_resume_hook
) (void);
1599 extern void (*target_wait_loop_hook
) (void);
1602 _initialize_d10v_tdep (void)
1604 register_gdbarch_init (bfd_arch_d10v
, d10v_gdbarch_init
);
1606 tm_print_insn
= print_insn_d10v
;
1608 target_resume_hook
= d10v_eva_prepare_to_trace
;
1609 target_wait_loop_hook
= d10v_eva_get_trace_data
;
1611 add_com ("regs", class_vars
, show_regs
, "Print all registers");
1613 add_com ("itrace", class_support
, trace_command
,
1614 "Enable tracing of instruction execution.");
1616 add_com ("iuntrace", class_support
, untrace_command
,
1617 "Disable tracing of instruction execution.");
1619 add_com ("itdisassemble", class_vars
, tdisassemble_command
,
1620 "Disassemble the trace buffer.\n\
1621 Two optional arguments specify a range of trace buffer entries\n\
1622 as reported by info trace (NOT addresses!).");
1624 add_info ("itrace", trace_info
,
1625 "Display info about the trace data buffer.");
1627 add_show_from_set (add_set_cmd ("itracedisplay", no_class
,
1628 var_integer
, (char *) &trace_display
,
1629 "Set automatic display of trace.\n", &setlist
),
1631 add_show_from_set (add_set_cmd ("itracesource", no_class
,
1632 var_integer
, (char *) &default_trace_show_source
,
1633 "Set display of source code with trace.\n", &setlist
),