gdb/dcache.c

   1 /* Caching code for GDB, the GNU debugger.
   2
   3    Copyright 1992, 1993, 1995, 1996, 1998, 1999, 2000, 2001, 2003 Free
   4    Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 2 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 59 Temple Place - Suite 330,
  21    Boston, MA 02111-1307, USA.  */
  22
  23 #include "defs.h"
  24 #include "dcache.h"
  25 #include "gdbcmd.h"
  26 #include "gdb_string.h"
  27 #include "gdbcore.h"
  28 #include "target.h"
  29
  30 /* The data cache could lead to incorrect results because it doesn't
  31    know about volatile variables, thus making it impossible to debug
  32    functions which use memory mapped I/O devices.  Set the nocache
  33    memory region attribute in those cases.
  34
  35    In general the dcache speeds up performance, some speed improvement
  36    comes from the actual caching mechanism, but the major gain is in
  37    the reduction of the remote protocol overhead; instead of reading
  38    or writing a large area of memory in 4 byte requests, the cache
  39    bundles up the requests into 32 byte (actually LINE_SIZE) chunks.
  40    Reducing the overhead to an eighth of what it was.  This is very
  41    obvious when displaying a large amount of data,
  42
  43    eg, x/200x 0
  44
  45    caching     |   no    yes
  46    ----------------------------
  47    first time  |   4 sec  2 sec improvement due to chunking
  48    second time |   4 sec  0 sec improvement due to caching
  49
  50    The cache structure is unusual, we keep a number of cache blocks
  51    (DCACHE_SIZE) and each one caches a LINE_SIZEed area of memory.
  52    Within each line we remember the address of the line (always a
  53    multiple of the LINE_SIZE) and a vector of bytes over the range.
  54    There's another vector which contains the state of the bytes.
  55
  56    ENTRY_BAD means that the byte is just plain wrong, and has no
  57    correspondence with anything else (as it would when the cache is
  58    turned on, but nothing has been done to it.
  59
  60    ENTRY_DIRTY means that the byte has some data in it which should be
  61    written out to the remote target one day, but contains correct
  62    data.
  63
  64    ENTRY_OK means that the data is the same in the cache as it is in
  65    remote memory.
  66
  67
  68    The ENTRY_DIRTY state is necessary because GDB likes to write large
  69    lumps of memory in small bits.  If the caching mechanism didn't
  70    maintain the DIRTY information, then something like a two byte
  71    write would mean that the entire cache line would have to be read,
  72    the two bytes modified and then written out again.  The alternative
  73    would be to not read in the cache line in the first place, and just
  74    write the two bytes directly into target memory.  The trouble with
  75    that is that it really nails performance, because of the remote
  76    protocol overhead.  This way, all those little writes are bundled
  77    up into an entire cache line write in one go, without having to
  78    read the cache line in the first place.
  79  */
  80
  81 /* NOTE: Interaction of dcache and memory region attributes
  82
  83    As there is no requirement that memory region attributes be aligned
  84    to or be a multiple of the dcache page size, dcache_read_line() and
  85    dcache_write_line() must break up the page by memory region.  If a
  86    chunk does not have the cache attribute set, an invalid memory type
  87    is set, etc., then the chunk is skipped.  Those chunks are handled
  88    in target_xfer_memory() (or target_xfer_memory_partial()).
  89
  90    This doesn't occur very often.  The most common occurance is when
  91    the last bit of the .text segment and the first bit of the .data
  92    segment fall within the same dcache page with a ro/cacheable memory
  93    region defined for the .text segment and a rw/non-cacheable memory
  94    region defined for the .data segment. */
  95
  96 /* This value regulates the number of cache blocks stored.
  97    Smaller values reduce the time spent searching for a cache
  98    line, and reduce memory requirements, but increase the risk
  99    of a line not being in memory */
 100
 101 #define DCACHE_SIZE 64
 102
 103 /* This value regulates the size of a cache line.  Smaller values
 104    reduce the time taken to read a single byte, but reduce overall
 105    throughput.  */
 106
 107 #define LINE_SIZE_POWER (5)
 108 #define LINE_SIZE (1 << LINE_SIZE_POWER)
 109
 110 /* Each cache block holds LINE_SIZE bytes of data
 111    starting at a multiple-of-LINE_SIZE address.  */
 112
 113 #define LINE_SIZE_MASK  ((LINE_SIZE - 1))
 114 #define XFORM(x)        ((x) & LINE_SIZE_MASK)
 115 #define MASK(x)         ((x) & ~LINE_SIZE_MASK)
 116
 117
 118 #define ENTRY_BAD   0           /* data at this byte is wrong */
 119 #define ENTRY_DIRTY 1           /* data at this byte needs to be written back */
 120 #define ENTRY_OK    2           /* data at this byte is same as in memory */
 121
 122
 123 struct dcache_block
 124   {
 125     struct dcache_block *p;     /* next in list */
 126     CORE_ADDR addr;             /* Address for which data is recorded.  */
 127     char data[LINE_SIZE];       /* bytes at given address */
 128     unsigned char state[LINE_SIZE];     /* what state the data is in */
 129
 130     /* whether anything in state is dirty - used to speed up the
 131        dirty scan. */
 132     int anydirty;
 133
 134     int refs;
 135   };
 136
 137
 138 /* FIXME: dcache_struct used to have a cache_has_stuff field that was
 139    used to record whether the cache had been accessed.  This was used
 140    to invalidate the cache whenever caching was (re-)enabled (if the
 141    cache was disabled and later re-enabled, it could contain stale
 142    data).  This was not needed because the cache is write through and
 143    the code that enables, disables, and deletes memory region all
 144    invalidate the cache.
 145
 146    This is overkill, since it also invalidates cache lines from
 147    unrelated regions.  One way this could be addressed by adding a
 148    new function that takes an address and a length and invalidates
 149    only those cache lines that match. */
 150
 151 struct dcache_struct
 152   {
 153     /* free list */
 154     struct dcache_block *free_head;
 155     struct dcache_block *free_tail;
 156
 157     /* in use list */
 158     struct dcache_block *valid_head;
 159     struct dcache_block *valid_tail;
 160
 161     /* The cache itself. */
 162     struct dcache_block *the_cache;
 163   };
 164
 165 static int dcache_poke_byte (DCACHE *dcache, CORE_ADDR addr, char *ptr);
 166
 167 static int dcache_peek_byte (DCACHE *dcache, CORE_ADDR addr, char *ptr);
 168
 169 static struct dcache_block *dcache_hit (DCACHE *dcache, CORE_ADDR addr);
 170
 171 static int dcache_write_line (DCACHE *dcache, struct dcache_block *db);
 172
 173 static int dcache_read_line (DCACHE *dcache, struct dcache_block *db);
 174
 175 static struct dcache_block *dcache_alloc (DCACHE *dcache, CORE_ADDR addr);
 176
 177 static int dcache_writeback (DCACHE *dcache);
 178
 179 static void dcache_info (char *exp, int tty);
 180
 181 void _initialize_dcache (void);
 182
 183 static int dcache_enabled_p = 0;
 184
 185 DCACHE *last_cache;             /* Used by info dcache */
 186
 187
 188 /* Free all the data cache blocks, thus discarding all cached data.  */
 189
 190 void
 191 dcache_invalidate (DCACHE *dcache)
 192 {
 193   int i;
 194   dcache->valid_head = 0;
 195   dcache->valid_tail = 0;
 196
 197   dcache->free_head = 0;
 198   dcache->free_tail = 0;
 199
 200   for (i = 0; i < DCACHE_SIZE; i++)
 201     {
 202       struct dcache_block *db = dcache->the_cache + i;
 203
 204       if (!dcache->free_head)
 205         dcache->free_head = db;
 206       else
 207         dcache->free_tail->p = db;
 208       dcache->free_tail = db;
 209       db->p = 0;
 210     }
 211
 212   return;
 213 }
 214
 215 /* If addr is present in the dcache, return the address of the block
 216    containing it. */
 217
 218 static struct dcache_block *
 219 dcache_hit (DCACHE *dcache, CORE_ADDR addr)
 220 {
 221   struct dcache_block *db;
 222
 223   /* Search all cache blocks for one that is at this address.  */
 224   db = dcache->valid_head;
 225
 226   while (db)
 227     {
 228       if (MASK (addr) == db->addr)
 229         {
 230           db->refs++;
 231           return db;
 232         }
 233       db = db->p;
 234     }
 235
 236   return NULL;
 237 }
 238
 239 /* Make sure that anything in this line which needs to
 240    be written is. */
 241
 242 static int
 243 dcache_write_line (DCACHE *dcache, struct dcache_block *db)
 244 {
 245   CORE_ADDR memaddr;
 246   char *myaddr;
 247   int len;
 248   int res;
 249   int reg_len;
 250   struct mem_region *region;
 251
 252   if (!db->anydirty)
 253     return 1;
 254
 255   len = LINE_SIZE;
 256   memaddr = db->addr;
 257   myaddr  = db->data;
 258
 259   while (len > 0)
 260     {
 261       int s;
 262       int e;
 263       int dirty_len;
 264
 265       region = lookup_mem_region(memaddr);
 266       if (memaddr + len < region->hi)
 267         reg_len = len;
 268       else
 269         reg_len = region->hi - memaddr;
 270
 271       if (!region->attrib.cache || region->attrib.mode == MEM_RO)
 272         {
 273           memaddr += reg_len;
 274           myaddr  += reg_len;
 275           len     -= reg_len;
 276           continue;
 277         }
 278
 279       while (reg_len > 0)
 280         {
 281           s = XFORM(memaddr);
 282           while (reg_len > 0) {
 283             if (db->state[s] == ENTRY_DIRTY)
 284               break;
 285             s++;
 286             reg_len--;
 287
 288             memaddr++;
 289             myaddr++;
 290             len--;
 291           }
 292
 293           e = s;
 294           while (reg_len > 0) {
 295             if (db->state[e] != ENTRY_DIRTY)
 296               break;
 297             e++;
 298             reg_len--;
 299           }
 300
 301           dirty_len = e - s;
 302           while (dirty_len > 0)
 303             {
 304               res = do_xfer_memory(memaddr, myaddr, dirty_len, 1,
 305                                    &region->attrib);
 306               if (res <= 0)
 307                 return 0;
 308
 309               memset (&db->state[XFORM(memaddr)], ENTRY_OK, res);
 310               memaddr   += res;
 311               myaddr    += res;
 312               len       -= res;
 313               dirty_len -= res;
 314             }
 315         }
 316     }
 317
 318   db->anydirty = 0;
 319   return 1;
 320 }
 321
 322 /* Read cache line */
 323 static int
 324 dcache_read_line (DCACHE *dcache, struct dcache_block *db)
 325 {
 326   CORE_ADDR memaddr;
 327   char *myaddr;
 328   int len;
 329   int res;
 330   int reg_len;
 331   struct mem_region *region;
 332
 333   /* If there are any dirty bytes in the line, it must be written
 334      before a new line can be read */
 335   if (db->anydirty)
 336     {
 337       if (!dcache_write_line (dcache, db))
 338         return 0;
 339     }
 340
 341   len = LINE_SIZE;
 342   memaddr = db->addr;
 343   myaddr  = db->data;
 344
 345   while (len > 0)
 346     {
 347       region = lookup_mem_region(memaddr);
 348       if (memaddr + len < region->hi)
 349         reg_len = len;
 350       else
 351         reg_len = region->hi - memaddr;
 352
 353       if (!region->attrib.cache || region->attrib.mode == MEM_WO)
 354         {
 355           memaddr += reg_len;
 356           myaddr  += reg_len;
 357           len     -= reg_len;
 358           continue;
 359         }
 360
 361       while (reg_len > 0)
 362         {
 363           res = do_xfer_memory (memaddr, myaddr, reg_len, 0,
 364                                 &region->attrib);
 365           if (res <= 0)
 366             return 0;
 367
 368           memaddr += res;
 369           myaddr  += res;
 370           len     -= res;
 371           reg_len -= res;
 372         }
 373     }
 374
 375   memset (db->state, ENTRY_OK, sizeof (db->data));
 376   db->anydirty = 0;
 377
 378   return 1;
 379 }
 380
 381 /* Get a free cache block, put or keep it on the valid list,
 382    and return its address.  */
 383
 384 static struct dcache_block *
 385 dcache_alloc (DCACHE *dcache, CORE_ADDR addr)
 386 {
 387   struct dcache_block *db;
 388
 389   /* Take something from the free list */
 390   db = dcache->free_head;
 391   if (db)
 392     {
 393       dcache->free_head = db->p;
 394     }
 395   else
 396     {
 397       /* Nothing left on free list, so grab one from the valid list */
 398       db = dcache->valid_head;
 399
 400       if (!dcache_write_line (dcache, db))
 401         return NULL;
 402
 403       dcache->valid_head = db->p;
 404     }
 405
 406   db->addr = MASK(addr);
 407   db->refs = 0;
 408   db->anydirty = 0;
 409   memset (db->state, ENTRY_BAD, sizeof (db->data));
 410
 411   /* append this line to end of valid list */
 412   if (!dcache->valid_head)
 413     dcache->valid_head = db;
 414   else
 415     dcache->valid_tail->p = db;
 416   dcache->valid_tail = db;
 417   db->p = 0;
 418
 419   return db;
 420 }
 421
 422 /* Writeback any dirty lines. */
 423 static int
 424 dcache_writeback (DCACHE *dcache)
 425 {
 426   struct dcache_block *db;
 427
 428   db = dcache->valid_head;
 429
 430   while (db)
 431     {
 432       if (!dcache_write_line (dcache, db))
 433         return 0;
 434       db = db->p;
 435     }
 436   return 1;
 437 }
 438
 439
 440 /* Using the data cache DCACHE return the contents of the byte at
 441    address ADDR in the remote machine.
 442
 443    Returns 0 on error. */
 444
 445 static int
 446 dcache_peek_byte (DCACHE *dcache, CORE_ADDR addr, char *ptr)
 447 {
 448   struct dcache_block *db = dcache_hit (dcache, addr);
 449
 450   if (!db)
 451     {
 452       db = dcache_alloc (dcache, addr);
 453       if (!db)
 454         return 0;
 455     }
 456
 457   if (db->state[XFORM (addr)] == ENTRY_BAD)
 458     {
 459       if (!dcache_read_line(dcache, db))
 460          return 0;
 461     }
 462
 463   *ptr = db->data[XFORM (addr)];
 464   return 1;
 465 }
 466
 467
 468 /* Write the byte at PTR into ADDR in the data cache.
 469    Return zero on write error.
 470  */
 471
 472 static int
 473 dcache_poke_byte (DCACHE *dcache, CORE_ADDR addr, char *ptr)
 474 {
 475   struct dcache_block *db = dcache_hit (dcache, addr);
 476
 477   if (!db)
 478     {
 479       db = dcache_alloc (dcache, addr);
 480       if (!db)
 481         return 0;
 482     }
 483
 484   db->data[XFORM (addr)] = *ptr;
 485   db->state[XFORM (addr)] = ENTRY_DIRTY;
 486   db->anydirty = 1;
 487   return 1;
 488 }
 489
 490 /* Initialize the data cache.  */
 491 DCACHE *
 492 dcache_init (void)
 493 {
 494   int csize = sizeof (struct dcache_block) * DCACHE_SIZE;
 495   DCACHE *dcache;
 496
 497   dcache = (DCACHE *) xmalloc (sizeof (*dcache));
 498
 499   dcache->the_cache = (struct dcache_block *) xmalloc (csize);
 500   memset (dcache->the_cache, 0, csize);
 501
 502   dcache_invalidate (dcache);
 503
 504   last_cache = dcache;
 505   return dcache;
 506 }
 507
 508 /* Free a data cache */
 509 void
 510 dcache_free (DCACHE *dcache)
 511 {
 512   if (last_cache == dcache)
 513     last_cache = NULL;
 514
 515   xfree (dcache->the_cache);
 516   xfree (dcache);
 517 }
 518
 519 /* Read or write LEN bytes from inferior memory at MEMADDR, transferring
 520    to or from debugger address MYADDR.  Write to inferior if SHOULD_WRITE is
 521    nonzero.
 522
 523    Returns length of data written or read; 0 for error.
 524
 525    This routine is indended to be called by remote_xfer_ functions. */
 526
 527 int
 528 dcache_xfer_memory (DCACHE *dcache, CORE_ADDR memaddr, char *myaddr, int len,
 529                     int should_write)
 530 {
 531   int i;
 532   int (*xfunc) (DCACHE *dcache, CORE_ADDR addr, char *ptr);
 533   xfunc = should_write ? dcache_poke_byte : dcache_peek_byte;
 534
 535   for (i = 0; i < len; i++)
 536     {
 537       if (!xfunc (dcache, memaddr + i, myaddr + i))
 538         return 0;
 539     }
 540
 541   /* FIXME: There may be some benefit from moving the cache writeback
 542      to a higher layer, as it could occur after a sequence of smaller
 543      writes have been completed (as when a stack frame is constructed
 544      for an inferior function call).  Note that only moving it up one
 545      level to target_xfer_memory() (also target_xfer_memory_partial())
 546      is not sufficent, since we want to coalesce memory transfers that
 547      are "logically" connected but not actually a single call to one
 548      of the memory transfer functions. */
 549
 550   if (should_write)
 551     dcache_writeback (dcache);
 552
 553   return len;
 554 }
 555
 556 static void
 557 dcache_info (char *exp, int tty)
 558 {
 559   struct dcache_block *p;
 560
 561   printf_filtered (_("Dcache line width %d, depth %d\n"),
 562                    LINE_SIZE, DCACHE_SIZE);
 563
 564   if (last_cache)
 565     {
 566       printf_filtered (_("Cache state:\n"));
 567
 568       for (p = last_cache->valid_head; p; p = p->p)
 569         {
 570           int j;
 571           printf_filtered (_("Line at %s, referenced %d times\n"),
 572                            paddr (p->addr), p->refs);
 573
 574           for (j = 0; j < LINE_SIZE; j++)
 575             printf_filtered ("%02x", p->data[j] & 0xFF);
 576           printf_filtered (("\n"));
 577
 578           for (j = 0; j < LINE_SIZE; j++)
 579             printf_filtered ("%2x", p->state[j]);
 580           printf_filtered ("\n");
 581         }
 582     }
 583 }
 584
 585 void
 586 _initialize_dcache (void)
 587 {
 588   add_setshow_boolean_cmd ("remotecache", class_support,
 589                            &dcache_enabled_p, _("\
 590 Set cache use for remote targets."), _("\
 591 Show cache use for remote targets."), _("\
 592 When on, use data caching for remote targets.  For many remote targets\n\
 593 this option can offer better throughput for reading target memory.\n\
 594 Unfortunately, gdb does not currently know anything about volatile\n\
 595 registers and thus data caching will produce incorrect results with\n\
 596 volatile registers are in use.  By default, this option is off."),
 597                            NULL,
 598                            NULL, /* FIXME: i18n: */
 599                            &setlist, &showlist);
 600
 601   add_info ("dcache", dcache_info,
 602             _("Print information on the dcache performance."));
 603
 604 }