gdb/dcache.c

   1 /* Caching code for GDB, the GNU debugger.
   2
   3    Copyright (C) 1992, 1993, 1995, 1996, 1998, 1999, 2000, 2001, 2003 Free
   4    Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 2 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 51 Franklin Street, Fifth Floor,
  21    Boston, MA 02110-1301, USA.  */
  22
  23 #include "defs.h"
  24 #include "dcache.h"
  25 #include "gdbcmd.h"
  26 #include "gdb_string.h"
  27 #include "gdbcore.h"
  28 #include "target.h"
  29
  30 /* The data cache could lead to incorrect results because it doesn't
  31    know about volatile variables, thus making it impossible to debug
  32    functions which use memory mapped I/O devices.  Set the nocache
  33    memory region attribute in those cases.
  34
  35    In general the dcache speeds up performance, some speed improvement
  36    comes from the actual caching mechanism, but the major gain is in
  37    the reduction of the remote protocol overhead; instead of reading
  38    or writing a large area of memory in 4 byte requests, the cache
  39    bundles up the requests into 32 byte (actually LINE_SIZE) chunks.
  40    Reducing the overhead to an eighth of what it was.  This is very
  41    obvious when displaying a large amount of data,
  42
  43    eg, x/200x 0
  44
  45    caching     |   no    yes
  46    ----------------------------
  47    first time  |   4 sec  2 sec improvement due to chunking
  48    second time |   4 sec  0 sec improvement due to caching
  49
  50    The cache structure is unusual, we keep a number of cache blocks
  51    (DCACHE_SIZE) and each one caches a LINE_SIZEed area of memory.
  52    Within each line we remember the address of the line (always a
  53    multiple of the LINE_SIZE) and a vector of bytes over the range.
  54    There's another vector which contains the state of the bytes.
  55
  56    ENTRY_BAD means that the byte is just plain wrong, and has no
  57    correspondence with anything else (as it would when the cache is
  58    turned on, but nothing has been done to it.
  59
  60    ENTRY_DIRTY means that the byte has some data in it which should be
  61    written out to the remote target one day, but contains correct
  62    data.
  63
  64    ENTRY_OK means that the data is the same in the cache as it is in
  65    remote memory.
  66
  67
  68    The ENTRY_DIRTY state is necessary because GDB likes to write large
  69    lumps of memory in small bits.  If the caching mechanism didn't
  70    maintain the DIRTY information, then something like a two byte
  71    write would mean that the entire cache line would have to be read,
  72    the two bytes modified and then written out again.  The alternative
  73    would be to not read in the cache line in the first place, and just
  74    write the two bytes directly into target memory.  The trouble with
  75    that is that it really nails performance, because of the remote
  76    protocol overhead.  This way, all those little writes are bundled
  77    up into an entire cache line write in one go, without having to
  78    read the cache line in the first place.
  79  */
  80
  81 /* NOTE: Interaction of dcache and memory region attributes
  82
  83    As there is no requirement that memory region attributes be aligned
  84    to or be a multiple of the dcache page size, dcache_read_line() and
  85    dcache_write_line() must break up the page by memory region.  If a
  86    chunk does not have the cache attribute set, an invalid memory type
  87    is set, etc., then the chunk is skipped.  Those chunks are handled
  88    in target_xfer_memory() (or target_xfer_memory_partial()).
  89
  90    This doesn't occur very often.  The most common occurance is when
  91    the last bit of the .text segment and the first bit of the .data
  92    segment fall within the same dcache page with a ro/cacheable memory
  93    region defined for the .text segment and a rw/non-cacheable memory
  94    region defined for the .data segment. */
  95
  96 /* This value regulates the number of cache blocks stored.
  97    Smaller values reduce the time spent searching for a cache
  98    line, and reduce memory requirements, but increase the risk
  99    of a line not being in memory */
 100
 101 #define DCACHE_SIZE 64
 102
 103 /* This value regulates the size of a cache line.  Smaller values
 104    reduce the time taken to read a single byte, but reduce overall
 105    throughput.  */
 106
 107 #define LINE_SIZE_POWER (5)
 108 #define LINE_SIZE (1 << LINE_SIZE_POWER)
 109
 110 /* Each cache block holds LINE_SIZE bytes of data
 111    starting at a multiple-of-LINE_SIZE address.  */
 112
 113 #define LINE_SIZE_MASK  ((LINE_SIZE - 1))
 114 #define XFORM(x)        ((x) & LINE_SIZE_MASK)
 115 #define MASK(x)         ((x) & ~LINE_SIZE_MASK)
 116
 117
 118 #define ENTRY_BAD   0           /* data at this byte is wrong */
 119 #define ENTRY_DIRTY 1           /* data at this byte needs to be written back */
 120 #define ENTRY_OK    2           /* data at this byte is same as in memory */
 121
 122
 123 struct dcache_block
 124   {
 125     struct dcache_block *p;     /* next in list */
 126     CORE_ADDR addr;             /* Address for which data is recorded.  */
 127     gdb_byte data[LINE_SIZE];   /* bytes at given address */
 128     unsigned char state[LINE_SIZE];     /* what state the data is in */
 129
 130     /* whether anything in state is dirty - used to speed up the
 131        dirty scan. */
 132     int anydirty;
 133
 134     int refs;
 135   };
 136
 137
 138 /* FIXME: dcache_struct used to have a cache_has_stuff field that was
 139    used to record whether the cache had been accessed.  This was used
 140    to invalidate the cache whenever caching was (re-)enabled (if the
 141    cache was disabled and later re-enabled, it could contain stale
 142    data).  This was not needed because the cache is write through and
 143    the code that enables, disables, and deletes memory region all
 144    invalidate the cache.
 145
 146    This is overkill, since it also invalidates cache lines from
 147    unrelated regions.  One way this could be addressed by adding a
 148    new function that takes an address and a length and invalidates
 149    only those cache lines that match. */
 150
 151 struct dcache_struct
 152   {
 153     /* free list */
 154     struct dcache_block *free_head;
 155     struct dcache_block *free_tail;
 156
 157     /* in use list */
 158     struct dcache_block *valid_head;
 159     struct dcache_block *valid_tail;
 160
 161     /* The cache itself. */
 162     struct dcache_block *the_cache;
 163   };
 164
 165 static struct dcache_block *dcache_hit (DCACHE *dcache, CORE_ADDR addr);
 166
 167 static int dcache_write_line (DCACHE *dcache, struct dcache_block *db);
 168
 169 static int dcache_read_line (DCACHE *dcache, struct dcache_block *db);
 170
 171 static struct dcache_block *dcache_alloc (DCACHE *dcache, CORE_ADDR addr);
 172
 173 static int dcache_writeback (DCACHE *dcache);
 174
 175 static void dcache_info (char *exp, int tty);
 176
 177 void _initialize_dcache (void);
 178
 179 static int dcache_enabled_p = 0;
 180 static void
 181 show_dcache_enabled_p (struct ui_file *file, int from_tty,
 182                        struct cmd_list_element *c, const char *value)
 183 {
 184   fprintf_filtered (file, _("Cache use for remote targets is %s.\n"), value);
 185 }
 186
 187
 188 DCACHE *last_cache;             /* Used by info dcache */
 189
 190
 191 /* Free all the data cache blocks, thus discarding all cached data.  */
 192
 193 void
 194 dcache_invalidate (DCACHE *dcache)
 195 {
 196   int i;
 197   dcache->valid_head = 0;
 198   dcache->valid_tail = 0;
 199
 200   dcache->free_head = 0;
 201   dcache->free_tail = 0;
 202
 203   for (i = 0; i < DCACHE_SIZE; i++)
 204     {
 205       struct dcache_block *db = dcache->the_cache + i;
 206
 207       if (!dcache->free_head)
 208         dcache->free_head = db;
 209       else
 210         dcache->free_tail->p = db;
 211       dcache->free_tail = db;
 212       db->p = 0;
 213     }
 214
 215   return;
 216 }
 217
 218 /* If addr is present in the dcache, return the address of the block
 219    containing it. */
 220
 221 static struct dcache_block *
 222 dcache_hit (DCACHE *dcache, CORE_ADDR addr)
 223 {
 224   struct dcache_block *db;
 225
 226   /* Search all cache blocks for one that is at this address.  */
 227   db = dcache->valid_head;
 228
 229   while (db)
 230     {
 231       if (MASK (addr) == db->addr)
 232         {
 233           db->refs++;
 234           return db;
 235         }
 236       db = db->p;
 237     }
 238
 239   return NULL;
 240 }
 241
 242 /* Make sure that anything in this line which needs to
 243    be written is. */
 244
 245 static int
 246 dcache_write_line (DCACHE *dcache, struct dcache_block *db)
 247 {
 248   CORE_ADDR memaddr;
 249   gdb_byte *myaddr;
 250   int len;
 251   int res;
 252   int reg_len;
 253   struct mem_region *region;
 254
 255   if (!db->anydirty)
 256     return 1;
 257
 258   len = LINE_SIZE;
 259   memaddr = db->addr;
 260   myaddr  = db->data;
 261
 262   while (len > 0)
 263     {
 264       int s;
 265       int e;
 266       int dirty_len;
 267
 268       region = lookup_mem_region(memaddr);
 269       if (memaddr + len < region->hi)
 270         reg_len = len;
 271       else
 272         reg_len = region->hi - memaddr;
 273
 274       if (!region->attrib.cache || region->attrib.mode == MEM_RO)
 275         {
 276           memaddr += reg_len;
 277           myaddr  += reg_len;
 278           len     -= reg_len;
 279           continue;
 280         }
 281
 282       while (reg_len > 0)
 283         {
 284           s = XFORM(memaddr);
 285           while (reg_len > 0) {
 286             if (db->state[s] == ENTRY_DIRTY)
 287               break;
 288             s++;
 289             reg_len--;
 290
 291             memaddr++;
 292             myaddr++;
 293             len--;
 294           }
 295
 296           e = s;
 297           while (reg_len > 0) {
 298             if (db->state[e] != ENTRY_DIRTY)
 299               break;
 300             e++;
 301             reg_len--;
 302           }
 303
 304           dirty_len = e - s;
 305           while (dirty_len > 0)
 306             {
 307               res = do_xfer_memory(memaddr, myaddr, dirty_len, 1,
 308                                    &region->attrib);
 309               if (res <= 0)
 310                 return 0;
 311
 312               memset (&db->state[XFORM(memaddr)], ENTRY_OK, res);
 313               memaddr   += res;
 314               myaddr    += res;
 315               len       -= res;
 316               dirty_len -= res;
 317             }
 318         }
 319     }
 320
 321   db->anydirty = 0;
 322   return 1;
 323 }
 324
 325 /* Read cache line */
 326 static int
 327 dcache_read_line (DCACHE *dcache, struct dcache_block *db)
 328 {
 329   CORE_ADDR memaddr;
 330   gdb_byte *myaddr;
 331   int len;
 332   int res;
 333   int reg_len;
 334   struct mem_region *region;
 335
 336   /* If there are any dirty bytes in the line, it must be written
 337      before a new line can be read */
 338   if (db->anydirty)
 339     {
 340       if (!dcache_write_line (dcache, db))
 341         return 0;
 342     }
 343
 344   len = LINE_SIZE;
 345   memaddr = db->addr;
 346   myaddr  = db->data;
 347
 348   while (len > 0)
 349     {
 350       region = lookup_mem_region(memaddr);
 351       if (memaddr + len < region->hi)
 352         reg_len = len;
 353       else
 354         reg_len = region->hi - memaddr;
 355
 356       if (!region->attrib.cache || region->attrib.mode == MEM_WO)
 357         {
 358           memaddr += reg_len;
 359           myaddr  += reg_len;
 360           len     -= reg_len;
 361           continue;
 362         }
 363
 364       while (reg_len > 0)
 365         {
 366           res = do_xfer_memory (memaddr, myaddr, reg_len, 0,
 367                                 &region->attrib);
 368           if (res <= 0)
 369             return 0;
 370
 371           memaddr += res;
 372           myaddr  += res;
 373           len     -= res;
 374           reg_len -= res;
 375         }
 376     }
 377
 378   memset (db->state, ENTRY_OK, sizeof (db->data));
 379   db->anydirty = 0;
 380
 381   return 1;
 382 }
 383
 384 /* Get a free cache block, put or keep it on the valid list,
 385    and return its address.  */
 386
 387 static struct dcache_block *
 388 dcache_alloc (DCACHE *dcache, CORE_ADDR addr)
 389 {
 390   struct dcache_block *db;
 391
 392   /* Take something from the free list */
 393   db = dcache->free_head;
 394   if (db)
 395     {
 396       dcache->free_head = db->p;
 397     }
 398   else
 399     {
 400       /* Nothing left on free list, so grab one from the valid list */
 401       db = dcache->valid_head;
 402
 403       if (!dcache_write_line (dcache, db))
 404         return NULL;
 405
 406       dcache->valid_head = db->p;
 407     }
 408
 409   db->addr = MASK(addr);
 410   db->refs = 0;
 411   db->anydirty = 0;
 412   memset (db->state, ENTRY_BAD, sizeof (db->data));
 413
 414   /* append this line to end of valid list */
 415   if (!dcache->valid_head)
 416     dcache->valid_head = db;
 417   else
 418     dcache->valid_tail->p = db;
 419   dcache->valid_tail = db;
 420   db->p = 0;
 421
 422   return db;
 423 }
 424
 425 /* Writeback any dirty lines. */
 426 static int
 427 dcache_writeback (DCACHE *dcache)
 428 {
 429   struct dcache_block *db;
 430
 431   db = dcache->valid_head;
 432
 433   while (db)
 434     {
 435       if (!dcache_write_line (dcache, db))
 436         return 0;
 437       db = db->p;
 438     }
 439   return 1;
 440 }
 441
 442
 443 /* Using the data cache DCACHE return the contents of the byte at
 444    address ADDR in the remote machine.
 445
 446    Returns 0 on error. */
 447
 448 static int
 449 dcache_peek_byte (DCACHE *dcache, CORE_ADDR addr, gdb_byte *ptr)
 450 {
 451   struct dcache_block *db = dcache_hit (dcache, addr);
 452
 453   if (!db)
 454     {
 455       db = dcache_alloc (dcache, addr);
 456       if (!db)
 457         return 0;
 458     }
 459
 460   if (db->state[XFORM (addr)] == ENTRY_BAD)
 461     {
 462       if (!dcache_read_line(dcache, db))
 463          return 0;
 464     }
 465
 466   *ptr = db->data[XFORM (addr)];
 467   return 1;
 468 }
 469
 470
 471 /* Write the byte at PTR into ADDR in the data cache.
 472    Return zero on write error.
 473  */
 474
 475 static int
 476 dcache_poke_byte (DCACHE *dcache, CORE_ADDR addr, gdb_byte *ptr)
 477 {
 478   struct dcache_block *db = dcache_hit (dcache, addr);
 479
 480   if (!db)
 481     {
 482       db = dcache_alloc (dcache, addr);
 483       if (!db)
 484         return 0;
 485     }
 486
 487   db->data[XFORM (addr)] = *ptr;
 488   db->state[XFORM (addr)] = ENTRY_DIRTY;
 489   db->anydirty = 1;
 490   return 1;
 491 }
 492
 493 /* Initialize the data cache.  */
 494 DCACHE *
 495 dcache_init (void)
 496 {
 497   int csize = sizeof (struct dcache_block) * DCACHE_SIZE;
 498   DCACHE *dcache;
 499
 500   dcache = (DCACHE *) xmalloc (sizeof (*dcache));
 501
 502   dcache->the_cache = (struct dcache_block *) xmalloc (csize);
 503   memset (dcache->the_cache, 0, csize);
 504
 505   dcache_invalidate (dcache);
 506
 507   last_cache = dcache;
 508   return dcache;
 509 }
 510
 511 /* Free a data cache */
 512 void
 513 dcache_free (DCACHE *dcache)
 514 {
 515   if (last_cache == dcache)
 516     last_cache = NULL;
 517
 518   xfree (dcache->the_cache);
 519   xfree (dcache);
 520 }
 521
 522 /* Read or write LEN bytes from inferior memory at MEMADDR, transferring
 523    to or from debugger address MYADDR.  Write to inferior if SHOULD_WRITE is
 524    nonzero.
 525
 526    Returns length of data written or read; 0 for error.
 527
 528    This routine is indended to be called by remote_xfer_ functions. */
 529
 530 int
 531 dcache_xfer_memory (DCACHE *dcache, CORE_ADDR memaddr, gdb_byte *myaddr,
 532                     int len, int should_write)
 533 {
 534   int i;
 535   int (*xfunc) (DCACHE *dcache, CORE_ADDR addr, gdb_byte *ptr);
 536   xfunc = should_write ? dcache_poke_byte : dcache_peek_byte;
 537
 538   for (i = 0; i < len; i++)
 539     {
 540       if (!xfunc (dcache, memaddr + i, myaddr + i))
 541         return 0;
 542     }
 543
 544   /* FIXME: There may be some benefit from moving the cache writeback
 545      to a higher layer, as it could occur after a sequence of smaller
 546      writes have been completed (as when a stack frame is constructed
 547      for an inferior function call).  Note that only moving it up one
 548      level to target_xfer_memory() (also target_xfer_memory_partial())
 549      is not sufficent, since we want to coalesce memory transfers that
 550      are "logically" connected but not actually a single call to one
 551      of the memory transfer functions. */
 552
 553   if (should_write)
 554     dcache_writeback (dcache);
 555
 556   return len;
 557 }
 558
 559 static void
 560 dcache_info (char *exp, int tty)
 561 {
 562   struct dcache_block *p;
 563
 564   printf_filtered (_("Dcache line width %d, depth %d\n"),
 565                    LINE_SIZE, DCACHE_SIZE);
 566
 567   if (last_cache)
 568     {
 569       printf_filtered (_("Cache state:\n"));
 570
 571       for (p = last_cache->valid_head; p; p = p->p)
 572         {
 573           int j;
 574           printf_filtered (_("Line at %s, referenced %d times\n"),
 575                            paddr (p->addr), p->refs);
 576
 577           for (j = 0; j < LINE_SIZE; j++)
 578             printf_filtered ("%02x", p->data[j] & 0xFF);
 579           printf_filtered (("\n"));
 580
 581           for (j = 0; j < LINE_SIZE; j++)
 582             printf_filtered ("%2x", p->state[j]);
 583           printf_filtered ("\n");
 584         }
 585     }
 586 }
 587
 588 void
 589 _initialize_dcache (void)
 590 {
 591   add_setshow_boolean_cmd ("remotecache", class_support,
 592                            &dcache_enabled_p, _("\
 593 Set cache use for remote targets."), _("\
 594 Show cache use for remote targets."), _("\
 595 When on, use data caching for remote targets.  For many remote targets\n\
 596 this option can offer better throughput for reading target memory.\n\
 597 Unfortunately, gdb does not currently know anything about volatile\n\
 598 registers and thus data caching will produce incorrect results with\n\
 599 volatile registers are in use.  By default, this option is off."),
 600                            NULL,
 601                            show_dcache_enabled_p,
 602                            &setlist, &showlist);
 603
 604   add_info ("dcache", dcache_info,
 605             _("Print information on the dcache performance."));
 606
 607 }