1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2 Copyright 2002, 2003 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "gdb_string.h"
24 #include "symfile.h" /* for entry_point_address */
26 #include "arch-utils.h"
29 #include "frame-unwind.h"
30 #include "frame-base.h"
31 #include "trad-frame.h"
34 extern void _initialize_frv_tdep (void);
36 static gdbarch_init_ftype frv_gdbarch_init
;
38 static gdbarch_register_name_ftype frv_register_name
;
39 static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc
;
40 static gdbarch_adjust_breakpoint_address_ftype frv_gdbarch_adjust_breakpoint_address
;
41 static gdbarch_skip_prologue_ftype frv_skip_prologue
;
42 static gdbarch_deprecated_extract_return_value_ftype frv_extract_return_value
;
43 static gdbarch_deprecated_extract_struct_value_address_ftype frv_extract_struct_value_address
;
44 static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation
;
45 static gdbarch_deprecated_push_arguments_ftype frv_push_arguments
;
46 static gdbarch_deprecated_saved_pc_after_call_ftype frv_saved_pc_after_call
;
48 /* Register numbers. You can change these as needed, but don't forget
49 to update the simulator accordingly. */
51 /* The total number of registers we know exist. */
54 /* Register numbers 0 -- 63 are always reserved for general-purpose
55 registers. The chip at hand may have less. */
59 struct_return_regnum
= 3,
62 /* Register numbers 64 -- 127 are always reserved for floating-point
63 registers. The chip at hand may have less. */
64 first_fpr_regnum
= 64,
65 last_fpr_regnum
= 127,
67 /* Register numbers 128 on up are always reserved for special-purpose
69 first_spr_regnum
= 128,
85 static LONGEST frv_call_dummy_words
[] =
89 struct frv_unwind_cache
/* was struct frame_extra_info */
91 /* The previous frame's inner-most stack address. Used as this
92 frame ID's stack_addr. */
95 /* The frame's base, optionally used by the high-level debug info. */
98 /* Table indicating the location of each and every register. */
99 struct trad_frame_saved_reg
*saved_regs
;
103 /* A structure describing a particular variant of the FRV.
104 We allocate and initialize one of these structures when we create
105 the gdbarch object for a variant.
107 At the moment, all the FR variants we support differ only in which
108 registers are present; the portable code of GDB knows that
109 registers whose names are the empty string don't exist, so the
110 `register_names' array captures all the per-variant information we
113 in the future, if we need to have per-variant maps for raw size,
114 virtual type, etc., we should replace register_names with an array
115 of structures, each of which gives all the necessary info for one
116 register. Don't stick parallel arrays in here --- that's so
120 /* How many general-purpose registers does this variant have? */
123 /* How many floating-point registers does this variant have? */
126 /* How many hardware watchpoints can it support? */
127 int num_hw_watchpoints
;
129 /* How many hardware breakpoints can it support? */
130 int num_hw_breakpoints
;
132 /* Register names. */
133 char **register_names
;
136 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
139 /* Allocate a new variant structure, and set up default values for all
141 static struct gdbarch_tdep
*
144 struct gdbarch_tdep
*var
;
148 var
= xmalloc (sizeof (*var
));
149 memset (var
, 0, sizeof (*var
));
153 var
->num_hw_watchpoints
= 0;
154 var
->num_hw_breakpoints
= 0;
156 /* By default, don't supply any general-purpose or floating-point
158 var
->register_names
= (char **) xmalloc (frv_num_regs
* sizeof (char *));
159 for (r
= 0; r
< frv_num_regs
; r
++)
160 var
->register_names
[r
] = "";
162 /* Do, however, supply default names for the special-purpose
164 for (r
= first_spr_regnum
; r
<= last_spr_regnum
; ++r
)
166 sprintf (buf
, "x%d", r
);
167 var
->register_names
[r
] = xstrdup (buf
);
170 var
->register_names
[pc_regnum
] = "pc";
171 var
->register_names
[lr_regnum
] = "lr";
172 var
->register_names
[lcr_regnum
] = "lcr";
174 var
->register_names
[psr_regnum
] = "psr";
175 var
->register_names
[ccr_regnum
] = "ccr";
176 var
->register_names
[cccr_regnum
] = "cccr";
177 var
->register_names
[tbr_regnum
] = "tbr";
179 /* Debug registers. */
180 var
->register_names
[brr_regnum
] = "brr";
181 var
->register_names
[dbar0_regnum
] = "dbar0";
182 var
->register_names
[dbar1_regnum
] = "dbar1";
183 var
->register_names
[dbar2_regnum
] = "dbar2";
184 var
->register_names
[dbar3_regnum
] = "dbar3";
190 /* Indicate that the variant VAR has NUM_GPRS general-purpose
191 registers, and fill in the names array appropriately. */
193 set_variant_num_gprs (struct gdbarch_tdep
*var
, int num_gprs
)
197 var
->num_gprs
= num_gprs
;
199 for (r
= 0; r
< num_gprs
; ++r
)
203 sprintf (buf
, "gr%d", r
);
204 var
->register_names
[first_gpr_regnum
+ r
] = xstrdup (buf
);
209 /* Indicate that the variant VAR has NUM_FPRS floating-point
210 registers, and fill in the names array appropriately. */
212 set_variant_num_fprs (struct gdbarch_tdep
*var
, int num_fprs
)
216 var
->num_fprs
= num_fprs
;
218 for (r
= 0; r
< num_fprs
; ++r
)
222 sprintf (buf
, "fr%d", r
);
223 var
->register_names
[first_fpr_regnum
+ r
] = xstrdup (buf
);
229 frv_register_name (int reg
)
233 if (reg
>= frv_num_regs
)
236 return CURRENT_VARIANT
->register_names
[reg
];
240 frv_register_type (struct gdbarch
*gdbarch
, int reg
)
242 if (reg
>= 64 && reg
<= 127)
243 return builtin_type_float
;
245 return builtin_type_int
;
249 frv_register_byte (int reg
)
254 static const unsigned char *
255 frv_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenp
)
257 static unsigned char breakpoint
[] = {0xc0, 0x70, 0x00, 0x01};
258 *lenp
= sizeof (breakpoint
);
262 /* Define the maximum number of instructions which may be packed into a
263 bundle (VLIW instruction). */
264 static const int max_instrs_per_bundle
= 8;
266 /* Define the size (in bytes) of an FR-V instruction. */
267 static const int frv_instr_size
= 4;
269 /* Adjust a breakpoint's address to account for the FR-V architecture's
270 constraint that a break instruction must not appear as any but the
271 first instruction in the bundle. */
273 frv_gdbarch_adjust_breakpoint_address (struct gdbarch
*gdbarch
, CORE_ADDR bpaddr
)
275 int count
= max_instrs_per_bundle
;
276 CORE_ADDR addr
= bpaddr
- frv_instr_size
;
277 CORE_ADDR func_start
= get_pc_function_start (bpaddr
);
279 /* Find the end of the previous packing sequence. This will be indicated
280 by either attempting to access some inaccessible memory or by finding
281 an instruction word whose packing bit is set to one. */
282 while (count
-- > 0 && addr
>= func_start
)
284 char instr
[frv_instr_size
];
287 status
= read_memory_nobpt (addr
, instr
, sizeof instr
);
292 /* This is a big endian architecture, so byte zero will have most
293 significant byte. The most significant bit of this byte is the
298 addr
-= frv_instr_size
;
302 bpaddr
= addr
+ frv_instr_size
;
308 /* Return true if REG is a caller-saves ("scratch") register,
311 is_caller_saves_reg (int reg
)
313 return ((4 <= reg
&& reg
<= 7)
314 || (14 <= reg
&& reg
<= 15)
315 || (32 <= reg
&& reg
<= 47));
319 /* Return true if REG is a callee-saves register, false otherwise. */
321 is_callee_saves_reg (int reg
)
323 return ((16 <= reg
&& reg
<= 31)
324 || (48 <= reg
&& reg
<= 63));
328 /* Return true if REG is an argument register, false otherwise. */
330 is_argument_reg (int reg
)
332 return (8 <= reg
&& reg
<= 13);
336 /* Scan an FR-V prologue, starting at PC, until frame->PC.
337 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
338 We assume FRAME's saved_regs array has already been allocated and cleared.
339 Return the first PC value after the prologue.
341 Note that, for unoptimized code, we almost don't need this function
342 at all; all arguments and locals live on the stack, so we just need
343 the FP to find everything. The catch: structures passed by value
344 have their addresses living in registers; they're never spilled to
345 the stack. So if you ever want to be able to get to these
346 arguments in any frame but the top, you'll need to do this serious
347 prologue analysis. */
349 frv_analyze_prologue (CORE_ADDR pc
, struct frame_info
*next_frame
,
350 struct frv_unwind_cache
*info
)
352 /* When writing out instruction bitpatterns, we use the following
353 letters to label instruction fields:
354 P - The parallel bit. We don't use this.
355 J - The register number of GRj in the instruction description.
356 K - The register number of GRk in the instruction description.
357 I - The register number of GRi.
358 S - a signed imediate offset.
359 U - an unsigned immediate offset.
361 The dots below the numbers indicate where hex digit boundaries
362 fall, to make it easier to check the numbers. */
364 /* Non-zero iff we've seen the instruction that initializes the
365 frame pointer for this function's frame. */
368 /* If fp_set is non_zero, then this is the distance from
369 the stack pointer to frame pointer: fp = sp + fp_offset. */
372 /* Total size of frame prior to any alloca operations. */
375 /* Flag indicating if lr has been saved on the stack. */
376 int lr_saved_on_stack
= 0;
378 /* The number of the general-purpose register we saved the return
379 address ("link register") in, or -1 if we haven't moved it yet. */
380 int lr_save_reg
= -1;
382 /* Offset (from sp) at which lr has been saved on the stack. */
384 int lr_sp_offset
= 0;
386 /* If gr_saved[i] is non-zero, then we've noticed that general
387 register i has been saved at gr_sp_offset[i] from the stack
390 int gr_sp_offset
[64];
392 memset (gr_saved
, 0, sizeof (gr_saved
));
394 while (! next_frame
|| pc
< frame_pc_unwind (next_frame
))
396 LONGEST op
= read_memory_integer (pc
, 4);
398 /* The tests in this chain of ifs should be in order of
399 decreasing selectivity, so that more particular patterns get
400 to fire before less particular patterns. */
402 /* Setting the FP from the SP:
404 P 000010 0100010 000001 000000000000 = 0x04881000
405 0 111111 1111111 111111 111111111111 = 0x7fffffff
407 We treat this as part of the prologue. */
408 if ((op
& 0x7fffffff) == 0x04881000)
414 /* Move the link register to the scratch register grJ, before saving:
416 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
417 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
419 We treat this as part of the prologue. */
420 else if ((op
& 0x7fffffc0) == 0x080d01c0)
422 int gr_j
= op
& 0x3f;
424 /* If we're moving it to a scratch register, that's fine. */
425 if (is_caller_saves_reg (gr_j
))
427 /* Otherwise it's not a prologue instruction that we
433 /* To save multiple callee-saves registers on the stack, at
437 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
438 0 000000 1111111 111111 111111 111111 = 0x01ffffff
441 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
442 0 000000 1111111 111111 111111 111111 = 0x01ffffff
444 We treat this as part of the prologue, and record the register's
445 saved address in the frame structure. */
446 else if ((op
& 0x01ffffff) == 0x000c10c0
447 || (op
& 0x01ffffff) == 0x000c1100)
449 int gr_k
= ((op
>> 25) & 0x3f);
450 int ope
= ((op
>> 6) & 0x3f);
454 /* Is it an std or an stq? */
460 /* Is it really a callee-saves register? */
461 if (is_callee_saves_reg (gr_k
))
463 for (i
= 0; i
< count
; i
++)
465 gr_saved
[gr_k
+ i
] = 1;
466 gr_sp_offset
[gr_k
+ i
] = 4 * i
;
470 /* It's not a prologue instruction. */
474 /* Adjusting the stack pointer. (The stack pointer is GR1.)
476 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
477 0 111111 1111111 111111 000000000000 = 0x7ffff000
479 We treat this as part of the prologue. */
480 else if ((op
& 0x7ffff000) == 0x02401000)
482 /* Sign-extend the twelve-bit field.
483 (Isn't there a better way to do this?) */
484 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
489 /* Setting the FP to a constant distance from the SP:
491 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
492 0 111111 1111111 111111 000000000000 = 0x7ffff000
494 We treat this as part of the prologue. */
495 else if ((op
& 0x7ffff000) == 0x04401000)
497 /* Sign-extend the twelve-bit field.
498 (Isn't there a better way to do this?) */
499 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
504 /* To spill an argument register to a scratch register:
506 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
507 0 000000 1111111 000000 111111111111 = 0x01fc0fff
509 For the time being, we treat this as a prologue instruction,
510 assuming that GRi is an argument register. This one's kind
511 of suspicious, because it seems like it could be part of a
512 legitimate body instruction. But we only come here when the
513 source info wasn't helpful, so we have to do the best we can.
514 Hopefully once GCC and GDB agree on how to emit line number
515 info for prologues, then this code will never come into play. */
516 else if ((op
& 0x01fc0fff) == 0x00880000)
518 int gr_i
= ((op
>> 12) & 0x3f);
520 /* If the source isn't an arg register, then this isn't a
521 prologue instruction. */
522 if (! is_argument_reg (gr_i
))
526 /* To spill 16-bit values to the stack:
528 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
529 0 000000 1111111 111111 000000000000 = 0x01fff000
531 And for 8-bit values, we use STB instructions.
533 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
534 0 000000 1111111 111111 000000000000 = 0x01fff000
536 We check that GRk is really an argument register, and treat
537 all such as part of the prologue. */
538 else if ( (op
& 0x01fff000) == 0x01442000
539 || (op
& 0x01fff000) == 0x01402000)
541 int gr_k
= ((op
>> 25) & 0x3f);
543 if (! is_argument_reg (gr_k
))
544 break; /* Source isn't an arg register. */
547 /* To save multiple callee-saves register on the stack, at a
551 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
552 0 000000 1111111 111111 000000000000 = 0x01fff000
555 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
556 0 000000 1111111 111111 000000000000 = 0x01fff000
558 We treat this as part of the prologue, and record the register's
559 saved address in the frame structure. */
560 else if ((op
& 0x01fff000) == 0x014c1000
561 || (op
& 0x01fff000) == 0x01501000)
563 int gr_k
= ((op
>> 25) & 0x3f);
567 /* Is it a stdi or a stqi? */
568 if ((op
& 0x01fff000) == 0x014c1000)
573 /* Is it really a callee-saves register? */
574 if (is_callee_saves_reg (gr_k
))
576 /* Sign-extend the twelve-bit field.
577 (Isn't there a better way to do this?) */
578 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
580 for (i
= 0; i
< count
; i
++)
582 gr_saved
[gr_k
+ i
] = 1;
583 gr_sp_offset
[gr_k
+ i
] = s
+ (4 * i
);
587 /* It's not a prologue instruction. */
591 /* Storing any kind of integer register at any constant offset
592 from any other register.
595 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
596 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
599 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
600 0 000000 1111111 000000 000000000000 = 0x01fc0000
602 These could be almost anything, but a lot of prologue
603 instructions fall into this pattern, so let's decode the
604 instruction once, and then work at a higher level. */
605 else if (((op
& 0x01fc0fff) == 0x000c0080)
606 || ((op
& 0x01fc0000) == 0x01480000))
608 int gr_k
= ((op
>> 25) & 0x3f);
609 int gr_i
= ((op
>> 12) & 0x3f);
612 /* Are we storing with gr0 as an offset, or using an
614 if ((op
& 0x01fc0fff) == 0x000c0080)
617 offset
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
619 /* If the address isn't relative to the SP or FP, it's not a
620 prologue instruction. */
621 if (gr_i
!= sp_regnum
&& gr_i
!= fp_regnum
)
624 /* Saving the old FP in the new frame (relative to the SP). */
625 if (gr_k
== fp_regnum
&& gr_i
== sp_regnum
)
627 gr_saved
[fp_regnum
] = 1;
628 gr_sp_offset
[fp_regnum
] = offset
;
631 /* Saving callee-saves register(s) on the stack, relative to
633 else if (gr_i
== sp_regnum
634 && is_callee_saves_reg (gr_k
))
637 if (gr_i
== sp_regnum
)
638 gr_sp_offset
[gr_k
] = offset
;
640 gr_sp_offset
[gr_k
] = offset
+ fp_offset
;
643 /* Saving the scratch register holding the return address. */
644 else if (lr_save_reg
!= -1
645 && gr_k
== lr_save_reg
)
647 lr_saved_on_stack
= 1;
648 if (gr_i
== sp_regnum
)
649 lr_sp_offset
= offset
;
651 lr_sp_offset
= offset
+ fp_offset
;
654 /* Spilling int-sized arguments to the stack. */
655 else if (is_argument_reg (gr_k
))
658 /* It's not a store instruction we recognize, so this must
659 be the end of the prologue. */
664 /* It's not any instruction we recognize, so this must be the end
672 if (next_frame
&& info
)
677 /* If we know the relationship between the stack and frame
678 pointers, record the addresses of the registers we noticed.
679 Note that we have to do this as a separate step at the end,
680 because instructions may save relative to the SP, but we need
681 their addresses relative to the FP. */
683 frame_unwind_unsigned_register (next_frame
, fp_regnum
, &this_base
);
685 frame_unwind_unsigned_register (next_frame
, sp_regnum
, &this_base
);
687 for (i
= 0; i
< 64; i
++)
689 info
->saved_regs
[i
].addr
= this_base
- fp_offset
+ gr_sp_offset
[i
];
691 info
->prev_sp
= this_base
- fp_offset
+ framesize
;
692 info
->base
= this_base
;
694 /* If LR was saved on the stack, record its location. */
695 if (lr_saved_on_stack
)
696 info
->saved_regs
[lr_regnum
].addr
= this_base
- fp_offset
+ lr_sp_offset
;
698 /* The call instruction moves the caller's PC in the callee's LR.
699 Since this is an unwind, do the reverse. Copy the location of LR
700 into PC (the address / regnum) so that a request for PC will be
701 converted into a request for the LR. */
702 info
->saved_regs
[pc_regnum
] = info
->saved_regs
[lr_regnum
];
704 /* Save the previous frame's computed SP value. */
705 trad_frame_set_value (info
->saved_regs
, sp_regnum
, info
->prev_sp
);
713 frv_skip_prologue (CORE_ADDR pc
)
715 CORE_ADDR func_addr
, func_end
, new_pc
;
719 /* If the line table has entry for a line *within* the function
720 (i.e., not in the prologue, and not past the end), then that's
722 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
724 struct symtab_and_line sal
;
726 sal
= find_pc_line (func_addr
, 0);
728 if (sal
.line
!= 0 && sal
.end
< func_end
)
734 /* The FR-V prologue is at least five instructions long (twenty bytes).
735 If we didn't find a real source location past that, then
736 do a full analysis of the prologue. */
737 if (new_pc
< pc
+ 20)
738 new_pc
= frv_analyze_prologue (pc
, 0, 0);
744 static struct frv_unwind_cache
*
745 frv_frame_unwind_cache (struct frame_info
*next_frame
,
746 void **this_prologue_cache
)
748 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
752 struct frv_unwind_cache
*info
;
754 if ((*this_prologue_cache
))
755 return (*this_prologue_cache
);
757 info
= FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache
);
758 (*this_prologue_cache
) = info
;
759 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
761 /* Prologue analysis does the rest... */
762 frv_analyze_prologue (frame_func_unwind (next_frame
), next_frame
, info
);
768 frv_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
770 memcpy (valbuf
, (regbuf
771 + frv_register_byte (8)
772 + (TYPE_LENGTH (type
) < 4 ? 4 - TYPE_LENGTH (type
) : 0)),
777 frv_extract_struct_value_address (char *regbuf
)
779 return extract_unsigned_integer (regbuf
+
780 frv_register_byte (struct_return_regnum
),
785 frv_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
787 write_register (struct_return_regnum
, addr
);
791 frv_frameless_function_invocation (struct frame_info
*frame
)
793 return frameless_look_for_prologue (frame
);
797 frv_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
799 /* Require dword alignment. */
800 return align_down (sp
, 8);
804 frv_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
805 struct regcache
*regcache
, CORE_ADDR bp_addr
,
806 int nargs
, struct value
**args
, CORE_ADDR sp
,
807 int struct_return
, CORE_ADDR struct_addr
)
814 struct type
*arg_type
;
816 enum type_code typecode
;
822 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
823 nargs
, (int) sp
, struct_return
, struct_addr
);
827 for (argnum
= 0; argnum
< nargs
; ++argnum
)
828 stack_space
+= align_up (TYPE_LENGTH (VALUE_TYPE (args
[argnum
])), 4);
830 stack_space
-= (6 * 4);
834 /* Make sure stack is dword aligned. */
835 sp
= align_down (sp
, 8);
842 regcache_cooked_write_unsigned (regcache
, struct_return_regnum
,
845 for (argnum
= 0; argnum
< nargs
; ++argnum
)
848 arg_type
= check_typedef (VALUE_TYPE (arg
));
849 len
= TYPE_LENGTH (arg_type
);
850 typecode
= TYPE_CODE (arg_type
);
852 if (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
)
854 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (arg
));
855 typecode
= TYPE_CODE_PTR
;
861 val
= (char *) VALUE_CONTENTS (arg
);
866 int partial_len
= (len
< 4 ? len
: 4);
870 regval
= extract_unsigned_integer (val
, partial_len
);
872 printf(" Argnum %d data %x -> reg %d\n",
873 argnum
, (int) regval
, argreg
);
875 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
881 printf(" Argnum %d data %x -> offset %d (%x)\n",
882 argnum
, *((int *)val
), stack_offset
, (int) (sp
+ stack_offset
));
884 write_memory (sp
+ stack_offset
, val
, partial_len
);
885 stack_offset
+= align_up (partial_len
, 4);
892 /* Set the return address. For the frv, the return breakpoint is
893 always at BP_ADDR. */
894 regcache_cooked_write_unsigned (regcache
, lr_regnum
, bp_addr
);
896 /* Finally, update the SP register. */
897 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
903 frv_store_return_value (struct type
*type
, char *valbuf
)
905 int length
= TYPE_LENGTH (type
);
906 int reg8_offset
= frv_register_byte (8);
909 deprecated_write_register_bytes (reg8_offset
+ (4 - length
), valbuf
,
911 else if (length
== 8)
912 deprecated_write_register_bytes (reg8_offset
, valbuf
, length
);
914 internal_error (__FILE__
, __LINE__
,
915 "Don't know how to return a %d-byte value.", length
);
919 /* Hardware watchpoint / breakpoint support for the FR500
923 frv_check_watch_resources (int type
, int cnt
, int ot
)
925 struct gdbarch_tdep
*var
= CURRENT_VARIANT
;
927 /* Watchpoints not supported on simulator. */
928 if (strcmp (target_shortname
, "sim") == 0)
931 if (type
== bp_hardware_breakpoint
)
933 if (var
->num_hw_breakpoints
== 0)
935 else if (cnt
<= var
->num_hw_breakpoints
)
940 if (var
->num_hw_watchpoints
== 0)
944 else if (cnt
<= var
->num_hw_watchpoints
)
952 frv_stopped_data_address (void)
954 CORE_ADDR brr
, dbar0
, dbar1
, dbar2
, dbar3
;
956 brr
= read_register (brr_regnum
);
957 dbar0
= read_register (dbar0_regnum
);
958 dbar1
= read_register (dbar1_regnum
);
959 dbar2
= read_register (dbar2_regnum
);
960 dbar3
= read_register (dbar3_regnum
);
964 else if (brr
& (1<<10))
966 else if (brr
& (1<<9))
968 else if (brr
& (1<<8))
975 frv_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
977 return frame_unwind_register_unsigned (next_frame
, pc_regnum
);
980 /* Given a GDB frame, determine the address of the calling function's
981 frame. This will be used to create a new GDB frame struct. */
984 frv_frame_this_id (struct frame_info
*next_frame
,
985 void **this_prologue_cache
, struct frame_id
*this_id
)
987 struct frv_unwind_cache
*info
988 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
991 struct minimal_symbol
*msym_stack
;
994 /* The FUNC is easy. */
995 func
= frame_func_unwind (next_frame
);
998 /* This is meant to halt the backtrace at "_start". Make sure we
999 don't halt it at a generic dummy frame. */
1000 if (inside_entry_func (func
))
1004 /* Check if the stack is empty. */
1005 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
1006 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
1009 /* Hopefully the prologue analysis either correctly determined the
1010 frame's base (which is the SP from the previous frame), or set
1011 that base to "NULL". */
1012 base
= info
->prev_sp
;
1016 id
= frame_id_build (base
, func
);
1018 /* Check that we're not going round in circles with the same frame
1019 ID (but avoid applying the test to sentinel frames which do go
1020 round in circles). Can't use frame_id_eq() as that doesn't yet
1021 compare the frame's PC value. */
1022 if (frame_relative_level (next_frame
) >= 0
1023 && get_frame_type (next_frame
) != DUMMY_FRAME
1024 && frame_id_eq (get_frame_id (next_frame
), id
))
1031 frv_frame_prev_register (struct frame_info
*next_frame
,
1032 void **this_prologue_cache
,
1033 int regnum
, int *optimizedp
,
1034 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1035 int *realnump
, void *bufferp
)
1037 struct frv_unwind_cache
*info
1038 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1039 trad_frame_prev_register (next_frame
, info
->saved_regs
, regnum
,
1040 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
1043 static const struct frame_unwind frv_frame_unwind
= {
1046 frv_frame_prev_register
1049 static const struct frame_unwind
*
1050 frv_frame_sniffer (struct frame_info
*next_frame
)
1052 return &frv_frame_unwind
;
1056 frv_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1058 struct frv_unwind_cache
*info
1059 = frv_frame_unwind_cache (next_frame
, this_cache
);
1063 static const struct frame_base frv_frame_base
= {
1065 frv_frame_base_address
,
1066 frv_frame_base_address
,
1067 frv_frame_base_address
1071 frv_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1073 return frame_unwind_register_unsigned (next_frame
, sp_regnum
);
1077 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1078 dummy frame. The frame ID's base needs to match the TOS value
1079 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1082 static struct frame_id
1083 frv_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1085 return frame_id_build (frv_unwind_sp (gdbarch
, next_frame
),
1086 frame_pc_unwind (next_frame
));
1090 static struct gdbarch
*
1091 frv_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1093 struct gdbarch
*gdbarch
;
1094 struct gdbarch_tdep
*var
;
1096 /* Check to see if we've already built an appropriate architecture
1097 object for this executable. */
1098 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1100 return arches
->gdbarch
;
1102 /* Select the right tdep structure for this variant. */
1103 var
= new_variant ();
1104 switch (info
.bfd_arch_info
->mach
)
1107 case bfd_mach_frvsimple
:
1108 case bfd_mach_fr500
:
1109 case bfd_mach_frvtomcat
:
1110 set_variant_num_gprs (var
, 64);
1111 set_variant_num_fprs (var
, 64);
1114 case bfd_mach_fr400
:
1115 set_variant_num_gprs (var
, 32);
1116 set_variant_num_fprs (var
, 32);
1120 /* Never heard of this variant. */
1124 gdbarch
= gdbarch_alloc (&info
, var
);
1126 set_gdbarch_short_bit (gdbarch
, 16);
1127 set_gdbarch_int_bit (gdbarch
, 32);
1128 set_gdbarch_long_bit (gdbarch
, 32);
1129 set_gdbarch_long_long_bit (gdbarch
, 64);
1130 set_gdbarch_float_bit (gdbarch
, 32);
1131 set_gdbarch_double_bit (gdbarch
, 64);
1132 set_gdbarch_long_double_bit (gdbarch
, 64);
1133 set_gdbarch_ptr_bit (gdbarch
, 32);
1135 set_gdbarch_num_regs (gdbarch
, frv_num_regs
);
1136 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
1137 set_gdbarch_deprecated_fp_regnum (gdbarch
, fp_regnum
);
1138 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
1140 set_gdbarch_register_name (gdbarch
, frv_register_name
);
1141 set_gdbarch_deprecated_register_byte (gdbarch
, frv_register_byte
);
1142 set_gdbarch_register_type (gdbarch
, frv_register_type
);
1144 set_gdbarch_skip_prologue (gdbarch
, frv_skip_prologue
);
1145 set_gdbarch_breakpoint_from_pc (gdbarch
, frv_breakpoint_from_pc
);
1146 set_gdbarch_adjust_breakpoint_address (gdbarch
, frv_gdbarch_adjust_breakpoint_address
);
1148 set_gdbarch_frame_args_skip (gdbarch
, 0);
1149 set_gdbarch_frameless_function_invocation (gdbarch
, frv_frameless_function_invocation
);
1151 set_gdbarch_use_struct_convention (gdbarch
, always_use_struct_convention
);
1152 set_gdbarch_deprecated_extract_return_value (gdbarch
, frv_extract_return_value
);
1154 set_gdbarch_deprecated_store_struct_return (gdbarch
, frv_store_struct_return
);
1155 set_gdbarch_deprecated_store_return_value (gdbarch
, frv_store_return_value
);
1156 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, frv_extract_struct_value_address
);
1159 set_gdbarch_unwind_pc (gdbarch
, frv_unwind_pc
);
1160 set_gdbarch_unwind_sp (gdbarch
, frv_unwind_sp
);
1161 set_gdbarch_frame_align (gdbarch
, frv_frame_align
);
1162 frame_unwind_append_sniffer (gdbarch
, frv_frame_sniffer
);
1163 frame_base_set_default (gdbarch
, &frv_frame_base
);
1165 /* Settings for calling functions in the inferior. */
1166 set_gdbarch_push_dummy_call (gdbarch
, frv_push_dummy_call
);
1167 set_gdbarch_unwind_dummy_id (gdbarch
, frv_unwind_dummy_id
);
1169 /* Settings that should be unnecessary. */
1170 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1172 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
1174 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
1175 set_gdbarch_function_start_offset (gdbarch
, 0);
1177 set_gdbarch_remote_translate_xfer_address
1178 (gdbarch
, generic_remote_translate_xfer_address
);
1180 /* Hardware watchpoint / breakpoint support. */
1181 switch (info
.bfd_arch_info
->mach
)
1184 case bfd_mach_frvsimple
:
1185 case bfd_mach_fr500
:
1186 case bfd_mach_frvtomcat
:
1187 /* fr500-style hardware debugging support. */
1188 var
->num_hw_watchpoints
= 4;
1189 var
->num_hw_breakpoints
= 4;
1192 case bfd_mach_fr400
:
1193 /* fr400-style hardware debugging support. */
1194 var
->num_hw_watchpoints
= 2;
1195 var
->num_hw_breakpoints
= 4;
1199 /* Otherwise, assume we don't have hardware debugging support. */
1200 var
->num_hw_watchpoints
= 0;
1201 var
->num_hw_breakpoints
= 0;
1205 set_gdbarch_print_insn (gdbarch
, print_insn_frv
);
1211 _initialize_frv_tdep (void)
1213 register_gdbarch_init (bfd_arch_frv
, frv_gdbarch_init
);