1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2 Copyright 2002, 2003 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "gdb_string.h"
24 #include "symfile.h" /* for entry_point_address */
26 #include "arch-utils.h"
29 #include "frame-unwind.h"
30 #include "frame-base.h"
31 #include "trad-frame.h"
33 extern void _initialize_frv_tdep (void);
35 static gdbarch_init_ftype frv_gdbarch_init
;
37 static gdbarch_register_name_ftype frv_register_name
;
38 static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc
;
39 static gdbarch_skip_prologue_ftype frv_skip_prologue
;
40 static gdbarch_deprecated_extract_return_value_ftype frv_extract_return_value
;
41 static gdbarch_deprecated_extract_struct_value_address_ftype frv_extract_struct_value_address
;
42 static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation
;
43 static gdbarch_deprecated_push_arguments_ftype frv_push_arguments
;
44 static gdbarch_deprecated_saved_pc_after_call_ftype frv_saved_pc_after_call
;
46 /* Register numbers. You can change these as needed, but don't forget
47 to update the simulator accordingly. */
49 /* The total number of registers we know exist. */
52 /* Register numbers 0 -- 63 are always reserved for general-purpose
53 registers. The chip at hand may have less. */
57 struct_return_regnum
= 3,
60 /* Register numbers 64 -- 127 are always reserved for floating-point
61 registers. The chip at hand may have less. */
62 first_fpr_regnum
= 64,
63 last_fpr_regnum
= 127,
65 /* Register numbers 128 on up are always reserved for special-purpose
67 first_spr_regnum
= 128,
83 static LONGEST frv_call_dummy_words
[] =
87 struct frv_unwind_cache
/* was struct frame_extra_info */
89 /* The previous frame's inner-most stack address. Used as this
90 frame ID's stack_addr. */
93 /* The frame's base, optionally used by the high-level debug info. */
96 /* Table indicating the location of each and every register. */
97 struct trad_frame_saved_reg
*saved_regs
;
101 /* A structure describing a particular variant of the FRV.
102 We allocate and initialize one of these structures when we create
103 the gdbarch object for a variant.
105 At the moment, all the FR variants we support differ only in which
106 registers are present; the portable code of GDB knows that
107 registers whose names are the empty string don't exist, so the
108 `register_names' array captures all the per-variant information we
111 in the future, if we need to have per-variant maps for raw size,
112 virtual type, etc., we should replace register_names with an array
113 of structures, each of which gives all the necessary info for one
114 register. Don't stick parallel arrays in here --- that's so
118 /* How many general-purpose registers does this variant have? */
121 /* How many floating-point registers does this variant have? */
124 /* How many hardware watchpoints can it support? */
125 int num_hw_watchpoints
;
127 /* How many hardware breakpoints can it support? */
128 int num_hw_breakpoints
;
130 /* Register names. */
131 char **register_names
;
134 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
137 /* Allocate a new variant structure, and set up default values for all
139 static struct gdbarch_tdep
*
142 struct gdbarch_tdep
*var
;
146 var
= xmalloc (sizeof (*var
));
147 memset (var
, 0, sizeof (*var
));
151 var
->num_hw_watchpoints
= 0;
152 var
->num_hw_breakpoints
= 0;
154 /* By default, don't supply any general-purpose or floating-point
156 var
->register_names
= (char **) xmalloc (frv_num_regs
* sizeof (char *));
157 for (r
= 0; r
< frv_num_regs
; r
++)
158 var
->register_names
[r
] = "";
160 /* Do, however, supply default names for the special-purpose
162 for (r
= first_spr_regnum
; r
<= last_spr_regnum
; ++r
)
164 sprintf (buf
, "x%d", r
);
165 var
->register_names
[r
] = xstrdup (buf
);
168 var
->register_names
[pc_regnum
] = "pc";
169 var
->register_names
[lr_regnum
] = "lr";
170 var
->register_names
[lcr_regnum
] = "lcr";
172 var
->register_names
[psr_regnum
] = "psr";
173 var
->register_names
[ccr_regnum
] = "ccr";
174 var
->register_names
[cccr_regnum
] = "cccr";
175 var
->register_names
[tbr_regnum
] = "tbr";
177 /* Debug registers. */
178 var
->register_names
[brr_regnum
] = "brr";
179 var
->register_names
[dbar0_regnum
] = "dbar0";
180 var
->register_names
[dbar1_regnum
] = "dbar1";
181 var
->register_names
[dbar2_regnum
] = "dbar2";
182 var
->register_names
[dbar3_regnum
] = "dbar3";
188 /* Indicate that the variant VAR has NUM_GPRS general-purpose
189 registers, and fill in the names array appropriately. */
191 set_variant_num_gprs (struct gdbarch_tdep
*var
, int num_gprs
)
195 var
->num_gprs
= num_gprs
;
197 for (r
= 0; r
< num_gprs
; ++r
)
201 sprintf (buf
, "gr%d", r
);
202 var
->register_names
[first_gpr_regnum
+ r
] = xstrdup (buf
);
207 /* Indicate that the variant VAR has NUM_FPRS floating-point
208 registers, and fill in the names array appropriately. */
210 set_variant_num_fprs (struct gdbarch_tdep
*var
, int num_fprs
)
214 var
->num_fprs
= num_fprs
;
216 for (r
= 0; r
< num_fprs
; ++r
)
220 sprintf (buf
, "fr%d", r
);
221 var
->register_names
[first_fpr_regnum
+ r
] = xstrdup (buf
);
227 frv_register_name (int reg
)
231 if (reg
>= frv_num_regs
)
234 return CURRENT_VARIANT
->register_names
[reg
];
239 frv_register_raw_size (int reg
)
245 frv_register_virtual_size (int reg
)
251 frv_register_virtual_type (int reg
)
253 if (reg
>= 64 && reg
<= 127)
254 return builtin_type_float
;
256 return builtin_type_int
;
260 frv_register_byte (int reg
)
265 static const unsigned char *
266 frv_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenp
)
268 static unsigned char breakpoint
[] = {0xc0, 0x70, 0x00, 0x01};
269 *lenp
= sizeof (breakpoint
);
274 /* Return true if REG is a caller-saves ("scratch") register,
277 is_caller_saves_reg (int reg
)
279 return ((4 <= reg
&& reg
<= 7)
280 || (14 <= reg
&& reg
<= 15)
281 || (32 <= reg
&& reg
<= 47));
285 /* Return true if REG is a callee-saves register, false otherwise. */
287 is_callee_saves_reg (int reg
)
289 return ((16 <= reg
&& reg
<= 31)
290 || (48 <= reg
&& reg
<= 63));
294 /* Return true if REG is an argument register, false otherwise. */
296 is_argument_reg (int reg
)
298 return (8 <= reg
&& reg
<= 13);
302 /* Scan an FR-V prologue, starting at PC, until frame->PC.
303 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
304 We assume FRAME's saved_regs array has already been allocated and cleared.
305 Return the first PC value after the prologue.
307 Note that, for unoptimized code, we almost don't need this function
308 at all; all arguments and locals live on the stack, so we just need
309 the FP to find everything. The catch: structures passed by value
310 have their addresses living in registers; they're never spilled to
311 the stack. So if you ever want to be able to get to these
312 arguments in any frame but the top, you'll need to do this serious
313 prologue analysis. */
315 frv_analyze_prologue (CORE_ADDR pc
, struct frame_info
*next_frame
,
316 struct frv_unwind_cache
*info
)
318 /* When writing out instruction bitpatterns, we use the following
319 letters to label instruction fields:
320 P - The parallel bit. We don't use this.
321 J - The register number of GRj in the instruction description.
322 K - The register number of GRk in the instruction description.
323 I - The register number of GRi.
324 S - a signed imediate offset.
325 U - an unsigned immediate offset.
327 The dots below the numbers indicate where hex digit boundaries
328 fall, to make it easier to check the numbers. */
330 /* Non-zero iff we've seen the instruction that initializes the
331 frame pointer for this function's frame. */
334 /* If fp_set is non_zero, then this is the distance from
335 the stack pointer to frame pointer: fp = sp + fp_offset. */
338 /* Total size of frame prior to any alloca operations. */
341 /* Flag indicating if lr has been saved on the stack. */
342 int lr_saved_on_stack
= 0;
344 /* The number of the general-purpose register we saved the return
345 address ("link register") in, or -1 if we haven't moved it yet. */
346 int lr_save_reg
= -1;
348 /* Offset (from sp) at which lr has been saved on the stack. */
350 int lr_sp_offset
= 0;
352 /* If gr_saved[i] is non-zero, then we've noticed that general
353 register i has been saved at gr_sp_offset[i] from the stack
356 int gr_sp_offset
[64];
358 memset (gr_saved
, 0, sizeof (gr_saved
));
360 while (! next_frame
|| pc
< frame_pc_unwind (next_frame
))
362 LONGEST op
= read_memory_integer (pc
, 4);
364 /* The tests in this chain of ifs should be in order of
365 decreasing selectivity, so that more particular patterns get
366 to fire before less particular patterns. */
368 /* Setting the FP from the SP:
370 P 000010 0100010 000001 000000000000 = 0x04881000
371 0 111111 1111111 111111 111111111111 = 0x7fffffff
373 We treat this as part of the prologue. */
374 if ((op
& 0x7fffffff) == 0x04881000)
380 /* Move the link register to the scratch register grJ, before saving:
382 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
383 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
385 We treat this as part of the prologue. */
386 else if ((op
& 0x7fffffc0) == 0x080d01c0)
388 int gr_j
= op
& 0x3f;
390 /* If we're moving it to a scratch register, that's fine. */
391 if (is_caller_saves_reg (gr_j
))
393 /* Otherwise it's not a prologue instruction that we
399 /* To save multiple callee-saves registers on the stack, at
403 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
404 0 000000 1111111 111111 111111 111111 = 0x01ffffff
407 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
408 0 000000 1111111 111111 111111 111111 = 0x01ffffff
410 We treat this as part of the prologue, and record the register's
411 saved address in the frame structure. */
412 else if ((op
& 0x01ffffff) == 0x000c10c0
413 || (op
& 0x01ffffff) == 0x000c1100)
415 int gr_k
= ((op
>> 25) & 0x3f);
416 int ope
= ((op
>> 6) & 0x3f);
420 /* Is it an std or an stq? */
426 /* Is it really a callee-saves register? */
427 if (is_callee_saves_reg (gr_k
))
429 for (i
= 0; i
< count
; i
++)
431 gr_saved
[gr_k
+ i
] = 1;
432 gr_sp_offset
[gr_k
+ i
] = 4 * i
;
436 /* It's not a prologue instruction. */
440 /* Adjusting the stack pointer. (The stack pointer is GR1.)
442 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
443 0 111111 1111111 111111 000000000000 = 0x7ffff000
445 We treat this as part of the prologue. */
446 else if ((op
& 0x7ffff000) == 0x02401000)
448 /* Sign-extend the twelve-bit field.
449 (Isn't there a better way to do this?) */
450 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
455 /* Setting the FP to a constant distance from the SP:
457 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
458 0 111111 1111111 111111 000000000000 = 0x7ffff000
460 We treat this as part of the prologue. */
461 else if ((op
& 0x7ffff000) == 0x04401000)
463 /* Sign-extend the twelve-bit field.
464 (Isn't there a better way to do this?) */
465 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
470 /* To spill an argument register to a scratch register:
472 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
473 0 000000 1111111 000000 111111111111 = 0x01fc0fff
475 For the time being, we treat this as a prologue instruction,
476 assuming that GRi is an argument register. This one's kind
477 of suspicious, because it seems like it could be part of a
478 legitimate body instruction. But we only come here when the
479 source info wasn't helpful, so we have to do the best we can.
480 Hopefully once GCC and GDB agree on how to emit line number
481 info for prologues, then this code will never come into play. */
482 else if ((op
& 0x01fc0fff) == 0x00880000)
484 int gr_i
= ((op
>> 12) & 0x3f);
486 /* If the source isn't an arg register, then this isn't a
487 prologue instruction. */
488 if (! is_argument_reg (gr_i
))
492 /* To spill 16-bit values to the stack:
494 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
495 0 000000 1111111 111111 000000000000 = 0x01fff000
497 And for 8-bit values, we use STB instructions.
499 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
500 0 000000 1111111 111111 000000000000 = 0x01fff000
502 We check that GRk is really an argument register, and treat
503 all such as part of the prologue. */
504 else if ( (op
& 0x01fff000) == 0x01442000
505 || (op
& 0x01fff000) == 0x01402000)
507 int gr_k
= ((op
>> 25) & 0x3f);
509 if (! is_argument_reg (gr_k
))
510 break; /* Source isn't an arg register. */
513 /* To save multiple callee-saves register on the stack, at a
517 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
518 0 000000 1111111 111111 000000000000 = 0x01fff000
521 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
522 0 000000 1111111 111111 000000000000 = 0x01fff000
524 We treat this as part of the prologue, and record the register's
525 saved address in the frame structure. */
526 else if ((op
& 0x01fff000) == 0x014c1000
527 || (op
& 0x01fff000) == 0x01501000)
529 int gr_k
= ((op
>> 25) & 0x3f);
533 /* Is it a stdi or a stqi? */
534 if ((op
& 0x01fff000) == 0x014c1000)
539 /* Is it really a callee-saves register? */
540 if (is_callee_saves_reg (gr_k
))
542 /* Sign-extend the twelve-bit field.
543 (Isn't there a better way to do this?) */
544 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
546 for (i
= 0; i
< count
; i
++)
548 gr_saved
[gr_k
+ i
] = 1;
549 gr_sp_offset
[gr_k
+ i
] = s
+ (4 * i
);
553 /* It's not a prologue instruction. */
557 /* Storing any kind of integer register at any constant offset
558 from any other register.
561 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
562 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
565 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
566 0 000000 1111111 000000 000000000000 = 0x01fc0000
568 These could be almost anything, but a lot of prologue
569 instructions fall into this pattern, so let's decode the
570 instruction once, and then work at a higher level. */
571 else if (((op
& 0x01fc0fff) == 0x000c0080)
572 || ((op
& 0x01fc0000) == 0x01480000))
574 int gr_k
= ((op
>> 25) & 0x3f);
575 int gr_i
= ((op
>> 12) & 0x3f);
578 /* Are we storing with gr0 as an offset, or using an
580 if ((op
& 0x01fc0fff) == 0x000c0080)
583 offset
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
585 /* If the address isn't relative to the SP or FP, it's not a
586 prologue instruction. */
587 if (gr_i
!= sp_regnum
&& gr_i
!= fp_regnum
)
590 /* Saving the old FP in the new frame (relative to the SP). */
591 if (gr_k
== fp_regnum
&& gr_i
== sp_regnum
)
593 gr_saved
[fp_regnum
] = 1;
594 gr_sp_offset
[fp_regnum
] = offset
;
597 /* Saving callee-saves register(s) on the stack, relative to
599 else if (gr_i
== sp_regnum
600 && is_callee_saves_reg (gr_k
))
603 if (gr_i
== sp_regnum
)
604 gr_sp_offset
[gr_k
] = offset
;
606 gr_sp_offset
[gr_k
] = offset
+ fp_offset
;
609 /* Saving the scratch register holding the return address. */
610 else if (lr_save_reg
!= -1
611 && gr_k
== lr_save_reg
)
613 lr_saved_on_stack
= 1;
614 if (gr_i
== sp_regnum
)
615 lr_sp_offset
= offset
;
617 lr_sp_offset
= offset
+ fp_offset
;
620 /* Spilling int-sized arguments to the stack. */
621 else if (is_argument_reg (gr_k
))
624 /* It's not a store instruction we recognize, so this must
625 be the end of the prologue. */
630 /* It's not any instruction we recognize, so this must be the end
638 if (next_frame
&& info
)
643 /* If we know the relationship between the stack and frame
644 pointers, record the addresses of the registers we noticed.
645 Note that we have to do this as a separate step at the end,
646 because instructions may save relative to the SP, but we need
647 their addresses relative to the FP. */
649 frame_unwind_unsigned_register (next_frame
, fp_regnum
, &this_base
);
651 frame_unwind_unsigned_register (next_frame
, sp_regnum
, &this_base
);
653 for (i
= 0; i
< 64; i
++)
655 info
->saved_regs
[i
].addr
= this_base
- fp_offset
+ gr_sp_offset
[i
];
657 info
->prev_sp
= this_base
- fp_offset
+ framesize
;
658 info
->base
= this_base
;
660 /* If LR was saved on the stack, record its location. */
661 if (lr_saved_on_stack
)
662 info
->saved_regs
[lr_regnum
].addr
= this_base
- fp_offset
+ lr_sp_offset
;
664 /* The call instruction moves the caller's PC in the callee's LR.
665 Since this is an unwind, do the reverse. Copy the location of LR
666 into PC (the address / regnum) so that a request for PC will be
667 converted into a request for the LR. */
668 info
->saved_regs
[pc_regnum
] = info
->saved_regs
[lr_regnum
];
670 /* Save the previous frame's computed SP value. */
671 trad_frame_set_value (info
->saved_regs
, sp_regnum
, info
->prev_sp
);
679 frv_skip_prologue (CORE_ADDR pc
)
681 CORE_ADDR func_addr
, func_end
, new_pc
;
685 /* If the line table has entry for a line *within* the function
686 (i.e., not in the prologue, and not past the end), then that's
688 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
690 struct symtab_and_line sal
;
692 sal
= find_pc_line (func_addr
, 0);
694 if (sal
.line
!= 0 && sal
.end
< func_end
)
700 /* The FR-V prologue is at least five instructions long (twenty bytes).
701 If we didn't find a real source location past that, then
702 do a full analysis of the prologue. */
703 if (new_pc
< pc
+ 20)
704 new_pc
= frv_analyze_prologue (pc
, 0, 0);
710 static struct frv_unwind_cache
*
711 frv_frame_unwind_cache (struct frame_info
*next_frame
,
712 void **this_prologue_cache
)
714 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
718 struct frv_unwind_cache
*info
;
720 if ((*this_prologue_cache
))
721 return (*this_prologue_cache
);
723 info
= FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache
);
724 (*this_prologue_cache
) = info
;
725 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
727 /* Prologue analysis does the rest... */
728 frv_analyze_prologue (frame_func_unwind (next_frame
), next_frame
, info
);
734 frv_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
736 memcpy (valbuf
, (regbuf
737 + frv_register_byte (8)
738 + (TYPE_LENGTH (type
) < 4 ? 4 - TYPE_LENGTH (type
) : 0)),
743 frv_extract_struct_value_address (char *regbuf
)
745 return extract_unsigned_integer (regbuf
+
746 frv_register_byte (struct_return_regnum
),
751 frv_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
753 write_register (struct_return_regnum
, addr
);
757 frv_frameless_function_invocation (struct frame_info
*frame
)
759 return frameless_look_for_prologue (frame
);
762 #define ROUND_UP(n,a) (((n)+(a)-1) & ~((a)-1))
763 #define ROUND_DOWN(n,a) ((n) & ~((a)-1))
766 frv_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
768 /* Require dword alignment. */
769 return ROUND_DOWN (sp
, 8);
773 frv_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
774 struct regcache
*regcache
, CORE_ADDR bp_addr
,
775 int nargs
, struct value
**args
, CORE_ADDR sp
,
776 int struct_return
, CORE_ADDR struct_addr
)
783 struct type
*arg_type
;
785 enum type_code typecode
;
791 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
792 nargs
, (int) sp
, struct_return
, struct_addr
);
796 for (argnum
= 0; argnum
< nargs
; ++argnum
)
797 stack_space
+= ROUND_UP (TYPE_LENGTH (VALUE_TYPE (args
[argnum
])), 4);
799 stack_space
-= (6 * 4);
803 /* Make sure stack is dword aligned. */
804 sp
= ROUND_DOWN (sp
, 8);
811 regcache_cooked_write_unsigned (regcache
, struct_return_regnum
,
814 for (argnum
= 0; argnum
< nargs
; ++argnum
)
817 arg_type
= check_typedef (VALUE_TYPE (arg
));
818 len
= TYPE_LENGTH (arg_type
);
819 typecode
= TYPE_CODE (arg_type
);
821 if (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
)
823 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (arg
));
824 typecode
= TYPE_CODE_PTR
;
830 val
= (char *) VALUE_CONTENTS (arg
);
835 int partial_len
= (len
< 4 ? len
: 4);
839 regval
= extract_unsigned_integer (val
, partial_len
);
841 printf(" Argnum %d data %x -> reg %d\n",
842 argnum
, (int) regval
, argreg
);
844 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
850 printf(" Argnum %d data %x -> offset %d (%x)\n",
851 argnum
, *((int *)val
), stack_offset
, (int) (sp
+ stack_offset
));
853 write_memory (sp
+ stack_offset
, val
, partial_len
);
854 stack_offset
+= ROUND_UP(partial_len
, 4);
861 /* Set the return address. For the frv, the return breakpoint is
862 always at BP_ADDR. */
863 regcache_cooked_write_unsigned (regcache
, lr_regnum
, bp_addr
);
865 /* Finally, update the SP register. */
866 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
872 frv_store_return_value (struct type
*type
, char *valbuf
)
874 int length
= TYPE_LENGTH (type
);
875 int reg8_offset
= frv_register_byte (8);
878 deprecated_write_register_bytes (reg8_offset
+ (4 - length
), valbuf
,
880 else if (length
== 8)
881 deprecated_write_register_bytes (reg8_offset
, valbuf
, length
);
883 internal_error (__FILE__
, __LINE__
,
884 "Don't know how to return a %d-byte value.", length
);
888 /* Hardware watchpoint / breakpoint support for the FR500
892 frv_check_watch_resources (int type
, int cnt
, int ot
)
894 struct gdbarch_tdep
*var
= CURRENT_VARIANT
;
896 /* Watchpoints not supported on simulator. */
897 if (strcmp (target_shortname
, "sim") == 0)
900 if (type
== bp_hardware_breakpoint
)
902 if (var
->num_hw_breakpoints
== 0)
904 else if (cnt
<= var
->num_hw_breakpoints
)
909 if (var
->num_hw_watchpoints
== 0)
913 else if (cnt
<= var
->num_hw_watchpoints
)
921 frv_stopped_data_address (void)
923 CORE_ADDR brr
, dbar0
, dbar1
, dbar2
, dbar3
;
925 brr
= read_register (brr_regnum
);
926 dbar0
= read_register (dbar0_regnum
);
927 dbar1
= read_register (dbar1_regnum
);
928 dbar2
= read_register (dbar2_regnum
);
929 dbar3
= read_register (dbar3_regnum
);
933 else if (brr
& (1<<10))
935 else if (brr
& (1<<9))
937 else if (brr
& (1<<8))
944 frv_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
946 return frame_unwind_register_unsigned (next_frame
, pc_regnum
);
949 /* Given a GDB frame, determine the address of the calling function's
950 frame. This will be used to create a new GDB frame struct. */
953 frv_frame_this_id (struct frame_info
*next_frame
,
954 void **this_prologue_cache
, struct frame_id
*this_id
)
956 struct frv_unwind_cache
*info
957 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
960 struct minimal_symbol
*msym_stack
;
963 /* The FUNC is easy. */
964 func
= frame_func_unwind (next_frame
);
966 /* This is meant to halt the backtrace at "_start". Make sure we
967 don't halt it at a generic dummy frame. */
968 if (inside_entry_file (func
))
971 /* Check if the stack is empty. */
972 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
973 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
976 /* Hopefully the prologue analysis either correctly determined the
977 frame's base (which is the SP from the previous frame), or set
978 that base to "NULL". */
979 base
= info
->prev_sp
;
983 id
= frame_id_build (base
, func
);
985 /* Check that we're not going round in circles with the same frame
986 ID (but avoid applying the test to sentinel frames which do go
987 round in circles). Can't use frame_id_eq() as that doesn't yet
988 compare the frame's PC value. */
989 if (frame_relative_level (next_frame
) >= 0
990 && get_frame_type (next_frame
) != DUMMY_FRAME
991 && frame_id_eq (get_frame_id (next_frame
), id
))
998 frv_frame_prev_register (struct frame_info
*next_frame
,
999 void **this_prologue_cache
,
1000 int regnum
, int *optimizedp
,
1001 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1002 int *realnump
, void *bufferp
)
1004 struct frv_unwind_cache
*info
1005 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1006 trad_frame_prev_register (next_frame
, info
->saved_regs
, regnum
,
1007 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
1010 static const struct frame_unwind frv_frame_unwind
= {
1013 frv_frame_prev_register
1016 static const struct frame_unwind
*
1017 frv_frame_sniffer (struct frame_info
*next_frame
)
1019 return &frv_frame_unwind
;
1023 frv_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1025 struct frv_unwind_cache
*info
1026 = frv_frame_unwind_cache (next_frame
, this_cache
);
1030 static const struct frame_base frv_frame_base
= {
1032 frv_frame_base_address
,
1033 frv_frame_base_address
,
1034 frv_frame_base_address
1038 frv_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1040 return frame_unwind_register_unsigned (next_frame
, sp_regnum
);
1044 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1045 dummy frame. The frame ID's base needs to match the TOS value
1046 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1049 static struct frame_id
1050 frv_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1052 return frame_id_build (frv_unwind_sp (gdbarch
, next_frame
),
1053 frame_pc_unwind (next_frame
));
1057 static struct gdbarch
*
1058 frv_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1060 struct gdbarch
*gdbarch
;
1061 struct gdbarch_tdep
*var
;
1063 /* Check to see if we've already built an appropriate architecture
1064 object for this executable. */
1065 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1067 return arches
->gdbarch
;
1069 /* Select the right tdep structure for this variant. */
1070 var
= new_variant ();
1071 switch (info
.bfd_arch_info
->mach
)
1074 case bfd_mach_frvsimple
:
1075 case bfd_mach_fr500
:
1076 case bfd_mach_frvtomcat
:
1077 set_variant_num_gprs (var
, 64);
1078 set_variant_num_fprs (var
, 64);
1081 case bfd_mach_fr400
:
1082 set_variant_num_gprs (var
, 32);
1083 set_variant_num_fprs (var
, 32);
1087 /* Never heard of this variant. */
1091 gdbarch
= gdbarch_alloc (&info
, var
);
1093 set_gdbarch_short_bit (gdbarch
, 16);
1094 set_gdbarch_int_bit (gdbarch
, 32);
1095 set_gdbarch_long_bit (gdbarch
, 32);
1096 set_gdbarch_long_long_bit (gdbarch
, 64);
1097 set_gdbarch_float_bit (gdbarch
, 32);
1098 set_gdbarch_double_bit (gdbarch
, 64);
1099 set_gdbarch_long_double_bit (gdbarch
, 64);
1100 set_gdbarch_ptr_bit (gdbarch
, 32);
1102 set_gdbarch_num_regs (gdbarch
, frv_num_regs
);
1103 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
1104 set_gdbarch_deprecated_fp_regnum (gdbarch
, fp_regnum
);
1105 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
1107 set_gdbarch_register_name (gdbarch
, frv_register_name
);
1108 set_gdbarch_deprecated_register_size (gdbarch
, 4);
1109 set_gdbarch_deprecated_register_bytes (gdbarch
, frv_num_regs
* 4);
1110 set_gdbarch_deprecated_register_byte (gdbarch
, frv_register_byte
);
1111 set_gdbarch_deprecated_register_raw_size (gdbarch
, frv_register_raw_size
);
1112 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, 4);
1113 set_gdbarch_deprecated_register_virtual_size (gdbarch
, frv_register_virtual_size
);
1114 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, 4);
1115 set_gdbarch_deprecated_register_virtual_type (gdbarch
, frv_register_virtual_type
);
1117 set_gdbarch_skip_prologue (gdbarch
, frv_skip_prologue
);
1118 set_gdbarch_breakpoint_from_pc (gdbarch
, frv_breakpoint_from_pc
);
1120 set_gdbarch_frame_args_skip (gdbarch
, 0);
1121 set_gdbarch_frameless_function_invocation (gdbarch
, frv_frameless_function_invocation
);
1123 set_gdbarch_use_struct_convention (gdbarch
, always_use_struct_convention
);
1124 set_gdbarch_deprecated_extract_return_value (gdbarch
, frv_extract_return_value
);
1126 set_gdbarch_deprecated_store_struct_return (gdbarch
, frv_store_struct_return
);
1127 set_gdbarch_deprecated_store_return_value (gdbarch
, frv_store_return_value
);
1128 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, frv_extract_struct_value_address
);
1131 set_gdbarch_unwind_pc (gdbarch
, frv_unwind_pc
);
1132 set_gdbarch_unwind_sp (gdbarch
, frv_unwind_sp
);
1133 set_gdbarch_frame_align (gdbarch
, frv_frame_align
);
1134 frame_unwind_append_sniffer (gdbarch
, frv_frame_sniffer
);
1135 frame_base_set_default (gdbarch
, &frv_frame_base
);
1137 /* Settings for calling functions in the inferior. */
1138 set_gdbarch_push_dummy_call (gdbarch
, frv_push_dummy_call
);
1139 set_gdbarch_unwind_dummy_id (gdbarch
, frv_unwind_dummy_id
);
1141 /* Settings that should be unnecessary. */
1142 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1144 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
1146 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
1147 set_gdbarch_function_start_offset (gdbarch
, 0);
1149 set_gdbarch_remote_translate_xfer_address
1150 (gdbarch
, generic_remote_translate_xfer_address
);
1152 /* Hardware watchpoint / breakpoint support. */
1153 switch (info
.bfd_arch_info
->mach
)
1156 case bfd_mach_frvsimple
:
1157 case bfd_mach_fr500
:
1158 case bfd_mach_frvtomcat
:
1159 /* fr500-style hardware debugging support. */
1160 var
->num_hw_watchpoints
= 4;
1161 var
->num_hw_breakpoints
= 4;
1164 case bfd_mach_fr400
:
1165 /* fr400-style hardware debugging support. */
1166 var
->num_hw_watchpoints
= 2;
1167 var
->num_hw_breakpoints
= 4;
1171 /* Otherwise, assume we don't have hardware debugging support. */
1172 var
->num_hw_watchpoints
= 0;
1173 var
->num_hw_breakpoints
= 0;
1177 set_gdbarch_print_insn (gdbarch
, print_insn_frv
);
1183 _initialize_frv_tdep (void)
1185 register_gdbarch_init (bfd_arch_frv
, frv_gdbarch_init
);