1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2 Copyright 2002, 2003, 2004 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "gdb_string.h"
25 #include "arch-utils.h"
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "trad-frame.h"
32 #include "gdb_assert.h"
33 #include "sim-regno.h"
34 #include "gdb/sim-frv.h"
35 #include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
42 extern void _initialize_frv_tdep (void);
44 static gdbarch_init_ftype frv_gdbarch_init
;
46 static gdbarch_register_name_ftype frv_register_name
;
47 static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc
;
48 static gdbarch_adjust_breakpoint_address_ftype frv_gdbarch_adjust_breakpoint_address
;
49 static gdbarch_skip_prologue_ftype frv_skip_prologue
;
52 struct frv_unwind_cache
/* was struct frame_extra_info */
54 /* The previous frame's inner-most stack address. Used as this
55 frame ID's stack_addr. */
58 /* The frame's base, optionally used by the high-level debug info. */
61 /* Table indicating the location of each and every register. */
62 struct trad_frame_saved_reg
*saved_regs
;
65 /* A structure describing a particular variant of the FRV.
66 We allocate and initialize one of these structures when we create
67 the gdbarch object for a variant.
69 At the moment, all the FR variants we support differ only in which
70 registers are present; the portable code of GDB knows that
71 registers whose names are the empty string don't exist, so the
72 `register_names' array captures all the per-variant information we
75 in the future, if we need to have per-variant maps for raw size,
76 virtual type, etc., we should replace register_names with an array
77 of structures, each of which gives all the necessary info for one
78 register. Don't stick parallel arrays in here --- that's so
82 /* Which ABI is in use? */
85 /* How many general-purpose registers does this variant have? */
88 /* How many floating-point registers does this variant have? */
91 /* How many hardware watchpoints can it support? */
92 int num_hw_watchpoints
;
94 /* How many hardware breakpoints can it support? */
95 int num_hw_breakpoints
;
98 char **register_names
;
101 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
103 /* Return the FR-V ABI associated with GDBARCH. */
105 frv_abi (struct gdbarch
*gdbarch
)
107 return gdbarch_tdep (gdbarch
)->frv_abi
;
110 /* Fetch the interpreter and executable loadmap addresses (for shared
111 library support) for the FDPIC ABI. Return 0 if successful, -1 if
112 not. (E.g, -1 will be returned if the ABI isn't the FDPIC ABI.) */
114 frv_fdpic_loadmap_addresses (struct gdbarch
*gdbarch
, CORE_ADDR
*interp_addr
,
115 CORE_ADDR
*exec_addr
)
117 if (frv_abi (gdbarch
) != FRV_ABI_FDPIC
)
121 if (interp_addr
!= NULL
)
124 regcache_cooked_read_unsigned (current_regcache
,
125 fdpic_loadmap_interp_regnum
, &val
);
128 if (exec_addr
!= NULL
)
131 regcache_cooked_read_unsigned (current_regcache
,
132 fdpic_loadmap_exec_regnum
, &val
);
139 /* Allocate a new variant structure, and set up default values for all
141 static struct gdbarch_tdep
*
144 struct gdbarch_tdep
*var
;
148 var
= xmalloc (sizeof (*var
));
149 memset (var
, 0, sizeof (*var
));
151 var
->frv_abi
= FRV_ABI_EABI
;
154 var
->num_hw_watchpoints
= 0;
155 var
->num_hw_breakpoints
= 0;
157 /* By default, don't supply any general-purpose or floating-point
160 = (char **) xmalloc ((frv_num_regs
+ frv_num_pseudo_regs
)
162 for (r
= 0; r
< frv_num_regs
+ frv_num_pseudo_regs
; r
++)
163 var
->register_names
[r
] = "";
165 /* Do, however, supply default names for the known special-purpose
168 var
->register_names
[pc_regnum
] = "pc";
169 var
->register_names
[lr_regnum
] = "lr";
170 var
->register_names
[lcr_regnum
] = "lcr";
172 var
->register_names
[psr_regnum
] = "psr";
173 var
->register_names
[ccr_regnum
] = "ccr";
174 var
->register_names
[cccr_regnum
] = "cccr";
175 var
->register_names
[tbr_regnum
] = "tbr";
177 /* Debug registers. */
178 var
->register_names
[brr_regnum
] = "brr";
179 var
->register_names
[dbar0_regnum
] = "dbar0";
180 var
->register_names
[dbar1_regnum
] = "dbar1";
181 var
->register_names
[dbar2_regnum
] = "dbar2";
182 var
->register_names
[dbar3_regnum
] = "dbar3";
184 /* iacc0 (Only found on MB93405.) */
185 var
->register_names
[iacc0h_regnum
] = "iacc0h";
186 var
->register_names
[iacc0l_regnum
] = "iacc0l";
187 var
->register_names
[iacc0_regnum
] = "iacc0";
193 /* Indicate that the variant VAR has NUM_GPRS general-purpose
194 registers, and fill in the names array appropriately. */
196 set_variant_num_gprs (struct gdbarch_tdep
*var
, int num_gprs
)
200 var
->num_gprs
= num_gprs
;
202 for (r
= 0; r
< num_gprs
; ++r
)
206 sprintf (buf
, "gr%d", r
);
207 var
->register_names
[first_gpr_regnum
+ r
] = xstrdup (buf
);
212 /* Indicate that the variant VAR has NUM_FPRS floating-point
213 registers, and fill in the names array appropriately. */
215 set_variant_num_fprs (struct gdbarch_tdep
*var
, int num_fprs
)
219 var
->num_fprs
= num_fprs
;
221 for (r
= 0; r
< num_fprs
; ++r
)
225 sprintf (buf
, "fr%d", r
);
226 var
->register_names
[first_fpr_regnum
+ r
] = xstrdup (buf
);
231 set_variant_abi_fdpic (struct gdbarch_tdep
*var
)
233 var
->frv_abi
= FRV_ABI_FDPIC
;
234 var
->register_names
[fdpic_loadmap_exec_regnum
] = xstrdup ("loadmap_exec");
235 var
->register_names
[fdpic_loadmap_interp_regnum
] = xstrdup ("loadmap_interp");
239 set_variant_scratch_registers (struct gdbarch_tdep
*var
)
241 var
->register_names
[scr0_regnum
] = xstrdup ("scr0");
242 var
->register_names
[scr1_regnum
] = xstrdup ("scr1");
243 var
->register_names
[scr2_regnum
] = xstrdup ("scr2");
244 var
->register_names
[scr3_regnum
] = xstrdup ("scr3");
248 frv_register_name (int reg
)
252 if (reg
>= frv_num_regs
+ frv_num_pseudo_regs
)
255 return CURRENT_VARIANT
->register_names
[reg
];
260 frv_register_type (struct gdbarch
*gdbarch
, int reg
)
262 if (reg
>= first_fpr_regnum
&& reg
<= last_fpr_regnum
)
263 return builtin_type_float
;
264 else if (reg
== iacc0_regnum
)
265 return builtin_type_int64
;
267 return builtin_type_int32
;
271 frv_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
272 int reg
, void *buffer
)
274 if (reg
== iacc0_regnum
)
276 regcache_raw_read (regcache
, iacc0h_regnum
, buffer
);
277 regcache_raw_read (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
282 frv_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
283 int reg
, const void *buffer
)
285 if (reg
== iacc0_regnum
)
287 regcache_raw_write (regcache
, iacc0h_regnum
, buffer
);
288 regcache_raw_write (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
293 frv_register_sim_regno (int reg
)
295 static const int spr_map
[] =
297 H_SPR_PSR
, /* psr_regnum */
298 H_SPR_CCR
, /* ccr_regnum */
299 H_SPR_CCCR
, /* cccr_regnum */
303 H_SPR_TBR
, /* tbr_regnum */
304 H_SPR_BRR
, /* brr_regnum */
305 H_SPR_DBAR0
, /* dbar0_regnum */
306 H_SPR_DBAR1
, /* dbar1_regnum */
307 H_SPR_DBAR2
, /* dbar2_regnum */
308 H_SPR_DBAR3
, /* dbar3_regnum */
313 H_SPR_LR
, /* lr_regnum */
314 H_SPR_LCR
, /* lcr_regnum */
315 H_SPR_IACC0H
, /* iacc0h_regnum */
316 H_SPR_IACC0L
/* iacc0l_regnum */
319 gdb_assert (reg
>= 0 && reg
< NUM_REGS
);
321 if (first_gpr_regnum
<= reg
&& reg
<= last_gpr_regnum
)
322 return reg
- first_gpr_regnum
+ SIM_FRV_GR0_REGNUM
;
323 else if (first_fpr_regnum
<= reg
&& reg
<= last_fpr_regnum
)
324 return reg
- first_fpr_regnum
+ SIM_FRV_FR0_REGNUM
;
325 else if (pc_regnum
== reg
)
326 return SIM_FRV_PC_REGNUM
;
327 else if (reg
>= first_spr_regnum
328 && reg
< first_spr_regnum
+ sizeof (spr_map
) / sizeof (spr_map
[0]))
330 int spr_reg_offset
= spr_map
[reg
- first_spr_regnum
];
332 if (spr_reg_offset
< 0)
333 return SIM_REGNO_DOES_NOT_EXIST
;
335 return SIM_FRV_SPR0_REGNUM
+ spr_reg_offset
;
338 internal_error (__FILE__
, __LINE__
, "Bad register number %d", reg
);
341 static const unsigned char *
342 frv_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenp
)
344 static unsigned char breakpoint
[] = {0xc0, 0x70, 0x00, 0x01};
345 *lenp
= sizeof (breakpoint
);
349 /* Define the maximum number of instructions which may be packed into a
350 bundle (VLIW instruction). */
351 static const int max_instrs_per_bundle
= 8;
353 /* Define the size (in bytes) of an FR-V instruction. */
354 static const int frv_instr_size
= 4;
356 /* Adjust a breakpoint's address to account for the FR-V architecture's
357 constraint that a break instruction must not appear as any but the
358 first instruction in the bundle. */
360 frv_gdbarch_adjust_breakpoint_address (struct gdbarch
*gdbarch
, CORE_ADDR bpaddr
)
362 int count
= max_instrs_per_bundle
;
363 CORE_ADDR addr
= bpaddr
- frv_instr_size
;
364 CORE_ADDR func_start
= get_pc_function_start (bpaddr
);
366 /* Find the end of the previous packing sequence. This will be indicated
367 by either attempting to access some inaccessible memory or by finding
368 an instruction word whose packing bit is set to one. */
369 while (count
-- > 0 && addr
>= func_start
)
371 char instr
[frv_instr_size
];
374 status
= read_memory_nobpt (addr
, instr
, sizeof instr
);
379 /* This is a big endian architecture, so byte zero will have most
380 significant byte. The most significant bit of this byte is the
385 addr
-= frv_instr_size
;
389 bpaddr
= addr
+ frv_instr_size
;
395 /* Return true if REG is a caller-saves ("scratch") register,
398 is_caller_saves_reg (int reg
)
400 return ((4 <= reg
&& reg
<= 7)
401 || (14 <= reg
&& reg
<= 15)
402 || (32 <= reg
&& reg
<= 47));
406 /* Return true if REG is a callee-saves register, false otherwise. */
408 is_callee_saves_reg (int reg
)
410 return ((16 <= reg
&& reg
<= 31)
411 || (48 <= reg
&& reg
<= 63));
415 /* Return true if REG is an argument register, false otherwise. */
417 is_argument_reg (int reg
)
419 return (8 <= reg
&& reg
<= 13);
422 /* Scan an FR-V prologue, starting at PC, until frame->PC.
423 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
424 We assume FRAME's saved_regs array has already been allocated and cleared.
425 Return the first PC value after the prologue.
427 Note that, for unoptimized code, we almost don't need this function
428 at all; all arguments and locals live on the stack, so we just need
429 the FP to find everything. The catch: structures passed by value
430 have their addresses living in registers; they're never spilled to
431 the stack. So if you ever want to be able to get to these
432 arguments in any frame but the top, you'll need to do this serious
433 prologue analysis. */
435 frv_analyze_prologue (CORE_ADDR pc
, struct frame_info
*next_frame
,
436 struct frv_unwind_cache
*info
)
438 /* When writing out instruction bitpatterns, we use the following
439 letters to label instruction fields:
440 P - The parallel bit. We don't use this.
441 J - The register number of GRj in the instruction description.
442 K - The register number of GRk in the instruction description.
443 I - The register number of GRi.
444 S - a signed imediate offset.
445 U - an unsigned immediate offset.
447 The dots below the numbers indicate where hex digit boundaries
448 fall, to make it easier to check the numbers. */
450 /* Non-zero iff we've seen the instruction that initializes the
451 frame pointer for this function's frame. */
454 /* If fp_set is non_zero, then this is the distance from
455 the stack pointer to frame pointer: fp = sp + fp_offset. */
458 /* Total size of frame prior to any alloca operations. */
461 /* Flag indicating if lr has been saved on the stack. */
462 int lr_saved_on_stack
= 0;
464 /* The number of the general-purpose register we saved the return
465 address ("link register") in, or -1 if we haven't moved it yet. */
466 int lr_save_reg
= -1;
468 /* Offset (from sp) at which lr has been saved on the stack. */
470 int lr_sp_offset
= 0;
472 /* If gr_saved[i] is non-zero, then we've noticed that general
473 register i has been saved at gr_sp_offset[i] from the stack
476 int gr_sp_offset
[64];
478 /* The address of the most recently scanned prologue instruction. */
479 CORE_ADDR last_prologue_pc
;
481 /* The address of the next instruction. */
484 /* The upper bound to of the pc values to scan. */
487 memset (gr_saved
, 0, sizeof (gr_saved
));
489 last_prologue_pc
= pc
;
491 /* Try to compute an upper limit (on how far to scan) based on the
493 lim_pc
= skip_prologue_using_sal (pc
);
494 /* If there's no line number info, lim_pc will be 0. In that case,
495 set the limit to be 100 instructions away from pc. Hopefully, this
496 will be far enough away to account for the entire prologue. Don't
497 worry about overshooting the end of the function. The scan loop
498 below contains some checks to avoid scanning unreasonably far. */
502 /* If we have a frame, we don't want to scan past the frame's pc. This
503 will catch those cases where the pc is in the prologue. */
506 CORE_ADDR frame_pc
= frame_pc_unwind (next_frame
);
507 if (frame_pc
< lim_pc
)
511 /* Scan the prologue. */
514 char buf
[frv_instr_size
];
517 if (target_read_memory (pc
, buf
, sizeof buf
) != 0)
519 op
= extract_signed_integer (buf
, sizeof buf
);
523 /* The tests in this chain of ifs should be in order of
524 decreasing selectivity, so that more particular patterns get
525 to fire before less particular patterns. */
527 /* Some sort of control transfer instruction: stop scanning prologue.
528 Integer Conditional Branch:
529 X XXXX XX 0000110 XX XXXXXXXXXXXXXXXX
530 Floating-point / media Conditional Branch:
531 X XXXX XX 0000111 XX XXXXXXXXXXXXXXXX
532 LCR Conditional Branch to LR
533 X XXXX XX 0001110 XX XX 001 X XXXXXXXXXX
534 Integer conditional Branches to LR
535 X XXXX XX 0001110 XX XX 010 X XXXXXXXXXX
536 X XXXX XX 0001110 XX XX 011 X XXXXXXXXXX
537 Floating-point/Media Branches to LR
538 X XXXX XX 0001110 XX XX 110 X XXXXXXXXXX
539 X XXXX XX 0001110 XX XX 111 X XXXXXXXXXX
541 X XXXXX X 0001100 XXXXXX XXXXXX XXXXXX
542 X XXXXX X 0001101 XXXXXX XXXXXX XXXXXX
544 X XXXXXX 0001111 XXXXXXXXXXXXXXXXXX
546 X XXXXX X 0000101 XXXXXX XXXXXX XXXXXX
547 Integer Conditional Trap
548 X XXXX XX 0000100 XXXXXX XXXX 00 XXXXXX
549 X XXXX XX 0011100 XXXXXX XXXXXXXXXXXX
550 Floating-point /media Conditional Trap
551 X XXXX XX 0000100 XXXXXX XXXX 01 XXXXXX
552 X XXXX XX 0011101 XXXXXX XXXXXXXXXXXX
554 X XXXX XX 0000100 XXXXXX XXXX 11 XXXXXX
556 X XXXX XX 0000100 XXXXXX XXXX 10 XXXXXX */
557 if ((op
& 0x01d80000) == 0x00180000 /* Conditional branches and Call */
558 || (op
& 0x01f80000) == 0x00300000 /* Jump and Link */
559 || (op
& 0x01f80000) == 0x00100000 /* Return from Trap, Trap */
560 || (op
& 0x01f80000) == 0x00700000) /* Trap immediate */
562 /* Stop scanning; not in prologue any longer. */
566 /* Loading something from memory into fp probably means that
567 we're in the epilogue. Stop scanning the prologue.
569 X 000010 0000010 XXXXXX 000100 XXXXXX
571 X 000010 0110010 XXXXXX XXXXXXXXXXXX */
572 else if ((op
& 0x7ffc0fc0) == 0x04080100
573 || (op
& 0x7ffc0000) == 0x04c80000)
578 /* Setting the FP from the SP:
580 P 000010 0100010 000001 000000000000 = 0x04881000
581 0 111111 1111111 111111 111111111111 = 0x7fffffff
583 We treat this as part of the prologue. */
584 else if ((op
& 0x7fffffff) == 0x04881000)
588 last_prologue_pc
= next_pc
;
591 /* Move the link register to the scratch register grJ, before saving:
593 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
594 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
596 We treat this as part of the prologue. */
597 else if ((op
& 0x7fffffc0) == 0x080d01c0)
599 int gr_j
= op
& 0x3f;
601 /* If we're moving it to a scratch register, that's fine. */
602 if (is_caller_saves_reg (gr_j
))
605 last_prologue_pc
= next_pc
;
609 /* To save multiple callee-saves registers on the stack, at
613 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
614 0 000000 1111111 111111 111111 111111 = 0x01ffffff
617 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
618 0 000000 1111111 111111 111111 111111 = 0x01ffffff
620 We treat this as part of the prologue, and record the register's
621 saved address in the frame structure. */
622 else if ((op
& 0x01ffffff) == 0x000c10c0
623 || (op
& 0x01ffffff) == 0x000c1100)
625 int gr_k
= ((op
>> 25) & 0x3f);
626 int ope
= ((op
>> 6) & 0x3f);
630 /* Is it an std or an stq? */
636 /* Is it really a callee-saves register? */
637 if (is_callee_saves_reg (gr_k
))
639 for (i
= 0; i
< count
; i
++)
641 gr_saved
[gr_k
+ i
] = 1;
642 gr_sp_offset
[gr_k
+ i
] = 4 * i
;
644 last_prologue_pc
= next_pc
;
648 /* Adjusting the stack pointer. (The stack pointer is GR1.)
650 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
651 0 111111 1111111 111111 000000000000 = 0x7ffff000
653 We treat this as part of the prologue. */
654 else if ((op
& 0x7ffff000) == 0x02401000)
658 /* Sign-extend the twelve-bit field.
659 (Isn't there a better way to do this?) */
660 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
663 last_prologue_pc
= pc
;
667 /* If the prologue is being adjusted again, we've
668 likely gone too far; i.e. we're probably in the
674 /* Setting the FP to a constant distance from the SP:
676 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
677 0 111111 1111111 111111 000000000000 = 0x7ffff000
679 We treat this as part of the prologue. */
680 else if ((op
& 0x7ffff000) == 0x04401000)
682 /* Sign-extend the twelve-bit field.
683 (Isn't there a better way to do this?) */
684 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
687 last_prologue_pc
= pc
;
690 /* To spill an argument register to a scratch register:
692 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
693 0 000000 1111111 000000 111111111111 = 0x01fc0fff
695 For the time being, we treat this as a prologue instruction,
696 assuming that GRi is an argument register. This one's kind
697 of suspicious, because it seems like it could be part of a
698 legitimate body instruction. But we only come here when the
699 source info wasn't helpful, so we have to do the best we can.
700 Hopefully once GCC and GDB agree on how to emit line number
701 info for prologues, then this code will never come into play. */
702 else if ((op
& 0x01fc0fff) == 0x00880000)
704 int gr_i
= ((op
>> 12) & 0x3f);
706 /* Make sure that the source is an arg register; if it is, we'll
707 treat it as a prologue instruction. */
708 if (is_argument_reg (gr_i
))
709 last_prologue_pc
= next_pc
;
712 /* To spill 16-bit values to the stack:
714 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
715 0 000000 1111111 111111 000000000000 = 0x01fff000
717 And for 8-bit values, we use STB instructions.
719 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
720 0 000000 1111111 111111 000000000000 = 0x01fff000
722 We check that GRk is really an argument register, and treat
723 all such as part of the prologue. */
724 else if ( (op
& 0x01fff000) == 0x01442000
725 || (op
& 0x01fff000) == 0x01402000)
727 int gr_k
= ((op
>> 25) & 0x3f);
729 /* Make sure that GRk is really an argument register; treat
730 it as a prologue instruction if so. */
731 if (is_argument_reg (gr_k
))
732 last_prologue_pc
= next_pc
;
735 /* To save multiple callee-saves register on the stack, at a
739 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
740 0 000000 1111111 111111 000000000000 = 0x01fff000
743 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
744 0 000000 1111111 111111 000000000000 = 0x01fff000
746 We treat this as part of the prologue, and record the register's
747 saved address in the frame structure. */
748 else if ((op
& 0x01fff000) == 0x014c1000
749 || (op
& 0x01fff000) == 0x01501000)
751 int gr_k
= ((op
>> 25) & 0x3f);
755 /* Is it a stdi or a stqi? */
756 if ((op
& 0x01fff000) == 0x014c1000)
761 /* Is it really a callee-saves register? */
762 if (is_callee_saves_reg (gr_k
))
764 /* Sign-extend the twelve-bit field.
765 (Isn't there a better way to do this?) */
766 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
768 for (i
= 0; i
< count
; i
++)
770 gr_saved
[gr_k
+ i
] = 1;
771 gr_sp_offset
[gr_k
+ i
] = s
+ (4 * i
);
773 last_prologue_pc
= next_pc
;
777 /* Storing any kind of integer register at any constant offset
778 from any other register.
781 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
782 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
785 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
786 0 000000 1111111 000000 000000000000 = 0x01fc0000
788 These could be almost anything, but a lot of prologue
789 instructions fall into this pattern, so let's decode the
790 instruction once, and then work at a higher level. */
791 else if (((op
& 0x01fc0fff) == 0x000c0080)
792 || ((op
& 0x01fc0000) == 0x01480000))
794 int gr_k
= ((op
>> 25) & 0x3f);
795 int gr_i
= ((op
>> 12) & 0x3f);
798 /* Are we storing with gr0 as an offset, or using an
800 if ((op
& 0x01fc0fff) == 0x000c0080)
803 offset
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
805 /* If the address isn't relative to the SP or FP, it's not a
806 prologue instruction. */
807 if (gr_i
!= sp_regnum
&& gr_i
!= fp_regnum
)
809 /* Do nothing; not a prologue instruction. */
812 /* Saving the old FP in the new frame (relative to the SP). */
813 else if (gr_k
== fp_regnum
&& gr_i
== sp_regnum
)
815 gr_saved
[fp_regnum
] = 1;
816 gr_sp_offset
[fp_regnum
] = offset
;
817 last_prologue_pc
= next_pc
;
820 /* Saving callee-saves register(s) on the stack, relative to
822 else if (gr_i
== sp_regnum
823 && is_callee_saves_reg (gr_k
))
826 if (gr_i
== sp_regnum
)
827 gr_sp_offset
[gr_k
] = offset
;
829 gr_sp_offset
[gr_k
] = offset
+ fp_offset
;
830 last_prologue_pc
= next_pc
;
833 /* Saving the scratch register holding the return address. */
834 else if (lr_save_reg
!= -1
835 && gr_k
== lr_save_reg
)
837 lr_saved_on_stack
= 1;
838 if (gr_i
== sp_regnum
)
839 lr_sp_offset
= offset
;
841 lr_sp_offset
= offset
+ fp_offset
;
842 last_prologue_pc
= next_pc
;
845 /* Spilling int-sized arguments to the stack. */
846 else if (is_argument_reg (gr_k
))
847 last_prologue_pc
= next_pc
;
852 if (next_frame
&& info
)
857 /* If we know the relationship between the stack and frame
858 pointers, record the addresses of the registers we noticed.
859 Note that we have to do this as a separate step at the end,
860 because instructions may save relative to the SP, but we need
861 their addresses relative to the FP. */
863 frame_unwind_unsigned_register (next_frame
, fp_regnum
, &this_base
);
865 frame_unwind_unsigned_register (next_frame
, sp_regnum
, &this_base
);
867 for (i
= 0; i
< 64; i
++)
869 info
->saved_regs
[i
].addr
= this_base
- fp_offset
+ gr_sp_offset
[i
];
871 info
->prev_sp
= this_base
- fp_offset
+ framesize
;
872 info
->base
= this_base
;
874 /* If LR was saved on the stack, record its location. */
875 if (lr_saved_on_stack
)
876 info
->saved_regs
[lr_regnum
].addr
= this_base
- fp_offset
+ lr_sp_offset
;
878 /* The call instruction moves the caller's PC in the callee's LR.
879 Since this is an unwind, do the reverse. Copy the location of LR
880 into PC (the address / regnum) so that a request for PC will be
881 converted into a request for the LR. */
882 info
->saved_regs
[pc_regnum
] = info
->saved_regs
[lr_regnum
];
884 /* Save the previous frame's computed SP value. */
885 trad_frame_set_value (info
->saved_regs
, sp_regnum
, info
->prev_sp
);
888 return last_prologue_pc
;
893 frv_skip_prologue (CORE_ADDR pc
)
895 CORE_ADDR func_addr
, func_end
, new_pc
;
899 /* If the line table has entry for a line *within* the function
900 (i.e., not in the prologue, and not past the end), then that's
902 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
904 struct symtab_and_line sal
;
906 sal
= find_pc_line (func_addr
, 0);
908 if (sal
.line
!= 0 && sal
.end
< func_end
)
914 /* The FR-V prologue is at least five instructions long (twenty bytes).
915 If we didn't find a real source location past that, then
916 do a full analysis of the prologue. */
917 if (new_pc
< pc
+ 20)
918 new_pc
= frv_analyze_prologue (pc
, 0, 0);
924 static struct frv_unwind_cache
*
925 frv_frame_unwind_cache (struct frame_info
*next_frame
,
926 void **this_prologue_cache
)
928 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
931 struct frv_unwind_cache
*info
;
933 if ((*this_prologue_cache
))
934 return (*this_prologue_cache
);
936 info
= FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache
);
937 (*this_prologue_cache
) = info
;
938 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
940 /* Prologue analysis does the rest... */
941 frv_analyze_prologue (frame_func_unwind (next_frame
), next_frame
, info
);
947 frv_extract_return_value (struct type
*type
, struct regcache
*regcache
,
950 int len
= TYPE_LENGTH (type
);
955 regcache_cooked_read_unsigned (regcache
, 8, &gpr8_val
);
956 store_unsigned_integer (valbuf
, len
, gpr8_val
);
961 regcache_cooked_read_unsigned (regcache
, 8, ®val
);
962 store_unsigned_integer (valbuf
, 4, regval
);
963 regcache_cooked_read_unsigned (regcache
, 9, ®val
);
964 store_unsigned_integer ((bfd_byte
*) valbuf
+ 4, 4, regval
);
967 internal_error (__FILE__
, __LINE__
, "Illegal return value length: %d", len
);
971 frv_extract_struct_value_address (struct regcache
*regcache
)
974 regcache_cooked_read_unsigned (regcache
, struct_return_regnum
, &addr
);
979 frv_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
981 write_register (struct_return_regnum
, addr
);
985 frv_frameless_function_invocation (struct frame_info
*frame
)
987 return legacy_frameless_look_for_prologue (frame
);
991 frv_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
993 /* Require dword alignment. */
994 return align_down (sp
, 8);
998 find_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR entry_point
)
1003 descr
= frv_fdpic_find_canonical_descriptor (entry_point
);
1008 /* Construct a non-canonical descriptor from space allocated on
1011 descr
= value_as_long (value_allocate_space_in_inferior (8));
1012 store_unsigned_integer (valbuf
, 4, entry_point
);
1013 write_memory (descr
, valbuf
, 4);
1014 store_unsigned_integer (valbuf
, 4,
1015 frv_fdpic_find_global_pointer (entry_point
));
1016 write_memory (descr
+ 4, valbuf
, 4);
1021 frv_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
1022 struct target_ops
*targ
)
1024 CORE_ADDR entry_point
;
1025 CORE_ADDR got_address
;
1027 entry_point
= get_target_memory_unsigned (targ
, addr
, 4);
1028 got_address
= get_target_memory_unsigned (targ
, addr
+ 4, 4);
1030 if (got_address
== frv_fdpic_find_global_pointer (entry_point
))
1037 frv_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1038 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1039 int nargs
, struct value
**args
, CORE_ADDR sp
,
1040 int struct_return
, CORE_ADDR struct_addr
)
1047 struct type
*arg_type
;
1049 enum type_code typecode
;
1053 enum frv_abi abi
= frv_abi (gdbarch
);
1056 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
1057 nargs
, (int) sp
, struct_return
, struct_addr
);
1061 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1062 stack_space
+= align_up (TYPE_LENGTH (VALUE_TYPE (args
[argnum
])), 4);
1064 stack_space
-= (6 * 4);
1065 if (stack_space
> 0)
1068 /* Make sure stack is dword aligned. */
1069 sp
= align_down (sp
, 8);
1076 regcache_cooked_write_unsigned (regcache
, struct_return_regnum
,
1079 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1082 arg_type
= check_typedef (VALUE_TYPE (arg
));
1083 len
= TYPE_LENGTH (arg_type
);
1084 typecode
= TYPE_CODE (arg_type
);
1086 if (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
)
1088 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (arg
));
1089 typecode
= TYPE_CODE_PTR
;
1093 else if (abi
== FRV_ABI_FDPIC
1095 && typecode
== TYPE_CODE_PTR
1096 && TYPE_CODE (TYPE_TARGET_TYPE (arg_type
)) == TYPE_CODE_FUNC
)
1098 /* The FDPIC ABI requires function descriptors to be passed instead
1100 store_unsigned_integer
1102 find_func_descr (gdbarch
,
1103 extract_unsigned_integer (VALUE_CONTENTS (arg
),
1105 typecode
= TYPE_CODE_PTR
;
1111 val
= (char *) VALUE_CONTENTS (arg
);
1116 int partial_len
= (len
< 4 ? len
: 4);
1120 regval
= extract_unsigned_integer (val
, partial_len
);
1122 printf(" Argnum %d data %x -> reg %d\n",
1123 argnum
, (int) regval
, argreg
);
1125 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1131 printf(" Argnum %d data %x -> offset %d (%x)\n",
1132 argnum
, *((int *)val
), stack_offset
, (int) (sp
+ stack_offset
));
1134 write_memory (sp
+ stack_offset
, val
, partial_len
);
1135 stack_offset
+= align_up (partial_len
, 4);
1142 /* Set the return address. For the frv, the return breakpoint is
1143 always at BP_ADDR. */
1144 regcache_cooked_write_unsigned (regcache
, lr_regnum
, bp_addr
);
1146 if (abi
== FRV_ABI_FDPIC
)
1148 /* Set the GOT register for the FDPIC ABI. */
1149 regcache_cooked_write_unsigned
1150 (regcache
, first_gpr_regnum
+ 15,
1151 frv_fdpic_find_global_pointer (func_addr
));
1154 /* Finally, update the SP register. */
1155 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
1161 frv_store_return_value (struct type
*type
, struct regcache
*regcache
,
1164 int len
= TYPE_LENGTH (type
);
1169 memset (val
, 0, sizeof (val
));
1170 memcpy (val
+ (4 - len
), valbuf
, len
);
1171 regcache_cooked_write (regcache
, 8, val
);
1175 regcache_cooked_write (regcache
, 8, valbuf
);
1176 regcache_cooked_write (regcache
, 9, (bfd_byte
*) valbuf
+ 4);
1179 internal_error (__FILE__
, __LINE__
,
1180 "Don't know how to return a %d-byte value.", len
);
1184 /* Hardware watchpoint / breakpoint support for the FR500
1188 frv_check_watch_resources (int type
, int cnt
, int ot
)
1190 struct gdbarch_tdep
*var
= CURRENT_VARIANT
;
1192 /* Watchpoints not supported on simulator. */
1193 if (strcmp (target_shortname
, "sim") == 0)
1196 if (type
== bp_hardware_breakpoint
)
1198 if (var
->num_hw_breakpoints
== 0)
1200 else if (cnt
<= var
->num_hw_breakpoints
)
1205 if (var
->num_hw_watchpoints
== 0)
1209 else if (cnt
<= var
->num_hw_watchpoints
)
1217 frv_stopped_data_address (void)
1219 CORE_ADDR brr
, dbar0
, dbar1
, dbar2
, dbar3
;
1221 brr
= read_register (brr_regnum
);
1222 dbar0
= read_register (dbar0_regnum
);
1223 dbar1
= read_register (dbar1_regnum
);
1224 dbar2
= read_register (dbar2_regnum
);
1225 dbar3
= read_register (dbar3_regnum
);
1229 else if (brr
& (1<<10))
1231 else if (brr
& (1<<9))
1233 else if (brr
& (1<<8))
1240 frv_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1242 return frame_unwind_register_unsigned (next_frame
, pc_regnum
);
1245 /* Given a GDB frame, determine the address of the calling function's
1246 frame. This will be used to create a new GDB frame struct. */
1249 frv_frame_this_id (struct frame_info
*next_frame
,
1250 void **this_prologue_cache
, struct frame_id
*this_id
)
1252 struct frv_unwind_cache
*info
1253 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1256 struct minimal_symbol
*msym_stack
;
1259 /* The FUNC is easy. */
1260 func
= frame_func_unwind (next_frame
);
1262 /* Check if the stack is empty. */
1263 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
1264 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
1267 /* Hopefully the prologue analysis either correctly determined the
1268 frame's base (which is the SP from the previous frame), or set
1269 that base to "NULL". */
1270 base
= info
->prev_sp
;
1274 id
= frame_id_build (base
, func
);
1276 /* Check that we're not going round in circles with the same frame
1277 ID (but avoid applying the test to sentinel frames which do go
1278 round in circles). Can't use frame_id_eq() as that doesn't yet
1279 compare the frame's PC value. */
1280 if (frame_relative_level (next_frame
) >= 0
1281 && get_frame_type (next_frame
) != DUMMY_FRAME
1282 && frame_id_eq (get_frame_id (next_frame
), id
))
1289 frv_frame_prev_register (struct frame_info
*next_frame
,
1290 void **this_prologue_cache
,
1291 int regnum
, int *optimizedp
,
1292 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1293 int *realnump
, void *bufferp
)
1295 struct frv_unwind_cache
*info
1296 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1297 trad_frame_prev_register (next_frame
, info
->saved_regs
, regnum
,
1298 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
1301 static const struct frame_unwind frv_frame_unwind
= {
1304 frv_frame_prev_register
1307 static const struct frame_unwind
*
1308 frv_frame_sniffer (struct frame_info
*next_frame
)
1310 return &frv_frame_unwind
;
1314 frv_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1316 struct frv_unwind_cache
*info
1317 = frv_frame_unwind_cache (next_frame
, this_cache
);
1321 static const struct frame_base frv_frame_base
= {
1323 frv_frame_base_address
,
1324 frv_frame_base_address
,
1325 frv_frame_base_address
1329 frv_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1331 return frame_unwind_register_unsigned (next_frame
, sp_regnum
);
1335 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1336 dummy frame. The frame ID's base needs to match the TOS value
1337 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1340 static struct frame_id
1341 frv_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1343 return frame_id_build (frv_unwind_sp (gdbarch
, next_frame
),
1344 frame_pc_unwind (next_frame
));
1348 static struct gdbarch
*
1349 frv_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1351 struct gdbarch
*gdbarch
;
1352 struct gdbarch_tdep
*var
;
1355 /* Check to see if we've already built an appropriate architecture
1356 object for this executable. */
1357 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1359 return arches
->gdbarch
;
1361 /* Select the right tdep structure for this variant. */
1362 var
= new_variant ();
1363 switch (info
.bfd_arch_info
->mach
)
1366 case bfd_mach_frvsimple
:
1367 case bfd_mach_fr500
:
1368 case bfd_mach_frvtomcat
:
1369 case bfd_mach_fr550
:
1370 set_variant_num_gprs (var
, 64);
1371 set_variant_num_fprs (var
, 64);
1374 case bfd_mach_fr400
:
1375 case bfd_mach_fr450
:
1376 set_variant_num_gprs (var
, 32);
1377 set_variant_num_fprs (var
, 32);
1381 /* Never heard of this variant. */
1385 /* Extract the ELF flags, if available. */
1386 if (info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1387 elf_flags
= elf_elfheader (info
.abfd
)->e_flags
;
1389 if (elf_flags
& EF_FRV_FDPIC
)
1390 set_variant_abi_fdpic (var
);
1392 if (elf_flags
& EF_FRV_CPU_FR450
)
1393 set_variant_scratch_registers (var
);
1395 gdbarch
= gdbarch_alloc (&info
, var
);
1397 set_gdbarch_short_bit (gdbarch
, 16);
1398 set_gdbarch_int_bit (gdbarch
, 32);
1399 set_gdbarch_long_bit (gdbarch
, 32);
1400 set_gdbarch_long_long_bit (gdbarch
, 64);
1401 set_gdbarch_float_bit (gdbarch
, 32);
1402 set_gdbarch_double_bit (gdbarch
, 64);
1403 set_gdbarch_long_double_bit (gdbarch
, 64);
1404 set_gdbarch_ptr_bit (gdbarch
, 32);
1406 set_gdbarch_num_regs (gdbarch
, frv_num_regs
);
1407 set_gdbarch_num_pseudo_regs (gdbarch
, frv_num_pseudo_regs
);
1409 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
1410 set_gdbarch_deprecated_fp_regnum (gdbarch
, fp_regnum
);
1411 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
1413 set_gdbarch_register_name (gdbarch
, frv_register_name
);
1414 set_gdbarch_register_type (gdbarch
, frv_register_type
);
1415 set_gdbarch_register_sim_regno (gdbarch
, frv_register_sim_regno
);
1417 set_gdbarch_pseudo_register_read (gdbarch
, frv_pseudo_register_read
);
1418 set_gdbarch_pseudo_register_write (gdbarch
, frv_pseudo_register_write
);
1420 set_gdbarch_skip_prologue (gdbarch
, frv_skip_prologue
);
1421 set_gdbarch_breakpoint_from_pc (gdbarch
, frv_breakpoint_from_pc
);
1422 set_gdbarch_adjust_breakpoint_address (gdbarch
, frv_gdbarch_adjust_breakpoint_address
);
1424 set_gdbarch_deprecated_frameless_function_invocation (gdbarch
, frv_frameless_function_invocation
);
1426 set_gdbarch_use_struct_convention (gdbarch
, always_use_struct_convention
);
1427 set_gdbarch_extract_return_value (gdbarch
, frv_extract_return_value
);
1429 set_gdbarch_deprecated_store_struct_return (gdbarch
, frv_store_struct_return
);
1430 set_gdbarch_store_return_value (gdbarch
, frv_store_return_value
);
1431 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, frv_extract_struct_value_address
);
1434 set_gdbarch_unwind_pc (gdbarch
, frv_unwind_pc
);
1435 set_gdbarch_unwind_sp (gdbarch
, frv_unwind_sp
);
1436 set_gdbarch_frame_align (gdbarch
, frv_frame_align
);
1437 frame_unwind_append_sniffer (gdbarch
, frv_frame_sniffer
);
1438 frame_base_set_default (gdbarch
, &frv_frame_base
);
1440 /* Settings for calling functions in the inferior. */
1441 set_gdbarch_push_dummy_call (gdbarch
, frv_push_dummy_call
);
1442 set_gdbarch_unwind_dummy_id (gdbarch
, frv_unwind_dummy_id
);
1444 /* Settings that should be unnecessary. */
1445 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1447 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
1449 set_gdbarch_remote_translate_xfer_address
1450 (gdbarch
, generic_remote_translate_xfer_address
);
1452 /* Hardware watchpoint / breakpoint support. */
1453 switch (info
.bfd_arch_info
->mach
)
1456 case bfd_mach_frvsimple
:
1457 case bfd_mach_fr500
:
1458 case bfd_mach_frvtomcat
:
1459 /* fr500-style hardware debugging support. */
1460 var
->num_hw_watchpoints
= 4;
1461 var
->num_hw_breakpoints
= 4;
1464 case bfd_mach_fr400
:
1465 case bfd_mach_fr450
:
1466 /* fr400-style hardware debugging support. */
1467 var
->num_hw_watchpoints
= 2;
1468 var
->num_hw_breakpoints
= 4;
1472 /* Otherwise, assume we don't have hardware debugging support. */
1473 var
->num_hw_watchpoints
= 0;
1474 var
->num_hw_breakpoints
= 0;
1478 set_gdbarch_print_insn (gdbarch
, print_insn_frv
);
1479 if (frv_abi (gdbarch
) == FRV_ABI_FDPIC
)
1480 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
1481 frv_convert_from_func_ptr_addr
);
1487 _initialize_frv_tdep (void)
1489 register_gdbarch_init (bfd_arch_frv
, frv_gdbarch_init
);