gdb/gdbserver/linux-aarch32-low.c

   1 /* Copyright (C) 1995-2016 Free Software Foundation, Inc.
   2
   3    This file is part of GDB.
   4
   5    This program is free software; you can redistribute it and/or modify
   6    it under the terms of the GNU General Public License as published by
   7    the Free Software Foundation; either version 3 of the License, or
   8    (at your option) any later version.
   9
  10    This program is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13    GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  17
  18 #include "server.h"
  19 #include "arch/arm.h"
  20 #include "arch/arm-linux.h"
  21 #include "linux-low.h"
  22 #include "linux-aarch32-low.h"
  23
  24 #include <sys/ptrace.h>
  25 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
  26    On Bionic elf.h and linux/elf.h have conflicting definitions.  */
  27 #ifndef ELFMAG0
  28 #include <elf.h>
  29 #endif
  30
  31 /* Correct in either endianness.  */
  32 #define arm_abi_breakpoint 0xef9f0001UL
  33
  34 /* For new EABI binaries.  We recognize it regardless of which ABI
  35    is used for gdbserver, so single threaded debugging should work
  36    OK, but for multi-threaded debugging we only insert the current
  37    ABI's breakpoint instruction.  For now at least.  */
  38 #define arm_eabi_breakpoint 0xe7f001f0UL
  39
  40 #if (defined __ARM_EABI__ || defined __aarch64__)
  41 static const unsigned long arm_breakpoint = arm_eabi_breakpoint;
  42 #else
  43 static const unsigned long arm_breakpoint = arm_abi_breakpoint;
  44 #endif
  45
  46 #define arm_breakpoint_len 4
  47 static const unsigned short thumb_breakpoint = 0xde01;
  48 #define thumb_breakpoint_len 2
  49 static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 };
  50 #define thumb2_breakpoint_len 4
  51
  52 /* Some older versions of GNU/Linux and Android do not define
  53    the following macros.  */
  54 #ifndef NT_ARM_VFP
  55 #define NT_ARM_VFP 0x400
  56 #endif
  57
  58 /* Collect GP registers from REGCACHE to buffer BUF.  */
  59
  60 void
  61 arm_fill_gregset (struct regcache *regcache, void *buf)
  62 {
  63   int i;
  64   uint32_t *regs = (uint32_t *) buf;
  65
  66   for (i = ARM_A1_REGNUM; i <= ARM_PC_REGNUM; i++)
  67     collect_register (regcache, i, &regs[i]);
  68
  69   collect_register (regcache, ARM_PS_REGNUM, &regs[ARM_CPSR_GREGNUM]);
  70 }
  71
  72 /* Supply GP registers contents, stored in BUF, to REGCACHE.  */
  73
  74 void
  75 arm_store_gregset (struct regcache *regcache, const void *buf)
  76 {
  77   int i;
  78   char zerobuf[8];
  79   const uint32_t *regs = (const uint32_t *) buf;
  80
  81   memset (zerobuf, 0, 8);
  82   for (i = ARM_A1_REGNUM; i <= ARM_PC_REGNUM; i++)
  83     supply_register (regcache, i, &regs[i]);
  84
  85   for (; i < ARM_PS_REGNUM; i++)
  86     supply_register (regcache, i, zerobuf);
  87
  88   supply_register (regcache, ARM_PS_REGNUM, &regs[ARM_CPSR_GREGNUM]);
  89 }
  90
  91 /* Collect NUM number of VFP registers from REGCACHE to buffer BUF.  */
  92
  93 void
  94 arm_fill_vfpregset_num (struct regcache *regcache, void *buf, int num)
  95 {
  96   int i, base;
  97
  98   gdb_assert (num == 16 || num == 32);
  99
 100   base = find_regno (regcache->tdesc, "d0");
 101   for (i = 0; i < num; i++)
 102     collect_register (regcache, base + i, (char *) buf + i * 8);
 103
 104   collect_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
 105 }
 106
 107 /* Supply NUM number of VFP registers contents, stored in BUF, to
 108    REGCACHE.  */
 109
 110 void
 111 arm_store_vfpregset_num (struct regcache *regcache, const void *buf, int num)
 112 {
 113   int i, base;
 114
 115   gdb_assert (num == 16 || num == 32);
 116
 117   base = find_regno (regcache->tdesc, "d0");
 118   for (i = 0; i < num; i++)
 119     supply_register (regcache, base + i, (char *) buf + i * 8);
 120
 121   supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
 122 }
 123
 124 static void
 125 arm_fill_vfpregset (struct regcache *regcache, void *buf)
 126 {
 127   arm_fill_vfpregset_num (regcache, buf, 32);
 128 }
 129
 130 static void
 131 arm_store_vfpregset (struct regcache *regcache, const void *buf)
 132 {
 133   arm_store_vfpregset_num (regcache, buf, 32);
 134 }
 135
 136 /* Register sets with using PTRACE_GETREGSET.  */
 137
 138 static struct regset_info aarch32_regsets[] = {
 139   { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS, 18 * 4,
 140     GENERAL_REGS,
 141     arm_fill_gregset, arm_store_gregset },
 142   { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_ARM_VFP, 32 * 8 + 4,
 143     EXTENDED_REGS,
 144     arm_fill_vfpregset, arm_store_vfpregset },
 145   NULL_REGSET
 146 };
 147
 148 static struct regsets_info aarch32_regsets_info =
 149   {
 150     aarch32_regsets, /* regsets */
 151     0, /* num_regsets */
 152     NULL, /* disabled_regsets */
 153   };
 154
 155 struct regs_info regs_info_aarch32 =
 156   {
 157     NULL, /* regset_bitmap */
 158     NULL, /* usrregs */
 159     &aarch32_regsets_info
 160   };
 161
 162 /* Returns 1 if the current instruction set is thumb, 0 otherwise.  */
 163
 164 int
 165 arm_is_thumb_mode (void)
 166 {
 167   struct regcache *regcache = get_thread_regcache (current_thread, 1);
 168   unsigned long cpsr;
 169
 170   collect_register_by_name (regcache, "cpsr", &cpsr);
 171
 172   if (cpsr & 0x20)
 173     return 1;
 174   else
 175     return 0;
 176 }
 177
 178 /* Returns 1 if there is a software breakpoint at location.  */
 179
 180 int
 181 arm_breakpoint_at (CORE_ADDR where)
 182 {
 183   if (arm_is_thumb_mode ())
 184     {
 185       /* Thumb mode.  */
 186       unsigned short insn;
 187
 188       (*the_target->read_memory) (where, (unsigned char *) &insn, 2);
 189       if (insn == thumb_breakpoint)
 190         return 1;
 191
 192       if (insn == thumb2_breakpoint[0])
 193         {
 194           (*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2);
 195           if (insn == thumb2_breakpoint[1])
 196             return 1;
 197         }
 198     }
 199   else
 200     {
 201       /* ARM mode.  */
 202       unsigned long insn;
 203
 204       (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
 205       if (insn == arm_abi_breakpoint)
 206         return 1;
 207
 208       if (insn == arm_eabi_breakpoint)
 209         return 1;
 210     }
 211
 212   return 0;
 213 }
 214
 215 /* Enum describing the different kinds of breakpoints.  */
 216 enum arm_breakpoint_kinds
 217 {
 218    ARM_BP_KIND_THUMB = 2,
 219    ARM_BP_KIND_THUMB2 = 3,
 220    ARM_BP_KIND_ARM = 4,
 221 };
 222
 223 /* Implementation of linux_target_ops method "breakpoint_kind_from_pc".
 224
 225    Determine the type and size of breakpoint to insert at PCPTR.  Uses the
 226    program counter value to determine whether a 16-bit or 32-bit breakpoint
 227    should be used.  It returns the breakpoint's kind, and adjusts the program
 228    counter (if necessary) to point to the actual memory location where the
 229    breakpoint should be inserted.  */
 230
 231 int
 232 arm_breakpoint_kind_from_pc (CORE_ADDR *pcptr)
 233 {
 234   if (IS_THUMB_ADDR (*pcptr))
 235     {
 236       gdb_byte buf[2];
 237
 238       *pcptr = UNMAKE_THUMB_ADDR (*pcptr);
 239
 240       /* Check whether we are replacing a thumb2 32-bit instruction.  */
 241       if ((*the_target->read_memory) (*pcptr, buf, 2) == 0)
 242         {
 243           unsigned short inst1 = 0;
 244
 245           (*the_target->read_memory) (*pcptr, (gdb_byte *) &inst1, 2);
 246           if (thumb_insn_size (inst1) == 4)
 247             return ARM_BP_KIND_THUMB2;
 248         }
 249       return ARM_BP_KIND_THUMB;
 250     }
 251   else
 252     return ARM_BP_KIND_ARM;
 253 }
 254
 255 /*  Implementation of the linux_target_ops method "sw_breakpoint_from_kind".  */
 256
 257 const gdb_byte *
 258 arm_sw_breakpoint_from_kind (int kind , int *size)
 259 {
 260   *size = arm_breakpoint_len;
 261   /* Define an ARM-mode breakpoint; we only set breakpoints in the C
 262      library, which is most likely to be ARM.  If the kernel supports
 263      clone events, we will never insert a breakpoint, so even a Thumb
 264      C library will work; so will mixing EABI/non-EABI gdbserver and
 265      application.  */
 266   switch (kind)
 267     {
 268       case ARM_BP_KIND_THUMB:
 269         *size = thumb_breakpoint_len;
 270         return (gdb_byte *) &thumb_breakpoint;
 271       case ARM_BP_KIND_THUMB2:
 272         *size = thumb2_breakpoint_len;
 273         return (gdb_byte *) &thumb2_breakpoint;
 274       case ARM_BP_KIND_ARM:
 275         *size = arm_breakpoint_len;
 276         return (const gdb_byte *) &arm_breakpoint;
 277       default:
 278        return NULL;
 279     }
 280   return NULL;
 281 }
 282
 283 /* Implementation of the linux_target_ops method
 284    "breakpoint_kind_from_current_state".  */
 285
 286 int
 287 arm_breakpoint_kind_from_current_state (CORE_ADDR *pcptr)
 288 {
 289   if (arm_is_thumb_mode ())
 290     {
 291       *pcptr = MAKE_THUMB_ADDR (*pcptr);
 292       return arm_breakpoint_kind_from_pc (pcptr);
 293     }
 294   else
 295     {
 296       return arm_breakpoint_kind_from_pc (pcptr);
 297     }
 298 }
 299
 300 void
 301 initialize_low_arch_aarch32 (void)
 302 {
 303   init_registers_arm_with_neon ();
 304
 305   initialize_regsets_info (&aarch32_regsets_info);
 306 }