Refactor the breakpoint definitions in linux-arm-low.c.
[deliverable/binutils-gdb.git] / gdb / gdbserver / linux-arm-low.c
1 /* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2015 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19 #include "server.h"
20 #include "linux-low.h"
21 #include "arch/arm.h"
22 #include "linux-aarch32-low.h"
23
24 #include <sys/uio.h>
25 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
26 On Bionic elf.h and linux/elf.h have conflicting definitions. */
27 #ifndef ELFMAG0
28 #include <elf.h>
29 #endif
30 #include "nat/gdb_ptrace.h"
31 #include <signal.h>
32
33 #include "arch/arm.h"
34
35 /* Defined in auto-generated files. */
36 void init_registers_arm (void);
37 extern const struct target_desc *tdesc_arm;
38
39 void init_registers_arm_with_iwmmxt (void);
40 extern const struct target_desc *tdesc_arm_with_iwmmxt;
41
42 void init_registers_arm_with_vfpv2 (void);
43 extern const struct target_desc *tdesc_arm_with_vfpv2;
44
45 void init_registers_arm_with_vfpv3 (void);
46 extern const struct target_desc *tdesc_arm_with_vfpv3;
47
48 #ifndef PTRACE_GET_THREAD_AREA
49 #define PTRACE_GET_THREAD_AREA 22
50 #endif
51
52 #ifndef PTRACE_GETWMMXREGS
53 # define PTRACE_GETWMMXREGS 18
54 # define PTRACE_SETWMMXREGS 19
55 #endif
56
57 #ifndef PTRACE_GETVFPREGS
58 # define PTRACE_GETVFPREGS 27
59 # define PTRACE_SETVFPREGS 28
60 #endif
61
62 #ifndef PTRACE_GETHBPREGS
63 #define PTRACE_GETHBPREGS 29
64 #define PTRACE_SETHBPREGS 30
65 #endif
66
67 /* Information describing the hardware breakpoint capabilities. */
68 static struct
69 {
70 unsigned char arch;
71 unsigned char max_wp_length;
72 unsigned char wp_count;
73 unsigned char bp_count;
74 } arm_linux_hwbp_cap;
75
76 /* Enum describing the different types of ARM hardware break-/watch-points. */
77 typedef enum
78 {
79 arm_hwbp_break = 0,
80 arm_hwbp_load = 1,
81 arm_hwbp_store = 2,
82 arm_hwbp_access = 3
83 } arm_hwbp_type;
84
85 /* Enum describing the different kinds of breakpoints. */
86 enum arm_breakpoint_kinds
87 {
88 ARM_BP_KIND_THUMB = 2,
89 ARM_BP_KIND_THUMB2 = 3,
90 ARM_BP_KIND_ARM = 4,
91 };
92
93 /* Type describing an ARM Hardware Breakpoint Control register value. */
94 typedef unsigned int arm_hwbp_control_t;
95
96 /* Structure used to keep track of hardware break-/watch-points. */
97 struct arm_linux_hw_breakpoint
98 {
99 /* Address to break on, or being watched. */
100 unsigned int address;
101 /* Control register for break-/watch- point. */
102 arm_hwbp_control_t control;
103 };
104
105 /* Since we cannot dynamically allocate subfields of arch_process_info,
106 assume a maximum number of supported break-/watchpoints. */
107 #define MAX_BPTS 32
108 #define MAX_WPTS 32
109
110 /* Per-process arch-specific data we want to keep. */
111 struct arch_process_info
112 {
113 /* Hardware breakpoints for this process. */
114 struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
115 /* Hardware watchpoints for this process. */
116 struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
117 };
118
119 /* Per-thread arch-specific data we want to keep. */
120 struct arch_lwp_info
121 {
122 /* Non-zero if our copy differs from what's recorded in the thread. */
123 char bpts_changed[MAX_BPTS];
124 char wpts_changed[MAX_WPTS];
125 /* Cached stopped data address. */
126 CORE_ADDR stopped_data_address;
127 };
128
129 /* These are in <asm/elf.h> in current kernels. */
130 #define HWCAP_VFP 64
131 #define HWCAP_IWMMXT 512
132 #define HWCAP_NEON 4096
133 #define HWCAP_VFPv3 8192
134 #define HWCAP_VFPv3D16 16384
135
136 #ifdef HAVE_SYS_REG_H
137 #include <sys/reg.h>
138 #endif
139
140 #define arm_num_regs 26
141
142 static int arm_regmap[] = {
143 0, 4, 8, 12, 16, 20, 24, 28,
144 32, 36, 40, 44, 48, 52, 56, 60,
145 -1, -1, -1, -1, -1, -1, -1, -1, -1,
146 64
147 };
148
149 static int
150 arm_cannot_store_register (int regno)
151 {
152 return (regno >= arm_num_regs);
153 }
154
155 static int
156 arm_cannot_fetch_register (int regno)
157 {
158 return (regno >= arm_num_regs);
159 }
160
161 static void
162 arm_fill_wmmxregset (struct regcache *regcache, void *buf)
163 {
164 int i;
165
166 if (regcache->tdesc != tdesc_arm_with_iwmmxt)
167 return;
168
169 for (i = 0; i < 16; i++)
170 collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
171
172 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
173 for (i = 0; i < 6; i++)
174 collect_register (regcache, arm_num_regs + i + 16,
175 (char *) buf + 16 * 8 + i * 4);
176 }
177
178 static void
179 arm_store_wmmxregset (struct regcache *regcache, const void *buf)
180 {
181 int i;
182
183 if (regcache->tdesc != tdesc_arm_with_iwmmxt)
184 return;
185
186 for (i = 0; i < 16; i++)
187 supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
188
189 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
190 for (i = 0; i < 6; i++)
191 supply_register (regcache, arm_num_regs + i + 16,
192 (char *) buf + 16 * 8 + i * 4);
193 }
194
195 static void
196 arm_fill_vfpregset (struct regcache *regcache, void *buf)
197 {
198 int num;
199
200 if (regcache->tdesc == tdesc_arm_with_neon
201 || regcache->tdesc == tdesc_arm_with_vfpv3)
202 num = 32;
203 else if (regcache->tdesc == tdesc_arm_with_vfpv2)
204 num = 16;
205 else
206 return;
207
208 arm_fill_vfpregset_num (regcache, buf, num);
209 }
210
211 static void
212 arm_store_vfpregset (struct regcache *regcache, const void *buf)
213 {
214 int num;
215
216 if (regcache->tdesc == tdesc_arm_with_neon
217 || regcache->tdesc == tdesc_arm_with_vfpv3)
218 num = 32;
219 else if (regcache->tdesc == tdesc_arm_with_vfpv2)
220 num = 16;
221 else
222 return;
223
224 arm_store_vfpregset_num (regcache, buf, num);
225 }
226
227 extern int debug_threads;
228
229 static CORE_ADDR
230 arm_get_pc (struct regcache *regcache)
231 {
232 unsigned long pc;
233 collect_register_by_name (regcache, "pc", &pc);
234 if (debug_threads)
235 debug_printf ("stop pc is %08lx\n", pc);
236 return pc;
237 }
238
239 static void
240 arm_set_pc (struct regcache *regcache, CORE_ADDR pc)
241 {
242 unsigned long newpc = pc;
243 supply_register_by_name (regcache, "pc", &newpc);
244 }
245
246 /* Correct in either endianness. */
247 #define arm_abi_breakpoint 0xef9f0001UL
248
249 /* For new EABI binaries. We recognize it regardless of which ABI
250 is used for gdbserver, so single threaded debugging should work
251 OK, but for multi-threaded debugging we only insert the current
252 ABI's breakpoint instruction. For now at least. */
253 #define arm_eabi_breakpoint 0xe7f001f0UL
254
255 #ifndef __ARM_EABI__
256 static const unsigned long arm_breakpoint = arm_abi_breakpoint;
257 #else
258 static const unsigned long arm_breakpoint = arm_eabi_breakpoint;
259 #endif
260
261 #define arm_breakpoint_len 4
262 static const unsigned short thumb_breakpoint = 0xde01;
263 #define thumb_breakpoint_len 2
264 static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 };
265 #define thumb2_breakpoint_len 4
266
267 static int
268 arm_breakpoint_at (CORE_ADDR where)
269 {
270 struct regcache *regcache = get_thread_regcache (current_thread, 1);
271 unsigned long cpsr;
272
273 collect_register_by_name (regcache, "cpsr", &cpsr);
274
275 if (cpsr & 0x20)
276 {
277 /* Thumb mode. */
278 unsigned short insn;
279
280 (*the_target->read_memory) (where, (unsigned char *) &insn, 2);
281 if (insn == thumb_breakpoint)
282 return 1;
283
284 if (insn == thumb2_breakpoint[0])
285 {
286 (*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2);
287 if (insn == thumb2_breakpoint[1])
288 return 1;
289 }
290 }
291 else
292 {
293 /* ARM mode. */
294 unsigned long insn;
295
296 (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
297 if (insn == arm_abi_breakpoint)
298 return 1;
299
300 if (insn == arm_eabi_breakpoint)
301 return 1;
302 }
303
304 return 0;
305 }
306
307 /* We only place breakpoints in empty marker functions, and thread locking
308 is outside of the function. So rather than importing software single-step,
309 we can just run until exit. */
310 static CORE_ADDR
311 arm_reinsert_addr (void)
312 {
313 struct regcache *regcache = get_thread_regcache (current_thread, 1);
314 unsigned long pc;
315 collect_register_by_name (regcache, "lr", &pc);
316 return pc;
317 }
318
319 /* Fetch the thread-local storage pointer for libthread_db. */
320
321 ps_err_e
322 ps_get_thread_area (const struct ps_prochandle *ph,
323 lwpid_t lwpid, int idx, void **base)
324 {
325 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
326 return PS_ERR;
327
328 /* IDX is the bias from the thread pointer to the beginning of the
329 thread descriptor. It has to be subtracted due to implementation
330 quirks in libthread_db. */
331 *base = (void *) ((char *)*base - idx);
332
333 return PS_OK;
334 }
335
336
337 /* Query Hardware Breakpoint information for the target we are attached to
338 (using PID as ptrace argument) and set up arm_linux_hwbp_cap. */
339 static void
340 arm_linux_init_hwbp_cap (int pid)
341 {
342 unsigned int val;
343
344 if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
345 return;
346
347 arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
348 if (arm_linux_hwbp_cap.arch == 0)
349 return;
350
351 arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
352 arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
353 arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
354
355 if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
356 internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
357 if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
358 internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
359 }
360
361 /* How many hardware breakpoints are available? */
362 static int
363 arm_linux_get_hw_breakpoint_count (void)
364 {
365 return arm_linux_hwbp_cap.bp_count;
366 }
367
368 /* How many hardware watchpoints are available? */
369 static int
370 arm_linux_get_hw_watchpoint_count (void)
371 {
372 return arm_linux_hwbp_cap.wp_count;
373 }
374
375 /* Maximum length of area watched by hardware watchpoint. */
376 static int
377 arm_linux_get_hw_watchpoint_max_length (void)
378 {
379 return arm_linux_hwbp_cap.max_wp_length;
380 }
381
382 /* Initialize an ARM hardware break-/watch-point control register value.
383 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
384 type of break-/watch-point; ENABLE indicates whether the point is enabled.
385 */
386 static arm_hwbp_control_t
387 arm_hwbp_control_initialize (unsigned byte_address_select,
388 arm_hwbp_type hwbp_type,
389 int enable)
390 {
391 gdb_assert ((byte_address_select & ~0xffU) == 0);
392 gdb_assert (hwbp_type != arm_hwbp_break
393 || ((byte_address_select & 0xfU) != 0));
394
395 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
396 }
397
398 /* Does the breakpoint control value CONTROL have the enable bit set? */
399 static int
400 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
401 {
402 return control & 0x1;
403 }
404
405 /* Is the breakpoint control value CONTROL initialized? */
406 static int
407 arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
408 {
409 return control != 0;
410 }
411
412 /* Change a breakpoint control word so that it is in the disabled state. */
413 static arm_hwbp_control_t
414 arm_hwbp_control_disable (arm_hwbp_control_t control)
415 {
416 return control & ~0x1;
417 }
418
419 /* Are two break-/watch-points equal? */
420 static int
421 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
422 const struct arm_linux_hw_breakpoint *p2)
423 {
424 return p1->address == p2->address && p1->control == p2->control;
425 }
426
427 /* Convert a raw breakpoint type to an enum arm_hwbp_type. */
428
429 static int
430 raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
431 {
432 switch (raw_type)
433 {
434 case raw_bkpt_type_hw:
435 return arm_hwbp_break;
436 case raw_bkpt_type_write_wp:
437 return arm_hwbp_store;
438 case raw_bkpt_type_read_wp:
439 return arm_hwbp_load;
440 case raw_bkpt_type_access_wp:
441 return arm_hwbp_access;
442 default:
443 gdb_assert_not_reached ("unhandled raw type");
444 }
445 }
446
447 /* Initialize the hardware breakpoint structure P for a breakpoint or
448 watchpoint at ADDR to LEN. The type of watchpoint is given in TYPE.
449 Returns -1 if TYPE is unsupported, or -2 if the particular combination
450 of ADDR and LEN cannot be implemented. Otherwise, returns 0 if TYPE
451 represents a breakpoint and 1 if type represents a watchpoint. */
452 static int
453 arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
454 int len, struct arm_linux_hw_breakpoint *p)
455 {
456 arm_hwbp_type hwbp_type;
457 unsigned mask;
458
459 hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
460
461 if (hwbp_type == arm_hwbp_break)
462 {
463 /* For breakpoints, the length field encodes the mode. */
464 switch (len)
465 {
466 case 2: /* 16-bit Thumb mode breakpoint */
467 case 3: /* 32-bit Thumb mode breakpoint */
468 mask = 0x3;
469 addr &= ~1;
470 break;
471 case 4: /* 32-bit ARM mode breakpoint */
472 mask = 0xf;
473 addr &= ~3;
474 break;
475 default:
476 /* Unsupported. */
477 return -2;
478 }
479 }
480 else
481 {
482 CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
483 CORE_ADDR aligned_addr;
484
485 /* Can not set watchpoints for zero or negative lengths. */
486 if (len <= 0)
487 return -2;
488 /* The current ptrace interface can only handle watchpoints that are a
489 power of 2. */
490 if ((len & (len - 1)) != 0)
491 return -2;
492
493 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
494 range covered by a watchpoint. */
495 aligned_addr = addr & ~(max_wp_length - 1);
496 if (aligned_addr + max_wp_length < addr + len)
497 return -2;
498
499 mask = (1 << len) - 1;
500 }
501
502 p->address = (unsigned int) addr;
503 p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
504
505 return hwbp_type != arm_hwbp_break;
506 }
507
508 /* Callback to mark a watch-/breakpoint to be updated in all threads of
509 the current process. */
510
511 struct update_registers_data
512 {
513 int watch;
514 int i;
515 };
516
517 static int
518 update_registers_callback (struct inferior_list_entry *entry, void *arg)
519 {
520 struct thread_info *thread = (struct thread_info *) entry;
521 struct lwp_info *lwp = get_thread_lwp (thread);
522 struct update_registers_data *data = (struct update_registers_data *) arg;
523
524 /* Only update the threads of the current process. */
525 if (pid_of (thread) == pid_of (current_thread))
526 {
527 /* The actual update is done later just before resuming the lwp,
528 we just mark that the registers need updating. */
529 if (data->watch)
530 lwp->arch_private->wpts_changed[data->i] = 1;
531 else
532 lwp->arch_private->bpts_changed[data->i] = 1;
533
534 /* If the lwp isn't stopped, force it to momentarily pause, so
535 we can update its breakpoint registers. */
536 if (!lwp->stopped)
537 linux_stop_lwp (lwp);
538 }
539
540 return 0;
541 }
542
543 static int
544 arm_supports_z_point_type (char z_type)
545 {
546 switch (z_type)
547 {
548 case Z_PACKET_HW_BP:
549 case Z_PACKET_WRITE_WP:
550 case Z_PACKET_READ_WP:
551 case Z_PACKET_ACCESS_WP:
552 return 1;
553 default:
554 /* Leave the handling of sw breakpoints with the gdb client. */
555 return 0;
556 }
557 }
558
559 /* Insert hardware break-/watchpoint. */
560 static int
561 arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
562 int len, struct raw_breakpoint *bp)
563 {
564 struct process_info *proc = current_process ();
565 struct arm_linux_hw_breakpoint p, *pts;
566 int watch, i, count;
567
568 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
569 if (watch < 0)
570 {
571 /* Unsupported. */
572 return watch == -1 ? 1 : -1;
573 }
574
575 if (watch)
576 {
577 count = arm_linux_get_hw_watchpoint_count ();
578 pts = proc->priv->arch_private->wpts;
579 }
580 else
581 {
582 count = arm_linux_get_hw_breakpoint_count ();
583 pts = proc->priv->arch_private->bpts;
584 }
585
586 for (i = 0; i < count; i++)
587 if (!arm_hwbp_control_is_enabled (pts[i].control))
588 {
589 struct update_registers_data data = { watch, i };
590 pts[i] = p;
591 find_inferior (&all_threads, update_registers_callback, &data);
592 return 0;
593 }
594
595 /* We're out of watchpoints. */
596 return -1;
597 }
598
599 /* Remove hardware break-/watchpoint. */
600 static int
601 arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
602 int len, struct raw_breakpoint *bp)
603 {
604 struct process_info *proc = current_process ();
605 struct arm_linux_hw_breakpoint p, *pts;
606 int watch, i, count;
607
608 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
609 if (watch < 0)
610 {
611 /* Unsupported. */
612 return -1;
613 }
614
615 if (watch)
616 {
617 count = arm_linux_get_hw_watchpoint_count ();
618 pts = proc->priv->arch_private->wpts;
619 }
620 else
621 {
622 count = arm_linux_get_hw_breakpoint_count ();
623 pts = proc->priv->arch_private->bpts;
624 }
625
626 for (i = 0; i < count; i++)
627 if (arm_linux_hw_breakpoint_equal (&p, pts + i))
628 {
629 struct update_registers_data data = { watch, i };
630 pts[i].control = arm_hwbp_control_disable (pts[i].control);
631 find_inferior (&all_threads, update_registers_callback, &data);
632 return 0;
633 }
634
635 /* No watchpoint matched. */
636 return -1;
637 }
638
639 /* Return whether current thread is stopped due to a watchpoint. */
640 static int
641 arm_stopped_by_watchpoint (void)
642 {
643 struct lwp_info *lwp = get_thread_lwp (current_thread);
644 siginfo_t siginfo;
645
646 /* We must be able to set hardware watchpoints. */
647 if (arm_linux_get_hw_watchpoint_count () == 0)
648 return 0;
649
650 /* Retrieve siginfo. */
651 errno = 0;
652 ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
653 if (errno != 0)
654 return 0;
655
656 /* This must be a hardware breakpoint. */
657 if (siginfo.si_signo != SIGTRAP
658 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
659 return 0;
660
661 /* If we are in a positive slot then we're looking at a breakpoint and not
662 a watchpoint. */
663 if (siginfo.si_errno >= 0)
664 return 0;
665
666 /* Cache stopped data address for use by arm_stopped_data_address. */
667 lwp->arch_private->stopped_data_address
668 = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
669
670 return 1;
671 }
672
673 /* Return data address that triggered watchpoint. Called only if
674 arm_stopped_by_watchpoint returned true. */
675 static CORE_ADDR
676 arm_stopped_data_address (void)
677 {
678 struct lwp_info *lwp = get_thread_lwp (current_thread);
679 return lwp->arch_private->stopped_data_address;
680 }
681
682 /* Called when a new process is created. */
683 static struct arch_process_info *
684 arm_new_process (void)
685 {
686 struct arch_process_info *info = XCNEW (struct arch_process_info);
687 return info;
688 }
689
690 /* Called when a new thread is detected. */
691 static void
692 arm_new_thread (struct lwp_info *lwp)
693 {
694 struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
695 int i;
696
697 for (i = 0; i < MAX_BPTS; i++)
698 info->bpts_changed[i] = 1;
699 for (i = 0; i < MAX_WPTS; i++)
700 info->wpts_changed[i] = 1;
701
702 lwp->arch_private = info;
703 }
704
705 static void
706 arm_new_fork (struct process_info *parent, struct process_info *child)
707 {
708 struct arch_process_info *parent_proc_info = parent->priv->arch_private;
709 struct arch_process_info *child_proc_info = child->priv->arch_private;
710 struct lwp_info *child_lwp;
711 struct arch_lwp_info *child_lwp_info;
712 int i;
713
714 /* These are allocated by linux_add_process. */
715 gdb_assert (parent->priv != NULL
716 && parent->priv->arch_private != NULL);
717 gdb_assert (child->priv != NULL
718 && child->priv->arch_private != NULL);
719
720 /* Linux kernel before 2.6.33 commit
721 72f674d203cd230426437cdcf7dd6f681dad8b0d
722 will inherit hardware debug registers from parent
723 on fork/vfork/clone. Newer Linux kernels create such tasks with
724 zeroed debug registers.
725
726 GDB core assumes the child inherits the watchpoints/hw
727 breakpoints of the parent, and will remove them all from the
728 forked off process. Copy the debug registers mirrors into the
729 new process so that all breakpoints and watchpoints can be
730 removed together. The debug registers mirror will become zeroed
731 in the end before detaching the forked off process, thus making
732 this compatible with older Linux kernels too. */
733
734 *child_proc_info = *parent_proc_info;
735
736 /* Mark all the hardware breakpoints and watchpoints as changed to
737 make sure that the registers will be updated. */
738 child_lwp = find_lwp_pid (ptid_of (child));
739 child_lwp_info = child_lwp->arch_private;
740 for (i = 0; i < MAX_BPTS; i++)
741 child_lwp_info->bpts_changed[i] = 1;
742 for (i = 0; i < MAX_WPTS; i++)
743 child_lwp_info->wpts_changed[i] = 1;
744 }
745
746 /* Called when resuming a thread.
747 If the debug regs have changed, update the thread's copies. */
748 static void
749 arm_prepare_to_resume (struct lwp_info *lwp)
750 {
751 struct thread_info *thread = get_lwp_thread (lwp);
752 int pid = lwpid_of (thread);
753 struct process_info *proc = find_process_pid (pid_of (thread));
754 struct arch_process_info *proc_info = proc->priv->arch_private;
755 struct arch_lwp_info *lwp_info = lwp->arch_private;
756 int i;
757
758 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
759 if (lwp_info->bpts_changed[i])
760 {
761 errno = 0;
762
763 if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
764 if (ptrace (PTRACE_SETHBPREGS, pid,
765 (PTRACE_TYPE_ARG3) ((i << 1) + 1),
766 &proc_info->bpts[i].address) < 0)
767 perror_with_name ("Unexpected error setting breakpoint address");
768
769 if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
770 if (ptrace (PTRACE_SETHBPREGS, pid,
771 (PTRACE_TYPE_ARG3) ((i << 1) + 2),
772 &proc_info->bpts[i].control) < 0)
773 perror_with_name ("Unexpected error setting breakpoint");
774
775 lwp_info->bpts_changed[i] = 0;
776 }
777
778 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
779 if (lwp_info->wpts_changed[i])
780 {
781 errno = 0;
782
783 if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
784 if (ptrace (PTRACE_SETHBPREGS, pid,
785 (PTRACE_TYPE_ARG3) -((i << 1) + 1),
786 &proc_info->wpts[i].address) < 0)
787 perror_with_name ("Unexpected error setting watchpoint address");
788
789 if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
790 if (ptrace (PTRACE_SETHBPREGS, pid,
791 (PTRACE_TYPE_ARG3) -((i << 1) + 2),
792 &proc_info->wpts[i].control) < 0)
793 perror_with_name ("Unexpected error setting watchpoint");
794
795 lwp_info->wpts_changed[i] = 0;
796 }
797 }
798
799
800 static int
801 arm_get_hwcap (unsigned long *valp)
802 {
803 unsigned char *data = alloca (8);
804 int offset = 0;
805
806 while ((*the_target->read_auxv) (offset, data, 8) == 8)
807 {
808 unsigned int *data_p = (unsigned int *)data;
809 if (data_p[0] == AT_HWCAP)
810 {
811 *valp = data_p[1];
812 return 1;
813 }
814
815 offset += 8;
816 }
817
818 *valp = 0;
819 return 0;
820 }
821
822 static const struct target_desc *
823 arm_read_description (void)
824 {
825 int pid = lwpid_of (current_thread);
826 unsigned long arm_hwcap = 0;
827
828 /* Query hardware watchpoint/breakpoint capabilities. */
829 arm_linux_init_hwbp_cap (pid);
830
831 if (arm_get_hwcap (&arm_hwcap) == 0)
832 return tdesc_arm;
833
834 if (arm_hwcap & HWCAP_IWMMXT)
835 return tdesc_arm_with_iwmmxt;
836
837 if (arm_hwcap & HWCAP_VFP)
838 {
839 const struct target_desc *result;
840 char *buf;
841
842 /* NEON implies either no VFP, or VFPv3-D32. We only support
843 it with VFP. */
844 if (arm_hwcap & HWCAP_NEON)
845 result = tdesc_arm_with_neon;
846 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
847 result = tdesc_arm_with_vfpv3;
848 else
849 result = tdesc_arm_with_vfpv2;
850
851 /* Now make sure that the kernel supports reading these
852 registers. Support was added in 2.6.30. */
853 errno = 0;
854 buf = xmalloc (32 * 8 + 4);
855 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
856 && errno == EIO)
857 result = tdesc_arm;
858
859 free (buf);
860
861 return result;
862 }
863
864 /* The default configuration uses legacy FPA registers, probably
865 simulated. */
866 return tdesc_arm;
867 }
868
869 static void
870 arm_arch_setup (void)
871 {
872 int tid = lwpid_of (current_thread);
873 int gpregs[18];
874 struct iovec iov;
875
876 current_process ()->tdesc = arm_read_description ();
877
878 iov.iov_base = gpregs;
879 iov.iov_len = sizeof (gpregs);
880
881 /* Check if PTRACE_GETREGSET works. */
882 if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) == 0)
883 have_ptrace_getregset = 1;
884 else
885 have_ptrace_getregset = 0;
886 }
887
888 /* Register sets without using PTRACE_GETREGSET. */
889
890 static struct regset_info arm_regsets[] = {
891 { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
892 GENERAL_REGS,
893 arm_fill_gregset, arm_store_gregset },
894 { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
895 EXTENDED_REGS,
896 arm_fill_wmmxregset, arm_store_wmmxregset },
897 { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
898 EXTENDED_REGS,
899 arm_fill_vfpregset, arm_store_vfpregset },
900 { 0, 0, 0, -1, -1, NULL, NULL }
901 };
902
903 static struct regsets_info arm_regsets_info =
904 {
905 arm_regsets, /* regsets */
906 0, /* num_regsets */
907 NULL, /* disabled_regsets */
908 };
909
910 static struct usrregs_info arm_usrregs_info =
911 {
912 arm_num_regs,
913 arm_regmap,
914 };
915
916 static struct regs_info regs_info_arm =
917 {
918 NULL, /* regset_bitmap */
919 &arm_usrregs_info,
920 &arm_regsets_info
921 };
922
923 static const struct regs_info *
924 arm_regs_info (void)
925 {
926 const struct target_desc *tdesc = current_process ()->tdesc;
927
928 if (have_ptrace_getregset == 1
929 && (tdesc == tdesc_arm_with_neon || tdesc == tdesc_arm_with_vfpv3))
930 return &regs_info_aarch32;
931 else
932 return &regs_info_arm;
933 }
934
935 /* Implementation of linux_target_ops method "breakpoint_kind_from_pc".
936
937 Determine the type and size of breakpoint to insert at PCPTR. Uses the
938 program counter value to determine whether a 16-bit or 32-bit breakpoint
939 should be used. It returns the breakpoint's kind, and adjusts the program
940 counter (if necessary) to point to the actual memory location where the
941 breakpoint should be inserted. */
942
943 static int
944 arm_breakpoint_kind_from_pc (CORE_ADDR *pcptr)
945 {
946 if (IS_THUMB_ADDR (*pcptr))
947 {
948 gdb_byte buf[2];
949
950 *pcptr = UNMAKE_THUMB_ADDR (*pcptr);
951
952 /* Check whether we are replacing a thumb2 32-bit instruction. */
953 if ((*the_target->read_memory) (*pcptr, buf, 2) == 0)
954 {
955 unsigned short inst1 = 0;
956
957 (*the_target->read_memory) (*pcptr, (gdb_byte *) &inst1, 2);
958 if (thumb_insn_size (inst1) == 4)
959 return ARM_BP_KIND_THUMB2;
960 }
961 return ARM_BP_KIND_THUMB;
962 }
963 else
964 return ARM_BP_KIND_ARM;
965 }
966
967 /* Implementation of the linux_target_ops method "sw_breakpoint_from_kind". */
968
969 static const gdb_byte *
970 arm_sw_breakpoint_from_kind (int kind , int *size)
971 {
972 *size = arm_breakpoint_len;
973 /* Define an ARM-mode breakpoint; we only set breakpoints in the C
974 library, which is most likely to be ARM. If the kernel supports
975 clone events, we will never insert a breakpoint, so even a Thumb
976 C library will work; so will mixing EABI/non-EABI gdbserver and
977 application. */
978 switch (kind)
979 {
980 case ARM_BP_KIND_THUMB:
981 *size = thumb_breakpoint_len;
982 return (gdb_byte *) &thumb_breakpoint;
983 case ARM_BP_KIND_THUMB2:
984 *size = thumb2_breakpoint_len;
985 return (gdb_byte *) &thumb2_breakpoint;
986 case ARM_BP_KIND_ARM:
987 *size = arm_breakpoint_len;
988 return (const gdb_byte *) &arm_breakpoint;
989 default:
990 return NULL;
991 }
992 return NULL;
993 }
994
995 struct linux_target_ops the_low_target = {
996 arm_arch_setup,
997 arm_regs_info,
998 arm_cannot_fetch_register,
999 arm_cannot_store_register,
1000 NULL, /* fetch_register */
1001 arm_get_pc,
1002 arm_set_pc,
1003 arm_breakpoint_kind_from_pc,
1004 arm_sw_breakpoint_from_kind,
1005 arm_reinsert_addr,
1006 0,
1007 arm_breakpoint_at,
1008 arm_supports_z_point_type,
1009 arm_insert_point,
1010 arm_remove_point,
1011 arm_stopped_by_watchpoint,
1012 arm_stopped_data_address,
1013 NULL, /* collect_ptrace_register */
1014 NULL, /* supply_ptrace_register */
1015 NULL, /* siginfo_fixup */
1016 arm_new_process,
1017 arm_new_thread,
1018 arm_new_fork,
1019 arm_prepare_to_resume,
1020 };
1021
1022 void
1023 initialize_low_arch (void)
1024 {
1025 /* Initialize the Linux target descriptions. */
1026 init_registers_arm ();
1027 init_registers_arm_with_iwmmxt ();
1028 init_registers_arm_with_vfpv2 ();
1029 init_registers_arm_with_vfpv3 ();
1030
1031 initialize_low_arch_aarch32 ();
1032
1033 initialize_regsets_info (&arm_regsets_info);
1034 }
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