gdb/gdbserver/linux-arm-low.c

   1 /* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2015 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21 #include "arch/arm.h"
  22 #include "linux-aarch32-low.h"
  23
  24 #include <sys/uio.h>
  25 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
  26    On Bionic elf.h and linux/elf.h have conflicting definitions.  */
  27 #ifndef ELFMAG0
  28 #include <elf.h>
  29 #endif
  30 #include "nat/gdb_ptrace.h"
  31 #include <signal.h>
  32
  33 /* Defined in auto-generated files.  */
  34 void init_registers_arm (void);
  35 extern const struct target_desc *tdesc_arm;
  36
  37 void init_registers_arm_with_iwmmxt (void);
  38 extern const struct target_desc *tdesc_arm_with_iwmmxt;
  39
  40 void init_registers_arm_with_vfpv2 (void);
  41 extern const struct target_desc *tdesc_arm_with_vfpv2;
  42
  43 void init_registers_arm_with_vfpv3 (void);
  44 extern const struct target_desc *tdesc_arm_with_vfpv3;
  45
  46 #ifndef PTRACE_GET_THREAD_AREA
  47 #define PTRACE_GET_THREAD_AREA 22
  48 #endif
  49
  50 #ifndef PTRACE_GETWMMXREGS
  51 # define PTRACE_GETWMMXREGS 18
  52 # define PTRACE_SETWMMXREGS 19
  53 #endif
  54
  55 #ifndef PTRACE_GETVFPREGS
  56 # define PTRACE_GETVFPREGS 27
  57 # define PTRACE_SETVFPREGS 28
  58 #endif
  59
  60 #ifndef PTRACE_GETHBPREGS
  61 #define PTRACE_GETHBPREGS 29
  62 #define PTRACE_SETHBPREGS 30
  63 #endif
  64
  65 /* Information describing the hardware breakpoint capabilities.  */
  66 static struct
  67 {
  68   unsigned char arch;
  69   unsigned char max_wp_length;
  70   unsigned char wp_count;
  71   unsigned char bp_count;
  72 } arm_linux_hwbp_cap;
  73
  74 /* Enum describing the different types of ARM hardware break-/watch-points.  */
  75 typedef enum
  76 {
  77   arm_hwbp_break = 0,
  78   arm_hwbp_load = 1,
  79   arm_hwbp_store = 2,
  80   arm_hwbp_access = 3
  81 } arm_hwbp_type;
  82
  83 /* Type describing an ARM Hardware Breakpoint Control register value.  */
  84 typedef unsigned int arm_hwbp_control_t;
  85
  86 /* Structure used to keep track of hardware break-/watch-points.  */
  87 struct arm_linux_hw_breakpoint
  88 {
  89   /* Address to break on, or being watched.  */
  90   unsigned int address;
  91   /* Control register for break-/watch- point.  */
  92   arm_hwbp_control_t control;
  93 };
  94
  95 /* Since we cannot dynamically allocate subfields of arch_process_info,
  96    assume a maximum number of supported break-/watchpoints.  */
  97 #define MAX_BPTS 32
  98 #define MAX_WPTS 32
  99
 100 /* Per-process arch-specific data we want to keep.  */
 101 struct arch_process_info
 102 {
 103   /* Hardware breakpoints for this process.  */
 104   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 105   /* Hardware watchpoints for this process.  */
 106   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 107 };
 108
 109 /* Per-thread arch-specific data we want to keep.  */
 110 struct arch_lwp_info
 111 {
 112   /* Non-zero if our copy differs from what's recorded in the thread.  */
 113   char bpts_changed[MAX_BPTS];
 114   char wpts_changed[MAX_WPTS];
 115   /* Cached stopped data address.  */
 116   CORE_ADDR stopped_data_address;
 117 };
 118
 119 /* These are in <asm/elf.h> in current kernels.  */
 120 #define HWCAP_VFP       64
 121 #define HWCAP_IWMMXT    512
 122 #define HWCAP_NEON      4096
 123 #define HWCAP_VFPv3     8192
 124 #define HWCAP_VFPv3D16  16384
 125
 126 #ifdef HAVE_SYS_REG_H
 127 #include <sys/reg.h>
 128 #endif
 129
 130 #define arm_num_regs 26
 131
 132 static int arm_regmap[] = {
 133   0, 4, 8, 12, 16, 20, 24, 28,
 134   32, 36, 40, 44, 48, 52, 56, 60,
 135   -1, -1, -1, -1, -1, -1, -1, -1, -1,
 136   64
 137 };
 138
 139 static int
 140 arm_cannot_store_register (int regno)
 141 {
 142   return (regno >= arm_num_regs);
 143 }
 144
 145 static int
 146 arm_cannot_fetch_register (int regno)
 147 {
 148   return (regno >= arm_num_regs);
 149 }
 150
 151 static void
 152 arm_fill_wmmxregset (struct regcache *regcache, void *buf)
 153 {
 154   int i;
 155
 156   if (regcache->tdesc != tdesc_arm_with_iwmmxt)
 157     return;
 158
 159   for (i = 0; i < 16; i++)
 160     collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 161
 162   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 163   for (i = 0; i < 6; i++)
 164     collect_register (regcache, arm_num_regs + i + 16,
 165                       (char *) buf + 16 * 8 + i * 4);
 166 }
 167
 168 static void
 169 arm_store_wmmxregset (struct regcache *regcache, const void *buf)
 170 {
 171   int i;
 172
 173   if (regcache->tdesc != tdesc_arm_with_iwmmxt)
 174     return;
 175
 176   for (i = 0; i < 16; i++)
 177     supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 178
 179   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 180   for (i = 0; i < 6; i++)
 181     supply_register (regcache, arm_num_regs + i + 16,
 182                      (char *) buf + 16 * 8 + i * 4);
 183 }
 184
 185 static void
 186 arm_fill_vfpregset (struct regcache *regcache, void *buf)
 187 {
 188   int num;
 189
 190   if (regcache->tdesc == tdesc_arm_with_neon
 191       || regcache->tdesc == tdesc_arm_with_vfpv3)
 192     num = 32;
 193   else if (regcache->tdesc == tdesc_arm_with_vfpv2)
 194     num = 16;
 195   else
 196     return;
 197
 198   arm_fill_vfpregset_num (regcache, buf, num);
 199 }
 200
 201 static void
 202 arm_store_vfpregset (struct regcache *regcache, const void *buf)
 203 {
 204   int num;
 205
 206   if (regcache->tdesc == tdesc_arm_with_neon
 207       || regcache->tdesc == tdesc_arm_with_vfpv3)
 208     num = 32;
 209   else if (regcache->tdesc == tdesc_arm_with_vfpv2)
 210     num = 16;
 211   else
 212     return;
 213
 214   arm_store_vfpregset_num (regcache, buf, num);
 215 }
 216
 217 extern int debug_threads;
 218
 219 static CORE_ADDR
 220 arm_get_pc (struct regcache *regcache)
 221 {
 222   unsigned long pc;
 223   collect_register_by_name (regcache, "pc", &pc);
 224   if (debug_threads)
 225     debug_printf ("stop pc is %08lx\n", pc);
 226   return pc;
 227 }
 228
 229 static void
 230 arm_set_pc (struct regcache *regcache, CORE_ADDR pc)
 231 {
 232   unsigned long newpc = pc;
 233   supply_register_by_name (regcache, "pc", &newpc);
 234 }
 235
 236 /* Correct in either endianness.  */
 237 static const unsigned long arm_breakpoint = 0xef9f0001;
 238 #define arm_breakpoint_len 4
 239 static const unsigned short thumb_breakpoint = 0xde01;
 240 static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 };
 241
 242 /* For new EABI binaries.  We recognize it regardless of which ABI
 243    is used for gdbserver, so single threaded debugging should work
 244    OK, but for multi-threaded debugging we only insert the current
 245    ABI's breakpoint instruction.  For now at least.  */
 246 static const unsigned long arm_eabi_breakpoint = 0xe7f001f0;
 247
 248 static int
 249 arm_breakpoint_at (CORE_ADDR where)
 250 {
 251   struct regcache *regcache = get_thread_regcache (current_thread, 1);
 252   unsigned long cpsr;
 253
 254   collect_register_by_name (regcache, "cpsr", &cpsr);
 255
 256   if (cpsr & 0x20)
 257     {
 258       /* Thumb mode.  */
 259       unsigned short insn;
 260
 261       (*the_target->read_memory) (where, (unsigned char *) &insn, 2);
 262       if (insn == thumb_breakpoint)
 263         return 1;
 264
 265       if (insn == thumb2_breakpoint[0])
 266         {
 267           (*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2);
 268           if (insn == thumb2_breakpoint[1])
 269             return 1;
 270         }
 271     }
 272   else
 273     {
 274       /* ARM mode.  */
 275       unsigned long insn;
 276
 277       (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
 278       if (insn == arm_breakpoint)
 279         return 1;
 280
 281       if (insn == arm_eabi_breakpoint)
 282         return 1;
 283     }
 284
 285   return 0;
 286 }
 287
 288 /* We only place breakpoints in empty marker functions, and thread locking
 289    is outside of the function.  So rather than importing software single-step,
 290    we can just run until exit.  */
 291 static CORE_ADDR
 292 arm_reinsert_addr (void)
 293 {
 294   struct regcache *regcache = get_thread_regcache (current_thread, 1);
 295   unsigned long pc;
 296   collect_register_by_name (regcache, "lr", &pc);
 297   return pc;
 298 }
 299
 300 /* Fetch the thread-local storage pointer for libthread_db.  */
 301
 302 ps_err_e
 303 ps_get_thread_area (const struct ps_prochandle *ph,
 304                     lwpid_t lwpid, int idx, void **base)
 305 {
 306   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 307     return PS_ERR;
 308
 309   /* IDX is the bias from the thread pointer to the beginning of the
 310      thread descriptor.  It has to be subtracted due to implementation
 311      quirks in libthread_db.  */
 312   *base = (void *) ((char *)*base - idx);
 313
 314   return PS_OK;
 315 }
 316
 317
 318 /* Query Hardware Breakpoint information for the target we are attached to
 319    (using PID as ptrace argument) and set up arm_linux_hwbp_cap.  */
 320 static void
 321 arm_linux_init_hwbp_cap (int pid)
 322 {
 323   unsigned int val;
 324
 325   if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
 326     return;
 327
 328   arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
 329   if (arm_linux_hwbp_cap.arch == 0)
 330     return;
 331
 332   arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
 333   arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
 334   arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
 335
 336   if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
 337     internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
 338   if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
 339     internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
 340 }
 341
 342 /* How many hardware breakpoints are available?  */
 343 static int
 344 arm_linux_get_hw_breakpoint_count (void)
 345 {
 346   return arm_linux_hwbp_cap.bp_count;
 347 }
 348
 349 /* How many hardware watchpoints are available?  */
 350 static int
 351 arm_linux_get_hw_watchpoint_count (void)
 352 {
 353   return arm_linux_hwbp_cap.wp_count;
 354 }
 355
 356 /* Maximum length of area watched by hardware watchpoint.  */
 357 static int
 358 arm_linux_get_hw_watchpoint_max_length (void)
 359 {
 360   return arm_linux_hwbp_cap.max_wp_length;
 361 }
 362
 363 /* Initialize an ARM hardware break-/watch-point control register value.
 364    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 365    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 366    */
 367 static arm_hwbp_control_t
 368 arm_hwbp_control_initialize (unsigned byte_address_select,
 369                              arm_hwbp_type hwbp_type,
 370                              int enable)
 371 {
 372   gdb_assert ((byte_address_select & ~0xffU) == 0);
 373   gdb_assert (hwbp_type != arm_hwbp_break
 374               || ((byte_address_select & 0xfU) != 0));
 375
 376   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 377 }
 378
 379 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 380 static int
 381 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 382 {
 383   return control & 0x1;
 384 }
 385
 386 /* Is the breakpoint control value CONTROL initialized?  */
 387 static int
 388 arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
 389 {
 390   return control != 0;
 391 }
 392
 393 /* Change a breakpoint control word so that it is in the disabled state.  */
 394 static arm_hwbp_control_t
 395 arm_hwbp_control_disable (arm_hwbp_control_t control)
 396 {
 397   return control & ~0x1;
 398 }
 399
 400 /* Are two break-/watch-points equal?  */
 401 static int
 402 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
 403                                const struct arm_linux_hw_breakpoint *p2)
 404 {
 405   return p1->address == p2->address && p1->control == p2->control;
 406 }
 407
 408 /* Convert a raw breakpoint type to an enum arm_hwbp_type.  */
 409
 410 static int
 411 raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
 412 {
 413   switch (raw_type)
 414     {
 415     case raw_bkpt_type_hw:
 416       return arm_hwbp_break;
 417     case raw_bkpt_type_write_wp:
 418       return arm_hwbp_store;
 419     case raw_bkpt_type_read_wp:
 420       return arm_hwbp_load;
 421     case raw_bkpt_type_access_wp:
 422       return arm_hwbp_access;
 423     default:
 424       gdb_assert_not_reached ("unhandled raw type");
 425     }
 426 }
 427
 428 /* Initialize the hardware breakpoint structure P for a breakpoint or
 429    watchpoint at ADDR to LEN.  The type of watchpoint is given in TYPE.
 430    Returns -1 if TYPE is unsupported, or -2 if the particular combination
 431    of ADDR and LEN cannot be implemented.  Otherwise, returns 0 if TYPE
 432    represents a breakpoint and 1 if type represents a watchpoint.  */
 433 static int
 434 arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
 435                                int len, struct arm_linux_hw_breakpoint *p)
 436 {
 437   arm_hwbp_type hwbp_type;
 438   unsigned mask;
 439
 440   hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
 441
 442   if (hwbp_type == arm_hwbp_break)
 443     {
 444       /* For breakpoints, the length field encodes the mode.  */
 445       switch (len)
 446         {
 447         case 2:  /* 16-bit Thumb mode breakpoint */
 448         case 3:  /* 32-bit Thumb mode breakpoint */
 449           mask = 0x3;
 450           addr &= ~1;
 451           break;
 452         case 4:  /* 32-bit ARM mode breakpoint */
 453           mask = 0xf;
 454           addr &= ~3;
 455           break;
 456         default:
 457           /* Unsupported. */
 458           return -2;
 459         }
 460     }
 461   else
 462     {
 463       CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
 464       CORE_ADDR aligned_addr;
 465
 466       /* Can not set watchpoints for zero or negative lengths.  */
 467       if (len <= 0)
 468         return -2;
 469       /* The current ptrace interface can only handle watchpoints that are a
 470          power of 2.  */
 471       if ((len & (len - 1)) != 0)
 472         return -2;
 473
 474       /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
 475          range covered by a watchpoint.  */
 476       aligned_addr = addr & ~(max_wp_length - 1);
 477       if (aligned_addr + max_wp_length < addr + len)
 478         return -2;
 479
 480       mask = (1 << len) - 1;
 481     }
 482
 483   p->address = (unsigned int) addr;
 484   p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
 485
 486   return hwbp_type != arm_hwbp_break;
 487 }
 488
 489 /* Callback to mark a watch-/breakpoint to be updated in all threads of
 490    the current process.  */
 491
 492 struct update_registers_data
 493 {
 494   int watch;
 495   int i;
 496 };
 497
 498 static int
 499 update_registers_callback (struct inferior_list_entry *entry, void *arg)
 500 {
 501   struct thread_info *thread = (struct thread_info *) entry;
 502   struct lwp_info *lwp = get_thread_lwp (thread);
 503   struct update_registers_data *data = (struct update_registers_data *) arg;
 504
 505   /* Only update the threads of the current process.  */
 506   if (pid_of (thread) == pid_of (current_thread))
 507     {
 508       /* The actual update is done later just before resuming the lwp,
 509          we just mark that the registers need updating.  */
 510       if (data->watch)
 511         lwp->arch_private->wpts_changed[data->i] = 1;
 512       else
 513         lwp->arch_private->bpts_changed[data->i] = 1;
 514
 515       /* If the lwp isn't stopped, force it to momentarily pause, so
 516          we can update its breakpoint registers.  */
 517       if (!lwp->stopped)
 518         linux_stop_lwp (lwp);
 519     }
 520
 521   return 0;
 522 }
 523
 524 static int
 525 arm_supports_z_point_type (char z_type)
 526 {
 527   switch (z_type)
 528     {
 529     case Z_PACKET_HW_BP:
 530     case Z_PACKET_WRITE_WP:
 531     case Z_PACKET_READ_WP:
 532     case Z_PACKET_ACCESS_WP:
 533       return 1;
 534     default:
 535       /* Leave the handling of sw breakpoints with the gdb client.  */
 536       return 0;
 537     }
 538 }
 539
 540 /* Insert hardware break-/watchpoint.  */
 541 static int
 542 arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 543                   int len, struct raw_breakpoint *bp)
 544 {
 545   struct process_info *proc = current_process ();
 546   struct arm_linux_hw_breakpoint p, *pts;
 547   int watch, i, count;
 548
 549   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 550   if (watch < 0)
 551     {
 552       /* Unsupported.  */
 553       return watch == -1 ? 1 : -1;
 554     }
 555
 556   if (watch)
 557     {
 558       count = arm_linux_get_hw_watchpoint_count ();
 559       pts = proc->priv->arch_private->wpts;
 560     }
 561   else
 562     {
 563       count = arm_linux_get_hw_breakpoint_count ();
 564       pts = proc->priv->arch_private->bpts;
 565     }
 566
 567   for (i = 0; i < count; i++)
 568     if (!arm_hwbp_control_is_enabled (pts[i].control))
 569       {
 570         struct update_registers_data data = { watch, i };
 571         pts[i] = p;
 572         find_inferior (&all_threads, update_registers_callback, &data);
 573         return 0;
 574       }
 575
 576   /* We're out of watchpoints.  */
 577   return -1;
 578 }
 579
 580 /* Remove hardware break-/watchpoint.  */
 581 static int
 582 arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 583                   int len, struct raw_breakpoint *bp)
 584 {
 585   struct process_info *proc = current_process ();
 586   struct arm_linux_hw_breakpoint p, *pts;
 587   int watch, i, count;
 588
 589   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 590   if (watch < 0)
 591     {
 592       /* Unsupported.  */
 593       return -1;
 594     }
 595
 596   if (watch)
 597     {
 598       count = arm_linux_get_hw_watchpoint_count ();
 599       pts = proc->priv->arch_private->wpts;
 600     }
 601   else
 602     {
 603       count = arm_linux_get_hw_breakpoint_count ();
 604       pts = proc->priv->arch_private->bpts;
 605     }
 606
 607   for (i = 0; i < count; i++)
 608     if (arm_linux_hw_breakpoint_equal (&p, pts + i))
 609       {
 610         struct update_registers_data data = { watch, i };
 611         pts[i].control = arm_hwbp_control_disable (pts[i].control);
 612         find_inferior (&all_threads, update_registers_callback, &data);
 613         return 0;
 614       }
 615
 616   /* No watchpoint matched.  */
 617   return -1;
 618 }
 619
 620 /* Return whether current thread is stopped due to a watchpoint.  */
 621 static int
 622 arm_stopped_by_watchpoint (void)
 623 {
 624   struct lwp_info *lwp = get_thread_lwp (current_thread);
 625   siginfo_t siginfo;
 626
 627   /* We must be able to set hardware watchpoints.  */
 628   if (arm_linux_get_hw_watchpoint_count () == 0)
 629     return 0;
 630
 631   /* Retrieve siginfo.  */
 632   errno = 0;
 633   ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
 634   if (errno != 0)
 635     return 0;
 636
 637   /* This must be a hardware breakpoint.  */
 638   if (siginfo.si_signo != SIGTRAP
 639       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
 640     return 0;
 641
 642   /* If we are in a positive slot then we're looking at a breakpoint and not
 643      a watchpoint.  */
 644   if (siginfo.si_errno >= 0)
 645     return 0;
 646
 647   /* Cache stopped data address for use by arm_stopped_data_address.  */
 648   lwp->arch_private->stopped_data_address
 649     = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
 650
 651   return 1;
 652 }
 653
 654 /* Return data address that triggered watchpoint.  Called only if
 655    arm_stopped_by_watchpoint returned true.  */
 656 static CORE_ADDR
 657 arm_stopped_data_address (void)
 658 {
 659   struct lwp_info *lwp = get_thread_lwp (current_thread);
 660   return lwp->arch_private->stopped_data_address;
 661 }
 662
 663 /* Called when a new process is created.  */
 664 static struct arch_process_info *
 665 arm_new_process (void)
 666 {
 667   struct arch_process_info *info = XCNEW (struct arch_process_info);
 668   return info;
 669 }
 670
 671 /* Called when a new thread is detected.  */
 672 static void
 673 arm_new_thread (struct lwp_info *lwp)
 674 {
 675   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
 676   int i;
 677
 678   for (i = 0; i < MAX_BPTS; i++)
 679     info->bpts_changed[i] = 1;
 680   for (i = 0; i < MAX_WPTS; i++)
 681     info->wpts_changed[i] = 1;
 682
 683   lwp->arch_private = info;
 684 }
 685
 686 static void
 687 arm_new_fork (struct process_info *parent, struct process_info *child)
 688 {
 689   struct arch_process_info *parent_proc_info = parent->priv->arch_private;
 690   struct arch_process_info *child_proc_info = child->priv->arch_private;
 691   struct lwp_info *child_lwp;
 692   struct arch_lwp_info *child_lwp_info;
 693   int i;
 694
 695   /* These are allocated by linux_add_process.  */
 696   gdb_assert (parent->priv != NULL
 697               && parent->priv->arch_private != NULL);
 698   gdb_assert (child->priv != NULL
 699               && child->priv->arch_private != NULL);
 700
 701   /* Linux kernel before 2.6.33 commit
 702      72f674d203cd230426437cdcf7dd6f681dad8b0d
 703      will inherit hardware debug registers from parent
 704      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 705      zeroed debug registers.
 706
 707      GDB core assumes the child inherits the watchpoints/hw
 708      breakpoints of the parent, and will remove them all from the
 709      forked off process.  Copy the debug registers mirrors into the
 710      new process so that all breakpoints and watchpoints can be
 711      removed together.  The debug registers mirror will become zeroed
 712      in the end before detaching the forked off process, thus making
 713      this compatible with older Linux kernels too.  */
 714
 715   *child_proc_info = *parent_proc_info;
 716
 717   /* Mark all the hardware breakpoints and watchpoints as changed to
 718      make sure that the registers will be updated.  */
 719   child_lwp = find_lwp_pid (ptid_of (child));
 720   child_lwp_info = child_lwp->arch_private;
 721   for (i = 0; i < MAX_BPTS; i++)
 722     child_lwp_info->bpts_changed[i] = 1;
 723   for (i = 0; i < MAX_WPTS; i++)
 724     child_lwp_info->wpts_changed[i] = 1;
 725 }
 726
 727 /* Called when resuming a thread.
 728    If the debug regs have changed, update the thread's copies.  */
 729 static void
 730 arm_prepare_to_resume (struct lwp_info *lwp)
 731 {
 732   struct thread_info *thread = get_lwp_thread (lwp);
 733   int pid = lwpid_of (thread);
 734   struct process_info *proc = find_process_pid (pid_of (thread));
 735   struct arch_process_info *proc_info = proc->priv->arch_private;
 736   struct arch_lwp_info *lwp_info = lwp->arch_private;
 737   int i;
 738
 739   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
 740     if (lwp_info->bpts_changed[i])
 741       {
 742         errno = 0;
 743
 744         if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
 745           if (ptrace (PTRACE_SETHBPREGS, pid,
 746                       (PTRACE_TYPE_ARG3) ((i << 1) + 1),
 747                       &proc_info->bpts[i].address) < 0)
 748             perror_with_name ("Unexpected error setting breakpoint address");
 749
 750         if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
 751           if (ptrace (PTRACE_SETHBPREGS, pid,
 752                       (PTRACE_TYPE_ARG3) ((i << 1) + 2),
 753                       &proc_info->bpts[i].control) < 0)
 754             perror_with_name ("Unexpected error setting breakpoint");
 755
 756         lwp_info->bpts_changed[i] = 0;
 757       }
 758
 759   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
 760     if (lwp_info->wpts_changed[i])
 761       {
 762         errno = 0;
 763
 764         if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
 765           if (ptrace (PTRACE_SETHBPREGS, pid,
 766                       (PTRACE_TYPE_ARG3) -((i << 1) + 1),
 767                       &proc_info->wpts[i].address) < 0)
 768             perror_with_name ("Unexpected error setting watchpoint address");
 769
 770         if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
 771           if (ptrace (PTRACE_SETHBPREGS, pid,
 772                       (PTRACE_TYPE_ARG3) -((i << 1) + 2),
 773                       &proc_info->wpts[i].control) < 0)
 774             perror_with_name ("Unexpected error setting watchpoint");
 775
 776         lwp_info->wpts_changed[i] = 0;
 777       }
 778 }
 779
 780
 781 static int
 782 arm_get_hwcap (unsigned long *valp)
 783 {
 784   unsigned char *data = alloca (8);
 785   int offset = 0;
 786
 787   while ((*the_target->read_auxv) (offset, data, 8) == 8)
 788     {
 789       unsigned int *data_p = (unsigned int *)data;
 790       if (data_p[0] == AT_HWCAP)
 791         {
 792           *valp = data_p[1];
 793           return 1;
 794         }
 795
 796       offset += 8;
 797     }
 798
 799   *valp = 0;
 800   return 0;
 801 }
 802
 803 static const struct target_desc *
 804 arm_read_description (void)
 805 {
 806   int pid = lwpid_of (current_thread);
 807   unsigned long arm_hwcap = 0;
 808
 809   /* Query hardware watchpoint/breakpoint capabilities.  */
 810   arm_linux_init_hwbp_cap (pid);
 811
 812   if (arm_get_hwcap (&arm_hwcap) == 0)
 813     return tdesc_arm;
 814
 815   if (arm_hwcap & HWCAP_IWMMXT)
 816     return tdesc_arm_with_iwmmxt;
 817
 818   if (arm_hwcap & HWCAP_VFP)
 819     {
 820       const struct target_desc *result;
 821       char *buf;
 822
 823       /* NEON implies either no VFP, or VFPv3-D32.  We only support
 824          it with VFP.  */
 825       if (arm_hwcap & HWCAP_NEON)
 826         result = tdesc_arm_with_neon;
 827       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 828         result = tdesc_arm_with_vfpv3;
 829       else
 830         result = tdesc_arm_with_vfpv2;
 831
 832       /* Now make sure that the kernel supports reading these
 833          registers.  Support was added in 2.6.30.  */
 834       errno = 0;
 835       buf = xmalloc (32 * 8 + 4);
 836       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 837           && errno == EIO)
 838         result = tdesc_arm;
 839
 840       free (buf);
 841
 842       return result;
 843     }
 844
 845   /* The default configuration uses legacy FPA registers, probably
 846      simulated.  */
 847   return tdesc_arm;
 848 }
 849
 850 static void
 851 arm_arch_setup (void)
 852 {
 853   int tid = lwpid_of (current_thread);
 854   int gpregs[18];
 855   struct iovec iov;
 856
 857   current_process ()->tdesc = arm_read_description ();
 858
 859   iov.iov_base = gpregs;
 860   iov.iov_len = sizeof (gpregs);
 861
 862   /* Check if PTRACE_GETREGSET works.  */
 863   if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) == 0)
 864     have_ptrace_getregset = 1;
 865   else
 866     have_ptrace_getregset = 0;
 867 }
 868
 869 /* Register sets without using PTRACE_GETREGSET.  */
 870
 871 static struct regset_info arm_regsets[] = {
 872   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
 873     GENERAL_REGS,
 874     arm_fill_gregset, arm_store_gregset },
 875   { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
 876     EXTENDED_REGS,
 877     arm_fill_wmmxregset, arm_store_wmmxregset },
 878   { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
 879     EXTENDED_REGS,
 880     arm_fill_vfpregset, arm_store_vfpregset },
 881   { 0, 0, 0, -1, -1, NULL, NULL }
 882 };
 883
 884 static struct regsets_info arm_regsets_info =
 885   {
 886     arm_regsets, /* regsets */
 887     0, /* num_regsets */
 888     NULL, /* disabled_regsets */
 889   };
 890
 891 static struct usrregs_info arm_usrregs_info =
 892   {
 893     arm_num_regs,
 894     arm_regmap,
 895   };
 896
 897 static struct regs_info regs_info_arm =
 898   {
 899     NULL, /* regset_bitmap */
 900     &arm_usrregs_info,
 901     &arm_regsets_info
 902   };
 903
 904 static const struct regs_info *
 905 arm_regs_info (void)
 906 {
 907   const struct target_desc *tdesc = current_process ()->tdesc;
 908
 909   if (have_ptrace_getregset == 1
 910       && (tdesc == tdesc_arm_with_neon || tdesc == tdesc_arm_with_vfpv3))
 911     return &regs_info_aarch32;
 912   else
 913     return &regs_info_arm;
 914 }
 915
 916 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */
 917
 918 static const gdb_byte *
 919 arm_sw_breakpoint_from_kind (int kind , int *size)
 920 {
 921   *size = arm_breakpoint_len;
 922   /* Define an ARM-mode breakpoint; we only set breakpoints in the C
 923      library, which is most likely to be ARM.  If the kernel supports
 924      clone events, we will never insert a breakpoint, so even a Thumb
 925      C library will work; so will mixing EABI/non-EABI gdbserver and
 926      application.  */
 927 #ifndef __ARM_EABI__
 928   return (const gdb_byte *) &arm_breakpoint;
 929 #else
 930   return (const gdb_byte *) &arm_eabi_breakpoint;
 931 #endif
 932 }
 933
 934 struct linux_target_ops the_low_target = {
 935   arm_arch_setup,
 936   arm_regs_info,
 937   arm_cannot_fetch_register,
 938   arm_cannot_store_register,
 939   NULL, /* fetch_register */
 940   arm_get_pc,
 941   arm_set_pc,
 942   NULL, /* breakpoint_kind_from_pc */
 943   arm_sw_breakpoint_from_kind,
 944   arm_reinsert_addr,
 945   0,
 946   arm_breakpoint_at,
 947   arm_supports_z_point_type,
 948   arm_insert_point,
 949   arm_remove_point,
 950   arm_stopped_by_watchpoint,
 951   arm_stopped_data_address,
 952   NULL, /* collect_ptrace_register */
 953   NULL, /* supply_ptrace_register */
 954   NULL, /* siginfo_fixup */
 955   arm_new_process,
 956   arm_new_thread,
 957   arm_new_fork,
 958   arm_prepare_to_resume,
 959 };
 960
 961 void
 962 initialize_low_arch (void)
 963 {
 964   /* Initialize the Linux target descriptions.  */
 965   init_registers_arm ();
 966   init_registers_arm_with_iwmmxt ();
 967   init_registers_arm_with_vfpv2 ();
 968   init_registers_arm_with_vfpv3 ();
 969
 970   initialize_low_arch_aarch32 ();
 971
 972   initialize_regsets_info (&arm_regsets_info);
 973 }