gdb/gdbserver/linux-arm-low.c

   1 /* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2013 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21
  22 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
  23    On Bionic elf.h and linux/elf.h have conflicting definitions.  */
  24 #ifndef ELFMAG0
  25 #include <elf.h>
  26 #endif
  27 #include <sys/ptrace.h>
  28 #include <signal.h>
  29
  30 /* Defined in auto-generated files.  */
  31 void init_registers_arm (void);
  32 void init_registers_arm_with_iwmmxt (void);
  33 void init_registers_arm_with_vfpv2 (void);
  34 void init_registers_arm_with_vfpv3 (void);
  35 void init_registers_arm_with_neon (void);
  36
  37 #ifndef PTRACE_GET_THREAD_AREA
  38 #define PTRACE_GET_THREAD_AREA 22
  39 #endif
  40
  41 #ifndef PTRACE_GETWMMXREGS
  42 # define PTRACE_GETWMMXREGS 18
  43 # define PTRACE_SETWMMXREGS 19
  44 #endif
  45
  46 #ifndef PTRACE_GETVFPREGS
  47 # define PTRACE_GETVFPREGS 27
  48 # define PTRACE_SETVFPREGS 28
  49 #endif
  50
  51 #ifndef PTRACE_GETHBPREGS
  52 #define PTRACE_GETHBPREGS 29
  53 #define PTRACE_SETHBPREGS 30
  54 #endif
  55
  56 /* Information describing the hardware breakpoint capabilities.  */
  57 static struct
  58 {
  59   unsigned char arch;
  60   unsigned char max_wp_length;
  61   unsigned char wp_count;
  62   unsigned char bp_count;
  63 } arm_linux_hwbp_cap;
  64
  65 /* Enum describing the different types of ARM hardware break-/watch-points.  */
  66 typedef enum
  67 {
  68   arm_hwbp_break = 0,
  69   arm_hwbp_load = 1,
  70   arm_hwbp_store = 2,
  71   arm_hwbp_access = 3
  72 } arm_hwbp_type;
  73
  74 /* Type describing an ARM Hardware Breakpoint Control register value.  */
  75 typedef unsigned int arm_hwbp_control_t;
  76
  77 /* Structure used to keep track of hardware break-/watch-points.  */
  78 struct arm_linux_hw_breakpoint
  79 {
  80   /* Address to break on, or being watched.  */
  81   unsigned int address;
  82   /* Control register for break-/watch- point.  */
  83   arm_hwbp_control_t control;
  84 };
  85
  86 /* Since we cannot dynamically allocate subfields of arch_process_info,
  87    assume a maximum number of supported break-/watchpoints.  */
  88 #define MAX_BPTS 32
  89 #define MAX_WPTS 32
  90
  91 /* Per-process arch-specific data we want to keep.  */
  92 struct arch_process_info
  93 {
  94   /* Hardware breakpoints for this process.  */
  95   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
  96   /* Hardware watchpoints for this process.  */
  97   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
  98 };
  99
 100 /* Per-thread arch-specific data we want to keep.  */
 101 struct arch_lwp_info
 102 {
 103   /* Non-zero if our copy differs from what's recorded in the thread.  */
 104   char bpts_changed[MAX_BPTS];
 105   char wpts_changed[MAX_WPTS];
 106   /* Cached stopped data address.  */
 107   CORE_ADDR stopped_data_address;
 108 };
 109
 110 static unsigned long arm_hwcap;
 111
 112 /* These are in <asm/elf.h> in current kernels.  */
 113 #define HWCAP_VFP       64
 114 #define HWCAP_IWMMXT    512
 115 #define HWCAP_NEON      4096
 116 #define HWCAP_VFPv3     8192
 117 #define HWCAP_VFPv3D16  16384
 118
 119 #ifdef HAVE_SYS_REG_H
 120 #include <sys/reg.h>
 121 #endif
 122
 123 #define arm_num_regs 26
 124
 125 static int arm_regmap[] = {
 126   0, 4, 8, 12, 16, 20, 24, 28,
 127   32, 36, 40, 44, 48, 52, 56, 60,
 128   -1, -1, -1, -1, -1, -1, -1, -1, -1,
 129   64
 130 };
 131
 132 static int
 133 arm_cannot_store_register (int regno)
 134 {
 135   return (regno >= arm_num_regs);
 136 }
 137
 138 static int
 139 arm_cannot_fetch_register (int regno)
 140 {
 141   return (regno >= arm_num_regs);
 142 }
 143
 144 static void
 145 arm_fill_gregset (struct regcache *regcache, void *buf)
 146 {
 147   int i;
 148
 149   for (i = 0; i < arm_num_regs; i++)
 150     if (arm_regmap[i] != -1)
 151       collect_register (regcache, i, ((char *) buf) + arm_regmap[i]);
 152 }
 153
 154 static void
 155 arm_store_gregset (struct regcache *regcache, const void *buf)
 156 {
 157   int i;
 158   char zerobuf[8];
 159
 160   memset (zerobuf, 0, 8);
 161   for (i = 0; i < arm_num_regs; i++)
 162     if (arm_regmap[i] != -1)
 163       supply_register (regcache, i, ((char *) buf) + arm_regmap[i]);
 164     else
 165       supply_register (regcache, i, zerobuf);
 166 }
 167
 168 static void
 169 arm_fill_wmmxregset (struct regcache *regcache, void *buf)
 170 {
 171   int i;
 172
 173   if (!(arm_hwcap & HWCAP_IWMMXT))
 174     return;
 175
 176   for (i = 0; i < 16; i++)
 177     collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 178
 179   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 180   for (i = 0; i < 6; i++)
 181     collect_register (regcache, arm_num_regs + i + 16,
 182                       (char *) buf + 16 * 8 + i * 4);
 183 }
 184
 185 static void
 186 arm_store_wmmxregset (struct regcache *regcache, const void *buf)
 187 {
 188   int i;
 189
 190   if (!(arm_hwcap & HWCAP_IWMMXT))
 191     return;
 192
 193   for (i = 0; i < 16; i++)
 194     supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 195
 196   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 197   for (i = 0; i < 6; i++)
 198     supply_register (regcache, arm_num_regs + i + 16,
 199                      (char *) buf + 16 * 8 + i * 4);
 200 }
 201
 202 static void
 203 arm_fill_vfpregset (struct regcache *regcache, void *buf)
 204 {
 205   int i, num, base;
 206
 207   if (!(arm_hwcap & HWCAP_VFP))
 208     return;
 209
 210   if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 211     num = 32;
 212   else
 213     num = 16;
 214
 215   base = find_regno ("d0");
 216   for (i = 0; i < num; i++)
 217     collect_register (regcache, base + i, (char *) buf + i * 8);
 218
 219   collect_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
 220 }
 221
 222 static void
 223 arm_store_vfpregset (struct regcache *regcache, const void *buf)
 224 {
 225   int i, num, base;
 226
 227   if (!(arm_hwcap & HWCAP_VFP))
 228     return;
 229
 230   if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 231     num = 32;
 232   else
 233     num = 16;
 234
 235   base = find_regno ("d0");
 236   for (i = 0; i < num; i++)
 237     supply_register (regcache, base + i, (char *) buf + i * 8);
 238
 239   supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
 240 }
 241
 242 extern int debug_threads;
 243
 244 static CORE_ADDR
 245 arm_get_pc (struct regcache *regcache)
 246 {
 247   unsigned long pc;
 248   collect_register_by_name (regcache, "pc", &pc);
 249   if (debug_threads)
 250     fprintf (stderr, "stop pc is %08lx\n", pc);
 251   return pc;
 252 }
 253
 254 static void
 255 arm_set_pc (struct regcache *regcache, CORE_ADDR pc)
 256 {
 257   unsigned long newpc = pc;
 258   supply_register_by_name (regcache, "pc", &newpc);
 259 }
 260
 261 /* Correct in either endianness.  */
 262 static const unsigned long arm_breakpoint = 0xef9f0001;
 263 #define arm_breakpoint_len 4
 264 static const unsigned short thumb_breakpoint = 0xde01;
 265 static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 };
 266
 267 /* For new EABI binaries.  We recognize it regardless of which ABI
 268    is used for gdbserver, so single threaded debugging should work
 269    OK, but for multi-threaded debugging we only insert the current
 270    ABI's breakpoint instruction.  For now at least.  */
 271 static const unsigned long arm_eabi_breakpoint = 0xe7f001f0;
 272
 273 static int
 274 arm_breakpoint_at (CORE_ADDR where)
 275 {
 276   struct regcache *regcache = get_thread_regcache (current_inferior, 1);
 277   unsigned long cpsr;
 278
 279   collect_register_by_name (regcache, "cpsr", &cpsr);
 280
 281   if (cpsr & 0x20)
 282     {
 283       /* Thumb mode.  */
 284       unsigned short insn;
 285
 286       (*the_target->read_memory) (where, (unsigned char *) &insn, 2);
 287       if (insn == thumb_breakpoint)
 288         return 1;
 289
 290       if (insn == thumb2_breakpoint[0])
 291         {
 292           (*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2);
 293           if (insn == thumb2_breakpoint[1])
 294             return 1;
 295         }
 296     }
 297   else
 298     {
 299       /* ARM mode.  */
 300       unsigned long insn;
 301
 302       (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
 303       if (insn == arm_breakpoint)
 304         return 1;
 305
 306       if (insn == arm_eabi_breakpoint)
 307         return 1;
 308     }
 309
 310   return 0;
 311 }
 312
 313 /* We only place breakpoints in empty marker functions, and thread locking
 314    is outside of the function.  So rather than importing software single-step,
 315    we can just run until exit.  */
 316 static CORE_ADDR
 317 arm_reinsert_addr (void)
 318 {
 319   struct regcache *regcache = get_thread_regcache (current_inferior, 1);
 320   unsigned long pc;
 321   collect_register_by_name (regcache, "lr", &pc);
 322   return pc;
 323 }
 324
 325 /* Fetch the thread-local storage pointer for libthread_db.  */
 326
 327 ps_err_e
 328 ps_get_thread_area (const struct ps_prochandle *ph,
 329                     lwpid_t lwpid, int idx, void **base)
 330 {
 331   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 332     return PS_ERR;
 333
 334   /* IDX is the bias from the thread pointer to the beginning of the
 335      thread descriptor.  It has to be subtracted due to implementation
 336      quirks in libthread_db.  */
 337   *base = (void *) ((char *)*base - idx);
 338
 339   return PS_OK;
 340 }
 341
 342
 343 /* Query Hardware Breakpoint information for the target we are attached to
 344    (using PID as ptrace argument) and set up arm_linux_hwbp_cap.  */
 345 static void
 346 arm_linux_init_hwbp_cap (int pid)
 347 {
 348   unsigned int val;
 349
 350   if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
 351     return;
 352
 353   arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
 354   if (arm_linux_hwbp_cap.arch == 0)
 355     return;
 356
 357   arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
 358   arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
 359   arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
 360
 361   if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
 362     internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
 363   if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
 364     internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
 365 }
 366
 367 /* How many hardware breakpoints are available?  */
 368 static int
 369 arm_linux_get_hw_breakpoint_count (void)
 370 {
 371   return arm_linux_hwbp_cap.bp_count;
 372 }
 373
 374 /* How many hardware watchpoints are available?  */
 375 static int
 376 arm_linux_get_hw_watchpoint_count (void)
 377 {
 378   return arm_linux_hwbp_cap.wp_count;
 379 }
 380
 381 /* Maximum length of area watched by hardware watchpoint.  */
 382 static int
 383 arm_linux_get_hw_watchpoint_max_length (void)
 384 {
 385   return arm_linux_hwbp_cap.max_wp_length;
 386 }
 387
 388 /* Initialize an ARM hardware break-/watch-point control register value.
 389    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 390    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 391    */
 392 static arm_hwbp_control_t
 393 arm_hwbp_control_initialize (unsigned byte_address_select,
 394                              arm_hwbp_type hwbp_type,
 395                              int enable)
 396 {
 397   gdb_assert ((byte_address_select & ~0xffU) == 0);
 398   gdb_assert (hwbp_type != arm_hwbp_break
 399               || ((byte_address_select & 0xfU) != 0));
 400
 401   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 402 }
 403
 404 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 405 static int
 406 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 407 {
 408   return control & 0x1;
 409 }
 410
 411 /* Is the breakpoint control value CONTROL initialized?  */
 412 static int
 413 arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
 414 {
 415   return control != 0;
 416 }
 417
 418 /* Change a breakpoint control word so that it is in the disabled state.  */
 419 static arm_hwbp_control_t
 420 arm_hwbp_control_disable (arm_hwbp_control_t control)
 421 {
 422   return control & ~0x1;
 423 }
 424
 425 /* Are two break-/watch-points equal?  */
 426 static int
 427 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
 428                                const struct arm_linux_hw_breakpoint *p2)
 429 {
 430   return p1->address == p2->address && p1->control == p2->control;
 431 }
 432
 433 /* Initialize the hardware breakpoint structure P for a breakpoint or
 434    watchpoint at ADDR to LEN.  The type of watchpoint is given in TYPE.
 435    Returns -1 if TYPE is unsupported, or -2 if the particular combination
 436    of ADDR and LEN cannot be implemented.  Otherwise, returns 0 if TYPE
 437    represents a breakpoint and 1 if type represents a watchpoint.  */
 438 static int
 439 arm_linux_hw_point_initialize (char type, CORE_ADDR addr, int len,
 440                                struct arm_linux_hw_breakpoint *p)
 441 {
 442   arm_hwbp_type hwbp_type;
 443   unsigned mask;
 444
 445   /* Breakpoint/watchpoint types (GDB terminology):
 446      0 = memory breakpoint for instructions
 447      (not supported; done via memory write instead)
 448      1 = hardware breakpoint for instructions (supported)
 449      2 = write watchpoint (supported)
 450      3 = read watchpoint (supported)
 451      4 = access watchpoint (supported).  */
 452   switch (type)
 453     {
 454     case '1':
 455       hwbp_type = arm_hwbp_break;
 456       break;
 457     case '2':
 458       hwbp_type = arm_hwbp_store;
 459       break;
 460     case '3':
 461       hwbp_type = arm_hwbp_load;
 462       break;
 463     case '4':
 464       hwbp_type = arm_hwbp_access;
 465       break;
 466     default:
 467       /* Unsupported.  */
 468       return -1;
 469     }
 470
 471   if (hwbp_type == arm_hwbp_break)
 472     {
 473       /* For breakpoints, the length field encodes the mode.  */
 474       switch (len)
 475         {
 476         case 2:  /* 16-bit Thumb mode breakpoint */
 477         case 3:  /* 32-bit Thumb mode breakpoint */
 478           mask = 0x3;
 479           addr &= ~1;
 480           break;
 481         case 4:  /* 32-bit ARM mode breakpoint */
 482           mask = 0xf;
 483           addr &= ~3;
 484           break;
 485         default:
 486           /* Unsupported. */
 487           return -2;
 488         }
 489     }
 490   else
 491     {
 492       CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
 493       CORE_ADDR aligned_addr;
 494
 495       /* Can not set watchpoints for zero or negative lengths.  */
 496       if (len <= 0)
 497         return -2;
 498       /* The current ptrace interface can only handle watchpoints that are a
 499          power of 2.  */
 500       if ((len & (len - 1)) != 0)
 501         return -2;
 502
 503       /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
 504          range covered by a watchpoint.  */
 505       aligned_addr = addr & ~(max_wp_length - 1);
 506       if (aligned_addr + max_wp_length < addr + len)
 507         return -2;
 508
 509       mask = (1 << len) - 1;
 510     }
 511
 512   p->address = (unsigned int) addr;
 513   p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
 514
 515   return hwbp_type != arm_hwbp_break;
 516 }
 517
 518 /* Callback to mark a watch-/breakpoint to be updated in all threads of
 519    the current process.  */
 520
 521 struct update_registers_data
 522 {
 523   int watch;
 524   int i;
 525 };
 526
 527 static int
 528 update_registers_callback (struct inferior_list_entry *entry, void *arg)
 529 {
 530   struct lwp_info *lwp = (struct lwp_info *) entry;
 531   struct update_registers_data *data = (struct update_registers_data *) arg;
 532
 533   /* Only update the threads of the current process.  */
 534   if (pid_of (lwp) == pid_of (get_thread_lwp (current_inferior)))
 535     {
 536       /* The actual update is done later just before resuming the lwp,
 537          we just mark that the registers need updating.  */
 538       if (data->watch)
 539         lwp->arch_private->wpts_changed[data->i] = 1;
 540       else
 541         lwp->arch_private->bpts_changed[data->i] = 1;
 542
 543       /* If the lwp isn't stopped, force it to momentarily pause, so
 544          we can update its breakpoint registers.  */
 545       if (!lwp->stopped)
 546         linux_stop_lwp (lwp);
 547     }
 548
 549   return 0;
 550 }
 551
 552 /* Insert hardware break-/watchpoint.  */
 553 static int
 554 arm_insert_point (char type, CORE_ADDR addr, int len)
 555 {
 556   struct process_info *proc = current_process ();
 557   struct arm_linux_hw_breakpoint p, *pts;
 558   int watch, i, count;
 559
 560   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 561   if (watch < 0)
 562     {
 563       /* Unsupported.  */
 564       return watch == -1 ? 1 : -1;
 565     }
 566
 567   if (watch)
 568     {
 569       count = arm_linux_get_hw_watchpoint_count ();
 570       pts = proc->private->arch_private->wpts;
 571     }
 572   else
 573     {
 574       count = arm_linux_get_hw_breakpoint_count ();
 575       pts = proc->private->arch_private->bpts;
 576     }
 577
 578   for (i = 0; i < count; i++)
 579     if (!arm_hwbp_control_is_enabled (pts[i].control))
 580       {
 581         struct update_registers_data data = { watch, i };
 582         pts[i] = p;
 583         find_inferior (&all_lwps, update_registers_callback, &data);
 584         return 0;
 585       }
 586
 587   /* We're out of watchpoints.  */
 588   return -1;
 589 }
 590
 591 /* Remove hardware break-/watchpoint.  */
 592 static int
 593 arm_remove_point (char type, CORE_ADDR addr, int len)
 594 {
 595   struct process_info *proc = current_process ();
 596   struct arm_linux_hw_breakpoint p, *pts;
 597   int watch, i, count;
 598
 599   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 600   if (watch < 0)
 601     {
 602       /* Unsupported.  */
 603       return -1;
 604     }
 605
 606   if (watch)
 607     {
 608       count = arm_linux_get_hw_watchpoint_count ();
 609       pts = proc->private->arch_private->wpts;
 610     }
 611   else
 612     {
 613       count = arm_linux_get_hw_breakpoint_count ();
 614       pts = proc->private->arch_private->bpts;
 615     }
 616
 617   for (i = 0; i < count; i++)
 618     if (arm_linux_hw_breakpoint_equal (&p, pts + i))
 619       {
 620         struct update_registers_data data = { watch, i };
 621         pts[i].control = arm_hwbp_control_disable (pts[i].control);
 622         find_inferior (&all_lwps, update_registers_callback, &data);
 623         return 0;
 624       }
 625
 626   /* No watchpoint matched.  */
 627   return -1;
 628 }
 629
 630 /* Return whether current thread is stopped due to a watchpoint.  */
 631 static int
 632 arm_stopped_by_watchpoint (void)
 633 {
 634   struct lwp_info *lwp = get_thread_lwp (current_inferior);
 635   siginfo_t siginfo;
 636
 637   /* We must be able to set hardware watchpoints.  */
 638   if (arm_linux_get_hw_watchpoint_count () == 0)
 639     return 0;
 640
 641   /* Retrieve siginfo.  */
 642   errno = 0;
 643   ptrace (PTRACE_GETSIGINFO, lwpid_of (lwp), 0, &siginfo);
 644   if (errno != 0)
 645     return 0;
 646
 647   /* This must be a hardware breakpoint.  */
 648   if (siginfo.si_signo != SIGTRAP
 649       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
 650     return 0;
 651
 652   /* If we are in a positive slot then we're looking at a breakpoint and not
 653      a watchpoint.  */
 654   if (siginfo.si_errno >= 0)
 655     return 0;
 656
 657   /* Cache stopped data address for use by arm_stopped_data_address.  */
 658   lwp->arch_private->stopped_data_address
 659     = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
 660
 661   return 1;
 662 }
 663
 664 /* Return data address that triggered watchpoint.  Called only if
 665    arm_stopped_by_watchpoint returned true.  */
 666 static CORE_ADDR
 667 arm_stopped_data_address (void)
 668 {
 669   struct lwp_info *lwp = get_thread_lwp (current_inferior);
 670   return lwp->arch_private->stopped_data_address;
 671 }
 672
 673 /* Called when a new process is created.  */
 674 static struct arch_process_info *
 675 arm_new_process (void)
 676 {
 677   struct arch_process_info *info = xcalloc (1, sizeof (*info));
 678   return info;
 679 }
 680
 681 /* Called when a new thread is detected.  */
 682 static struct arch_lwp_info *
 683 arm_new_thread (void)
 684 {
 685   struct arch_lwp_info *info = xcalloc (1, sizeof (*info));
 686   int i;
 687
 688   for (i = 0; i < MAX_BPTS; i++)
 689     info->bpts_changed[i] = 1;
 690   for (i = 0; i < MAX_WPTS; i++)
 691     info->wpts_changed[i] = 1;
 692
 693   return info;
 694 }
 695
 696 /* Called when resuming a thread.
 697    If the debug regs have changed, update the thread's copies.  */
 698 static void
 699 arm_prepare_to_resume (struct lwp_info *lwp)
 700 {
 701   int pid = lwpid_of (lwp);
 702   struct process_info *proc = find_process_pid (pid_of (lwp));
 703   struct arch_process_info *proc_info = proc->private->arch_private;
 704   struct arch_lwp_info *lwp_info = lwp->arch_private;
 705   int i;
 706
 707   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
 708     if (lwp_info->bpts_changed[i])
 709       {
 710         errno = 0;
 711
 712         if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
 713           if (ptrace (PTRACE_SETHBPREGS, pid,
 714                       (PTRACE_ARG3_TYPE) ((i << 1) + 1),
 715                       &proc_info->bpts[i].address) < 0)
 716             perror_with_name ("Unexpected error setting breakpoint address");
 717
 718         if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
 719           if (ptrace (PTRACE_SETHBPREGS, pid,
 720                       (PTRACE_ARG3_TYPE) ((i << 1) + 2),
 721                       &proc_info->bpts[i].control) < 0)
 722             perror_with_name ("Unexpected error setting breakpoint");
 723
 724         lwp_info->bpts_changed[i] = 0;
 725       }
 726
 727   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
 728     if (lwp_info->wpts_changed[i])
 729       {
 730         errno = 0;
 731
 732         if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
 733           if (ptrace (PTRACE_SETHBPREGS, pid,
 734                       (PTRACE_ARG3_TYPE) -((i << 1) + 1),
 735                       &proc_info->wpts[i].address) < 0)
 736             perror_with_name ("Unexpected error setting watchpoint address");
 737
 738         if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
 739           if (ptrace (PTRACE_SETHBPREGS, pid,
 740                       (PTRACE_ARG3_TYPE) -((i << 1) + 2),
 741                       &proc_info->wpts[i].control) < 0)
 742             perror_with_name ("Unexpected error setting watchpoint");
 743
 744         lwp_info->wpts_changed[i] = 0;
 745       }
 746 }
 747
 748
 749 static int
 750 arm_get_hwcap (unsigned long *valp)
 751 {
 752   unsigned char *data = alloca (8);
 753   int offset = 0;
 754
 755   while ((*the_target->read_auxv) (offset, data, 8) == 8)
 756     {
 757       unsigned int *data_p = (unsigned int *)data;
 758       if (data_p[0] == AT_HWCAP)
 759         {
 760           *valp = data_p[1];
 761           return 1;
 762         }
 763
 764       offset += 8;
 765     }
 766
 767   *valp = 0;
 768   return 0;
 769 }
 770
 771 static void
 772 arm_arch_setup (void)
 773 {
 774   int pid = lwpid_of (get_thread_lwp (current_inferior));
 775
 776   /* Query hardware watchpoint/breakpoint capabilities.  */
 777   arm_linux_init_hwbp_cap (pid);
 778
 779   arm_hwcap = 0;
 780   if (arm_get_hwcap (&arm_hwcap) == 0)
 781     {
 782       init_registers_arm ();
 783       return;
 784     }
 785
 786   if (arm_hwcap & HWCAP_IWMMXT)
 787     {
 788       init_registers_arm_with_iwmmxt ();
 789       return;
 790     }
 791
 792   if (arm_hwcap & HWCAP_VFP)
 793     {
 794       char *buf;
 795
 796       /* NEON implies either no VFP, or VFPv3-D32.  We only support
 797          it with VFP.  */
 798       if (arm_hwcap & HWCAP_NEON)
 799         init_registers_arm_with_neon ();
 800       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 801         init_registers_arm_with_vfpv3 ();
 802       else
 803         init_registers_arm_with_vfpv2 ();
 804
 805       /* Now make sure that the kernel supports reading these
 806          registers.  Support was added in 2.6.30.  */
 807       errno = 0;
 808       buf = xmalloc (32 * 8 + 4);
 809       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 810           && errno == EIO)
 811         {
 812           arm_hwcap = 0;
 813           init_registers_arm ();
 814         }
 815       free (buf);
 816
 817       return;
 818     }
 819
 820   /* The default configuration uses legacy FPA registers, probably
 821      simulated.  */
 822   init_registers_arm ();
 823 }
 824
 825 struct regset_info target_regsets[] = {
 826   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
 827     GENERAL_REGS,
 828     arm_fill_gregset, arm_store_gregset },
 829   { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
 830     EXTENDED_REGS,
 831     arm_fill_wmmxregset, arm_store_wmmxregset },
 832   { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
 833     EXTENDED_REGS,
 834     arm_fill_vfpregset, arm_store_vfpregset },
 835   { 0, 0, 0, -1, -1, NULL, NULL }
 836 };
 837
 838 struct linux_target_ops the_low_target = {
 839   arm_arch_setup,
 840   arm_num_regs,
 841   arm_regmap,
 842   NULL,
 843   arm_cannot_fetch_register,
 844   arm_cannot_store_register,
 845   NULL, /* fetch_register */
 846   arm_get_pc,
 847   arm_set_pc,
 848
 849   /* Define an ARM-mode breakpoint; we only set breakpoints in the C
 850      library, which is most likely to be ARM.  If the kernel supports
 851      clone events, we will never insert a breakpoint, so even a Thumb
 852      C library will work; so will mixing EABI/non-EABI gdbserver and
 853      application.  */
 854 #ifndef __ARM_EABI__
 855   (const unsigned char *) &arm_breakpoint,
 856 #else
 857   (const unsigned char *) &arm_eabi_breakpoint,
 858 #endif
 859   arm_breakpoint_len,
 860   arm_reinsert_addr,
 861   0,
 862   arm_breakpoint_at,
 863   arm_insert_point,
 864   arm_remove_point,
 865   arm_stopped_by_watchpoint,
 866   arm_stopped_data_address,
 867   NULL, /* collect_ptrace_register */
 868   NULL, /* supply_ptrace_register */
 869   NULL, /* siginfo_fixup */
 870   arm_new_process,
 871   arm_new_thread,
 872   arm_prepare_to_resume,
 873 };