gdb/gdbserver/linux-arm-low.c

   1 /* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
   3    2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #include "server.h"
  21 #include "linux-low.h"
  22
  23 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
  24    On Bionic elf.h and linux/elf.h have conflicting definitions.  */
  25 #ifndef ELFMAG0
  26 #include <elf.h>
  27 #endif
  28 #include <sys/ptrace.h>
  29 #include <signal.h>
  30
  31 /* Defined in auto-generated files.  */
  32 void init_registers_arm (void);
  33 void init_registers_arm_with_iwmmxt (void);
  34 void init_registers_arm_with_vfpv2 (void);
  35 void init_registers_arm_with_vfpv3 (void);
  36 void init_registers_arm_with_neon (void);
  37
  38 #ifndef PTRACE_GET_THREAD_AREA
  39 #define PTRACE_GET_THREAD_AREA 22
  40 #endif
  41
  42 #ifndef PTRACE_GETWMMXREGS
  43 # define PTRACE_GETWMMXREGS 18
  44 # define PTRACE_SETWMMXREGS 19
  45 #endif
  46
  47 #ifndef PTRACE_GETVFPREGS
  48 # define PTRACE_GETVFPREGS 27
  49 # define PTRACE_SETVFPREGS 28
  50 #endif
  51
  52 #ifndef PTRACE_GETHBPREGS
  53 #define PTRACE_GETHBPREGS 29
  54 #define PTRACE_SETHBPREGS 30
  55 #endif
  56
  57 /* Information describing the hardware breakpoint capabilities.  */
  58 struct arm_linux_hwbp_cap
  59 {
  60   unsigned char arch;
  61   unsigned char max_wp_length;
  62   unsigned char wp_count;
  63   unsigned char bp_count;
  64 };
  65
  66 /* Enum describing the different types of ARM hardware break-/watch-points.  */
  67 typedef enum
  68 {
  69   arm_hwbp_break = 0,
  70   arm_hwbp_load = 1,
  71   arm_hwbp_store = 2,
  72   arm_hwbp_access = 3
  73 } arm_hwbp_type;
  74
  75 /* Type describing an ARM Hardware Breakpoint Control register value.  */
  76 typedef unsigned int arm_hwbp_control_t;
  77
  78 /* Structure used to keep track of hardware break-/watch-points.  */
  79 struct arm_linux_hw_breakpoint
  80 {
  81   /* Address to break on, or being watched.  */
  82   unsigned int address;
  83   /* Control register for break-/watch- point.  */
  84   arm_hwbp_control_t control;
  85 };
  86
  87 /* Since we cannot dynamically allocate subfields of arch_process_info,
  88    assume a maximum number of supported break-/watchpoints.  */
  89 #define MAX_BPTS 32
  90 #define MAX_WPTS 32
  91
  92 /* Per-process arch-specific data we want to keep.  */
  93 struct arch_process_info
  94 {
  95   /* Hardware breakpoints for this process.  */
  96   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
  97   /* Hardware watchpoints for this process.  */
  98   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
  99 };
 100
 101 /* Per-thread arch-specific data we want to keep.  */
 102 struct arch_lwp_info
 103 {
 104   /* Non-zero if our copy differs from what's recorded in the thread.  */
 105   char bpts_changed[MAX_BPTS];
 106   char wpts_changed[MAX_WPTS];
 107   /* Cached stopped data address.  */
 108   CORE_ADDR stopped_data_address;
 109 };
 110
 111 static unsigned long arm_hwcap;
 112
 113 /* These are in <asm/elf.h> in current kernels.  */
 114 #define HWCAP_VFP       64
 115 #define HWCAP_IWMMXT    512
 116 #define HWCAP_NEON      4096
 117 #define HWCAP_VFPv3     8192
 118 #define HWCAP_VFPv3D16  16384
 119
 120 #ifdef HAVE_SYS_REG_H
 121 #include <sys/reg.h>
 122 #endif
 123
 124 #define arm_num_regs 26
 125
 126 static int arm_regmap[] = {
 127   0, 4, 8, 12, 16, 20, 24, 28,
 128   32, 36, 40, 44, 48, 52, 56, 60,
 129   -1, -1, -1, -1, -1, -1, -1, -1, -1,
 130   64
 131 };
 132
 133 static int
 134 arm_cannot_store_register (int regno)
 135 {
 136   return (regno >= arm_num_regs);
 137 }
 138
 139 static int
 140 arm_cannot_fetch_register (int regno)
 141 {
 142   return (regno >= arm_num_regs);
 143 }
 144
 145 static void
 146 arm_fill_gregset (struct regcache *regcache, void *buf)
 147 {
 148   int i;
 149
 150   for (i = 0; i < arm_num_regs; i++)
 151     if (arm_regmap[i] != -1)
 152       collect_register (regcache, i, ((char *) buf) + arm_regmap[i]);
 153 }
 154
 155 static void
 156 arm_store_gregset (struct regcache *regcache, const void *buf)
 157 {
 158   int i;
 159   char zerobuf[8];
 160
 161   memset (zerobuf, 0, 8);
 162   for (i = 0; i < arm_num_regs; i++)
 163     if (arm_regmap[i] != -1)
 164       supply_register (regcache, i, ((char *) buf) + arm_regmap[i]);
 165     else
 166       supply_register (regcache, i, zerobuf);
 167 }
 168
 169 static void
 170 arm_fill_wmmxregset (struct regcache *regcache, void *buf)
 171 {
 172   int i;
 173
 174   if (!(arm_hwcap & HWCAP_IWMMXT))
 175     return;
 176
 177   for (i = 0; i < 16; i++)
 178     collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 179
 180   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 181   for (i = 0; i < 6; i++)
 182     collect_register (regcache, arm_num_regs + i + 16,
 183                       (char *) buf + 16 * 8 + i * 4);
 184 }
 185
 186 static void
 187 arm_store_wmmxregset (struct regcache *regcache, const void *buf)
 188 {
 189   int i;
 190
 191   if (!(arm_hwcap & HWCAP_IWMMXT))
 192     return;
 193
 194   for (i = 0; i < 16; i++)
 195     supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 196
 197   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 198   for (i = 0; i < 6; i++)
 199     supply_register (regcache, arm_num_regs + i + 16,
 200                      (char *) buf + 16 * 8 + i * 4);
 201 }
 202
 203 static void
 204 arm_fill_vfpregset (struct regcache *regcache, void *buf)
 205 {
 206   int i, num, base;
 207
 208   if (!(arm_hwcap & HWCAP_VFP))
 209     return;
 210
 211   if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 212     num = 32;
 213   else
 214     num = 16;
 215
 216   base = find_regno ("d0");
 217   for (i = 0; i < num; i++)
 218     collect_register (regcache, base + i, (char *) buf + i * 8);
 219
 220   collect_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
 221 }
 222
 223 static void
 224 arm_store_vfpregset (struct regcache *regcache, const void *buf)
 225 {
 226   int i, num, base;
 227
 228   if (!(arm_hwcap & HWCAP_VFP))
 229     return;
 230
 231   if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 232     num = 32;
 233   else
 234     num = 16;
 235
 236   base = find_regno ("d0");
 237   for (i = 0; i < num; i++)
 238     supply_register (regcache, base + i, (char *) buf + i * 8);
 239
 240   supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
 241 }
 242
 243 extern int debug_threads;
 244
 245 static CORE_ADDR
 246 arm_get_pc (struct regcache *regcache)
 247 {
 248   unsigned long pc;
 249   collect_register_by_name (regcache, "pc", &pc);
 250   if (debug_threads)
 251     fprintf (stderr, "stop pc is %08lx\n", pc);
 252   return pc;
 253 }
 254
 255 static void
 256 arm_set_pc (struct regcache *regcache, CORE_ADDR pc)
 257 {
 258   unsigned long newpc = pc;
 259   supply_register_by_name (regcache, "pc", &newpc);
 260 }
 261
 262 /* Correct in either endianness.  */
 263 static const unsigned long arm_breakpoint = 0xef9f0001;
 264 #define arm_breakpoint_len 4
 265 static const unsigned short thumb_breakpoint = 0xde01;
 266 static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 };
 267
 268 /* For new EABI binaries.  We recognize it regardless of which ABI
 269    is used for gdbserver, so single threaded debugging should work
 270    OK, but for multi-threaded debugging we only insert the current
 271    ABI's breakpoint instruction.  For now at least.  */
 272 static const unsigned long arm_eabi_breakpoint = 0xe7f001f0;
 273
 274 static int
 275 arm_breakpoint_at (CORE_ADDR where)
 276 {
 277   struct regcache *regcache = get_thread_regcache (current_inferior, 1);
 278   unsigned long cpsr;
 279
 280   collect_register_by_name (regcache, "cpsr", &cpsr);
 281
 282   if (cpsr & 0x20)
 283     {
 284       /* Thumb mode.  */
 285       unsigned short insn;
 286
 287       (*the_target->read_memory) (where, (unsigned char *) &insn, 2);
 288       if (insn == thumb_breakpoint)
 289         return 1;
 290
 291       if (insn == thumb2_breakpoint[0])
 292         {
 293           (*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2);
 294           if (insn == thumb2_breakpoint[1])
 295             return 1;
 296         }
 297     }
 298   else
 299     {
 300       /* ARM mode.  */
 301       unsigned long insn;
 302
 303       (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
 304       if (insn == arm_breakpoint)
 305         return 1;
 306
 307       if (insn == arm_eabi_breakpoint)
 308         return 1;
 309     }
 310
 311   return 0;
 312 }
 313
 314 /* We only place breakpoints in empty marker functions, and thread locking
 315    is outside of the function.  So rather than importing software single-step,
 316    we can just run until exit.  */
 317 static CORE_ADDR
 318 arm_reinsert_addr (void)
 319 {
 320   struct regcache *regcache = get_thread_regcache (current_inferior, 1);
 321   unsigned long pc;
 322   collect_register_by_name (regcache, "lr", &pc);
 323   return pc;
 324 }
 325
 326 /* Fetch the thread-local storage pointer for libthread_db.  */
 327
 328 ps_err_e
 329 ps_get_thread_area (const struct ps_prochandle *ph,
 330                     lwpid_t lwpid, int idx, void **base)
 331 {
 332   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 333     return PS_ERR;
 334
 335   /* IDX is the bias from the thread pointer to the beginning of the
 336      thread descriptor.  It has to be subtracted due to implementation
 337      quirks in libthread_db.  */
 338   *base = (void *) ((char *)*base - idx);
 339
 340   return PS_OK;
 341 }
 342
 343
 344 /* Get hold of the Hardware Breakpoint information for the target we are
 345    attached to.  Returns NULL if the kernel doesn't support Hardware
 346    breakpoints at all, or a pointer to the information structure.  */
 347 static const struct arm_linux_hwbp_cap *
 348 arm_linux_get_hwbp_cap (void)
 349 {
 350   /* The info structure we return.  */
 351   static struct arm_linux_hwbp_cap info;
 352
 353   /* Is INFO in a good state?  -1 means that no attempt has been made to
 354      initialize INFO; 0 means an attempt has been made, but it failed; 1
 355      means INFO is in an initialized state.  */
 356   static int available = -1;
 357
 358   if (available == -1)
 359     {
 360       int pid = lwpid_of (get_thread_lwp (current_inferior));
 361       unsigned int val;
 362
 363       if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
 364         available = 0;
 365       else
 366         {
 367           info.arch = (unsigned char)((val >> 24) & 0xff);
 368           info.max_wp_length = (unsigned char)((val >> 16) & 0xff);
 369           info.wp_count = (unsigned char)((val >> 8) & 0xff);
 370           info.bp_count = (unsigned char)(val & 0xff);
 371           available = (info.arch != 0);
 372         }
 373
 374       if (available)
 375         {
 376           if (info.wp_count > MAX_WPTS)
 377             internal_error (__FILE__, __LINE__,
 378                             "Unsupported number of watchpoints");
 379           if (info.bp_count > MAX_BPTS)
 380             internal_error (__FILE__, __LINE__,
 381                             "Unsupported number of breakpoints");
 382         }
 383     }
 384
 385   return available == 1 ? &info : NULL;
 386 }
 387
 388 /* How many hardware breakpoints are available?  */
 389 static int
 390 arm_linux_get_hw_breakpoint_count (void)
 391 {
 392   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 393   return cap != NULL ? cap->bp_count : 0;
 394 }
 395
 396 /* How many hardware watchpoints are available?  */
 397 static int
 398 arm_linux_get_hw_watchpoint_count (void)
 399 {
 400   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 401   return cap != NULL ? cap->wp_count : 0;
 402 }
 403
 404 /* Maximum length of area watched by hardware watchpoint.  */
 405 static int
 406 arm_linux_get_hw_watchpoint_max_length (void)
 407 {
 408   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 409   return cap != NULL ? cap->max_wp_length : 0;
 410 }
 411
 412 /* Initialize an ARM hardware break-/watch-point control register value.
 413    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 414    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 415    */
 416 static arm_hwbp_control_t
 417 arm_hwbp_control_initialize (unsigned byte_address_select,
 418                              arm_hwbp_type hwbp_type,
 419                              int enable)
 420 {
 421   gdb_assert ((byte_address_select & ~0xffU) == 0);
 422   gdb_assert (hwbp_type != arm_hwbp_break
 423               || ((byte_address_select & 0xfU) != 0));
 424
 425   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 426 }
 427
 428 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 429 static int
 430 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 431 {
 432   return control & 0x1;
 433 }
 434
 435 /* Is the breakpoint control value CONTROL initialized?  */
 436 static int
 437 arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
 438 {
 439   return control != 0;
 440 }
 441
 442 /* Change a breakpoint control word so that it is in the disabled state.  */
 443 static arm_hwbp_control_t
 444 arm_hwbp_control_disable (arm_hwbp_control_t control)
 445 {
 446   return control & ~0x1;
 447 }
 448
 449 /* Are two break-/watch-points equal?  */
 450 static int
 451 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
 452                                const struct arm_linux_hw_breakpoint *p2)
 453 {
 454   return p1->address == p2->address && p1->control == p2->control;
 455 }
 456
 457 /* Initialize the hardware breakpoint structure P for a breakpoint or
 458    watchpoint at ADDR to LEN.  The type of watchpoint is given in TYPE.
 459    Returns -1 if TYPE is unsupported, 0 if TYPE represents a breakpoint,
 460    and 1 if type represents a watchpoint.  */
 461 static int
 462 arm_linux_hw_point_initialize (char type, CORE_ADDR addr, int len,
 463                                struct arm_linux_hw_breakpoint *p)
 464 {
 465   arm_hwbp_type hwbp_type;
 466   unsigned mask;
 467
 468   /* Breakpoint/watchpoint types (GDB terminology):
 469      0 = memory breakpoint for instructions
 470      (not supported; done via memory write instead)
 471      1 = hardware breakpoint for instructions (supported)
 472      2 = write watchpoint (supported)
 473      3 = read watchpoint (supported)
 474      4 = access watchpoint (supported).  */
 475   switch (type)
 476     {
 477     case '1':
 478       hwbp_type = arm_hwbp_break;
 479       break;
 480     case '2':
 481       hwbp_type = arm_hwbp_store;
 482       break;
 483     case '3':
 484       hwbp_type = arm_hwbp_load;
 485       break;
 486     case '4':
 487       hwbp_type = arm_hwbp_access;
 488       break;
 489     default:
 490       /* Unsupported.  */
 491       return -1;
 492     }
 493
 494   if (hwbp_type == arm_hwbp_break)
 495     {
 496       /* For breakpoints, the length field encodes the mode.  */
 497       switch (len)
 498         {
 499         case 2:  /* 16-bit Thumb mode breakpoint */
 500         case 3:  /* 32-bit Thumb mode breakpoint */
 501           mask = 0x3 << (addr & 2);
 502           break;
 503         case 4:  /* 32-bit ARM mode breakpoint */
 504           mask = 0xf;
 505           break;
 506         default:
 507           /* Unsupported. */
 508           return -1;
 509         }
 510
 511       addr &= ~3;
 512     }
 513   else
 514     {
 515       CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
 516       CORE_ADDR aligned_addr;
 517
 518       /* Can not set watchpoints for zero or negative lengths.  */
 519       if (len <= 0)
 520         return -1;
 521       /* The current ptrace interface can only handle watchpoints that are a
 522          power of 2.  */
 523       if ((len & (len - 1)) != 0)
 524         return -1;
 525
 526       /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
 527          range covered by a watchpoint.  */
 528       aligned_addr = addr & ~(max_wp_length - 1);
 529       if (aligned_addr + max_wp_length < addr + len)
 530         return -1;
 531
 532       mask = (1 << len) - 1;
 533     }
 534
 535   p->address = (unsigned int) addr;
 536   p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
 537
 538   return hwbp_type != arm_hwbp_break;
 539 }
 540
 541 /* Callback to mark a watch-/breakpoint to be updated in all threads of
 542    the current process.  */
 543
 544 struct update_registers_data
 545 {
 546   int watch;
 547   int i;
 548 };
 549
 550 static int
 551 update_registers_callback (struct inferior_list_entry *entry, void *arg)
 552 {
 553   struct lwp_info *lwp = (struct lwp_info *) entry;
 554   struct update_registers_data *data = (struct update_registers_data *) arg;
 555
 556   /* Only update the threads of the current process.  */
 557   if (pid_of (lwp) == pid_of (get_thread_lwp (current_inferior)))
 558     {
 559       /* The actual update is done later just before resuming the lwp,
 560          we just mark that the registers need updating.  */
 561       if (data->watch)
 562         lwp->arch_private->wpts_changed[data->i] = 1;
 563       else
 564         lwp->arch_private->bpts_changed[data->i] = 1;
 565
 566       /* If the lwp isn't stopped, force it to momentarily pause, so
 567          we can update its breakpoint registers.  */
 568       if (!lwp->stopped)
 569         linux_stop_lwp (lwp);
 570     }
 571
 572   return 0;
 573 }
 574
 575 /* Insert hardware break-/watchpoint.  */
 576 static int
 577 arm_insert_point (char type, CORE_ADDR addr, int len)
 578 {
 579   struct process_info *proc = current_process ();
 580   struct arm_linux_hw_breakpoint p, *pts;
 581   int watch, i, count;
 582
 583   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 584   if (watch < 0)
 585     {
 586       /* Unsupported.  */
 587       return 1;
 588     }
 589
 590   if (watch)
 591     {
 592       count = arm_linux_get_hw_watchpoint_count ();
 593       pts = proc->private->arch_private->wpts;
 594     }
 595   else
 596     {
 597       count = arm_linux_get_hw_breakpoint_count ();
 598       pts = proc->private->arch_private->bpts;
 599     }
 600
 601   for (i = 0; i < count; i++)
 602     if (!arm_hwbp_control_is_enabled (pts[i].control))
 603       {
 604         struct update_registers_data data = { watch, i };
 605         pts[i] = p;
 606         find_inferior (&all_lwps, update_registers_callback, &data);
 607         return 0;
 608       }
 609
 610   /* We're out of watchpoints.  */
 611   return -1;
 612 }
 613
 614 /* Remove hardware break-/watchpoint.  */
 615 static int
 616 arm_remove_point (char type, CORE_ADDR addr, int len)
 617 {
 618   struct process_info *proc = current_process ();
 619   struct arm_linux_hw_breakpoint p, *pts;
 620   int watch, i, count;
 621
 622   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 623   if (watch < 0)
 624     {
 625       /* Unsupported.  */
 626       return -1;
 627     }
 628
 629   if (watch)
 630     {
 631       count = arm_linux_get_hw_watchpoint_count ();
 632       pts = proc->private->arch_private->wpts;
 633     }
 634   else
 635     {
 636       count = arm_linux_get_hw_breakpoint_count ();
 637       pts = proc->private->arch_private->bpts;
 638     }
 639
 640   for (i = 0; i < count; i++)
 641     if (arm_linux_hw_breakpoint_equal (&p, pts + i))
 642       {
 643         struct update_registers_data data = { watch, i };
 644         pts[i].control = arm_hwbp_control_disable (pts[i].control);
 645         find_inferior (&all_lwps, update_registers_callback, &data);
 646         return 0;
 647       }
 648
 649   /* No watchpoint matched.  */
 650   return -1;
 651 }
 652
 653 /* Return whether current thread is stopped due to a watchpoint.  */
 654 static int
 655 arm_stopped_by_watchpoint (void)
 656 {
 657   struct lwp_info *lwp = get_thread_lwp (current_inferior);
 658   struct siginfo siginfo;
 659
 660   /* We must be able to set hardware watchpoints.  */
 661   if (arm_linux_get_hw_watchpoint_count () == 0)
 662     return 0;
 663
 664   /* Retrieve siginfo.  */
 665   errno = 0;
 666   ptrace (PTRACE_GETSIGINFO, lwpid_of (lwp), 0, &siginfo);
 667   if (errno != 0)
 668     return 0;
 669
 670   /* This must be a hardware breakpoint.  */
 671   if (siginfo.si_signo != SIGTRAP
 672       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
 673     return 0;
 674
 675   /* If we are in a positive slot then we're looking at a breakpoint and not
 676      a watchpoint.  */
 677   if (siginfo.si_errno >= 0)
 678     return 0;
 679
 680   /* Cache stopped data address for use by arm_stopped_data_address.  */
 681   lwp->arch_private->stopped_data_address
 682     = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
 683
 684   return 1;
 685 }
 686
 687 /* Return data address that triggered watchpoint.  Called only if
 688    arm_stopped_by_watchpoint returned true.  */
 689 static CORE_ADDR
 690 arm_stopped_data_address (void)
 691 {
 692   struct lwp_info *lwp = get_thread_lwp (current_inferior);
 693   return lwp->arch_private->stopped_data_address;
 694 }
 695
 696 /* Called when a new process is created.  */
 697 static struct arch_process_info *
 698 arm_new_process (void)
 699 {
 700   struct arch_process_info *info = xcalloc (1, sizeof (*info));
 701   return info;
 702 }
 703
 704 /* Called when a new thread is detected.  */
 705 static struct arch_lwp_info *
 706 arm_new_thread (void)
 707 {
 708   struct arch_lwp_info *info = xcalloc (1, sizeof (*info));
 709   int i;
 710
 711   for (i = 0; i < MAX_BPTS; i++)
 712     info->bpts_changed[i] = 1;
 713   for (i = 0; i < MAX_WPTS; i++)
 714     info->wpts_changed[i] = 1;
 715
 716   return info;
 717 }
 718
 719 /* Called when resuming a thread.
 720    If the debug regs have changed, update the thread's copies.  */
 721 static void
 722 arm_prepare_to_resume (struct lwp_info *lwp)
 723 {
 724   int pid = lwpid_of (lwp);
 725   struct process_info *proc = find_process_pid (pid_of (lwp));
 726   struct arch_process_info *proc_info = proc->private->arch_private;
 727   struct arch_lwp_info *lwp_info = lwp->arch_private;
 728   int i;
 729
 730   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
 731     if (lwp_info->bpts_changed[i])
 732       {
 733         errno = 0;
 734
 735         if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
 736           if (ptrace (PTRACE_SETHBPREGS, pid, ((i << 1) + 1),
 737               &proc_info->bpts[i].address) < 0)
 738             error (_("Unexpected error setting breakpoint address"));
 739
 740         if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
 741           if (ptrace (PTRACE_SETHBPREGS, pid, ((i << 1) + 2),
 742               &proc_info->bpts[i].control) < 0)
 743             error (_("Unexpected error setting breakpoint"));
 744
 745         lwp_info->bpts_changed[i] = 0;
 746       }
 747
 748   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
 749     if (lwp_info->wpts_changed[i])
 750       {
 751         errno = 0;
 752
 753         if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
 754           if (ptrace (PTRACE_SETHBPREGS, pid, -((i << 1) + 1),
 755               &proc_info->wpts[i].address) < 0)
 756             error (_("Unexpected error setting watchpoint address"));
 757
 758         if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
 759           if (ptrace (PTRACE_SETHBPREGS, pid, -((i << 1) + 2),
 760               &proc_info->wpts[i].control) < 0)
 761             error (_("Unexpected error setting watchpoint"));
 762
 763         lwp_info->wpts_changed[i] = 0;
 764       }
 765 }
 766
 767
 768 static int
 769 arm_get_hwcap (unsigned long *valp)
 770 {
 771   unsigned char *data = alloca (8);
 772   int offset = 0;
 773
 774   while ((*the_target->read_auxv) (offset, data, 8) == 8)
 775     {
 776       unsigned int *data_p = (unsigned int *)data;
 777       if (data_p[0] == AT_HWCAP)
 778         {
 779           *valp = data_p[1];
 780           return 1;
 781         }
 782
 783       offset += 8;
 784     }
 785
 786   *valp = 0;
 787   return 0;
 788 }
 789
 790 static void
 791 arm_arch_setup (void)
 792 {
 793   arm_hwcap = 0;
 794   if (arm_get_hwcap (&arm_hwcap) == 0)
 795     {
 796       init_registers_arm ();
 797       return;
 798     }
 799
 800   if (arm_hwcap & HWCAP_IWMMXT)
 801     {
 802       init_registers_arm_with_iwmmxt ();
 803       return;
 804     }
 805
 806   if (arm_hwcap & HWCAP_VFP)
 807     {
 808       int pid;
 809       char *buf;
 810
 811       /* NEON implies either no VFP, or VFPv3-D32.  We only support
 812          it with VFP.  */
 813       if (arm_hwcap & HWCAP_NEON)
 814         init_registers_arm_with_neon ();
 815       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 816         init_registers_arm_with_vfpv3 ();
 817       else
 818         init_registers_arm_with_vfpv2 ();
 819
 820       /* Now make sure that the kernel supports reading these
 821          registers.  Support was added in 2.6.30.  */
 822       pid = lwpid_of (get_thread_lwp (current_inferior));
 823       errno = 0;
 824       buf = xmalloc (32 * 8 + 4);
 825       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 826           && errno == EIO)
 827         {
 828           arm_hwcap = 0;
 829           init_registers_arm ();
 830         }
 831       free (buf);
 832
 833       return;
 834     }
 835
 836   /* The default configuration uses legacy FPA registers, probably
 837      simulated.  */
 838   init_registers_arm ();
 839 }
 840
 841 struct regset_info target_regsets[] = {
 842   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
 843     GENERAL_REGS,
 844     arm_fill_gregset, arm_store_gregset },
 845   { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
 846     EXTENDED_REGS,
 847     arm_fill_wmmxregset, arm_store_wmmxregset },
 848   { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
 849     EXTENDED_REGS,
 850     arm_fill_vfpregset, arm_store_vfpregset },
 851   { 0, 0, 0, -1, -1, NULL, NULL }
 852 };
 853
 854 struct linux_target_ops the_low_target = {
 855   arm_arch_setup,
 856   arm_num_regs,
 857   arm_regmap,
 858   arm_cannot_fetch_register,
 859   arm_cannot_store_register,
 860   arm_get_pc,
 861   arm_set_pc,
 862
 863   /* Define an ARM-mode breakpoint; we only set breakpoints in the C
 864      library, which is most likely to be ARM.  If the kernel supports
 865      clone events, we will never insert a breakpoint, so even a Thumb
 866      C library will work; so will mixing EABI/non-EABI gdbserver and
 867      application.  */
 868 #ifndef __ARM_EABI__
 869   (const unsigned char *) &arm_breakpoint,
 870 #else
 871   (const unsigned char *) &arm_eabi_breakpoint,
 872 #endif
 873   arm_breakpoint_len,
 874   arm_reinsert_addr,
 875   0,
 876   arm_breakpoint_at,
 877   arm_insert_point,
 878   arm_remove_point,
 879   arm_stopped_by_watchpoint,
 880   arm_stopped_data_address,
 881   NULL, /* collect_ptrace_register */
 882   NULL, /* supply_ptrace_register */
 883   NULL, /* siginfo_fixup */
 884   arm_new_process,
 885   arm_new_thread,
 886   arm_prepare_to_resume,
 887 };