gdb/gdbserver/linux-arm-low.c

   1 /* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2016 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21 #include "arch/arm.h"
  22 #include "arch/arm-linux.h"
  23 #include "arch/arm-get-next-pcs.h"
  24 #include "linux-aarch32-low.h"
  25
  26 #include <sys/uio.h>
  27 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
  28    On Bionic elf.h and linux/elf.h have conflicting definitions.  */
  29 #ifndef ELFMAG0
  30 #include <elf.h>
  31 #endif
  32 #include "nat/gdb_ptrace.h"
  33 #include <signal.h>
  34 #include <sys/syscall.h>
  35
  36 /* Defined in auto-generated files.  */
  37 void init_registers_arm (void);
  38 extern const struct target_desc *tdesc_arm;
  39
  40 void init_registers_arm_with_iwmmxt (void);
  41 extern const struct target_desc *tdesc_arm_with_iwmmxt;
  42
  43 void init_registers_arm_with_vfpv2 (void);
  44 extern const struct target_desc *tdesc_arm_with_vfpv2;
  45
  46 void init_registers_arm_with_vfpv3 (void);
  47 extern const struct target_desc *tdesc_arm_with_vfpv3;
  48
  49 #ifndef PTRACE_GET_THREAD_AREA
  50 #define PTRACE_GET_THREAD_AREA 22
  51 #endif
  52
  53 #ifndef PTRACE_GETWMMXREGS
  54 # define PTRACE_GETWMMXREGS 18
  55 # define PTRACE_SETWMMXREGS 19
  56 #endif
  57
  58 #ifndef PTRACE_GETVFPREGS
  59 # define PTRACE_GETVFPREGS 27
  60 # define PTRACE_SETVFPREGS 28
  61 #endif
  62
  63 #ifndef PTRACE_GETHBPREGS
  64 #define PTRACE_GETHBPREGS 29
  65 #define PTRACE_SETHBPREGS 30
  66 #endif
  67
  68 /* Information describing the hardware breakpoint capabilities.  */
  69 static struct
  70 {
  71   unsigned char arch;
  72   unsigned char max_wp_length;
  73   unsigned char wp_count;
  74   unsigned char bp_count;
  75 } arm_linux_hwbp_cap;
  76
  77 /* Enum describing the different types of ARM hardware break-/watch-points.  */
  78 typedef enum
  79 {
  80   arm_hwbp_break = 0,
  81   arm_hwbp_load = 1,
  82   arm_hwbp_store = 2,
  83   arm_hwbp_access = 3
  84 } arm_hwbp_type;
  85
  86 /* Type describing an ARM Hardware Breakpoint Control register value.  */
  87 typedef unsigned int arm_hwbp_control_t;
  88
  89 /* Structure used to keep track of hardware break-/watch-points.  */
  90 struct arm_linux_hw_breakpoint
  91 {
  92   /* Address to break on, or being watched.  */
  93   unsigned int address;
  94   /* Control register for break-/watch- point.  */
  95   arm_hwbp_control_t control;
  96 };
  97
  98 /* Since we cannot dynamically allocate subfields of arch_process_info,
  99    assume a maximum number of supported break-/watchpoints.  */
 100 #define MAX_BPTS 32
 101 #define MAX_WPTS 32
 102
 103 /* Per-process arch-specific data we want to keep.  */
 104 struct arch_process_info
 105 {
 106   /* Hardware breakpoints for this process.  */
 107   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 108   /* Hardware watchpoints for this process.  */
 109   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 110 };
 111
 112 /* Per-thread arch-specific data we want to keep.  */
 113 struct arch_lwp_info
 114 {
 115   /* Non-zero if our copy differs from what's recorded in the thread.  */
 116   char bpts_changed[MAX_BPTS];
 117   char wpts_changed[MAX_WPTS];
 118   /* Cached stopped data address.  */
 119   CORE_ADDR stopped_data_address;
 120 };
 121
 122 /* These are in <asm/elf.h> in current kernels.  */
 123 #define HWCAP_VFP       64
 124 #define HWCAP_IWMMXT    512
 125 #define HWCAP_NEON      4096
 126 #define HWCAP_VFPv3     8192
 127 #define HWCAP_VFPv3D16  16384
 128
 129 #ifdef HAVE_SYS_REG_H
 130 #include <sys/reg.h>
 131 #endif
 132
 133 #define arm_num_regs 26
 134
 135 static int arm_regmap[] = {
 136   0, 4, 8, 12, 16, 20, 24, 28,
 137   32, 36, 40, 44, 48, 52, 56, 60,
 138   -1, -1, -1, -1, -1, -1, -1, -1, -1,
 139   64
 140 };
 141
 142 /* Forward declarations needed for get_next_pcs ops.  */
 143 static ULONGEST get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
 144                                                            int len,
 145                                                            int byte_order);
 146
 147 static CORE_ADDR get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self,
 148                                                 CORE_ADDR val);
 149
 150 static CORE_ADDR get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self,
 151                                                CORE_ADDR pc);
 152
 153 static int get_next_pcs_is_thumb (struct arm_get_next_pcs *self);
 154
 155 /* get_next_pcs operations.  */
 156 static struct arm_get_next_pcs_ops get_next_pcs_ops = {
 157   get_next_pcs_read_memory_unsigned_integer,
 158   get_next_pcs_syscall_next_pc,
 159   get_next_pcs_addr_bits_remove,
 160   get_next_pcs_is_thumb
 161 };
 162
 163 static int
 164 arm_cannot_store_register (int regno)
 165 {
 166   return (regno >= arm_num_regs);
 167 }
 168
 169 static int
 170 arm_cannot_fetch_register (int regno)
 171 {
 172   return (regno >= arm_num_regs);
 173 }
 174
 175 static void
 176 arm_fill_wmmxregset (struct regcache *regcache, void *buf)
 177 {
 178   int i;
 179
 180   if (regcache->tdesc != tdesc_arm_with_iwmmxt)
 181     return;
 182
 183   for (i = 0; i < 16; i++)
 184     collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 185
 186   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 187   for (i = 0; i < 6; i++)
 188     collect_register (regcache, arm_num_regs + i + 16,
 189                       (char *) buf + 16 * 8 + i * 4);
 190 }
 191
 192 static void
 193 arm_store_wmmxregset (struct regcache *regcache, const void *buf)
 194 {
 195   int i;
 196
 197   if (regcache->tdesc != tdesc_arm_with_iwmmxt)
 198     return;
 199
 200   for (i = 0; i < 16; i++)
 201     supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
 202
 203   /* We only have access to wcssf, wcasf, and wcgr0-wcgr3.  */
 204   for (i = 0; i < 6; i++)
 205     supply_register (regcache, arm_num_regs + i + 16,
 206                      (char *) buf + 16 * 8 + i * 4);
 207 }
 208
 209 static void
 210 arm_fill_vfpregset (struct regcache *regcache, void *buf)
 211 {
 212   int num;
 213
 214   if (regcache->tdesc == tdesc_arm_with_neon
 215       || regcache->tdesc == tdesc_arm_with_vfpv3)
 216     num = 32;
 217   else if (regcache->tdesc == tdesc_arm_with_vfpv2)
 218     num = 16;
 219   else
 220     return;
 221
 222   arm_fill_vfpregset_num (regcache, buf, num);
 223 }
 224
 225 /* Wrapper of UNMAKE_THUMB_ADDR for get_next_pcs.  */
 226 static CORE_ADDR
 227 get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self, CORE_ADDR val)
 228 {
 229   return UNMAKE_THUMB_ADDR (val);
 230 }
 231
 232 static void
 233 arm_store_vfpregset (struct regcache *regcache, const void *buf)
 234 {
 235   int num;
 236
 237   if (regcache->tdesc == tdesc_arm_with_neon
 238       || regcache->tdesc == tdesc_arm_with_vfpv3)
 239     num = 32;
 240   else if (regcache->tdesc == tdesc_arm_with_vfpv2)
 241     num = 16;
 242   else
 243     return;
 244
 245   arm_store_vfpregset_num (regcache, buf, num);
 246 }
 247
 248 /* Wrapper of arm_is_thumb_mode for get_next_pcs.  */
 249 static int
 250 get_next_pcs_is_thumb (struct arm_get_next_pcs *self)
 251 {
 252   return arm_is_thumb_mode ();
 253 }
 254
 255 /* Read memory from the inferiror.
 256    BYTE_ORDER is ignored and there to keep compatiblity with GDB's
 257    read_memory_unsigned_integer. */
 258 static ULONGEST
 259 get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
 260                                            int len,
 261                                            int byte_order)
 262 {
 263   ULONGEST res;
 264
 265   (*the_target->read_memory) (memaddr, (unsigned char *) &res, len);
 266   return res;
 267 }
 268
 269 /* Fetch the thread-local storage pointer for libthread_db.  */
 270
 271 ps_err_e
 272 ps_get_thread_area (const struct ps_prochandle *ph,
 273                     lwpid_t lwpid, int idx, void **base)
 274 {
 275   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 276     return PS_ERR;
 277
 278   /* IDX is the bias from the thread pointer to the beginning of the
 279      thread descriptor.  It has to be subtracted due to implementation
 280      quirks in libthread_db.  */
 281   *base = (void *) ((char *)*base - idx);
 282
 283   return PS_OK;
 284 }
 285
 286
 287 /* Query Hardware Breakpoint information for the target we are attached to
 288    (using PID as ptrace argument) and set up arm_linux_hwbp_cap.  */
 289 static void
 290 arm_linux_init_hwbp_cap (int pid)
 291 {
 292   unsigned int val;
 293
 294   if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
 295     return;
 296
 297   arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
 298   if (arm_linux_hwbp_cap.arch == 0)
 299     return;
 300
 301   arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
 302   arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
 303   arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
 304
 305   if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
 306     internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
 307   if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
 308     internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
 309 }
 310
 311 /* How many hardware breakpoints are available?  */
 312 static int
 313 arm_linux_get_hw_breakpoint_count (void)
 314 {
 315   return arm_linux_hwbp_cap.bp_count;
 316 }
 317
 318 /* How many hardware watchpoints are available?  */
 319 static int
 320 arm_linux_get_hw_watchpoint_count (void)
 321 {
 322   return arm_linux_hwbp_cap.wp_count;
 323 }
 324
 325 /* Maximum length of area watched by hardware watchpoint.  */
 326 static int
 327 arm_linux_get_hw_watchpoint_max_length (void)
 328 {
 329   return arm_linux_hwbp_cap.max_wp_length;
 330 }
 331
 332 /* Initialize an ARM hardware break-/watch-point control register value.
 333    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 334    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 335    */
 336 static arm_hwbp_control_t
 337 arm_hwbp_control_initialize (unsigned byte_address_select,
 338                              arm_hwbp_type hwbp_type,
 339                              int enable)
 340 {
 341   gdb_assert ((byte_address_select & ~0xffU) == 0);
 342   gdb_assert (hwbp_type != arm_hwbp_break
 343               || ((byte_address_select & 0xfU) != 0));
 344
 345   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 346 }
 347
 348 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 349 static int
 350 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 351 {
 352   return control & 0x1;
 353 }
 354
 355 /* Is the breakpoint control value CONTROL initialized?  */
 356 static int
 357 arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
 358 {
 359   return control != 0;
 360 }
 361
 362 /* Change a breakpoint control word so that it is in the disabled state.  */
 363 static arm_hwbp_control_t
 364 arm_hwbp_control_disable (arm_hwbp_control_t control)
 365 {
 366   return control & ~0x1;
 367 }
 368
 369 /* Are two break-/watch-points equal?  */
 370 static int
 371 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
 372                                const struct arm_linux_hw_breakpoint *p2)
 373 {
 374   return p1->address == p2->address && p1->control == p2->control;
 375 }
 376
 377 /* Convert a raw breakpoint type to an enum arm_hwbp_type.  */
 378
 379 static arm_hwbp_type
 380 raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
 381 {
 382   switch (raw_type)
 383     {
 384     case raw_bkpt_type_hw:
 385       return arm_hwbp_break;
 386     case raw_bkpt_type_write_wp:
 387       return arm_hwbp_store;
 388     case raw_bkpt_type_read_wp:
 389       return arm_hwbp_load;
 390     case raw_bkpt_type_access_wp:
 391       return arm_hwbp_access;
 392     default:
 393       gdb_assert_not_reached ("unhandled raw type");
 394     }
 395 }
 396
 397 /* Initialize the hardware breakpoint structure P for a breakpoint or
 398    watchpoint at ADDR to LEN.  The type of watchpoint is given in TYPE.
 399    Returns -1 if TYPE is unsupported, or -2 if the particular combination
 400    of ADDR and LEN cannot be implemented.  Otherwise, returns 0 if TYPE
 401    represents a breakpoint and 1 if type represents a watchpoint.  */
 402 static int
 403 arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
 404                                int len, struct arm_linux_hw_breakpoint *p)
 405 {
 406   arm_hwbp_type hwbp_type;
 407   unsigned mask;
 408
 409   hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
 410
 411   if (hwbp_type == arm_hwbp_break)
 412     {
 413       /* For breakpoints, the length field encodes the mode.  */
 414       switch (len)
 415         {
 416         case 2:  /* 16-bit Thumb mode breakpoint */
 417         case 3:  /* 32-bit Thumb mode breakpoint */
 418           mask = 0x3;
 419           addr &= ~1;
 420           break;
 421         case 4:  /* 32-bit ARM mode breakpoint */
 422           mask = 0xf;
 423           addr &= ~3;
 424           break;
 425         default:
 426           /* Unsupported. */
 427           return -2;
 428         }
 429     }
 430   else
 431     {
 432       CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
 433       CORE_ADDR aligned_addr;
 434
 435       /* Can not set watchpoints for zero or negative lengths.  */
 436       if (len <= 0)
 437         return -2;
 438       /* The current ptrace interface can only handle watchpoints that are a
 439          power of 2.  */
 440       if ((len & (len - 1)) != 0)
 441         return -2;
 442
 443       /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
 444          range covered by a watchpoint.  */
 445       aligned_addr = addr & ~(max_wp_length - 1);
 446       if (aligned_addr + max_wp_length < addr + len)
 447         return -2;
 448
 449       mask = (1 << len) - 1;
 450     }
 451
 452   p->address = (unsigned int) addr;
 453   p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
 454
 455   return hwbp_type != arm_hwbp_break;
 456 }
 457
 458 /* Callback to mark a watch-/breakpoint to be updated in all threads of
 459    the current process.  */
 460
 461 struct update_registers_data
 462 {
 463   int watch;
 464   int i;
 465 };
 466
 467 static int
 468 update_registers_callback (struct inferior_list_entry *entry, void *arg)
 469 {
 470   struct thread_info *thread = (struct thread_info *) entry;
 471   struct lwp_info *lwp = get_thread_lwp (thread);
 472   struct update_registers_data *data = (struct update_registers_data *) arg;
 473
 474   /* Only update the threads of the current process.  */
 475   if (pid_of (thread) == pid_of (current_thread))
 476     {
 477       /* The actual update is done later just before resuming the lwp,
 478          we just mark that the registers need updating.  */
 479       if (data->watch)
 480         lwp->arch_private->wpts_changed[data->i] = 1;
 481       else
 482         lwp->arch_private->bpts_changed[data->i] = 1;
 483
 484       /* If the lwp isn't stopped, force it to momentarily pause, so
 485          we can update its breakpoint registers.  */
 486       if (!lwp->stopped)
 487         linux_stop_lwp (lwp);
 488     }
 489
 490   return 0;
 491 }
 492
 493 static int
 494 arm_supports_z_point_type (char z_type)
 495 {
 496   switch (z_type)
 497     {
 498     case Z_PACKET_SW_BP:
 499     case Z_PACKET_HW_BP:
 500     case Z_PACKET_WRITE_WP:
 501     case Z_PACKET_READ_WP:
 502     case Z_PACKET_ACCESS_WP:
 503       return 1;
 504     default:
 505       /* Leave the handling of sw breakpoints with the gdb client.  */
 506       return 0;
 507     }
 508 }
 509
 510 /* Insert hardware break-/watchpoint.  */
 511 static int
 512 arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 513                   int len, struct raw_breakpoint *bp)
 514 {
 515   struct process_info *proc = current_process ();
 516   struct arm_linux_hw_breakpoint p, *pts;
 517   int watch, i, count;
 518
 519   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 520   if (watch < 0)
 521     {
 522       /* Unsupported.  */
 523       return watch == -1 ? 1 : -1;
 524     }
 525
 526   if (watch)
 527     {
 528       count = arm_linux_get_hw_watchpoint_count ();
 529       pts = proc->priv->arch_private->wpts;
 530     }
 531   else
 532     {
 533       count = arm_linux_get_hw_breakpoint_count ();
 534       pts = proc->priv->arch_private->bpts;
 535     }
 536
 537   for (i = 0; i < count; i++)
 538     if (!arm_hwbp_control_is_enabled (pts[i].control))
 539       {
 540         struct update_registers_data data = { watch, i };
 541         pts[i] = p;
 542         find_inferior (&all_threads, update_registers_callback, &data);
 543         return 0;
 544       }
 545
 546   /* We're out of watchpoints.  */
 547   return -1;
 548 }
 549
 550 /* Remove hardware break-/watchpoint.  */
 551 static int
 552 arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 553                   int len, struct raw_breakpoint *bp)
 554 {
 555   struct process_info *proc = current_process ();
 556   struct arm_linux_hw_breakpoint p, *pts;
 557   int watch, i, count;
 558
 559   watch = arm_linux_hw_point_initialize (type, addr, len, &p);
 560   if (watch < 0)
 561     {
 562       /* Unsupported.  */
 563       return -1;
 564     }
 565
 566   if (watch)
 567     {
 568       count = arm_linux_get_hw_watchpoint_count ();
 569       pts = proc->priv->arch_private->wpts;
 570     }
 571   else
 572     {
 573       count = arm_linux_get_hw_breakpoint_count ();
 574       pts = proc->priv->arch_private->bpts;
 575     }
 576
 577   for (i = 0; i < count; i++)
 578     if (arm_linux_hw_breakpoint_equal (&p, pts + i))
 579       {
 580         struct update_registers_data data = { watch, i };
 581         pts[i].control = arm_hwbp_control_disable (pts[i].control);
 582         find_inferior (&all_threads, update_registers_callback, &data);
 583         return 0;
 584       }
 585
 586   /* No watchpoint matched.  */
 587   return -1;
 588 }
 589
 590 /* Return whether current thread is stopped due to a watchpoint.  */
 591 static int
 592 arm_stopped_by_watchpoint (void)
 593 {
 594   struct lwp_info *lwp = get_thread_lwp (current_thread);
 595   siginfo_t siginfo;
 596
 597   /* We must be able to set hardware watchpoints.  */
 598   if (arm_linux_get_hw_watchpoint_count () == 0)
 599     return 0;
 600
 601   /* Retrieve siginfo.  */
 602   errno = 0;
 603   ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
 604   if (errno != 0)
 605     return 0;
 606
 607   /* This must be a hardware breakpoint.  */
 608   if (siginfo.si_signo != SIGTRAP
 609       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
 610     return 0;
 611
 612   /* If we are in a positive slot then we're looking at a breakpoint and not
 613      a watchpoint.  */
 614   if (siginfo.si_errno >= 0)
 615     return 0;
 616
 617   /* Cache stopped data address for use by arm_stopped_data_address.  */
 618   lwp->arch_private->stopped_data_address
 619     = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
 620
 621   return 1;
 622 }
 623
 624 /* Return data address that triggered watchpoint.  Called only if
 625    arm_stopped_by_watchpoint returned true.  */
 626 static CORE_ADDR
 627 arm_stopped_data_address (void)
 628 {
 629   struct lwp_info *lwp = get_thread_lwp (current_thread);
 630   return lwp->arch_private->stopped_data_address;
 631 }
 632
 633 /* Called when a new process is created.  */
 634 static struct arch_process_info *
 635 arm_new_process (void)
 636 {
 637   struct arch_process_info *info = XCNEW (struct arch_process_info);
 638   return info;
 639 }
 640
 641 /* Called when a new thread is detected.  */
 642 static void
 643 arm_new_thread (struct lwp_info *lwp)
 644 {
 645   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
 646   int i;
 647
 648   for (i = 0; i < MAX_BPTS; i++)
 649     info->bpts_changed[i] = 1;
 650   for (i = 0; i < MAX_WPTS; i++)
 651     info->wpts_changed[i] = 1;
 652
 653   lwp->arch_private = info;
 654 }
 655
 656 static void
 657 arm_new_fork (struct process_info *parent, struct process_info *child)
 658 {
 659   struct arch_process_info *parent_proc_info;
 660   struct arch_process_info *child_proc_info;
 661   struct lwp_info *child_lwp;
 662   struct arch_lwp_info *child_lwp_info;
 663   int i;
 664
 665   /* These are allocated by linux_add_process.  */
 666   gdb_assert (parent->priv != NULL
 667               && parent->priv->arch_private != NULL);
 668   gdb_assert (child->priv != NULL
 669               && child->priv->arch_private != NULL);
 670
 671   parent_proc_info = parent->priv->arch_private;
 672   child_proc_info = child->priv->arch_private;
 673
 674   /* Linux kernel before 2.6.33 commit
 675      72f674d203cd230426437cdcf7dd6f681dad8b0d
 676      will inherit hardware debug registers from parent
 677      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 678      zeroed debug registers.
 679
 680      GDB core assumes the child inherits the watchpoints/hw
 681      breakpoints of the parent, and will remove them all from the
 682      forked off process.  Copy the debug registers mirrors into the
 683      new process so that all breakpoints and watchpoints can be
 684      removed together.  The debug registers mirror will become zeroed
 685      in the end before detaching the forked off process, thus making
 686      this compatible with older Linux kernels too.  */
 687
 688   *child_proc_info = *parent_proc_info;
 689
 690   /* Mark all the hardware breakpoints and watchpoints as changed to
 691      make sure that the registers will be updated.  */
 692   child_lwp = find_lwp_pid (ptid_of (child));
 693   child_lwp_info = child_lwp->arch_private;
 694   for (i = 0; i < MAX_BPTS; i++)
 695     child_lwp_info->bpts_changed[i] = 1;
 696   for (i = 0; i < MAX_WPTS; i++)
 697     child_lwp_info->wpts_changed[i] = 1;
 698 }
 699
 700 /* Called when resuming a thread.
 701    If the debug regs have changed, update the thread's copies.  */
 702 static void
 703 arm_prepare_to_resume (struct lwp_info *lwp)
 704 {
 705   struct thread_info *thread = get_lwp_thread (lwp);
 706   int pid = lwpid_of (thread);
 707   struct process_info *proc = find_process_pid (pid_of (thread));
 708   struct arch_process_info *proc_info = proc->priv->arch_private;
 709   struct arch_lwp_info *lwp_info = lwp->arch_private;
 710   int i;
 711
 712   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
 713     if (lwp_info->bpts_changed[i])
 714       {
 715         errno = 0;
 716
 717         if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
 718           if (ptrace (PTRACE_SETHBPREGS, pid,
 719                       (PTRACE_TYPE_ARG3) ((i << 1) + 1),
 720                       &proc_info->bpts[i].address) < 0)
 721             perror_with_name ("Unexpected error setting breakpoint address");
 722
 723         if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
 724           if (ptrace (PTRACE_SETHBPREGS, pid,
 725                       (PTRACE_TYPE_ARG3) ((i << 1) + 2),
 726                       &proc_info->bpts[i].control) < 0)
 727             perror_with_name ("Unexpected error setting breakpoint");
 728
 729         lwp_info->bpts_changed[i] = 0;
 730       }
 731
 732   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
 733     if (lwp_info->wpts_changed[i])
 734       {
 735         errno = 0;
 736
 737         if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
 738           if (ptrace (PTRACE_SETHBPREGS, pid,
 739                       (PTRACE_TYPE_ARG3) -((i << 1) + 1),
 740                       &proc_info->wpts[i].address) < 0)
 741             perror_with_name ("Unexpected error setting watchpoint address");
 742
 743         if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
 744           if (ptrace (PTRACE_SETHBPREGS, pid,
 745                       (PTRACE_TYPE_ARG3) -((i << 1) + 2),
 746                       &proc_info->wpts[i].control) < 0)
 747             perror_with_name ("Unexpected error setting watchpoint");
 748
 749         lwp_info->wpts_changed[i] = 0;
 750       }
 751 }
 752
 753 /* Find the next pc for a sigreturn or rt_sigreturn syscall.  In
 754    addition, set IS_THUMB depending on whether we will return to ARM
 755    or Thumb code.
 756    See arm-linux.h for stack layout details.  */
 757 static CORE_ADDR
 758 arm_sigreturn_next_pc (struct regcache *regcache, int svc_number,
 759                        int *is_thumb)
 760 {
 761   unsigned long sp;
 762   unsigned long sp_data;
 763   /* Offset of PC register.  */
 764   int pc_offset = 0;
 765   CORE_ADDR next_pc = 0;
 766   CORE_ADDR cpsr;
 767
 768   gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn);
 769
 770   collect_register_by_name (regcache, "sp", &sp);
 771   (*the_target->read_memory) (sp, (unsigned char *) &sp_data, 4);
 772
 773   pc_offset = arm_linux_sigreturn_next_pc_offset
 774     (sp, sp_data, svc_number, __NR_sigreturn == svc_number ? 1 : 0);
 775
 776   (*the_target->read_memory) (sp + pc_offset, (unsigned char *) &next_pc, 4);
 777
 778   /* Set IS_THUMB according the CPSR saved on the stack.  */
 779   (*the_target->read_memory) (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
 780   *is_thumb = ((cpsr & CPSR_T) != 0);
 781
 782   return next_pc;
 783 }
 784
 785 /* When PC is at a syscall instruction, return the PC of the next
 786    instruction to be executed.  */
 787 static CORE_ADDR
 788 get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self, CORE_ADDR pc)
 789 {
 790   CORE_ADDR next_pc = 0;
 791   int is_thumb = arm_is_thumb_mode ();
 792   ULONGEST svc_number = 0;
 793   struct regcache *regcache = self->regcache;
 794
 795   if (is_thumb)
 796     {
 797       collect_register (regcache, 7, &svc_number);
 798       next_pc = pc + 2;
 799     }
 800   else
 801     {
 802       unsigned long this_instr;
 803       unsigned long svc_operand;
 804
 805       (*the_target->read_memory) (pc, (unsigned char *) &this_instr, 4);
 806       svc_operand = (0x00ffffff & this_instr);
 807
 808       if (svc_operand)  /* OABI.  */
 809         {
 810           svc_number = svc_operand - 0x900000;
 811         }
 812       else /* EABI.  */
 813         {
 814           collect_register (regcache, 7, &svc_number);
 815         }
 816
 817       next_pc = pc + 4;
 818     }
 819
 820   /* This is a sigreturn or sigreturn_rt syscall.  */
 821   if (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn)
 822     {
 823       /* SIGRETURN or RT_SIGRETURN may affect the arm thumb mode, so
 824          update IS_THUMB.   */
 825       next_pc = arm_sigreturn_next_pc (regcache, svc_number, &is_thumb);
 826     }
 827
 828   /* Addresses for calling Thumb functions have the bit 0 set.  */
 829   if (is_thumb)
 830     next_pc = MAKE_THUMB_ADDR (next_pc);
 831
 832   return next_pc;
 833 }
 834
 835 static int
 836 arm_get_hwcap (unsigned long *valp)
 837 {
 838   unsigned char *data = (unsigned char *) alloca (8);
 839   int offset = 0;
 840
 841   while ((*the_target->read_auxv) (offset, data, 8) == 8)
 842     {
 843       unsigned int *data_p = (unsigned int *)data;
 844       if (data_p[0] == AT_HWCAP)
 845         {
 846           *valp = data_p[1];
 847           return 1;
 848         }
 849
 850       offset += 8;
 851     }
 852
 853   *valp = 0;
 854   return 0;
 855 }
 856
 857 static const struct target_desc *
 858 arm_read_description (void)
 859 {
 860   int pid = lwpid_of (current_thread);
 861   unsigned long arm_hwcap = 0;
 862
 863   /* Query hardware watchpoint/breakpoint capabilities.  */
 864   arm_linux_init_hwbp_cap (pid);
 865
 866   if (arm_get_hwcap (&arm_hwcap) == 0)
 867     return tdesc_arm;
 868
 869   if (arm_hwcap & HWCAP_IWMMXT)
 870     return tdesc_arm_with_iwmmxt;
 871
 872   if (arm_hwcap & HWCAP_VFP)
 873     {
 874       const struct target_desc *result;
 875       char *buf;
 876
 877       /* NEON implies either no VFP, or VFPv3-D32.  We only support
 878          it with VFP.  */
 879       if (arm_hwcap & HWCAP_NEON)
 880         result = tdesc_arm_with_neon;
 881       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 882         result = tdesc_arm_with_vfpv3;
 883       else
 884         result = tdesc_arm_with_vfpv2;
 885
 886       /* Now make sure that the kernel supports reading these
 887          registers.  Support was added in 2.6.30.  */
 888       errno = 0;
 889       buf = (char *) xmalloc (32 * 8 + 4);
 890       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 891           && errno == EIO)
 892         result = tdesc_arm;
 893
 894       free (buf);
 895
 896       return result;
 897     }
 898
 899   /* The default configuration uses legacy FPA registers, probably
 900      simulated.  */
 901   return tdesc_arm;
 902 }
 903
 904 static void
 905 arm_arch_setup (void)
 906 {
 907   int tid = lwpid_of (current_thread);
 908   int gpregs[18];
 909   struct iovec iov;
 910
 911   current_process ()->tdesc = arm_read_description ();
 912
 913   iov.iov_base = gpregs;
 914   iov.iov_len = sizeof (gpregs);
 915
 916   /* Check if PTRACE_GETREGSET works.  */
 917   if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) == 0)
 918     have_ptrace_getregset = 1;
 919   else
 920     have_ptrace_getregset = 0;
 921 }
 922
 923 /* Fetch the next possible PCs after the current instruction executes.  */
 924
 925 static VEC (CORE_ADDR) *
 926 arm_gdbserver_get_next_pcs (struct regcache *regcache)
 927 {
 928   struct arm_get_next_pcs next_pcs_ctx;
 929   VEC (CORE_ADDR) *next_pcs = NULL;
 930
 931   arm_get_next_pcs_ctor (&next_pcs_ctx,
 932                          &get_next_pcs_ops,
 933                          /* Byte order is ignored assumed as host.  */
 934                          0,
 935                          0,
 936                          1,
 937                          regcache);
 938
 939   next_pcs = arm_get_next_pcs (&next_pcs_ctx);
 940
 941   return next_pcs;
 942 }
 943
 944 /* Support for hardware single step.  */
 945
 946 static int
 947 arm_supports_hardware_single_step (void)
 948 {
 949   return 0;
 950 }
 951
 952 /* Register sets without using PTRACE_GETREGSET.  */
 953
 954 static struct regset_info arm_regsets[] = {
 955   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
 956     GENERAL_REGS,
 957     arm_fill_gregset, arm_store_gregset },
 958   { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
 959     EXTENDED_REGS,
 960     arm_fill_wmmxregset, arm_store_wmmxregset },
 961   { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
 962     EXTENDED_REGS,
 963     arm_fill_vfpregset, arm_store_vfpregset },
 964   NULL_REGSET
 965 };
 966
 967 static struct regsets_info arm_regsets_info =
 968   {
 969     arm_regsets, /* regsets */
 970     0, /* num_regsets */
 971     NULL, /* disabled_regsets */
 972   };
 973
 974 static struct usrregs_info arm_usrregs_info =
 975   {
 976     arm_num_regs,
 977     arm_regmap,
 978   };
 979
 980 static struct regs_info regs_info_arm =
 981   {
 982     NULL, /* regset_bitmap */
 983     &arm_usrregs_info,
 984     &arm_regsets_info
 985   };
 986
 987 static const struct regs_info *
 988 arm_regs_info (void)
 989 {
 990   const struct target_desc *tdesc = current_process ()->tdesc;
 991
 992   if (have_ptrace_getregset == 1
 993       && (tdesc == tdesc_arm_with_neon || tdesc == tdesc_arm_with_vfpv3))
 994     return &regs_info_aarch32;
 995   else
 996     return &regs_info_arm;
 997 }
 998
 999 struct linux_target_ops the_low_target = {
1000   arm_arch_setup,
1001   arm_regs_info,
1002   arm_cannot_fetch_register,
1003   arm_cannot_store_register,
1004   NULL, /* fetch_register */
1005   linux_get_pc_32bit,
1006   linux_set_pc_32bit,
1007   arm_breakpoint_kind_from_pc,
1008   arm_sw_breakpoint_from_kind,
1009   arm_gdbserver_get_next_pcs,
1010   0,
1011   arm_breakpoint_at,
1012   arm_supports_z_point_type,
1013   arm_insert_point,
1014   arm_remove_point,
1015   arm_stopped_by_watchpoint,
1016   arm_stopped_data_address,
1017   NULL, /* collect_ptrace_register */
1018   NULL, /* supply_ptrace_register */
1019   NULL, /* siginfo_fixup */
1020   arm_new_process,
1021   arm_new_thread,
1022   arm_new_fork,
1023   arm_prepare_to_resume,
1024   NULL, /* process_qsupported */
1025   NULL, /* supports_tracepoints */
1026   NULL, /* get_thread_area */
1027   NULL, /* install_fast_tracepoint_jump_pad */
1028   NULL, /* emit_ops */
1029   NULL, /* get_min_fast_tracepoint_insn_len */
1030   NULL, /* supports_range_stepping */
1031   arm_breakpoint_kind_from_current_state,
1032   arm_supports_hardware_single_step
1033 };
1034
1035 void
1036 initialize_low_arch (void)
1037 {
1038   /* Initialize the Linux target descriptions.  */
1039   init_registers_arm ();
1040   init_registers_arm_with_iwmmxt ();
1041   init_registers_arm_with_vfpv2 ();
1042   init_registers_arm_with_vfpv3 ();
1043
1044   initialize_low_arch_aarch32 ();
1045
1046   initialize_regsets_info (&arm_regsets_info);
1047 }