1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2017 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #include "linux-low.h"
22 #include "nat/gdb_ptrace.h"
25 #include "nat/mips-linux-watch.h"
26 #include "gdb_proc_service.h"
28 /* Defined in auto-generated file mips-linux.c. */
29 void init_registers_mips_linux (void);
30 extern const struct target_desc
*tdesc_mips_linux
;
32 /* Defined in auto-generated file mips-dsp-linux.c. */
33 void init_registers_mips_dsp_linux (void);
34 extern const struct target_desc
*tdesc_mips_dsp_linux
;
36 /* Defined in auto-generated file mips64-linux.c. */
37 void init_registers_mips64_linux (void);
38 extern const struct target_desc
*tdesc_mips64_linux
;
40 /* Defined in auto-generated file mips64-dsp-linux.c. */
41 void init_registers_mips64_dsp_linux (void);
42 extern const struct target_desc
*tdesc_mips64_dsp_linux
;
45 #define tdesc_mips_linux tdesc_mips64_linux
46 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
49 #ifndef PTRACE_GET_THREAD_AREA
50 #define PTRACE_GET_THREAD_AREA 25
57 #define mips_num_regs 73
58 #define mips_dsp_num_regs 80
60 #include <asm/ptrace.h>
64 #define DSP_CONTROL 77
71 /* Deliberately signed, for proper sign extension. */
76 /* Return the ptrace ``address'' of register REGNO. */
78 #define mips_base_regs \
79 -1, 1, 2, 3, 4, 5, 6, 7, \
80 8, 9, 10, 11, 12, 13, 14, 15, \
81 16, 17, 18, 19, 20, 21, 22, 23, \
82 24, 25, 26, 27, 28, 29, 30, 31, \
84 -1, MMLO, MMHI, BADVADDR, CAUSE, PC, \
86 FPR_BASE, FPR_BASE + 1, FPR_BASE + 2, FPR_BASE + 3, \
87 FPR_BASE + 4, FPR_BASE + 5, FPR_BASE + 6, FPR_BASE + 7, \
88 FPR_BASE + 8, FPR_BASE + 9, FPR_BASE + 10, FPR_BASE + 11, \
89 FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15, \
90 FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19, \
91 FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23, \
92 FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27, \
93 FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31, \
96 #define mips_dsp_regs \
97 DSP_BASE, DSP_BASE + 1, DSP_BASE + 2, DSP_BASE + 3, \
98 DSP_BASE + 4, DSP_BASE + 5, \
101 static int mips_regmap
[mips_num_regs
] = {
106 static int mips_dsp_regmap
[mips_dsp_num_regs
] = {
112 /* DSP registers are not in any regset and can only be accessed
115 static unsigned char mips_dsp_regset_bitmap
[(mips_dsp_num_regs
+ 7) / 8] = {
116 0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
119 static int have_dsp
= -1;
121 /* Try peeking at an arbitrarily chosen DSP register and pick the available
122 user register set accordingly. */
124 static const struct target_desc
*
125 mips_read_description (void)
129 int pid
= lwpid_of (current_thread
);
132 ptrace (PTRACE_PEEKUSER
, pid
, DSP_CONTROL
, 0);
142 perror_with_name ("ptrace");
147 return have_dsp
? tdesc_mips_dsp_linux
: tdesc_mips_linux
;
151 mips_arch_setup (void)
153 current_process ()->tdesc
= mips_read_description ();
156 static struct usrregs_info
*
157 get_usrregs_info (void)
159 const struct regs_info
*regs_info
= the_low_target
.regs_info ();
161 return regs_info
->usrregs
;
164 /* Per-process arch-specific data we want to keep. */
166 struct arch_process_info
168 /* -1 if the kernel and/or CPU do not support watch registers.
169 1 if watch_readback is valid and we can read style, num_valid
171 0 if we need to read the watch_readback. */
173 int watch_readback_valid
;
175 /* Cached watch register read values. */
177 struct pt_watch_regs watch_readback
;
179 /* Current watchpoint requests for this process. */
181 struct mips_watchpoint
*current_watches
;
183 /* The current set of watch register values for writing the
186 struct pt_watch_regs watch_mirror
;
189 /* Per-thread arch-specific data we want to keep. */
193 /* Non-zero if our copy differs from what's recorded in the thread. */
194 int watch_registers_changed
;
197 /* From mips-linux-nat.c. */
199 /* Pseudo registers can not be read. ptrace does not provide a way to
200 read (or set) PS_REGNUM, and there's no point in reading or setting
201 ZERO_REGNUM. We also can not set BADVADDR, CAUSE, or FCRIR via
205 mips_cannot_fetch_register (int regno
)
207 const struct target_desc
*tdesc
;
209 if (get_usrregs_info ()->regmap
[regno
] == -1)
212 tdesc
= current_process ()->tdesc
;
214 if (find_regno (tdesc
, "r0") == regno
)
221 mips_cannot_store_register (int regno
)
223 const struct target_desc
*tdesc
;
225 if (get_usrregs_info ()->regmap
[regno
] == -1)
228 tdesc
= current_process ()->tdesc
;
230 if (find_regno (tdesc
, "r0") == regno
)
233 if (find_regno (tdesc
, "cause") == regno
)
236 if (find_regno (tdesc
, "badvaddr") == regno
)
239 if (find_regno (tdesc
, "fir") == regno
)
246 mips_get_pc (struct regcache
*regcache
)
248 union mips_register pc
;
249 collect_register_by_name (regcache
, "pc", pc
.buf
);
250 return register_size (regcache
->tdesc
, 0) == 4 ? pc
.reg32
: pc
.reg64
;
254 mips_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
256 union mips_register newpc
;
257 if (register_size (regcache
->tdesc
, 0) == 4)
262 supply_register_by_name (regcache
, "pc", newpc
.buf
);
265 /* Correct in either endianness. */
266 static const unsigned int mips_breakpoint
= 0x0005000d;
267 #define mips_breakpoint_len 4
269 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
271 static const gdb_byte
*
272 mips_sw_breakpoint_from_kind (int kind
, int *size
)
274 *size
= mips_breakpoint_len
;
275 return (const gdb_byte
*) &mips_breakpoint
;
279 mips_breakpoint_at (CORE_ADDR where
)
283 (*the_target
->read_memory
) (where
, (unsigned char *) &insn
, 4);
284 if (insn
== mips_breakpoint
)
287 /* If necessary, recognize more trap instructions here. GDB only uses the
292 /* Mark the watch registers of lwp, represented by ENTRY, as changed,
293 if the lwp's process id is *PID_P. */
296 update_watch_registers_callback (thread_info
*thread
, void *pid_p
)
298 struct lwp_info
*lwp
= get_thread_lwp (thread
);
299 int pid
= *(int *) pid_p
;
301 /* Only update the threads of this process. */
302 if (pid_of (thread
) == pid
)
304 /* The actual update is done later just before resuming the lwp,
305 we just mark that the registers need updating. */
306 lwp
->arch_private
->watch_registers_changed
= 1;
308 /* If the lwp isn't stopped, force it to momentarily pause, so
309 we can update its watch registers. */
311 linux_stop_lwp (lwp
);
317 /* This is the implementation of linux_target_ops method
320 static struct arch_process_info
*
321 mips_linux_new_process (void)
323 struct arch_process_info
*info
= XCNEW (struct arch_process_info
);
328 /* This is the implementation of linux_target_ops method
332 mips_linux_delete_process (struct arch_process_info
*info
)
337 /* This is the implementation of linux_target_ops method new_thread.
338 Mark the watch registers as changed, so the threads' copies will
342 mips_linux_new_thread (struct lwp_info
*lwp
)
344 struct arch_lwp_info
*info
= XCNEW (struct arch_lwp_info
);
346 info
->watch_registers_changed
= 1;
348 lwp
->arch_private
= info
;
351 /* Function to call when a thread is being deleted. */
354 mips_linux_delete_thread (struct arch_lwp_info
*arch_lwp
)
359 /* Create a new mips_watchpoint and add it to the list. */
362 mips_add_watchpoint (struct arch_process_info
*priv
, CORE_ADDR addr
, int len
,
363 enum target_hw_bp_type watch_type
)
365 struct mips_watchpoint
*new_watch
;
366 struct mips_watchpoint
**pw
;
368 new_watch
= XNEW (struct mips_watchpoint
);
369 new_watch
->addr
= addr
;
370 new_watch
->len
= len
;
371 new_watch
->type
= watch_type
;
372 new_watch
->next
= NULL
;
374 pw
= &priv
->current_watches
;
380 /* Hook to call when a new fork is attached. */
383 mips_linux_new_fork (struct process_info
*parent
,
384 struct process_info
*child
)
386 struct arch_process_info
*parent_private
;
387 struct arch_process_info
*child_private
;
388 struct mips_watchpoint
*wp
;
390 /* These are allocated by linux_add_process. */
391 gdb_assert (parent
->priv
!= NULL
392 && parent
->priv
->arch_private
!= NULL
);
393 gdb_assert (child
->priv
!= NULL
394 && child
->priv
->arch_private
!= NULL
);
396 /* Linux kernel before 2.6.33 commit
397 72f674d203cd230426437cdcf7dd6f681dad8b0d
398 will inherit hardware debug registers from parent
399 on fork/vfork/clone. Newer Linux kernels create such tasks with
400 zeroed debug registers.
402 GDB core assumes the child inherits the watchpoints/hw
403 breakpoints of the parent, and will remove them all from the
404 forked off process. Copy the debug registers mirrors into the
405 new process so that all breakpoints and watchpoints can be
406 removed together. The debug registers mirror will become zeroed
407 in the end before detaching the forked off process, thus making
408 this compatible with older Linux kernels too. */
410 parent_private
= parent
->priv
->arch_private
;
411 child_private
= child
->priv
->arch_private
;
413 child_private
->watch_readback_valid
= parent_private
->watch_readback_valid
;
414 child_private
->watch_readback
= parent_private
->watch_readback
;
416 for (wp
= parent_private
->current_watches
; wp
!= NULL
; wp
= wp
->next
)
417 mips_add_watchpoint (child_private
, wp
->addr
, wp
->len
, wp
->type
);
419 child_private
->watch_mirror
= parent_private
->watch_mirror
;
421 /* This is the implementation of linux_target_ops method
422 prepare_to_resume. If the watch regs have changed, update the
426 mips_linux_prepare_to_resume (struct lwp_info
*lwp
)
428 ptid_t ptid
= ptid_of (get_lwp_thread (lwp
));
429 struct process_info
*proc
= find_process_pid (ptid_get_pid (ptid
));
430 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
432 if (lwp
->arch_private
->watch_registers_changed
)
434 /* Only update the watch registers if we have set or unset a
435 watchpoint already. */
436 if (mips_linux_watch_get_num_valid (&priv
->watch_mirror
) > 0)
438 /* Write the mirrored watch register values. */
439 int tid
= ptid_get_lwp (ptid
);
441 if (-1 == ptrace (PTRACE_SET_WATCH_REGS
, tid
,
442 &priv
->watch_mirror
, NULL
))
443 perror_with_name ("Couldn't write watch register");
446 lwp
->arch_private
->watch_registers_changed
= 0;
451 mips_supports_z_point_type (char z_type
)
455 case Z_PACKET_WRITE_WP
:
456 case Z_PACKET_READ_WP
:
457 case Z_PACKET_ACCESS_WP
:
464 /* This is the implementation of linux_target_ops method
468 mips_insert_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
469 int len
, struct raw_breakpoint
*bp
)
471 struct process_info
*proc
= current_process ();
472 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
473 struct pt_watch_regs regs
;
476 enum target_hw_bp_type watch_type
;
479 lwpid
= lwpid_of (current_thread
);
480 if (!mips_linux_read_watch_registers (lwpid
,
481 &priv
->watch_readback
,
482 &priv
->watch_readback_valid
,
489 regs
= priv
->watch_readback
;
490 /* Add the current watches. */
491 mips_linux_watch_populate_regs (priv
->current_watches
, ®s
);
493 /* Now try to add the new watch. */
494 watch_type
= raw_bkpt_type_to_target_hw_bp_type (type
);
495 irw
= mips_linux_watch_type_to_irw (watch_type
);
496 if (!mips_linux_watch_try_one_watch (®s
, addr
, len
, irw
))
499 /* It fit. Stick it on the end of the list. */
500 mips_add_watchpoint (priv
, addr
, len
, watch_type
);
502 priv
->watch_mirror
= regs
;
504 /* Only update the threads of this process. */
506 find_inferior (&all_threads
, update_watch_registers_callback
, &pid
);
511 /* This is the implementation of linux_target_ops method
515 mips_remove_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
516 int len
, struct raw_breakpoint
*bp
)
518 struct process_info
*proc
= current_process ();
519 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
523 enum target_hw_bp_type watch_type
;
525 struct mips_watchpoint
**pw
;
526 struct mips_watchpoint
*w
;
528 /* Search for a known watch that matches. Then unlink and free it. */
529 watch_type
= raw_bkpt_type_to_target_hw_bp_type (type
);
531 pw
= &priv
->current_watches
;
534 if (w
->addr
== addr
&& w
->len
== len
&& w
->type
== watch_type
)
545 return -1; /* We don't know about it, fail doing nothing. */
547 /* At this point watch_readback is known to be valid because we
548 could not have added the watch without reading it. */
549 gdb_assert (priv
->watch_readback_valid
== 1);
551 priv
->watch_mirror
= priv
->watch_readback
;
552 mips_linux_watch_populate_regs (priv
->current_watches
,
553 &priv
->watch_mirror
);
555 /* Only update the threads of this process. */
557 find_inferior (&all_threads
, update_watch_registers_callback
, &pid
);
561 /* This is the implementation of linux_target_ops method
562 stopped_by_watchpoint. The watchhi R and W bits indicate
563 the watch register triggered. */
566 mips_stopped_by_watchpoint (void)
568 struct process_info
*proc
= current_process ();
569 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
572 long lwpid
= lwpid_of (current_thread
);
574 if (!mips_linux_read_watch_registers (lwpid
,
575 &priv
->watch_readback
,
576 &priv
->watch_readback_valid
,
580 num_valid
= mips_linux_watch_get_num_valid (&priv
->watch_readback
);
582 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
583 if (mips_linux_watch_get_watchhi (&priv
->watch_readback
, n
)
590 /* This is the implementation of linux_target_ops method
591 stopped_data_address. */
594 mips_stopped_data_address (void)
596 struct process_info
*proc
= current_process ();
597 struct arch_process_info
*priv
= proc
->priv
->arch_private
;
600 long lwpid
= lwpid_of (current_thread
);
602 /* On MIPS we don't know the low order 3 bits of the data address.
603 GDB does not support remote targets that can't report the
604 watchpoint address. So, make our best guess; return the starting
605 address of a watchpoint request which overlaps the one that
608 if (!mips_linux_read_watch_registers (lwpid
,
609 &priv
->watch_readback
,
610 &priv
->watch_readback_valid
,
614 num_valid
= mips_linux_watch_get_num_valid (&priv
->watch_readback
);
616 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
617 if (mips_linux_watch_get_watchhi (&priv
->watch_readback
, n
)
620 CORE_ADDR t_low
, t_hi
;
622 struct mips_watchpoint
*watch
;
624 t_low
= mips_linux_watch_get_watchlo (&priv
->watch_readback
, n
);
625 t_irw
= t_low
& IRW_MASK
;
626 t_hi
= (mips_linux_watch_get_watchhi (&priv
->watch_readback
, n
)
628 t_low
&= ~(CORE_ADDR
)t_hi
;
630 for (watch
= priv
->current_watches
;
634 CORE_ADDR addr
= watch
->addr
;
635 CORE_ADDR last_byte
= addr
+ watch
->len
- 1;
637 if ((t_irw
& mips_linux_watch_type_to_irw (watch
->type
)) == 0)
639 /* Different type. */
642 /* Check for overlap of even a single byte. */
643 if (last_byte
>= t_low
&& addr
<= t_low
+ t_hi
)
648 /* Shouldn't happen. */
652 /* Fetch the thread-local storage pointer for libthread_db. */
655 ps_get_thread_area (struct ps_prochandle
*ph
,
656 lwpid_t lwpid
, int idx
, void **base
)
658 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
661 /* IDX is the bias from the thread pointer to the beginning of the
662 thread descriptor. It has to be subtracted due to implementation
663 quirks in libthread_db. */
664 *base
= (void *) ((char *)*base
- idx
);
669 #ifdef HAVE_PTRACE_GETREGS
672 mips_collect_register (struct regcache
*regcache
,
673 int use_64bit
, int regno
, union mips_register
*reg
)
675 union mips_register tmp_reg
;
679 collect_register (regcache
, regno
, &tmp_reg
.reg64
);
684 collect_register (regcache
, regno
, &tmp_reg
.reg32
);
685 reg
->reg64
= tmp_reg
.reg32
;
690 mips_supply_register (struct regcache
*regcache
,
691 int use_64bit
, int regno
, const union mips_register
*reg
)
695 /* For big-endian 32-bit targets, ignore the high four bytes of each
697 if (__BYTE_ORDER
== __BIG_ENDIAN
&& !use_64bit
)
700 supply_register (regcache
, regno
, reg
->buf
+ offset
);
704 mips_collect_register_32bit (struct regcache
*regcache
,
705 int use_64bit
, int regno
, unsigned char *buf
)
707 union mips_register tmp_reg
;
710 mips_collect_register (regcache
, use_64bit
, regno
, &tmp_reg
);
711 reg32
= tmp_reg
.reg64
;
712 memcpy (buf
, ®32
, 4);
716 mips_supply_register_32bit (struct regcache
*regcache
,
717 int use_64bit
, int regno
, const unsigned char *buf
)
719 union mips_register tmp_reg
;
722 memcpy (®32
, buf
, 4);
723 tmp_reg
.reg64
= reg32
;
724 mips_supply_register (regcache
, use_64bit
, regno
, &tmp_reg
);
728 mips_fill_gregset (struct regcache
*regcache
, void *buf
)
730 union mips_register
*regset
= (union mips_register
*) buf
;
732 const struct target_desc
*tdesc
= regcache
->tdesc
;
734 use_64bit
= (register_size (tdesc
, 0) == 8);
736 for (i
= 1; i
< 32; i
++)
737 mips_collect_register (regcache
, use_64bit
, i
, regset
+ i
);
739 mips_collect_register (regcache
, use_64bit
,
740 find_regno (tdesc
, "lo"), regset
+ 32);
741 mips_collect_register (regcache
, use_64bit
,
742 find_regno (tdesc
, "hi"), regset
+ 33);
743 mips_collect_register (regcache
, use_64bit
,
744 find_regno (tdesc
, "pc"), regset
+ 34);
745 mips_collect_register (regcache
, use_64bit
,
746 find_regno (tdesc
, "badvaddr"), regset
+ 35);
747 mips_collect_register (regcache
, use_64bit
,
748 find_regno (tdesc
, "status"), regset
+ 36);
749 mips_collect_register (regcache
, use_64bit
,
750 find_regno (tdesc
, "cause"), regset
+ 37);
752 mips_collect_register (regcache
, use_64bit
,
753 find_regno (tdesc
, "restart"), regset
+ 0);
757 mips_store_gregset (struct regcache
*regcache
, const void *buf
)
759 const union mips_register
*regset
= (const union mips_register
*) buf
;
762 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
764 for (i
= 0; i
< 32; i
++)
765 mips_supply_register (regcache
, use_64bit
, i
, regset
+ i
);
767 mips_supply_register (regcache
, use_64bit
,
768 find_regno (regcache
->tdesc
, "lo"), regset
+ 32);
769 mips_supply_register (regcache
, use_64bit
,
770 find_regno (regcache
->tdesc
, "hi"), regset
+ 33);
771 mips_supply_register (regcache
, use_64bit
,
772 find_regno (regcache
->tdesc
, "pc"), regset
+ 34);
773 mips_supply_register (regcache
, use_64bit
,
774 find_regno (regcache
->tdesc
, "badvaddr"), regset
+ 35);
775 mips_supply_register (regcache
, use_64bit
,
776 find_regno (regcache
->tdesc
, "status"), regset
+ 36);
777 mips_supply_register (regcache
, use_64bit
,
778 find_regno (regcache
->tdesc
, "cause"), regset
+ 37);
780 mips_supply_register (regcache
, use_64bit
,
781 find_regno (regcache
->tdesc
, "restart"), regset
+ 0);
785 mips_fill_fpregset (struct regcache
*regcache
, void *buf
)
787 union mips_register
*regset
= (union mips_register
*) buf
;
788 int i
, use_64bit
, first_fp
, big_endian
;
790 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
791 first_fp
= find_regno (regcache
->tdesc
, "f0");
792 big_endian
= (__BYTE_ORDER
== __BIG_ENDIAN
);
794 /* See GDB for a discussion of this peculiar layout. */
795 for (i
= 0; i
< 32; i
++)
797 collect_register (regcache
, first_fp
+ i
, regset
[i
].buf
);
799 collect_register (regcache
, first_fp
+ i
,
800 regset
[i
& ~1].buf
+ 4 * (big_endian
!= (i
& 1)));
802 mips_collect_register_32bit (regcache
, use_64bit
,
803 find_regno (regcache
->tdesc
, "fcsr"), regset
[32].buf
);
804 mips_collect_register_32bit (regcache
, use_64bit
,
805 find_regno (regcache
->tdesc
, "fir"),
810 mips_store_fpregset (struct regcache
*regcache
, const void *buf
)
812 const union mips_register
*regset
= (const union mips_register
*) buf
;
813 int i
, use_64bit
, first_fp
, big_endian
;
815 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
816 first_fp
= find_regno (regcache
->tdesc
, "f0");
817 big_endian
= (__BYTE_ORDER
== __BIG_ENDIAN
);
819 /* See GDB for a discussion of this peculiar layout. */
820 for (i
= 0; i
< 32; i
++)
822 supply_register (regcache
, first_fp
+ i
, regset
[i
].buf
);
824 supply_register (regcache
, first_fp
+ i
,
825 regset
[i
& ~1].buf
+ 4 * (big_endian
!= (i
& 1)));
827 mips_supply_register_32bit (regcache
, use_64bit
,
828 find_regno (regcache
->tdesc
, "fcsr"),
830 mips_supply_register_32bit (regcache
, use_64bit
,
831 find_regno (regcache
->tdesc
, "fir"),
834 #endif /* HAVE_PTRACE_GETREGS */
836 static struct regset_info mips_regsets
[] = {
837 #ifdef HAVE_PTRACE_GETREGS
838 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, 38 * 8, GENERAL_REGS
,
839 mips_fill_gregset
, mips_store_gregset
},
840 { PTRACE_GETFPREGS
, PTRACE_SETFPREGS
, 0, 33 * 8, FP_REGS
,
841 mips_fill_fpregset
, mips_store_fpregset
},
842 #endif /* HAVE_PTRACE_GETREGS */
846 static struct regsets_info mips_regsets_info
=
848 mips_regsets
, /* regsets */
850 NULL
, /* disabled_regsets */
853 static struct usrregs_info mips_dsp_usrregs_info
=
859 static struct usrregs_info mips_usrregs_info
=
865 static struct regs_info dsp_regs_info
=
867 mips_dsp_regset_bitmap
,
868 &mips_dsp_usrregs_info
,
872 static struct regs_info regs_info
=
874 NULL
, /* regset_bitmap */
879 static const struct regs_info
*
880 mips_regs_info (void)
883 return &dsp_regs_info
;
888 struct linux_target_ops the_low_target
= {
891 mips_cannot_fetch_register
,
892 mips_cannot_store_register
,
893 NULL
, /* fetch_register */
896 NULL
, /* breakpoint_kind_from_pc */
897 mips_sw_breakpoint_from_kind
,
898 NULL
, /* get_next_pcs */
901 mips_supports_z_point_type
,
904 mips_stopped_by_watchpoint
,
905 mips_stopped_data_address
,
908 NULL
, /* siginfo_fixup */
909 mips_linux_new_process
,
910 mips_linux_delete_process
,
911 mips_linux_new_thread
,
912 mips_linux_delete_thread
,
914 mips_linux_prepare_to_resume
918 initialize_low_arch (void)
920 /* Initialize the Linux target descriptions. */
921 init_registers_mips_linux ();
922 init_registers_mips_dsp_linux ();
923 init_registers_mips64_linux ();
924 init_registers_mips64_dsp_linux ();
926 initialize_regsets_info (&mips_regsets_info
);