gdb/gdbserver/linux-mips-low.c

   1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2017 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21
  22 #include "nat/gdb_ptrace.h"
  23 #include <endian.h>
  24
  25 #include "nat/mips-linux-watch.h"
  26 #include "gdb_proc_service.h"
  27
  28 /* Defined in auto-generated file mips-linux.c.  */
  29 void init_registers_mips_linux (void);
  30 extern const struct target_desc *tdesc_mips_linux;
  31
  32 /* Defined in auto-generated file mips-dsp-linux.c.  */
  33 void init_registers_mips_dsp_linux (void);
  34 extern const struct target_desc *tdesc_mips_dsp_linux;
  35
  36 /* Defined in auto-generated file mips64-linux.c.  */
  37 void init_registers_mips64_linux (void);
  38 extern const struct target_desc *tdesc_mips64_linux;
  39
  40 /* Defined in auto-generated file mips64-dsp-linux.c.  */
  41 void init_registers_mips64_dsp_linux (void);
  42 extern const struct target_desc *tdesc_mips64_dsp_linux;
  43
  44 #ifdef __mips64
  45 #define tdesc_mips_linux tdesc_mips64_linux
  46 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
  47 #endif
  48
  49 #ifndef PTRACE_GET_THREAD_AREA
  50 #define PTRACE_GET_THREAD_AREA 25
  51 #endif
  52
  53 #ifdef HAVE_SYS_REG_H
  54 #include <sys/reg.h>
  55 #endif
  56
  57 #define mips_num_regs 73
  58 #define mips_dsp_num_regs 80
  59
  60 #include <asm/ptrace.h>
  61
  62 #ifndef DSP_BASE
  63 #define DSP_BASE 71
  64 #define DSP_CONTROL 77
  65 #endif
  66
  67 union mips_register
  68 {
  69   unsigned char buf[8];
  70
  71   /* Deliberately signed, for proper sign extension.  */
  72   int reg32;
  73   long long reg64;
  74 };
  75
  76 /* Return the ptrace ``address'' of register REGNO. */
  77
  78 #define mips_base_regs                                                  \
  79   -1,  1,  2,  3,  4,  5,  6,  7,                                       \
  80   8,  9,  10, 11, 12, 13, 14, 15,                                       \
  81   16, 17, 18, 19, 20, 21, 22, 23,                                       \
  82   24, 25, 26, 27, 28, 29, 30, 31,                                       \
  83                                                                         \
  84   -1, MMLO, MMHI, BADVADDR, CAUSE, PC,                                  \
  85                                                                         \
  86   FPR_BASE,      FPR_BASE + 1,  FPR_BASE + 2,  FPR_BASE + 3,            \
  87   FPR_BASE + 4,  FPR_BASE + 5,  FPR_BASE + 6,  FPR_BASE + 7,            \
  88   FPR_BASE + 8,  FPR_BASE + 9,  FPR_BASE + 10, FPR_BASE + 11,           \
  89   FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15,           \
  90   FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19,           \
  91   FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23,           \
  92   FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27,           \
  93   FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31,           \
  94   FPC_CSR, FPC_EIR
  95
  96 #define mips_dsp_regs                                                   \
  97   DSP_BASE,      DSP_BASE + 1,  DSP_BASE + 2,  DSP_BASE + 3,            \
  98   DSP_BASE + 4,  DSP_BASE + 5,                                          \
  99   DSP_CONTROL
 100
 101 static int mips_regmap[mips_num_regs] = {
 102   mips_base_regs,
 103   0
 104 };
 105
 106 static int mips_dsp_regmap[mips_dsp_num_regs] = {
 107   mips_base_regs,
 108   mips_dsp_regs,
 109   0
 110 };
 111
 112 /* DSP registers are not in any regset and can only be accessed
 113    individually.  */
 114
 115 static unsigned char mips_dsp_regset_bitmap[(mips_dsp_num_regs + 7) / 8] = {
 116   0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
 117 };
 118
 119 static int have_dsp = -1;
 120
 121 /* Try peeking at an arbitrarily chosen DSP register and pick the available
 122    user register set accordingly.  */
 123
 124 static const struct target_desc *
 125 mips_read_description (void)
 126 {
 127   if (have_dsp < 0)
 128     {
 129       int pid = lwpid_of (current_thread);
 130
 131       errno = 0;
 132       ptrace (PTRACE_PEEKUSER, pid, DSP_CONTROL, 0);
 133       switch (errno)
 134         {
 135         case 0:
 136           have_dsp = 1;
 137           break;
 138         case EIO:
 139           have_dsp = 0;
 140           break;
 141         default:
 142           perror_with_name ("ptrace");
 143           break;
 144         }
 145     }
 146
 147   return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
 148 }
 149
 150 static void
 151 mips_arch_setup (void)
 152 {
 153   current_process ()->tdesc = mips_read_description ();
 154 }
 155
 156 static struct usrregs_info *
 157 get_usrregs_info (void)
 158 {
 159   const struct regs_info *regs_info = the_low_target.regs_info ();
 160
 161   return regs_info->usrregs;
 162 }
 163
 164 /* Per-process arch-specific data we want to keep.  */
 165
 166 struct arch_process_info
 167 {
 168   /* -1 if the kernel and/or CPU do not support watch registers.
 169       1 if watch_readback is valid and we can read style, num_valid
 170         and the masks.
 171       0 if we need to read the watch_readback.  */
 172
 173   int watch_readback_valid;
 174
 175   /* Cached watch register read values.  */
 176
 177   struct pt_watch_regs watch_readback;
 178
 179   /* Current watchpoint requests for this process.  */
 180
 181   struct mips_watchpoint *current_watches;
 182
 183   /* The current set of watch register values for writing the
 184      registers.  */
 185
 186   struct pt_watch_regs watch_mirror;
 187 };
 188
 189 /* Per-thread arch-specific data we want to keep.  */
 190
 191 struct arch_lwp_info
 192 {
 193   /* Non-zero if our copy differs from what's recorded in the thread.  */
 194   int watch_registers_changed;
 195 };
 196
 197 /* From mips-linux-nat.c.  */
 198
 199 /* Pseudo registers can not be read.  ptrace does not provide a way to
 200    read (or set) PS_REGNUM, and there's no point in reading or setting
 201    ZERO_REGNUM.  We also can not set BADVADDR, CAUSE, or FCRIR via
 202    ptrace().  */
 203
 204 static int
 205 mips_cannot_fetch_register (int regno)
 206 {
 207   const struct target_desc *tdesc;
 208
 209   if (get_usrregs_info ()->regmap[regno] == -1)
 210     return 1;
 211
 212   tdesc = current_process ()->tdesc;
 213
 214   if (find_regno (tdesc, "r0") == regno)
 215     return 1;
 216
 217   return 0;
 218 }
 219
 220 static int
 221 mips_cannot_store_register (int regno)
 222 {
 223   const struct target_desc *tdesc;
 224
 225   if (get_usrregs_info ()->regmap[regno] == -1)
 226     return 1;
 227
 228   tdesc = current_process ()->tdesc;
 229
 230   if (find_regno (tdesc, "r0") == regno)
 231     return 1;
 232
 233   if (find_regno (tdesc, "cause") == regno)
 234     return 1;
 235
 236   if (find_regno (tdesc, "badvaddr") == regno)
 237     return 1;
 238
 239   if (find_regno (tdesc, "fir") == regno)
 240     return 1;
 241
 242   return 0;
 243 }
 244
 245 static CORE_ADDR
 246 mips_get_pc (struct regcache *regcache)
 247 {
 248   union mips_register pc;
 249   collect_register_by_name (regcache, "pc", pc.buf);
 250   return register_size (regcache->tdesc, 0) == 4 ? pc.reg32 : pc.reg64;
 251 }
 252
 253 static void
 254 mips_set_pc (struct regcache *regcache, CORE_ADDR pc)
 255 {
 256   union mips_register newpc;
 257   if (register_size (regcache->tdesc, 0) == 4)
 258     newpc.reg32 = pc;
 259   else
 260     newpc.reg64 = pc;
 261
 262   supply_register_by_name (regcache, "pc", newpc.buf);
 263 }
 264
 265 /* Correct in either endianness.  */
 266 static const unsigned int mips_breakpoint = 0x0005000d;
 267 #define mips_breakpoint_len 4
 268
 269 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */
 270
 271 static const gdb_byte *
 272 mips_sw_breakpoint_from_kind (int kind, int *size)
 273 {
 274   *size = mips_breakpoint_len;
 275   return (const gdb_byte *) &mips_breakpoint;
 276 }
 277
 278 static int
 279 mips_breakpoint_at (CORE_ADDR where)
 280 {
 281   unsigned int insn;
 282
 283   (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
 284   if (insn == mips_breakpoint)
 285     return 1;
 286
 287   /* If necessary, recognize more trap instructions here.  GDB only uses the
 288      one.  */
 289   return 0;
 290 }
 291
 292 /* Mark the watch registers of lwp, represented by ENTRY, as changed,
 293    if the lwp's process id is *PID_P.  */
 294
 295 static int
 296 update_watch_registers_callback (struct inferior_list_entry *entry,
 297                                  void *pid_p)
 298 {
 299   struct thread_info *thread = (struct thread_info *) entry;
 300   struct lwp_info *lwp = get_thread_lwp (thread);
 301   int pid = *(int *) pid_p;
 302
 303   /* Only update the threads of this process.  */
 304   if (pid_of (thread) == pid)
 305     {
 306       /* The actual update is done later just before resuming the lwp,
 307          we just mark that the registers need updating.  */
 308       lwp->arch_private->watch_registers_changed = 1;
 309
 310       /* If the lwp isn't stopped, force it to momentarily pause, so
 311          we can update its watch registers.  */
 312       if (!lwp->stopped)
 313         linux_stop_lwp (lwp);
 314     }
 315
 316   return 0;
 317 }
 318
 319 /* This is the implementation of linux_target_ops method
 320    new_process.  */
 321
 322 static struct arch_process_info *
 323 mips_linux_new_process (void)
 324 {
 325   struct arch_process_info *info = XCNEW (struct arch_process_info);
 326
 327   return info;
 328 }
 329
 330 /* This is the implementation of linux_target_ops method new_thread.
 331    Mark the watch registers as changed, so the threads' copies will
 332    be updated.  */
 333
 334 static void
 335 mips_linux_new_thread (struct lwp_info *lwp)
 336 {
 337   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
 338
 339   info->watch_registers_changed = 1;
 340
 341   lwp->arch_private = info;
 342 }
 343
 344 /* Create a new mips_watchpoint and add it to the list.  */
 345
 346 static void
 347 mips_add_watchpoint (struct arch_process_info *priv, CORE_ADDR addr, int len,
 348                      enum target_hw_bp_type watch_type)
 349 {
 350   struct mips_watchpoint *new_watch;
 351   struct mips_watchpoint **pw;
 352
 353   new_watch = XNEW (struct mips_watchpoint);
 354   new_watch->addr = addr;
 355   new_watch->len = len;
 356   new_watch->type = watch_type;
 357   new_watch->next = NULL;
 358
 359   pw = &priv->current_watches;
 360   while (*pw != NULL)
 361     pw = &(*pw)->next;
 362   *pw = new_watch;
 363 }
 364
 365 /* Hook to call when a new fork is attached.  */
 366
 367 static void
 368 mips_linux_new_fork (struct process_info *parent,
 369                         struct process_info *child)
 370 {
 371   struct arch_process_info *parent_private;
 372   struct arch_process_info *child_private;
 373   struct mips_watchpoint *wp;
 374
 375   /* These are allocated by linux_add_process.  */
 376   gdb_assert (parent->priv != NULL
 377               && parent->priv->arch_private != NULL);
 378   gdb_assert (child->priv != NULL
 379               && child->priv->arch_private != NULL);
 380
 381   /* Linux kernel before 2.6.33 commit
 382      72f674d203cd230426437cdcf7dd6f681dad8b0d
 383      will inherit hardware debug registers from parent
 384      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 385      zeroed debug registers.
 386
 387      GDB core assumes the child inherits the watchpoints/hw
 388      breakpoints of the parent, and will remove them all from the
 389      forked off process.  Copy the debug registers mirrors into the
 390      new process so that all breakpoints and watchpoints can be
 391      removed together.  The debug registers mirror will become zeroed
 392      in the end before detaching the forked off process, thus making
 393      this compatible with older Linux kernels too.  */
 394
 395   parent_private = parent->priv->arch_private;
 396   child_private = child->priv->arch_private;
 397
 398   child_private->watch_readback_valid = parent_private->watch_readback_valid;
 399   child_private->watch_readback = parent_private->watch_readback;
 400
 401   for (wp = parent_private->current_watches; wp != NULL; wp = wp->next)
 402     mips_add_watchpoint (child_private, wp->addr, wp->len, wp->type);
 403
 404   child_private->watch_mirror = parent_private->watch_mirror;
 405 }
 406 /* This is the implementation of linux_target_ops method
 407    prepare_to_resume.  If the watch regs have changed, update the
 408    thread's copies.  */
 409
 410 static void
 411 mips_linux_prepare_to_resume (struct lwp_info *lwp)
 412 {
 413   ptid_t ptid = ptid_of (get_lwp_thread (lwp));
 414   struct process_info *proc = find_process_pid (ptid_get_pid (ptid));
 415   struct arch_process_info *priv = proc->priv->arch_private;
 416
 417   if (lwp->arch_private->watch_registers_changed)
 418     {
 419       /* Only update the watch registers if we have set or unset a
 420          watchpoint already.  */
 421       if (mips_linux_watch_get_num_valid (&priv->watch_mirror) > 0)
 422         {
 423           /* Write the mirrored watch register values.  */
 424           int tid = ptid_get_lwp (ptid);
 425
 426           if (-1 == ptrace (PTRACE_SET_WATCH_REGS, tid,
 427                             &priv->watch_mirror, NULL))
 428             perror_with_name ("Couldn't write watch register");
 429         }
 430
 431       lwp->arch_private->watch_registers_changed = 0;
 432     }
 433 }
 434
 435 static int
 436 mips_supports_z_point_type (char z_type)
 437 {
 438   switch (z_type)
 439     {
 440     case Z_PACKET_WRITE_WP:
 441     case Z_PACKET_READ_WP:
 442     case Z_PACKET_ACCESS_WP:
 443       return 1;
 444     default:
 445       return 0;
 446     }
 447 }
 448
 449 /* This is the implementation of linux_target_ops method
 450    insert_point.  */
 451
 452 static int
 453 mips_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 454                    int len, struct raw_breakpoint *bp)
 455 {
 456   struct process_info *proc = current_process ();
 457   struct arch_process_info *priv = proc->priv->arch_private;
 458   struct pt_watch_regs regs;
 459   int pid;
 460   long lwpid;
 461   enum target_hw_bp_type watch_type;
 462   uint32_t irw;
 463
 464   lwpid = lwpid_of (current_thread);
 465   if (!mips_linux_read_watch_registers (lwpid,
 466                                         &priv->watch_readback,
 467                                         &priv->watch_readback_valid,
 468                                         0))
 469     return -1;
 470
 471   if (len <= 0)
 472     return -1;
 473
 474   regs = priv->watch_readback;
 475   /* Add the current watches.  */
 476   mips_linux_watch_populate_regs (priv->current_watches, &regs);
 477
 478   /* Now try to add the new watch.  */
 479   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 480   irw = mips_linux_watch_type_to_irw (watch_type);
 481   if (!mips_linux_watch_try_one_watch (&regs, addr, len, irw))
 482     return -1;
 483
 484   /* It fit.  Stick it on the end of the list.  */
 485   mips_add_watchpoint (priv, addr, len, watch_type);
 486
 487   priv->watch_mirror = regs;
 488
 489   /* Only update the threads of this process.  */
 490   pid = pid_of (proc);
 491   find_inferior (&all_threads, update_watch_registers_callback, &pid);
 492
 493   return 0;
 494 }
 495
 496 /* This is the implementation of linux_target_ops method
 497    remove_point.  */
 498
 499 static int
 500 mips_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 501                    int len, struct raw_breakpoint *bp)
 502 {
 503   struct process_info *proc = current_process ();
 504   struct arch_process_info *priv = proc->priv->arch_private;
 505
 506   int deleted_one;
 507   int pid;
 508   enum target_hw_bp_type watch_type;
 509
 510   struct mips_watchpoint **pw;
 511   struct mips_watchpoint *w;
 512
 513   /* Search for a known watch that matches.  Then unlink and free it.  */
 514   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 515   deleted_one = 0;
 516   pw = &priv->current_watches;
 517   while ((w = *pw))
 518     {
 519       if (w->addr == addr && w->len == len && w->type == watch_type)
 520         {
 521           *pw = w->next;
 522           free (w);
 523           deleted_one = 1;
 524           break;
 525         }
 526       pw = &(w->next);
 527     }
 528
 529   if (!deleted_one)
 530     return -1;  /* We don't know about it, fail doing nothing.  */
 531
 532   /* At this point watch_readback is known to be valid because we
 533      could not have added the watch without reading it.  */
 534   gdb_assert (priv->watch_readback_valid == 1);
 535
 536   priv->watch_mirror = priv->watch_readback;
 537   mips_linux_watch_populate_regs (priv->current_watches,
 538                                   &priv->watch_mirror);
 539
 540   /* Only update the threads of this process.  */
 541   pid = pid_of (proc);
 542   find_inferior (&all_threads, update_watch_registers_callback, &pid);
 543   return 0;
 544 }
 545
 546 /* This is the implementation of linux_target_ops method
 547    stopped_by_watchpoint.  The watchhi R and W bits indicate
 548    the watch register triggered. */
 549
 550 static int
 551 mips_stopped_by_watchpoint (void)
 552 {
 553   struct process_info *proc = current_process ();
 554   struct arch_process_info *priv = proc->priv->arch_private;
 555   int n;
 556   int num_valid;
 557   long lwpid = lwpid_of (current_thread);
 558
 559   if (!mips_linux_read_watch_registers (lwpid,
 560                                         &priv->watch_readback,
 561                                         &priv->watch_readback_valid,
 562                                         1))
 563     return 0;
 564
 565   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 566
 567   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 568     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 569         & (R_MASK | W_MASK))
 570       return 1;
 571
 572   return 0;
 573 }
 574
 575 /* This is the implementation of linux_target_ops method
 576    stopped_data_address.  */
 577
 578 static CORE_ADDR
 579 mips_stopped_data_address (void)
 580 {
 581   struct process_info *proc = current_process ();
 582   struct arch_process_info *priv = proc->priv->arch_private;
 583   int n;
 584   int num_valid;
 585   long lwpid = lwpid_of (current_thread);
 586
 587   /* On MIPS we don't know the low order 3 bits of the data address.
 588      GDB does not support remote targets that can't report the
 589      watchpoint address.  So, make our best guess; return the starting
 590      address of a watchpoint request which overlaps the one that
 591      triggered.  */
 592
 593   if (!mips_linux_read_watch_registers (lwpid,
 594                                         &priv->watch_readback,
 595                                         &priv->watch_readback_valid,
 596                                         0))
 597     return 0;
 598
 599   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 600
 601   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 602     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 603         & (R_MASK | W_MASK))
 604       {
 605         CORE_ADDR t_low, t_hi;
 606         int t_irw;
 607         struct mips_watchpoint *watch;
 608
 609         t_low = mips_linux_watch_get_watchlo (&priv->watch_readback, n);
 610         t_irw = t_low & IRW_MASK;
 611         t_hi = (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 612                 | IRW_MASK);
 613         t_low &= ~(CORE_ADDR)t_hi;
 614
 615         for (watch = priv->current_watches;
 616              watch != NULL;
 617              watch = watch->next)
 618           {
 619             CORE_ADDR addr = watch->addr;
 620             CORE_ADDR last_byte = addr + watch->len - 1;
 621
 622             if ((t_irw & mips_linux_watch_type_to_irw (watch->type)) == 0)
 623               {
 624                 /* Different type.  */
 625                 continue;
 626               }
 627             /* Check for overlap of even a single byte.  */
 628             if (last_byte >= t_low && addr <= t_low + t_hi)
 629               return addr;
 630           }
 631       }
 632
 633   /* Shouldn't happen.  */
 634   return 0;
 635 }
 636
 637 /* Fetch the thread-local storage pointer for libthread_db.  */
 638
 639 ps_err_e
 640 ps_get_thread_area (struct ps_prochandle *ph,
 641                     lwpid_t lwpid, int idx, void **base)
 642 {
 643   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 644     return PS_ERR;
 645
 646   /* IDX is the bias from the thread pointer to the beginning of the
 647      thread descriptor.  It has to be subtracted due to implementation
 648      quirks in libthread_db.  */
 649   *base = (void *) ((char *)*base - idx);
 650
 651   return PS_OK;
 652 }
 653
 654 #ifdef HAVE_PTRACE_GETREGS
 655
 656 static void
 657 mips_collect_register (struct regcache *regcache,
 658                        int use_64bit, int regno, union mips_register *reg)
 659 {
 660   union mips_register tmp_reg;
 661
 662   if (use_64bit)
 663     {
 664       collect_register (regcache, regno, &tmp_reg.reg64);
 665       *reg = tmp_reg;
 666     }
 667   else
 668     {
 669       collect_register (regcache, regno, &tmp_reg.reg32);
 670       reg->reg64 = tmp_reg.reg32;
 671     }
 672 }
 673
 674 static void
 675 mips_supply_register (struct regcache *regcache,
 676                       int use_64bit, int regno, const union mips_register *reg)
 677 {
 678   int offset = 0;
 679
 680   /* For big-endian 32-bit targets, ignore the high four bytes of each
 681      eight-byte slot.  */
 682   if (__BYTE_ORDER == __BIG_ENDIAN && !use_64bit)
 683     offset = 4;
 684
 685   supply_register (regcache, regno, reg->buf + offset);
 686 }
 687
 688 static void
 689 mips_collect_register_32bit (struct regcache *regcache,
 690                              int use_64bit, int regno, unsigned char *buf)
 691 {
 692   union mips_register tmp_reg;
 693   int reg32;
 694
 695   mips_collect_register (regcache, use_64bit, regno, &tmp_reg);
 696   reg32 = tmp_reg.reg64;
 697   memcpy (buf, &reg32, 4);
 698 }
 699
 700 static void
 701 mips_supply_register_32bit (struct regcache *regcache,
 702                             int use_64bit, int regno, const unsigned char *buf)
 703 {
 704   union mips_register tmp_reg;
 705   int reg32;
 706
 707   memcpy (&reg32, buf, 4);
 708   tmp_reg.reg64 = reg32;
 709   mips_supply_register (regcache, use_64bit, regno, &tmp_reg);
 710 }
 711
 712 static void
 713 mips_fill_gregset (struct regcache *regcache, void *buf)
 714 {
 715   union mips_register *regset = (union mips_register *) buf;
 716   int i, use_64bit;
 717   const struct target_desc *tdesc = regcache->tdesc;
 718
 719   use_64bit = (register_size (tdesc, 0) == 8);
 720
 721   for (i = 1; i < 32; i++)
 722     mips_collect_register (regcache, use_64bit, i, regset + i);
 723
 724   mips_collect_register (regcache, use_64bit,
 725                          find_regno (tdesc, "lo"), regset + 32);
 726   mips_collect_register (regcache, use_64bit,
 727                          find_regno (tdesc, "hi"), regset + 33);
 728   mips_collect_register (regcache, use_64bit,
 729                          find_regno (tdesc, "pc"), regset + 34);
 730   mips_collect_register (regcache, use_64bit,
 731                          find_regno (tdesc, "badvaddr"), regset + 35);
 732   mips_collect_register (regcache, use_64bit,
 733                          find_regno (tdesc, "status"), regset + 36);
 734   mips_collect_register (regcache, use_64bit,
 735                          find_regno (tdesc, "cause"), regset + 37);
 736
 737   mips_collect_register (regcache, use_64bit,
 738                          find_regno (tdesc, "restart"), regset + 0);
 739 }
 740
 741 static void
 742 mips_store_gregset (struct regcache *regcache, const void *buf)
 743 {
 744   const union mips_register *regset = (const union mips_register *) buf;
 745   int i, use_64bit;
 746
 747   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 748
 749   for (i = 0; i < 32; i++)
 750     mips_supply_register (regcache, use_64bit, i, regset + i);
 751
 752   mips_supply_register (regcache, use_64bit,
 753                         find_regno (regcache->tdesc, "lo"), regset + 32);
 754   mips_supply_register (regcache, use_64bit,
 755                         find_regno (regcache->tdesc, "hi"), regset + 33);
 756   mips_supply_register (regcache, use_64bit,
 757                         find_regno (regcache->tdesc, "pc"), regset + 34);
 758   mips_supply_register (regcache, use_64bit,
 759                         find_regno (regcache->tdesc, "badvaddr"), regset + 35);
 760   mips_supply_register (regcache, use_64bit,
 761                         find_regno (regcache->tdesc, "status"), regset + 36);
 762   mips_supply_register (regcache, use_64bit,
 763                         find_regno (regcache->tdesc, "cause"), regset + 37);
 764
 765   mips_supply_register (regcache, use_64bit,
 766                         find_regno (regcache->tdesc, "restart"), regset + 0);
 767 }
 768
 769 static void
 770 mips_fill_fpregset (struct regcache *regcache, void *buf)
 771 {
 772   union mips_register *regset = (union mips_register *) buf;
 773   int i, use_64bit, first_fp, big_endian;
 774
 775   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 776   first_fp = find_regno (regcache->tdesc, "f0");
 777   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 778
 779   /* See GDB for a discussion of this peculiar layout.  */
 780   for (i = 0; i < 32; i++)
 781     if (use_64bit)
 782       collect_register (regcache, first_fp + i, regset[i].buf);
 783     else
 784       collect_register (regcache, first_fp + i,
 785                         regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 786
 787   mips_collect_register_32bit (regcache, use_64bit,
 788                                find_regno (regcache->tdesc, "fcsr"), regset[32].buf);
 789   mips_collect_register_32bit (regcache, use_64bit,
 790                                find_regno (regcache->tdesc, "fir"),
 791                                regset[32].buf + 4);
 792 }
 793
 794 static void
 795 mips_store_fpregset (struct regcache *regcache, const void *buf)
 796 {
 797   const union mips_register *regset = (const union mips_register *) buf;
 798   int i, use_64bit, first_fp, big_endian;
 799
 800   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 801   first_fp = find_regno (regcache->tdesc, "f0");
 802   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 803
 804   /* See GDB for a discussion of this peculiar layout.  */
 805   for (i = 0; i < 32; i++)
 806     if (use_64bit)
 807       supply_register (regcache, first_fp + i, regset[i].buf);
 808     else
 809       supply_register (regcache, first_fp + i,
 810                        regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 811
 812   mips_supply_register_32bit (regcache, use_64bit,
 813                               find_regno (regcache->tdesc, "fcsr"),
 814                               regset[32].buf);
 815   mips_supply_register_32bit (regcache, use_64bit,
 816                               find_regno (regcache->tdesc, "fir"),
 817                               regset[32].buf + 4);
 818 }
 819 #endif /* HAVE_PTRACE_GETREGS */
 820
 821 static struct regset_info mips_regsets[] = {
 822 #ifdef HAVE_PTRACE_GETREGS
 823   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 38 * 8, GENERAL_REGS,
 824     mips_fill_gregset, mips_store_gregset },
 825   { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, 33 * 8, FP_REGS,
 826     mips_fill_fpregset, mips_store_fpregset },
 827 #endif /* HAVE_PTRACE_GETREGS */
 828   NULL_REGSET
 829 };
 830
 831 static struct regsets_info mips_regsets_info =
 832   {
 833     mips_regsets, /* regsets */
 834     0, /* num_regsets */
 835     NULL, /* disabled_regsets */
 836   };
 837
 838 static struct usrregs_info mips_dsp_usrregs_info =
 839   {
 840     mips_dsp_num_regs,
 841     mips_dsp_regmap,
 842   };
 843
 844 static struct usrregs_info mips_usrregs_info =
 845   {
 846     mips_num_regs,
 847     mips_regmap,
 848   };
 849
 850 static struct regs_info dsp_regs_info =
 851   {
 852     mips_dsp_regset_bitmap,
 853     &mips_dsp_usrregs_info,
 854     &mips_regsets_info
 855   };
 856
 857 static struct regs_info regs_info =
 858   {
 859     NULL, /* regset_bitmap */
 860     &mips_usrregs_info,
 861     &mips_regsets_info
 862   };
 863
 864 static const struct regs_info *
 865 mips_regs_info (void)
 866 {
 867   if (have_dsp)
 868     return &dsp_regs_info;
 869   else
 870     return &regs_info;
 871 }
 872
 873 struct linux_target_ops the_low_target = {
 874   mips_arch_setup,
 875   mips_regs_info,
 876   mips_cannot_fetch_register,
 877   mips_cannot_store_register,
 878   NULL, /* fetch_register */
 879   mips_get_pc,
 880   mips_set_pc,
 881   NULL, /* breakpoint_kind_from_pc */
 882   mips_sw_breakpoint_from_kind,
 883   NULL, /* get_next_pcs */
 884   0,
 885   mips_breakpoint_at,
 886   mips_supports_z_point_type,
 887   mips_insert_point,
 888   mips_remove_point,
 889   mips_stopped_by_watchpoint,
 890   mips_stopped_data_address,
 891   NULL,
 892   NULL,
 893   NULL, /* siginfo_fixup */
 894   mips_linux_new_process,
 895   mips_linux_new_thread,
 896   mips_linux_new_fork,
 897   mips_linux_prepare_to_resume
 898 };
 899
 900 void
 901 initialize_low_arch (void)
 902 {
 903   /* Initialize the Linux target descriptions.  */
 904   init_registers_mips_linux ();
 905   init_registers_mips_dsp_linux ();
 906   init_registers_mips64_linux ();
 907   init_registers_mips64_dsp_linux ();
 908
 909   initialize_regsets_info (&mips_regsets_info);
 910 }