gdb/gdbserver/linux-mips-low.c

   1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2017 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21
  22 #include "nat/gdb_ptrace.h"
  23 #include <endian.h>
  24
  25 #include "nat/mips-linux-watch.h"
  26 #include "gdb_proc_service.h"
  27
  28 /* Defined in auto-generated file mips-linux.c.  */
  29 void init_registers_mips_linux (void);
  30 extern const struct target_desc *tdesc_mips_linux;
  31
  32 /* Defined in auto-generated file mips-dsp-linux.c.  */
  33 void init_registers_mips_dsp_linux (void);
  34 extern const struct target_desc *tdesc_mips_dsp_linux;
  35
  36 /* Defined in auto-generated file mips64-linux.c.  */
  37 void init_registers_mips64_linux (void);
  38 extern const struct target_desc *tdesc_mips64_linux;
  39
  40 /* Defined in auto-generated file mips64-dsp-linux.c.  */
  41 void init_registers_mips64_dsp_linux (void);
  42 extern const struct target_desc *tdesc_mips64_dsp_linux;
  43
  44 #ifdef __mips64
  45 #define tdesc_mips_linux tdesc_mips64_linux
  46 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
  47 #endif
  48
  49 #ifndef PTRACE_GET_THREAD_AREA
  50 #define PTRACE_GET_THREAD_AREA 25
  51 #endif
  52
  53 #ifdef HAVE_SYS_REG_H
  54 #include <sys/reg.h>
  55 #endif
  56
  57 #define mips_num_regs 73
  58 #define mips_dsp_num_regs 80
  59
  60 #include <asm/ptrace.h>
  61
  62 #ifndef DSP_BASE
  63 #define DSP_BASE 71
  64 #define DSP_CONTROL 77
  65 #endif
  66
  67 union mips_register
  68 {
  69   unsigned char buf[8];
  70
  71   /* Deliberately signed, for proper sign extension.  */
  72   int reg32;
  73   long long reg64;
  74 };
  75
  76 /* Return the ptrace ``address'' of register REGNO. */
  77
  78 #define mips_base_regs                                                  \
  79   -1,  1,  2,  3,  4,  5,  6,  7,                                       \
  80   8,  9,  10, 11, 12, 13, 14, 15,                                       \
  81   16, 17, 18, 19, 20, 21, 22, 23,                                       \
  82   24, 25, 26, 27, 28, 29, 30, 31,                                       \
  83                                                                         \
  84   -1, MMLO, MMHI, BADVADDR, CAUSE, PC,                                  \
  85                                                                         \
  86   FPR_BASE,      FPR_BASE + 1,  FPR_BASE + 2,  FPR_BASE + 3,            \
  87   FPR_BASE + 4,  FPR_BASE + 5,  FPR_BASE + 6,  FPR_BASE + 7,            \
  88   FPR_BASE + 8,  FPR_BASE + 9,  FPR_BASE + 10, FPR_BASE + 11,           \
  89   FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15,           \
  90   FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19,           \
  91   FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23,           \
  92   FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27,           \
  93   FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31,           \
  94   FPC_CSR, FPC_EIR
  95
  96 #define mips_dsp_regs                                                   \
  97   DSP_BASE,      DSP_BASE + 1,  DSP_BASE + 2,  DSP_BASE + 3,            \
  98   DSP_BASE + 4,  DSP_BASE + 5,                                          \
  99   DSP_CONTROL
 100
 101 static int mips_regmap[mips_num_regs] = {
 102   mips_base_regs,
 103   0
 104 };
 105
 106 static int mips_dsp_regmap[mips_dsp_num_regs] = {
 107   mips_base_regs,
 108   mips_dsp_regs,
 109   0
 110 };
 111
 112 /* DSP registers are not in any regset and can only be accessed
 113    individually.  */
 114
 115 static unsigned char mips_dsp_regset_bitmap[(mips_dsp_num_regs + 7) / 8] = {
 116   0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
 117 };
 118
 119 static int have_dsp = -1;
 120
 121 /* Try peeking at an arbitrarily chosen DSP register and pick the available
 122    user register set accordingly.  */
 123
 124 static const struct target_desc *
 125 mips_read_description (void)
 126 {
 127   if (have_dsp < 0)
 128     {
 129       int pid = lwpid_of (current_thread);
 130
 131       errno = 0;
 132       ptrace (PTRACE_PEEKUSER, pid, DSP_CONTROL, 0);
 133       switch (errno)
 134         {
 135         case 0:
 136           have_dsp = 1;
 137           break;
 138         case EIO:
 139           have_dsp = 0;
 140           break;
 141         default:
 142           perror_with_name ("ptrace");
 143           break;
 144         }
 145     }
 146
 147   return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
 148 }
 149
 150 static void
 151 mips_arch_setup (void)
 152 {
 153   current_process ()->tdesc = mips_read_description ();
 154 }
 155
 156 static struct usrregs_info *
 157 get_usrregs_info (void)
 158 {
 159   const struct regs_info *regs_info = the_low_target.regs_info ();
 160
 161   return regs_info->usrregs;
 162 }
 163
 164 /* Per-process arch-specific data we want to keep.  */
 165
 166 struct arch_process_info
 167 {
 168   /* -1 if the kernel and/or CPU do not support watch registers.
 169       1 if watch_readback is valid and we can read style, num_valid
 170         and the masks.
 171       0 if we need to read the watch_readback.  */
 172
 173   int watch_readback_valid;
 174
 175   /* Cached watch register read values.  */
 176
 177   struct pt_watch_regs watch_readback;
 178
 179   /* Current watchpoint requests for this process.  */
 180
 181   struct mips_watchpoint *current_watches;
 182
 183   /* The current set of watch register values for writing the
 184      registers.  */
 185
 186   struct pt_watch_regs watch_mirror;
 187 };
 188
 189 /* Per-thread arch-specific data we want to keep.  */
 190
 191 struct arch_lwp_info
 192 {
 193   /* Non-zero if our copy differs from what's recorded in the thread.  */
 194   int watch_registers_changed;
 195 };
 196
 197 /* From mips-linux-nat.c.  */
 198
 199 /* Pseudo registers can not be read.  ptrace does not provide a way to
 200    read (or set) PS_REGNUM, and there's no point in reading or setting
 201    ZERO_REGNUM.  We also can not set BADVADDR, CAUSE, or FCRIR via
 202    ptrace().  */
 203
 204 static int
 205 mips_cannot_fetch_register (int regno)
 206 {
 207   const struct target_desc *tdesc;
 208
 209   if (get_usrregs_info ()->regmap[regno] == -1)
 210     return 1;
 211
 212   tdesc = current_process ()->tdesc;
 213
 214   if (find_regno (tdesc, "r0") == regno)
 215     return 1;
 216
 217   return 0;
 218 }
 219
 220 static int
 221 mips_cannot_store_register (int regno)
 222 {
 223   const struct target_desc *tdesc;
 224
 225   if (get_usrregs_info ()->regmap[regno] == -1)
 226     return 1;
 227
 228   tdesc = current_process ()->tdesc;
 229
 230   if (find_regno (tdesc, "r0") == regno)
 231     return 1;
 232
 233   if (find_regno (tdesc, "cause") == regno)
 234     return 1;
 235
 236   if (find_regno (tdesc, "badvaddr") == regno)
 237     return 1;
 238
 239   if (find_regno (tdesc, "fir") == regno)
 240     return 1;
 241
 242   return 0;
 243 }
 244
 245 static CORE_ADDR
 246 mips_get_pc (struct regcache *regcache)
 247 {
 248   union mips_register pc;
 249   collect_register_by_name (regcache, "pc", pc.buf);
 250   return register_size (regcache->tdesc, 0) == 4 ? pc.reg32 : pc.reg64;
 251 }
 252
 253 static void
 254 mips_set_pc (struct regcache *regcache, CORE_ADDR pc)
 255 {
 256   union mips_register newpc;
 257   if (register_size (regcache->tdesc, 0) == 4)
 258     newpc.reg32 = pc;
 259   else
 260     newpc.reg64 = pc;
 261
 262   supply_register_by_name (regcache, "pc", newpc.buf);
 263 }
 264
 265 /* Correct in either endianness.  */
 266 static const unsigned int mips_breakpoint = 0x0005000d;
 267 #define mips_breakpoint_len 4
 268
 269 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */
 270
 271 static const gdb_byte *
 272 mips_sw_breakpoint_from_kind (int kind, int *size)
 273 {
 274   *size = mips_breakpoint_len;
 275   return (const gdb_byte *) &mips_breakpoint;
 276 }
 277
 278 static int
 279 mips_breakpoint_at (CORE_ADDR where)
 280 {
 281   unsigned int insn;
 282
 283   (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
 284   if (insn == mips_breakpoint)
 285     return 1;
 286
 287   /* If necessary, recognize more trap instructions here.  GDB only uses the
 288      one.  */
 289   return 0;
 290 }
 291
 292 /* Mark the watch registers of lwp, represented by ENTRY, as changed,
 293    if the lwp's process id is *PID_P.  */
 294
 295 static int
 296 update_watch_registers_callback (struct inferior_list_entry *entry,
 297                                  void *pid_p)
 298 {
 299   struct thread_info *thread = (struct thread_info *) entry;
 300   struct lwp_info *lwp = get_thread_lwp (thread);
 301   int pid = *(int *) pid_p;
 302
 303   /* Only update the threads of this process.  */
 304   if (pid_of (thread) == pid)
 305     {
 306       /* The actual update is done later just before resuming the lwp,
 307          we just mark that the registers need updating.  */
 308       lwp->arch_private->watch_registers_changed = 1;
 309
 310       /* If the lwp isn't stopped, force it to momentarily pause, so
 311          we can update its watch registers.  */
 312       if (!lwp->stopped)
 313         linux_stop_lwp (lwp);
 314     }
 315
 316   return 0;
 317 }
 318
 319 /* This is the implementation of linux_target_ops method
 320    new_process.  */
 321
 322 static struct arch_process_info *
 323 mips_linux_new_process (void)
 324 {
 325   struct arch_process_info *info = XCNEW (struct arch_process_info);
 326
 327   return info;
 328 }
 329
 330 /* This is the implementation of linux_target_ops method new_thread.
 331    Mark the watch registers as changed, so the threads' copies will
 332    be updated.  */
 333
 334 static void
 335 mips_linux_new_thread (struct lwp_info *lwp)
 336 {
 337   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
 338
 339   info->watch_registers_changed = 1;
 340
 341   lwp->arch_private = info;
 342 }
 343
 344 /* Function to call when a thread is being deleted.  */
 345
 346 static void
 347 mips_linux_delete_thread (struct arch_lwp_info *arch_lwp)
 348 {
 349   xfree (arch_lwp);
 350 }
 351
 352 /* Create a new mips_watchpoint and add it to the list.  */
 353
 354 static void
 355 mips_add_watchpoint (struct arch_process_info *priv, CORE_ADDR addr, int len,
 356                      enum target_hw_bp_type watch_type)
 357 {
 358   struct mips_watchpoint *new_watch;
 359   struct mips_watchpoint **pw;
 360
 361   new_watch = XNEW (struct mips_watchpoint);
 362   new_watch->addr = addr;
 363   new_watch->len = len;
 364   new_watch->type = watch_type;
 365   new_watch->next = NULL;
 366
 367   pw = &priv->current_watches;
 368   while (*pw != NULL)
 369     pw = &(*pw)->next;
 370   *pw = new_watch;
 371 }
 372
 373 /* Hook to call when a new fork is attached.  */
 374
 375 static void
 376 mips_linux_new_fork (struct process_info *parent,
 377                         struct process_info *child)
 378 {
 379   struct arch_process_info *parent_private;
 380   struct arch_process_info *child_private;
 381   struct mips_watchpoint *wp;
 382
 383   /* These are allocated by linux_add_process.  */
 384   gdb_assert (parent->priv != NULL
 385               && parent->priv->arch_private != NULL);
 386   gdb_assert (child->priv != NULL
 387               && child->priv->arch_private != NULL);
 388
 389   /* Linux kernel before 2.6.33 commit
 390      72f674d203cd230426437cdcf7dd6f681dad8b0d
 391      will inherit hardware debug registers from parent
 392      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 393      zeroed debug registers.
 394
 395      GDB core assumes the child inherits the watchpoints/hw
 396      breakpoints of the parent, and will remove them all from the
 397      forked off process.  Copy the debug registers mirrors into the
 398      new process so that all breakpoints and watchpoints can be
 399      removed together.  The debug registers mirror will become zeroed
 400      in the end before detaching the forked off process, thus making
 401      this compatible with older Linux kernels too.  */
 402
 403   parent_private = parent->priv->arch_private;
 404   child_private = child->priv->arch_private;
 405
 406   child_private->watch_readback_valid = parent_private->watch_readback_valid;
 407   child_private->watch_readback = parent_private->watch_readback;
 408
 409   for (wp = parent_private->current_watches; wp != NULL; wp = wp->next)
 410     mips_add_watchpoint (child_private, wp->addr, wp->len, wp->type);
 411
 412   child_private->watch_mirror = parent_private->watch_mirror;
 413 }
 414 /* This is the implementation of linux_target_ops method
 415    prepare_to_resume.  If the watch regs have changed, update the
 416    thread's copies.  */
 417
 418 static void
 419 mips_linux_prepare_to_resume (struct lwp_info *lwp)
 420 {
 421   ptid_t ptid = ptid_of (get_lwp_thread (lwp));
 422   struct process_info *proc = find_process_pid (ptid_get_pid (ptid));
 423   struct arch_process_info *priv = proc->priv->arch_private;
 424
 425   if (lwp->arch_private->watch_registers_changed)
 426     {
 427       /* Only update the watch registers if we have set or unset a
 428          watchpoint already.  */
 429       if (mips_linux_watch_get_num_valid (&priv->watch_mirror) > 0)
 430         {
 431           /* Write the mirrored watch register values.  */
 432           int tid = ptid_get_lwp (ptid);
 433
 434           if (-1 == ptrace (PTRACE_SET_WATCH_REGS, tid,
 435                             &priv->watch_mirror, NULL))
 436             perror_with_name ("Couldn't write watch register");
 437         }
 438
 439       lwp->arch_private->watch_registers_changed = 0;
 440     }
 441 }
 442
 443 static int
 444 mips_supports_z_point_type (char z_type)
 445 {
 446   switch (z_type)
 447     {
 448     case Z_PACKET_WRITE_WP:
 449     case Z_PACKET_READ_WP:
 450     case Z_PACKET_ACCESS_WP:
 451       return 1;
 452     default:
 453       return 0;
 454     }
 455 }
 456
 457 /* This is the implementation of linux_target_ops method
 458    insert_point.  */
 459
 460 static int
 461 mips_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 462                    int len, struct raw_breakpoint *bp)
 463 {
 464   struct process_info *proc = current_process ();
 465   struct arch_process_info *priv = proc->priv->arch_private;
 466   struct pt_watch_regs regs;
 467   int pid;
 468   long lwpid;
 469   enum target_hw_bp_type watch_type;
 470   uint32_t irw;
 471
 472   lwpid = lwpid_of (current_thread);
 473   if (!mips_linux_read_watch_registers (lwpid,
 474                                         &priv->watch_readback,
 475                                         &priv->watch_readback_valid,
 476                                         0))
 477     return -1;
 478
 479   if (len <= 0)
 480     return -1;
 481
 482   regs = priv->watch_readback;
 483   /* Add the current watches.  */
 484   mips_linux_watch_populate_regs (priv->current_watches, &regs);
 485
 486   /* Now try to add the new watch.  */
 487   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 488   irw = mips_linux_watch_type_to_irw (watch_type);
 489   if (!mips_linux_watch_try_one_watch (&regs, addr, len, irw))
 490     return -1;
 491
 492   /* It fit.  Stick it on the end of the list.  */
 493   mips_add_watchpoint (priv, addr, len, watch_type);
 494
 495   priv->watch_mirror = regs;
 496
 497   /* Only update the threads of this process.  */
 498   pid = pid_of (proc);
 499   find_inferior (&all_threads, update_watch_registers_callback, &pid);
 500
 501   return 0;
 502 }
 503
 504 /* This is the implementation of linux_target_ops method
 505    remove_point.  */
 506
 507 static int
 508 mips_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 509                    int len, struct raw_breakpoint *bp)
 510 {
 511   struct process_info *proc = current_process ();
 512   struct arch_process_info *priv = proc->priv->arch_private;
 513
 514   int deleted_one;
 515   int pid;
 516   enum target_hw_bp_type watch_type;
 517
 518   struct mips_watchpoint **pw;
 519   struct mips_watchpoint *w;
 520
 521   /* Search for a known watch that matches.  Then unlink and free it.  */
 522   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 523   deleted_one = 0;
 524   pw = &priv->current_watches;
 525   while ((w = *pw))
 526     {
 527       if (w->addr == addr && w->len == len && w->type == watch_type)
 528         {
 529           *pw = w->next;
 530           free (w);
 531           deleted_one = 1;
 532           break;
 533         }
 534       pw = &(w->next);
 535     }
 536
 537   if (!deleted_one)
 538     return -1;  /* We don't know about it, fail doing nothing.  */
 539
 540   /* At this point watch_readback is known to be valid because we
 541      could not have added the watch without reading it.  */
 542   gdb_assert (priv->watch_readback_valid == 1);
 543
 544   priv->watch_mirror = priv->watch_readback;
 545   mips_linux_watch_populate_regs (priv->current_watches,
 546                                   &priv->watch_mirror);
 547
 548   /* Only update the threads of this process.  */
 549   pid = pid_of (proc);
 550   find_inferior (&all_threads, update_watch_registers_callback, &pid);
 551   return 0;
 552 }
 553
 554 /* This is the implementation of linux_target_ops method
 555    stopped_by_watchpoint.  The watchhi R and W bits indicate
 556    the watch register triggered. */
 557
 558 static int
 559 mips_stopped_by_watchpoint (void)
 560 {
 561   struct process_info *proc = current_process ();
 562   struct arch_process_info *priv = proc->priv->arch_private;
 563   int n;
 564   int num_valid;
 565   long lwpid = lwpid_of (current_thread);
 566
 567   if (!mips_linux_read_watch_registers (lwpid,
 568                                         &priv->watch_readback,
 569                                         &priv->watch_readback_valid,
 570                                         1))
 571     return 0;
 572
 573   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 574
 575   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 576     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 577         & (R_MASK | W_MASK))
 578       return 1;
 579
 580   return 0;
 581 }
 582
 583 /* This is the implementation of linux_target_ops method
 584    stopped_data_address.  */
 585
 586 static CORE_ADDR
 587 mips_stopped_data_address (void)
 588 {
 589   struct process_info *proc = current_process ();
 590   struct arch_process_info *priv = proc->priv->arch_private;
 591   int n;
 592   int num_valid;
 593   long lwpid = lwpid_of (current_thread);
 594
 595   /* On MIPS we don't know the low order 3 bits of the data address.
 596      GDB does not support remote targets that can't report the
 597      watchpoint address.  So, make our best guess; return the starting
 598      address of a watchpoint request which overlaps the one that
 599      triggered.  */
 600
 601   if (!mips_linux_read_watch_registers (lwpid,
 602                                         &priv->watch_readback,
 603                                         &priv->watch_readback_valid,
 604                                         0))
 605     return 0;
 606
 607   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 608
 609   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 610     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 611         & (R_MASK | W_MASK))
 612       {
 613         CORE_ADDR t_low, t_hi;
 614         int t_irw;
 615         struct mips_watchpoint *watch;
 616
 617         t_low = mips_linux_watch_get_watchlo (&priv->watch_readback, n);
 618         t_irw = t_low & IRW_MASK;
 619         t_hi = (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 620                 | IRW_MASK);
 621         t_low &= ~(CORE_ADDR)t_hi;
 622
 623         for (watch = priv->current_watches;
 624              watch != NULL;
 625              watch = watch->next)
 626           {
 627             CORE_ADDR addr = watch->addr;
 628             CORE_ADDR last_byte = addr + watch->len - 1;
 629
 630             if ((t_irw & mips_linux_watch_type_to_irw (watch->type)) == 0)
 631               {
 632                 /* Different type.  */
 633                 continue;
 634               }
 635             /* Check for overlap of even a single byte.  */
 636             if (last_byte >= t_low && addr <= t_low + t_hi)
 637               return addr;
 638           }
 639       }
 640
 641   /* Shouldn't happen.  */
 642   return 0;
 643 }
 644
 645 /* Fetch the thread-local storage pointer for libthread_db.  */
 646
 647 ps_err_e
 648 ps_get_thread_area (struct ps_prochandle *ph,
 649                     lwpid_t lwpid, int idx, void **base)
 650 {
 651   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 652     return PS_ERR;
 653
 654   /* IDX is the bias from the thread pointer to the beginning of the
 655      thread descriptor.  It has to be subtracted due to implementation
 656      quirks in libthread_db.  */
 657   *base = (void *) ((char *)*base - idx);
 658
 659   return PS_OK;
 660 }
 661
 662 #ifdef HAVE_PTRACE_GETREGS
 663
 664 static void
 665 mips_collect_register (struct regcache *regcache,
 666                        int use_64bit, int regno, union mips_register *reg)
 667 {
 668   union mips_register tmp_reg;
 669
 670   if (use_64bit)
 671     {
 672       collect_register (regcache, regno, &tmp_reg.reg64);
 673       *reg = tmp_reg;
 674     }
 675   else
 676     {
 677       collect_register (regcache, regno, &tmp_reg.reg32);
 678       reg->reg64 = tmp_reg.reg32;
 679     }
 680 }
 681
 682 static void
 683 mips_supply_register (struct regcache *regcache,
 684                       int use_64bit, int regno, const union mips_register *reg)
 685 {
 686   int offset = 0;
 687
 688   /* For big-endian 32-bit targets, ignore the high four bytes of each
 689      eight-byte slot.  */
 690   if (__BYTE_ORDER == __BIG_ENDIAN && !use_64bit)
 691     offset = 4;
 692
 693   supply_register (regcache, regno, reg->buf + offset);
 694 }
 695
 696 static void
 697 mips_collect_register_32bit (struct regcache *regcache,
 698                              int use_64bit, int regno, unsigned char *buf)
 699 {
 700   union mips_register tmp_reg;
 701   int reg32;
 702
 703   mips_collect_register (regcache, use_64bit, regno, &tmp_reg);
 704   reg32 = tmp_reg.reg64;
 705   memcpy (buf, &reg32, 4);
 706 }
 707
 708 static void
 709 mips_supply_register_32bit (struct regcache *regcache,
 710                             int use_64bit, int regno, const unsigned char *buf)
 711 {
 712   union mips_register tmp_reg;
 713   int reg32;
 714
 715   memcpy (&reg32, buf, 4);
 716   tmp_reg.reg64 = reg32;
 717   mips_supply_register (regcache, use_64bit, regno, &tmp_reg);
 718 }
 719
 720 static void
 721 mips_fill_gregset (struct regcache *regcache, void *buf)
 722 {
 723   union mips_register *regset = (union mips_register *) buf;
 724   int i, use_64bit;
 725   const struct target_desc *tdesc = regcache->tdesc;
 726
 727   use_64bit = (register_size (tdesc, 0) == 8);
 728
 729   for (i = 1; i < 32; i++)
 730     mips_collect_register (regcache, use_64bit, i, regset + i);
 731
 732   mips_collect_register (regcache, use_64bit,
 733                          find_regno (tdesc, "lo"), regset + 32);
 734   mips_collect_register (regcache, use_64bit,
 735                          find_regno (tdesc, "hi"), regset + 33);
 736   mips_collect_register (regcache, use_64bit,
 737                          find_regno (tdesc, "pc"), regset + 34);
 738   mips_collect_register (regcache, use_64bit,
 739                          find_regno (tdesc, "badvaddr"), regset + 35);
 740   mips_collect_register (regcache, use_64bit,
 741                          find_regno (tdesc, "status"), regset + 36);
 742   mips_collect_register (regcache, use_64bit,
 743                          find_regno (tdesc, "cause"), regset + 37);
 744
 745   mips_collect_register (regcache, use_64bit,
 746                          find_regno (tdesc, "restart"), regset + 0);
 747 }
 748
 749 static void
 750 mips_store_gregset (struct regcache *regcache, const void *buf)
 751 {
 752   const union mips_register *regset = (const union mips_register *) buf;
 753   int i, use_64bit;
 754
 755   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 756
 757   for (i = 0; i < 32; i++)
 758     mips_supply_register (regcache, use_64bit, i, regset + i);
 759
 760   mips_supply_register (regcache, use_64bit,
 761                         find_regno (regcache->tdesc, "lo"), regset + 32);
 762   mips_supply_register (regcache, use_64bit,
 763                         find_regno (regcache->tdesc, "hi"), regset + 33);
 764   mips_supply_register (regcache, use_64bit,
 765                         find_regno (regcache->tdesc, "pc"), regset + 34);
 766   mips_supply_register (regcache, use_64bit,
 767                         find_regno (regcache->tdesc, "badvaddr"), regset + 35);
 768   mips_supply_register (regcache, use_64bit,
 769                         find_regno (regcache->tdesc, "status"), regset + 36);
 770   mips_supply_register (regcache, use_64bit,
 771                         find_regno (regcache->tdesc, "cause"), regset + 37);
 772
 773   mips_supply_register (regcache, use_64bit,
 774                         find_regno (regcache->tdesc, "restart"), regset + 0);
 775 }
 776
 777 static void
 778 mips_fill_fpregset (struct regcache *regcache, void *buf)
 779 {
 780   union mips_register *regset = (union mips_register *) buf;
 781   int i, use_64bit, first_fp, big_endian;
 782
 783   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 784   first_fp = find_regno (regcache->tdesc, "f0");
 785   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 786
 787   /* See GDB for a discussion of this peculiar layout.  */
 788   for (i = 0; i < 32; i++)
 789     if (use_64bit)
 790       collect_register (regcache, first_fp + i, regset[i].buf);
 791     else
 792       collect_register (regcache, first_fp + i,
 793                         regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 794
 795   mips_collect_register_32bit (regcache, use_64bit,
 796                                find_regno (regcache->tdesc, "fcsr"), regset[32].buf);
 797   mips_collect_register_32bit (regcache, use_64bit,
 798                                find_regno (regcache->tdesc, "fir"),
 799                                regset[32].buf + 4);
 800 }
 801
 802 static void
 803 mips_store_fpregset (struct regcache *regcache, const void *buf)
 804 {
 805   const union mips_register *regset = (const union mips_register *) buf;
 806   int i, use_64bit, first_fp, big_endian;
 807
 808   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 809   first_fp = find_regno (regcache->tdesc, "f0");
 810   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 811
 812   /* See GDB for a discussion of this peculiar layout.  */
 813   for (i = 0; i < 32; i++)
 814     if (use_64bit)
 815       supply_register (regcache, first_fp + i, regset[i].buf);
 816     else
 817       supply_register (regcache, first_fp + i,
 818                        regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 819
 820   mips_supply_register_32bit (regcache, use_64bit,
 821                               find_regno (regcache->tdesc, "fcsr"),
 822                               regset[32].buf);
 823   mips_supply_register_32bit (regcache, use_64bit,
 824                               find_regno (regcache->tdesc, "fir"),
 825                               regset[32].buf + 4);
 826 }
 827 #endif /* HAVE_PTRACE_GETREGS */
 828
 829 static struct regset_info mips_regsets[] = {
 830 #ifdef HAVE_PTRACE_GETREGS
 831   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 38 * 8, GENERAL_REGS,
 832     mips_fill_gregset, mips_store_gregset },
 833   { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, 33 * 8, FP_REGS,
 834     mips_fill_fpregset, mips_store_fpregset },
 835 #endif /* HAVE_PTRACE_GETREGS */
 836   NULL_REGSET
 837 };
 838
 839 static struct regsets_info mips_regsets_info =
 840   {
 841     mips_regsets, /* regsets */
 842     0, /* num_regsets */
 843     NULL, /* disabled_regsets */
 844   };
 845
 846 static struct usrregs_info mips_dsp_usrregs_info =
 847   {
 848     mips_dsp_num_regs,
 849     mips_dsp_regmap,
 850   };
 851
 852 static struct usrregs_info mips_usrregs_info =
 853   {
 854     mips_num_regs,
 855     mips_regmap,
 856   };
 857
 858 static struct regs_info dsp_regs_info =
 859   {
 860     mips_dsp_regset_bitmap,
 861     &mips_dsp_usrregs_info,
 862     &mips_regsets_info
 863   };
 864
 865 static struct regs_info regs_info =
 866   {
 867     NULL, /* regset_bitmap */
 868     &mips_usrregs_info,
 869     &mips_regsets_info
 870   };
 871
 872 static const struct regs_info *
 873 mips_regs_info (void)
 874 {
 875   if (have_dsp)
 876     return &dsp_regs_info;
 877   else
 878     return &regs_info;
 879 }
 880
 881 struct linux_target_ops the_low_target = {
 882   mips_arch_setup,
 883   mips_regs_info,
 884   mips_cannot_fetch_register,
 885   mips_cannot_store_register,
 886   NULL, /* fetch_register */
 887   mips_get_pc,
 888   mips_set_pc,
 889   NULL, /* breakpoint_kind_from_pc */
 890   mips_sw_breakpoint_from_kind,
 891   NULL, /* get_next_pcs */
 892   0,
 893   mips_breakpoint_at,
 894   mips_supports_z_point_type,
 895   mips_insert_point,
 896   mips_remove_point,
 897   mips_stopped_by_watchpoint,
 898   mips_stopped_data_address,
 899   NULL,
 900   NULL,
 901   NULL, /* siginfo_fixup */
 902   mips_linux_new_process,
 903   mips_linux_new_thread,
 904   mips_linux_delete_thread,
 905   mips_linux_new_fork,
 906   mips_linux_prepare_to_resume
 907 };
 908
 909 void
 910 initialize_low_arch (void)
 911 {
 912   /* Initialize the Linux target descriptions.  */
 913   init_registers_mips_linux ();
 914   init_registers_mips_dsp_linux ();
 915   init_registers_mips64_linux ();
 916   init_registers_mips64_dsp_linux ();
 917
 918   initialize_regsets_info (&mips_regsets_info);
 919 }