1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2014 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #include "linux-low.h"
22 #include <sys/ptrace.h>
25 #include "nat/mips-linux-watch.h"
26 #include "gdb_proc_service.h"
28 /* Defined in auto-generated file mips-linux.c. */
29 void init_registers_mips_linux (void);
30 extern const struct target_desc
*tdesc_mips_linux
;
32 /* Defined in auto-generated file mips-dsp-linux.c. */
33 void init_registers_mips_dsp_linux (void);
34 extern const struct target_desc
*tdesc_mips_dsp_linux
;
36 /* Defined in auto-generated file mips64-linux.c. */
37 void init_registers_mips64_linux (void);
38 extern const struct target_desc
*tdesc_mips64_linux
;
40 /* Defined in auto-generated file mips64-dsp-linux.c. */
41 void init_registers_mips64_dsp_linux (void);
42 extern const struct target_desc
*tdesc_mips64_dsp_linux
;
45 #define tdesc_mips_linux tdesc_mips64_linux
46 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
49 #ifndef PTRACE_GET_THREAD_AREA
50 #define PTRACE_GET_THREAD_AREA 25
57 #define mips_num_regs 73
58 #define mips_dsp_num_regs 80
60 #include <asm/ptrace.h>
64 #define DSP_CONTROL 77
71 /* Deliberately signed, for proper sign extension. */
76 /* Return the ptrace ``address'' of register REGNO. */
78 #define mips_base_regs \
79 -1, 1, 2, 3, 4, 5, 6, 7, \
80 8, 9, 10, 11, 12, 13, 14, 15, \
81 16, 17, 18, 19, 20, 21, 22, 23, \
82 24, 25, 26, 27, 28, 29, 30, 31, \
84 -1, MMLO, MMHI, BADVADDR, CAUSE, PC, \
86 FPR_BASE, FPR_BASE + 1, FPR_BASE + 2, FPR_BASE + 3, \
87 FPR_BASE + 4, FPR_BASE + 5, FPR_BASE + 6, FPR_BASE + 7, \
88 FPR_BASE + 8, FPR_BASE + 9, FPR_BASE + 10, FPR_BASE + 11, \
89 FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15, \
90 FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19, \
91 FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23, \
92 FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27, \
93 FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31, \
96 #define mips_dsp_regs \
97 DSP_BASE, DSP_BASE + 1, DSP_BASE + 2, DSP_BASE + 3, \
98 DSP_BASE + 4, DSP_BASE + 5, \
101 static int mips_regmap
[mips_num_regs
] = {
106 static int mips_dsp_regmap
[mips_dsp_num_regs
] = {
112 /* DSP registers are not in any regset and can only be accessed
115 static unsigned char mips_dsp_regset_bitmap
[(mips_dsp_num_regs
+ 7) / 8] = {
116 0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
119 static int have_dsp
= -1;
121 /* Try peeking at an arbitrarily chosen DSP register and pick the available
122 user register set accordingly. */
124 static const struct target_desc
*
125 mips_read_description (void)
129 int pid
= lwpid_of (current_inferior
);
131 ptrace (PTRACE_PEEKUSER
, pid
, DSP_CONTROL
, 0);
141 perror_with_name ("ptrace");
146 return have_dsp
? tdesc_mips_dsp_linux
: tdesc_mips_linux
;
150 mips_arch_setup (void)
152 current_process ()->tdesc
= mips_read_description ();
155 static struct usrregs_info
*
156 get_usrregs_info (void)
158 const struct regs_info
*regs_info
= the_low_target
.regs_info ();
160 return regs_info
->usrregs
;
163 /* Per-process arch-specific data we want to keep. */
165 struct arch_process_info
167 /* -1 if the kernel and/or CPU do not support watch registers.
168 1 if watch_readback is valid and we can read style, num_valid
170 0 if we need to read the watch_readback. */
172 int watch_readback_valid
;
174 /* Cached watch register read values. */
176 struct pt_watch_regs watch_readback
;
178 /* Current watchpoint requests for this process. */
180 struct mips_watchpoint
*current_watches
;
182 /* The current set of watch register values for writing the
185 struct pt_watch_regs watch_mirror
;
188 /* Per-thread arch-specific data we want to keep. */
192 /* Non-zero if our copy differs from what's recorded in the thread. */
193 int watch_registers_changed
;
196 /* From mips-linux-nat.c. */
198 /* Pseudo registers can not be read. ptrace does not provide a way to
199 read (or set) PS_REGNUM, and there's no point in reading or setting
200 ZERO_REGNUM. We also can not set BADVADDR, CAUSE, or FCRIR via
204 mips_cannot_fetch_register (int regno
)
206 const struct target_desc
*tdesc
;
208 if (get_usrregs_info ()->regmap
[regno
] == -1)
211 tdesc
= current_process ()->tdesc
;
213 if (find_regno (tdesc
, "r0") == regno
)
220 mips_cannot_store_register (int regno
)
222 const struct target_desc
*tdesc
;
224 if (get_usrregs_info ()->regmap
[regno
] == -1)
227 tdesc
= current_process ()->tdesc
;
229 if (find_regno (tdesc
, "r0") == regno
)
232 if (find_regno (tdesc
, "cause") == regno
)
235 if (find_regno (tdesc
, "badvaddr") == regno
)
238 if (find_regno (tdesc
, "fir") == regno
)
245 mips_get_pc (struct regcache
*regcache
)
247 union mips_register pc
;
248 collect_register_by_name (regcache
, "pc", pc
.buf
);
249 return register_size (regcache
->tdesc
, 0) == 4 ? pc
.reg32
: pc
.reg64
;
253 mips_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
255 union mips_register newpc
;
256 if (register_size (regcache
->tdesc
, 0) == 4)
261 supply_register_by_name (regcache
, "pc", newpc
.buf
);
264 /* Correct in either endianness. */
265 static const unsigned int mips_breakpoint
= 0x0005000d;
266 #define mips_breakpoint_len 4
268 /* We only place breakpoints in empty marker functions, and thread locking
269 is outside of the function. So rather than importing software single-step,
270 we can just run until exit. */
272 mips_reinsert_addr (void)
274 struct regcache
*regcache
= get_thread_regcache (current_inferior
, 1);
275 union mips_register ra
;
276 collect_register_by_name (regcache
, "r31", ra
.buf
);
277 return register_size (regcache
->tdesc
, 0) == 4 ? ra
.reg32
: ra
.reg64
;
281 mips_breakpoint_at (CORE_ADDR where
)
285 (*the_target
->read_memory
) (where
, (unsigned char *) &insn
, 4);
286 if (insn
== mips_breakpoint
)
289 /* If necessary, recognize more trap instructions here. GDB only uses the
294 /* Mark the watch registers of lwp, represented by ENTRY, as changed,
295 if the lwp's process id is *PID_P. */
298 update_watch_registers_callback (struct inferior_list_entry
*entry
,
301 struct thread_info
*thread
= (struct thread_info
*) entry
;
302 struct lwp_info
*lwp
= get_thread_lwp (thread
);
303 int pid
= *(int *) pid_p
;
305 /* Only update the threads of this process. */
306 if (pid_of (thread
) == pid
)
308 /* The actual update is done later just before resuming the lwp,
309 we just mark that the registers need updating. */
310 lwp
->arch_private
->watch_registers_changed
= 1;
312 /* If the lwp isn't stopped, force it to momentarily pause, so
313 we can update its watch registers. */
315 linux_stop_lwp (lwp
);
321 /* This is the implementation of linux_target_ops method
324 static struct arch_process_info
*
325 mips_linux_new_process (void)
327 struct arch_process_info
*info
= xcalloc (1, sizeof (*info
));
332 /* This is the implementation of linux_target_ops method new_thread.
333 Mark the watch registers as changed, so the threads' copies will
336 static struct arch_lwp_info
*
337 mips_linux_new_thread (void)
339 struct arch_lwp_info
*info
= xcalloc (1, sizeof (*info
));
341 info
->watch_registers_changed
= 1;
346 /* This is the implementation of linux_target_ops method
347 prepare_to_resume. If the watch regs have changed, update the
351 mips_linux_prepare_to_resume (struct lwp_info
*lwp
)
353 ptid_t ptid
= ptid_of (get_lwp_thread (lwp
));
354 struct process_info
*proc
= find_process_pid (ptid_get_pid (ptid
));
355 struct arch_process_info
*private = proc
->private->arch_private
;
357 if (lwp
->arch_private
->watch_registers_changed
)
359 /* Only update the watch registers if we have set or unset a
360 watchpoint already. */
361 if (mips_linux_watch_get_num_valid (&private->watch_mirror
) > 0)
363 /* Write the mirrored watch register values. */
364 int tid
= ptid_get_lwp (ptid
);
366 if (-1 == ptrace (PTRACE_SET_WATCH_REGS
, tid
,
367 &private->watch_mirror
))
368 perror_with_name ("Couldn't write watch register");
371 lwp
->arch_private
->watch_registers_changed
= 0;
376 mips_supports_z_point_type (char z_type
)
380 case Z_PACKET_WRITE_WP
:
381 case Z_PACKET_READ_WP
:
382 case Z_PACKET_ACCESS_WP
:
389 /* This is the implementation of linux_target_ops method
393 mips_insert_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
394 int len
, struct raw_breakpoint
*bp
)
396 struct process_info
*proc
= current_process ();
397 struct arch_process_info
*private = proc
->private->arch_private
;
398 struct pt_watch_regs regs
;
399 struct mips_watchpoint
*new_watch
;
400 struct mips_watchpoint
**pw
;
403 enum target_hw_bp_type watch_type
;
406 lwpid
= lwpid_of (current_inferior
);
407 if (!mips_linux_read_watch_registers (lwpid
,
408 &private->watch_readback
,
409 &private->watch_readback_valid
,
416 regs
= private->watch_readback
;
417 /* Add the current watches. */
418 mips_linux_watch_populate_regs (private->current_watches
, ®s
);
420 /* Now try to add the new watch. */
421 watch_type
= raw_bkpt_type_to_target_hw_bp_type (type
);
422 irw
= mips_linux_watch_type_to_irw (watch_type
);
423 if (!mips_linux_watch_try_one_watch (®s
, addr
, len
, irw
))
426 /* It fit. Stick it on the end of the list. */
427 new_watch
= xmalloc (sizeof (struct mips_watchpoint
));
428 new_watch
->addr
= addr
;
429 new_watch
->len
= len
;
430 new_watch
->type
= watch_type
;
431 new_watch
->next
= NULL
;
433 pw
= &private->current_watches
;
438 private->watch_mirror
= regs
;
440 /* Only update the threads of this process. */
442 find_inferior (&all_threads
, update_watch_registers_callback
, &pid
);
447 /* This is the implementation of linux_target_ops method
451 mips_remove_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
452 int len
, struct raw_breakpoint
*bp
)
454 struct process_info
*proc
= current_process ();
455 struct arch_process_info
*private = proc
->private->arch_private
;
459 enum target_hw_bp_type watch_type
;
461 struct mips_watchpoint
**pw
;
462 struct mips_watchpoint
*w
;
464 /* Search for a known watch that matches. Then unlink and free it. */
465 watch_type
= raw_bkpt_type_to_target_hw_bp_type (type
);
467 pw
= &private->current_watches
;
470 if (w
->addr
== addr
&& w
->len
== len
&& w
->type
== watch_type
)
481 return -1; /* We don't know about it, fail doing nothing. */
483 /* At this point watch_readback is known to be valid because we
484 could not have added the watch without reading it. */
485 gdb_assert (private->watch_readback_valid
== 1);
487 private->watch_mirror
= private->watch_readback
;
488 mips_linux_watch_populate_regs (private->current_watches
,
489 &private->watch_mirror
);
491 /* Only update the threads of this process. */
493 find_inferior (&all_threads
, update_watch_registers_callback
, &pid
);
497 /* This is the implementation of linux_target_ops method
498 stopped_by_watchpoint. The watchhi R and W bits indicate
499 the watch register triggered. */
502 mips_stopped_by_watchpoint (void)
504 struct process_info
*proc
= current_process ();
505 struct arch_process_info
*private = proc
->private->arch_private
;
508 long lwpid
= lwpid_of (current_inferior
);
510 if (!mips_linux_read_watch_registers (lwpid
,
511 &private->watch_readback
,
512 &private->watch_readback_valid
,
516 num_valid
= mips_linux_watch_get_num_valid (&private->watch_readback
);
518 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
519 if (mips_linux_watch_get_watchhi (&private->watch_readback
, n
)
526 /* This is the implementation of linux_target_ops method
527 stopped_data_address. */
530 mips_stopped_data_address (void)
532 struct process_info
*proc
= current_process ();
533 struct arch_process_info
*private = proc
->private->arch_private
;
536 long lwpid
= lwpid_of (current_inferior
);
538 /* On MIPS we don't know the low order 3 bits of the data address.
539 GDB does not support remote targets that can't report the
540 watchpoint address. So, make our best guess; return the starting
541 address of a watchpoint request which overlaps the one that
544 if (!mips_linux_read_watch_registers (lwpid
,
545 &private->watch_readback
,
546 &private->watch_readback_valid
,
550 num_valid
= mips_linux_watch_get_num_valid (&private->watch_readback
);
552 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
553 if (mips_linux_watch_get_watchhi (&private->watch_readback
, n
)
556 CORE_ADDR t_low
, t_hi
;
558 struct mips_watchpoint
*watch
;
560 t_low
= mips_linux_watch_get_watchlo (&private->watch_readback
, n
);
561 t_irw
= t_low
& IRW_MASK
;
562 t_hi
= (mips_linux_watch_get_watchhi (&private->watch_readback
, n
)
564 t_low
&= ~(CORE_ADDR
)t_hi
;
566 for (watch
= private->current_watches
;
570 CORE_ADDR addr
= watch
->addr
;
571 CORE_ADDR last_byte
= addr
+ watch
->len
- 1;
573 if ((t_irw
& mips_linux_watch_type_to_irw (watch
->type
)) == 0)
575 /* Different type. */
578 /* Check for overlap of even a single byte. */
579 if (last_byte
>= t_low
&& addr
<= t_low
+ t_hi
)
584 /* Shouldn't happen. */
588 /* Fetch the thread-local storage pointer for libthread_db. */
591 ps_get_thread_area (const struct ps_prochandle
*ph
,
592 lwpid_t lwpid
, int idx
, void **base
)
594 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
597 /* IDX is the bias from the thread pointer to the beginning of the
598 thread descriptor. It has to be subtracted due to implementation
599 quirks in libthread_db. */
600 *base
= (void *) ((char *)*base
- idx
);
605 #ifdef HAVE_PTRACE_GETREGS
608 mips_collect_register (struct regcache
*regcache
,
609 int use_64bit
, int regno
, union mips_register
*reg
)
611 union mips_register tmp_reg
;
615 collect_register (regcache
, regno
, &tmp_reg
.reg64
);
620 collect_register (regcache
, regno
, &tmp_reg
.reg32
);
621 reg
->reg64
= tmp_reg
.reg32
;
626 mips_supply_register (struct regcache
*regcache
,
627 int use_64bit
, int regno
, const union mips_register
*reg
)
631 /* For big-endian 32-bit targets, ignore the high four bytes of each
633 if (__BYTE_ORDER
== __BIG_ENDIAN
&& !use_64bit
)
636 supply_register (regcache
, regno
, reg
->buf
+ offset
);
640 mips_collect_register_32bit (struct regcache
*regcache
,
641 int use_64bit
, int regno
, unsigned char *buf
)
643 union mips_register tmp_reg
;
646 mips_collect_register (regcache
, use_64bit
, regno
, &tmp_reg
);
647 reg32
= tmp_reg
.reg64
;
648 memcpy (buf
, ®32
, 4);
652 mips_supply_register_32bit (struct regcache
*regcache
,
653 int use_64bit
, int regno
, const unsigned char *buf
)
655 union mips_register tmp_reg
;
658 memcpy (®32
, buf
, 4);
659 tmp_reg
.reg64
= reg32
;
660 mips_supply_register (regcache
, use_64bit
, regno
, &tmp_reg
);
664 mips_fill_gregset (struct regcache
*regcache
, void *buf
)
666 union mips_register
*regset
= buf
;
668 const struct target_desc
*tdesc
= regcache
->tdesc
;
670 use_64bit
= (register_size (tdesc
, 0) == 8);
672 for (i
= 1; i
< 32; i
++)
673 mips_collect_register (regcache
, use_64bit
, i
, regset
+ i
);
675 mips_collect_register (regcache
, use_64bit
,
676 find_regno (tdesc
, "lo"), regset
+ 32);
677 mips_collect_register (regcache
, use_64bit
,
678 find_regno (tdesc
, "hi"), regset
+ 33);
679 mips_collect_register (regcache
, use_64bit
,
680 find_regno (tdesc
, "pc"), regset
+ 34);
681 mips_collect_register (regcache
, use_64bit
,
682 find_regno (tdesc
, "badvaddr"), regset
+ 35);
683 mips_collect_register (regcache
, use_64bit
,
684 find_regno (tdesc
, "status"), regset
+ 36);
685 mips_collect_register (regcache
, use_64bit
,
686 find_regno (tdesc
, "cause"), regset
+ 37);
688 mips_collect_register (regcache
, use_64bit
,
689 find_regno (tdesc
, "restart"), regset
+ 0);
693 mips_store_gregset (struct regcache
*regcache
, const void *buf
)
695 const union mips_register
*regset
= buf
;
698 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
700 for (i
= 0; i
< 32; i
++)
701 mips_supply_register (regcache
, use_64bit
, i
, regset
+ i
);
703 mips_supply_register (regcache
, use_64bit
,
704 find_regno (regcache
->tdesc
, "lo"), regset
+ 32);
705 mips_supply_register (regcache
, use_64bit
,
706 find_regno (regcache
->tdesc
, "hi"), regset
+ 33);
707 mips_supply_register (regcache
, use_64bit
,
708 find_regno (regcache
->tdesc
, "pc"), regset
+ 34);
709 mips_supply_register (regcache
, use_64bit
,
710 find_regno (regcache
->tdesc
, "badvaddr"), regset
+ 35);
711 mips_supply_register (regcache
, use_64bit
,
712 find_regno (regcache
->tdesc
, "status"), regset
+ 36);
713 mips_supply_register (regcache
, use_64bit
,
714 find_regno (regcache
->tdesc
, "cause"), regset
+ 37);
716 mips_supply_register (regcache
, use_64bit
,
717 find_regno (regcache
->tdesc
, "restart"), regset
+ 0);
721 mips_fill_fpregset (struct regcache
*regcache
, void *buf
)
723 union mips_register
*regset
= buf
;
724 int i
, use_64bit
, first_fp
, big_endian
;
726 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
727 first_fp
= find_regno (regcache
->tdesc
, "f0");
728 big_endian
= (__BYTE_ORDER
== __BIG_ENDIAN
);
730 /* See GDB for a discussion of this peculiar layout. */
731 for (i
= 0; i
< 32; i
++)
733 collect_register (regcache
, first_fp
+ i
, regset
[i
].buf
);
735 collect_register (regcache
, first_fp
+ i
,
736 regset
[i
& ~1].buf
+ 4 * (big_endian
!= (i
& 1)));
738 mips_collect_register_32bit (regcache
, use_64bit
,
739 find_regno (regcache
->tdesc
, "fcsr"), regset
[32].buf
);
740 mips_collect_register_32bit (regcache
, use_64bit
,
741 find_regno (regcache
->tdesc
, "fir"),
746 mips_store_fpregset (struct regcache
*regcache
, const void *buf
)
748 const union mips_register
*regset
= buf
;
749 int i
, use_64bit
, first_fp
, big_endian
;
751 use_64bit
= (register_size (regcache
->tdesc
, 0) == 8);
752 first_fp
= find_regno (regcache
->tdesc
, "f0");
753 big_endian
= (__BYTE_ORDER
== __BIG_ENDIAN
);
755 /* See GDB for a discussion of this peculiar layout. */
756 for (i
= 0; i
< 32; i
++)
758 supply_register (regcache
, first_fp
+ i
, regset
[i
].buf
);
760 supply_register (regcache
, first_fp
+ i
,
761 regset
[i
& ~1].buf
+ 4 * (big_endian
!= (i
& 1)));
763 mips_supply_register_32bit (regcache
, use_64bit
,
764 find_regno (regcache
->tdesc
, "fcsr"),
766 mips_supply_register_32bit (regcache
, use_64bit
,
767 find_regno (regcache
->tdesc
, "fir"),
770 #endif /* HAVE_PTRACE_GETREGS */
772 static struct regset_info mips_regsets
[] = {
773 #ifdef HAVE_PTRACE_GETREGS
774 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, 38 * 8, GENERAL_REGS
,
775 mips_fill_gregset
, mips_store_gregset
},
776 { PTRACE_GETFPREGS
, PTRACE_SETFPREGS
, 0, 33 * 8, FP_REGS
,
777 mips_fill_fpregset
, mips_store_fpregset
},
778 #endif /* HAVE_PTRACE_GETREGS */
779 { 0, 0, 0, -1, -1, NULL
, NULL
}
782 static struct regsets_info mips_regsets_info
=
784 mips_regsets
, /* regsets */
786 NULL
, /* disabled_regsets */
789 static struct usrregs_info mips_dsp_usrregs_info
=
795 static struct usrregs_info mips_usrregs_info
=
801 static struct regs_info dsp_regs_info
=
803 mips_dsp_regset_bitmap
,
804 &mips_dsp_usrregs_info
,
808 static struct regs_info regs_info
=
810 NULL
, /* regset_bitmap */
815 static const struct regs_info
*
816 mips_regs_info (void)
819 return &dsp_regs_info
;
824 struct linux_target_ops the_low_target
= {
827 mips_cannot_fetch_register
,
828 mips_cannot_store_register
,
829 NULL
, /* fetch_register */
832 (const unsigned char *) &mips_breakpoint
,
837 mips_supports_z_point_type
,
840 mips_stopped_by_watchpoint
,
841 mips_stopped_data_address
,
844 NULL
, /* siginfo_fixup */
845 mips_linux_new_process
,
846 mips_linux_new_thread
,
847 mips_linux_prepare_to_resume
851 initialize_low_arch (void)
853 /* Initialize the Linux target descriptions. */
854 init_registers_mips_linux ();
855 init_registers_mips_dsp_linux ();
856 init_registers_mips64_linux ();
857 init_registers_mips64_dsp_linux ();
859 initialize_regsets_info (&mips_regsets_info
);