* configure.srv [powerpc64-*-linux*]: Remove powerpc-e500.o from
[deliverable/binutils-gdb.git] / gdb / gdbserver / linux-ppc-low.c
1 /* GNU/Linux/PowerPC specific low level interface, for the remote server for
2 GDB.
3 Copyright (C) 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2005, 2007, 2008
4 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "server.h"
22 #include "linux-low.h"
23
24 #include <elf.h>
25 #include <asm/ptrace.h>
26
27 /* These are in <asm/cputable.h> in current kernels. */
28 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000
29 #define PPC_FEATURE_HAS_SPE 0x00800000
30
31 static unsigned long ppc_hwcap;
32
33
34 /* Defined in auto-generated file reg-ppc.c. */
35 void init_registers_ppc (void);
36 /* Defined in auto-generated file powerpc-32.c. */
37 void init_registers_powerpc_32 (void);
38 /* Defined in auto-generated file powerpc-e500.c. */
39 void init_registers_powerpc_e500 (void);
40 /* Defined in auto-generated file reg-ppc64.c. */
41 void init_registers_ppc64 (void);
42 /* Defined in auto-generated file powerpc-64.c. */
43 void init_registers_powerpc_64 (void);
44
45 #define ppc_num_regs 71
46
47 #ifdef __powerpc64__
48 /* We use a constant for FPSCR instead of PT_FPSCR, because
49 many shipped PPC64 kernels had the wrong value in ptrace.h. */
50 static int ppc_regmap[] =
51 {PT_R0 * 8, PT_R1 * 8, PT_R2 * 8, PT_R3 * 8,
52 PT_R4 * 8, PT_R5 * 8, PT_R6 * 8, PT_R7 * 8,
53 PT_R8 * 8, PT_R9 * 8, PT_R10 * 8, PT_R11 * 8,
54 PT_R12 * 8, PT_R13 * 8, PT_R14 * 8, PT_R15 * 8,
55 PT_R16 * 8, PT_R17 * 8, PT_R18 * 8, PT_R19 * 8,
56 PT_R20 * 8, PT_R21 * 8, PT_R22 * 8, PT_R23 * 8,
57 PT_R24 * 8, PT_R25 * 8, PT_R26 * 8, PT_R27 * 8,
58 PT_R28 * 8, PT_R29 * 8, PT_R30 * 8, PT_R31 * 8,
59 PT_FPR0*8, PT_FPR0*8 + 8, PT_FPR0*8+16, PT_FPR0*8+24,
60 PT_FPR0*8+32, PT_FPR0*8+40, PT_FPR0*8+48, PT_FPR0*8+56,
61 PT_FPR0*8+64, PT_FPR0*8+72, PT_FPR0*8+80, PT_FPR0*8+88,
62 PT_FPR0*8+96, PT_FPR0*8+104, PT_FPR0*8+112, PT_FPR0*8+120,
63 PT_FPR0*8+128, PT_FPR0*8+136, PT_FPR0*8+144, PT_FPR0*8+152,
64 PT_FPR0*8+160, PT_FPR0*8+168, PT_FPR0*8+176, PT_FPR0*8+184,
65 PT_FPR0*8+192, PT_FPR0*8+200, PT_FPR0*8+208, PT_FPR0*8+216,
66 PT_FPR0*8+224, PT_FPR0*8+232, PT_FPR0*8+240, PT_FPR0*8+248,
67 PT_NIP * 8, PT_MSR * 8, PT_CCR * 8, PT_LNK * 8,
68 PT_CTR * 8, PT_XER * 8, PT_FPR0*8 + 256 };
69 #else
70 /* Currently, don't check/send MQ. */
71 static int ppc_regmap[] =
72 {PT_R0 * 4, PT_R1 * 4, PT_R2 * 4, PT_R3 * 4,
73 PT_R4 * 4, PT_R5 * 4, PT_R6 * 4, PT_R7 * 4,
74 PT_R8 * 4, PT_R9 * 4, PT_R10 * 4, PT_R11 * 4,
75 PT_R12 * 4, PT_R13 * 4, PT_R14 * 4, PT_R15 * 4,
76 PT_R16 * 4, PT_R17 * 4, PT_R18 * 4, PT_R19 * 4,
77 PT_R20 * 4, PT_R21 * 4, PT_R22 * 4, PT_R23 * 4,
78 PT_R24 * 4, PT_R25 * 4, PT_R26 * 4, PT_R27 * 4,
79 PT_R28 * 4, PT_R29 * 4, PT_R30 * 4, PT_R31 * 4,
80 PT_FPR0*4, PT_FPR0*4 + 8, PT_FPR0*4+16, PT_FPR0*4+24,
81 PT_FPR0*4+32, PT_FPR0*4+40, PT_FPR0*4+48, PT_FPR0*4+56,
82 PT_FPR0*4+64, PT_FPR0*4+72, PT_FPR0*4+80, PT_FPR0*4+88,
83 PT_FPR0*4+96, PT_FPR0*4+104, PT_FPR0*4+112, PT_FPR0*4+120,
84 PT_FPR0*4+128, PT_FPR0*4+136, PT_FPR0*4+144, PT_FPR0*4+152,
85 PT_FPR0*4+160, PT_FPR0*4+168, PT_FPR0*4+176, PT_FPR0*4+184,
86 PT_FPR0*4+192, PT_FPR0*4+200, PT_FPR0*4+208, PT_FPR0*4+216,
87 PT_FPR0*4+224, PT_FPR0*4+232, PT_FPR0*4+240, PT_FPR0*4+248,
88 PT_NIP * 4, PT_MSR * 4, PT_CCR * 4, PT_LNK * 4,
89 PT_CTR * 4, PT_XER * 4, PT_FPSCR * 4
90 };
91
92 static int ppc_regmap_e500[] =
93 {PT_R0 * 4, PT_R1 * 4, PT_R2 * 4, PT_R3 * 4,
94 PT_R4 * 4, PT_R5 * 4, PT_R6 * 4, PT_R7 * 4,
95 PT_R8 * 4, PT_R9 * 4, PT_R10 * 4, PT_R11 * 4,
96 PT_R12 * 4, PT_R13 * 4, PT_R14 * 4, PT_R15 * 4,
97 PT_R16 * 4, PT_R17 * 4, PT_R18 * 4, PT_R19 * 4,
98 PT_R20 * 4, PT_R21 * 4, PT_R22 * 4, PT_R23 * 4,
99 PT_R24 * 4, PT_R25 * 4, PT_R26 * 4, PT_R27 * 4,
100 PT_R28 * 4, PT_R29 * 4, PT_R30 * 4, PT_R31 * 4,
101 -1, -1, -1, -1,
102 -1, -1, -1, -1,
103 -1, -1, -1, -1,
104 -1, -1, -1, -1,
105 -1, -1, -1, -1,
106 -1, -1, -1, -1,
107 -1, -1, -1, -1,
108 -1, -1, -1, -1,
109 PT_NIP * 4, PT_MSR * 4, PT_CCR * 4, PT_LNK * 4,
110 PT_CTR * 4, PT_XER * 4, -1
111 };
112 #endif
113
114 static int
115 ppc_cannot_store_register (int regno)
116 {
117 #ifndef __powerpc64__
118 /* Some kernels do not allow us to store fpscr. */
119 if (!(ppc_hwcap & PPC_FEATURE_HAS_SPE) && regno == find_regno ("fpscr"))
120 return 2;
121 #endif
122
123 return 0;
124 }
125
126 static int
127 ppc_cannot_fetch_register (int regno)
128 {
129 return 0;
130 }
131
132 static void
133 ppc_collect_ptrace_register (int regno, char *buf)
134 {
135 int size = register_size (regno);
136 if (size < sizeof (long))
137 collect_register (regno, buf + sizeof (long) - size);
138 else
139 collect_register (regno, buf);
140 }
141
142 static void
143 ppc_supply_ptrace_register (int regno, const char *buf)
144 {
145 int size = register_size (regno);
146 if (size < sizeof (long))
147 supply_register (regno, buf + sizeof (long) - size);
148 else
149 supply_register (regno, buf);
150 }
151
152 static CORE_ADDR
153 ppc_get_pc (void)
154 {
155 if (register_size (0) == 4)
156 {
157 unsigned int pc;
158 collect_register_by_name ("pc", &pc);
159 return (CORE_ADDR) pc;
160 }
161 else
162 {
163 unsigned long pc;
164 collect_register_by_name ("pc", &pc);
165 return (CORE_ADDR) pc;
166 }
167 }
168
169 static void
170 ppc_set_pc (CORE_ADDR pc)
171 {
172 if (register_size (0) == 4)
173 {
174 unsigned int newpc = pc;
175 supply_register_by_name ("pc", &newpc);
176 }
177 else
178 {
179 unsigned long newpc = pc;
180 supply_register_by_name ("pc", &newpc);
181 }
182 }
183
184
185 static int
186 ppc_get_hwcap (unsigned long *valp)
187 {
188 int wordsize = register_size (0);
189 unsigned char *data = alloca (2 * wordsize);
190 int offset = 0;
191
192 while ((*the_target->read_auxv) (offset, data, 2 * wordsize) == 2 * wordsize)
193 {
194 if (wordsize == 4)
195 {
196 unsigned int *data_p = (unsigned int *)data;
197 if (data_p[0] == AT_HWCAP)
198 {
199 *valp = data_p[1];
200 return 1;
201 }
202 }
203 else
204 {
205 unsigned long *data_p = (unsigned long *)data;
206 if (data_p[0] == AT_HWCAP)
207 {
208 *valp = data_p[1];
209 return 1;
210 }
211 }
212
213 offset += 2 * wordsize;
214 }
215
216 *valp = 0;
217 return 0;
218 }
219
220 static void
221 ppc_arch_setup (void)
222 {
223 #ifdef __powerpc64__
224 long msr;
225
226 /* On a 64-bit host, assume 64-bit inferior process. */
227 init_registers_ppc64 ();
228
229 /* Only if the high bit of the MSR is set, we actually have
230 a 64-bit inferior. */
231 collect_register_by_name ("msr", &msr);
232 if (msr < 0)
233 {
234 ppc_get_hwcap (&ppc_hwcap);
235 if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
236 init_registers_powerpc_64 ();
237
238 return;
239 }
240 #endif
241
242 /* OK, we have a 32-bit inferior. */
243 init_registers_ppc ();
244
245 ppc_get_hwcap (&ppc_hwcap);
246 if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
247 init_registers_powerpc_32 ();
248
249 /* On 32-bit machines, check for SPE registers.
250 Set the low target's regmap field as appropriately. */
251 #ifndef __powerpc64__
252 the_low_target.regmap = ppc_regmap;
253 if (ppc_hwcap & PPC_FEATURE_HAS_SPE)
254 {
255 init_registers_powerpc_e500 ();
256 the_low_target.regmap = ppc_regmap_e500;
257 }
258 #endif
259 }
260
261 /* Correct in either endianness.
262 This instruction is "twge r2, r2", which GDB uses as a software
263 breakpoint. */
264 static const unsigned int ppc_breakpoint = 0x7d821008;
265 #define ppc_breakpoint_len 4
266
267 static int
268 ppc_breakpoint_at (CORE_ADDR where)
269 {
270 unsigned int insn;
271
272 (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
273 if (insn == ppc_breakpoint)
274 return 1;
275 /* If necessary, recognize more trap instructions here. GDB only uses the
276 one. */
277 return 0;
278 }
279
280 /* Provide only a fill function for the general register set. ps_lgetregs
281 will use this for NPTL support. */
282
283 static void ppc_fill_gregset (void *buf)
284 {
285 int i;
286
287 for (i = 0; i < 32; i++)
288 ppc_collect_ptrace_register (i, (char *) buf + ppc_regmap[i]);
289
290 for (i = 64; i < 70; i++)
291 ppc_collect_ptrace_register (i, (char *) buf + ppc_regmap[i]);
292 }
293
294 #ifndef PTRACE_GETVRREGS
295 #define PTRACE_GETVRREGS 18
296 #define PTRACE_SETVRREGS 19
297 #endif
298
299 #define SIZEOF_VRREGS 33*16+4
300
301 static void
302 ppc_fill_vrregset (void *buf)
303 {
304 int i, base;
305 char *regset = buf;
306
307 if (!(ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC))
308 return;
309
310 base = find_regno ("vr0");
311 for (i = 0; i < 32; i++)
312 collect_register (base + i, &regset[i * 16]);
313
314 collect_register_by_name ("vscr", &regset[32 * 16 + 12]);
315 collect_register_by_name ("vrsave", &regset[33 * 16]);
316 }
317
318 static void
319 ppc_store_vrregset (const void *buf)
320 {
321 int i, base;
322 const char *regset = buf;
323
324 if (!(ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC))
325 return;
326
327 base = find_regno ("vr0");
328 for (i = 0; i < 32; i++)
329 supply_register (base + i, &regset[i * 16]);
330
331 supply_register_by_name ("vscr", &regset[32 * 16 + 12]);
332 supply_register_by_name ("vrsave", &regset[33 * 16]);
333 }
334
335 #ifndef PTRACE_GETEVRREGS
336 #define PTRACE_GETEVRREGS 20
337 #define PTRACE_SETEVRREGS 21
338 #endif
339
340 struct gdb_evrregset_t
341 {
342 unsigned long evr[32];
343 unsigned long long acc;
344 unsigned long spefscr;
345 };
346
347 static void
348 ppc_fill_evrregset (void *buf)
349 {
350 int i, ev0;
351 struct gdb_evrregset_t *regset = buf;
352
353 if (!(ppc_hwcap & PPC_FEATURE_HAS_SPE))
354 return;
355
356 ev0 = find_regno ("ev0h");
357 for (i = 0; i < 32; i++)
358 collect_register (ev0 + i, &regset->evr[i]);
359
360 collect_register_by_name ("acc", &regset->acc);
361 collect_register_by_name ("spefscr", &regset->spefscr);
362 }
363
364 static void
365 ppc_store_evrregset (const void *buf)
366 {
367 int i, ev0;
368 const struct gdb_evrregset_t *regset = buf;
369
370 if (!(ppc_hwcap & PPC_FEATURE_HAS_SPE))
371 return;
372
373 ev0 = find_regno ("ev0h");
374 for (i = 0; i < 32; i++)
375 supply_register (ev0 + i, &regset->evr[i]);
376
377 supply_register_by_name ("acc", &regset->acc);
378 supply_register_by_name ("spefscr", &regset->spefscr);
379 }
380
381 struct regset_info target_regsets[] = {
382 /* List the extra register sets before GENERAL_REGS. That way we will
383 fetch them every time, but still fall back to PTRACE_PEEKUSER for the
384 general registers. Some kernels support these, but not the newer
385 PPC_PTRACE_GETREGS. */
386 { PTRACE_GETVRREGS, PTRACE_SETVRREGS, SIZEOF_VRREGS, EXTENDED_REGS,
387 ppc_fill_vrregset, ppc_store_vrregset },
388 { PTRACE_GETEVRREGS, PTRACE_SETEVRREGS, 32 * 4 + 8 + 4, EXTENDED_REGS,
389 ppc_fill_evrregset, ppc_store_evrregset },
390 { 0, 0, 0, GENERAL_REGS, ppc_fill_gregset, NULL },
391 { 0, 0, -1, -1, NULL, NULL }
392 };
393
394 struct linux_target_ops the_low_target = {
395 ppc_arch_setup,
396 ppc_num_regs,
397 ppc_regmap,
398 ppc_cannot_fetch_register,
399 ppc_cannot_store_register,
400 ppc_get_pc,
401 ppc_set_pc,
402 (const unsigned char *) &ppc_breakpoint,
403 ppc_breakpoint_len,
404 NULL,
405 0,
406 ppc_breakpoint_at,
407 NULL,
408 NULL,
409 NULL,
410 NULL,
411 ppc_collect_ptrace_register,
412 ppc_supply_ptrace_register,
413 };
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