Sync proc_service definition with GLIBC
[deliverable/binutils-gdb.git] / gdb / gdbserver / linux-xtensa-low.c
1 /* GNU/Linux/Xtensa specific low level interface, for the remote server for GDB.
2 Copyright (C) 2007-2016 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19
20 #include "server.h"
21 #include "linux-low.h"
22
23 /* Defined in auto-generated file reg-xtensa.c. */
24 void init_registers_xtensa (void);
25 extern const struct target_desc *tdesc_xtensa;
26
27 #include <asm/ptrace.h>
28 #include <xtensa-config.h>
29 #include "arch/xtensa.h"
30 #include "gdb_proc_service.h"
31
32 #include "xtensa-xtregs.c"
33
34 enum regnum {
35 R_PC=0, R_PS,
36 R_LBEG, R_LEND, R_LCOUNT,
37 R_SAR,
38 R_WS, R_WB,
39 R_A0 = 64
40 };
41
42 static void
43 xtensa_fill_gregset (struct regcache *regcache, void *buf)
44 {
45 elf_greg_t* rset = (elf_greg_t*)buf;
46 const struct target_desc *tdesc = regcache->tdesc;
47 int ar0_regnum;
48 char *ptr;
49 int i;
50
51 /* Take care of AR registers. */
52
53 ar0_regnum = find_regno (tdesc, "ar0");
54 ptr = (char*)&rset[R_A0];
55
56 for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
57 {
58 collect_register (regcache, i, ptr);
59 ptr += register_size (tdesc, i);
60 }
61
62 /* Loop registers, if hardware has it. */
63
64 #if XCHAL_HAVE_LOOPS
65 collect_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
66 collect_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
67 collect_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
68 #endif
69
70 collect_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
71 collect_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
72 collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
73 collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
74 collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
75 }
76
77 static void
78 xtensa_store_gregset (struct regcache *regcache, const void *buf)
79 {
80 const elf_greg_t* rset = (const elf_greg_t*)buf;
81 const struct target_desc *tdesc = regcache->tdesc;
82 int ar0_regnum;
83 char *ptr;
84 int i;
85
86 /* Take care of AR registers. */
87
88 ar0_regnum = find_regno (tdesc, "ar0");
89 ptr = (char *)&rset[R_A0];
90
91 for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
92 {
93 supply_register (regcache, i, ptr);
94 ptr += register_size (tdesc, i);
95 }
96
97 /* Loop registers, if hardware has it. */
98
99 #if XCHAL_HAVE_LOOPS
100 supply_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
101 supply_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
102 supply_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
103 #endif
104
105 supply_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
106 supply_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
107 supply_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
108 supply_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
109 supply_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
110 }
111
112 /* Xtensa GNU/Linux PTRACE interface includes extended register set. */
113
114 static void
115 xtensa_fill_xtregset (struct regcache *regcache, void *buf)
116 {
117 const xtensa_regtable_t *ptr;
118
119 for (ptr = xtensa_regmap_table; ptr->name; ptr++)
120 {
121 collect_register_by_name (regcache, ptr->name,
122 (char*)buf + ptr->ptrace_offset);
123 }
124 }
125
126 static void
127 xtensa_store_xtregset (struct regcache *regcache, const void *buf)
128 {
129 const xtensa_regtable_t *ptr;
130
131 for (ptr = xtensa_regmap_table; ptr->name; ptr++)
132 {
133 supply_register_by_name (regcache, ptr->name,
134 (char*)buf + ptr->ptrace_offset);
135 }
136 }
137
138 static struct regset_info xtensa_regsets[] = {
139 { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
140 GENERAL_REGS,
141 xtensa_fill_gregset, xtensa_store_gregset },
142 { PTRACE_GETXTREGS, PTRACE_SETXTREGS, 0, XTENSA_ELF_XTREG_SIZE,
143 EXTENDED_REGS,
144 xtensa_fill_xtregset, xtensa_store_xtregset },
145 NULL_REGSET
146 };
147
148 #if XCHAL_HAVE_BE
149 #define XTENSA_BREAKPOINT {0xd2,0x0f}
150 #else
151 #define XTENSA_BREAKPOINT {0x2d,0xf0}
152 #endif
153
154 static const gdb_byte xtensa_breakpoint[] = XTENSA_BREAKPOINT;
155 #define xtensa_breakpoint_len 2
156
157 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
158
159 static const gdb_byte *
160 xtensa_sw_breakpoint_from_kind (int kind, int *size)
161 {
162 *size = xtensa_breakpoint_len;
163 return xtensa_breakpoint;
164 }
165
166 static int
167 xtensa_breakpoint_at (CORE_ADDR where)
168 {
169 unsigned long insn;
170
171 (*the_target->read_memory) (where, (unsigned char *) &insn,
172 xtensa_breakpoint_len);
173 return memcmp((char *) &insn,
174 xtensa_breakpoint, xtensa_breakpoint_len) == 0;
175 }
176
177 /* Called by libthread_db. */
178
179 ps_err_e
180 ps_get_thread_area (struct ps_prochandle *ph,
181 lwpid_t lwpid, int idx, void **base)
182 {
183 xtensa_elf_gregset_t regs;
184
185 if (ptrace (PTRACE_GETREGS, lwpid, NULL, &regs) != 0)
186 return PS_ERR;
187
188 /* IDX is the bias from the thread pointer to the beginning of the
189 thread descriptor. It has to be subtracted due to implementation
190 quirks in libthread_db. */
191 *base = (void *) ((char *) regs.threadptr - idx);
192
193 return PS_OK;
194 }
195
196 static struct regsets_info xtensa_regsets_info =
197 {
198 xtensa_regsets, /* regsets */
199 0, /* num_regsets */
200 NULL, /* disabled_regsets */
201 };
202
203 static struct regs_info regs_info =
204 {
205 NULL, /* regset_bitmap */
206 NULL, /* usrregs */
207 &xtensa_regsets_info
208 };
209
210 static void
211 xtensa_arch_setup (void)
212 {
213 current_process ()->tdesc = tdesc_xtensa;
214 }
215
216 /* Support for hardware single step. */
217
218 static int
219 xtensa_supports_hardware_single_step (void)
220 {
221 return 1;
222 }
223
224 static const struct regs_info *
225 xtensa_regs_info (void)
226 {
227 return &regs_info;
228 }
229
230 struct linux_target_ops the_low_target = {
231 xtensa_arch_setup,
232 xtensa_regs_info,
233 0,
234 0,
235 NULL, /* fetch_register */
236 linux_get_pc_32bit,
237 linux_set_pc_32bit,
238 NULL, /* breakpoint_kind_from_pc */
239 xtensa_sw_breakpoint_from_kind,
240 NULL,
241 0,
242 xtensa_breakpoint_at,
243 NULL, /* supports_z_point_type */
244 NULL, /* insert_point */
245 NULL, /* remove_point */
246 NULL, /* stopped_by_watchpoint */
247 NULL, /* stopped_data_address */
248 NULL, /* collect_ptrace_register */
249 NULL, /* supply_ptrace_register */
250 NULL, /* siginfo_fixup */
251 NULL, /* new_process */
252 NULL, /* new_thread */
253 NULL, /* new_fork */
254 NULL, /* prepare_to_resume */
255 NULL, /* process_qsupported */
256 NULL, /* supports_tracepoints */
257 NULL, /* get_thread_area */
258 NULL, /* install_fast_tracepoint_jump_pad */
259 NULL, /* emit_ops */
260 NULL, /* get_min_fast_tracepoint_insn_len */
261 NULL, /* supports_range_stepping */
262 NULL, /* breakpoint_kind_from_current_state */
263 xtensa_supports_hardware_single_step,
264 };
265
266
267 void
268 initialize_low_arch (void)
269 {
270 /* Initialize the Linux target descriptions. */
271 init_registers_xtensa ();
272
273 initialize_regsets_info (&xtensa_regsets_info);
274 }
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