gdb/gdbserver/linux-xtensa-low.c

   1 /* GNU/Linux/Xtensa specific low level interface, for the remote server for GDB.
   2    Copyright (C) 2007-2017 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19
  20 #include "server.h"
  21 #include "linux-low.h"
  22
  23 /* Defined in auto-generated file reg-xtensa.c.  */
  24 void init_registers_xtensa (void);
  25 extern const struct target_desc *tdesc_xtensa;
  26
  27 #include <asm/ptrace.h>
  28 #include <xtensa-config.h>
  29 #include "arch/xtensa.h"
  30 #include "gdb_proc_service.h"
  31
  32 #include "xtensa-xtregs.c"
  33
  34 enum regnum {
  35         R_PC=0, R_PS,
  36         R_LBEG, R_LEND, R_LCOUNT,
  37         R_SAR,
  38         R_WS, R_WB,
  39         R_A0 = 64
  40 };
  41
  42 static void
  43 xtensa_fill_gregset (struct regcache *regcache, void *buf)
  44 {
  45   elf_greg_t* rset = (elf_greg_t*)buf;
  46   const struct target_desc *tdesc = regcache->tdesc;
  47   int ar0_regnum;
  48   char *ptr;
  49   int i;
  50
  51   /* Take care of AR registers.  */
  52
  53   ar0_regnum = find_regno (tdesc, "ar0");
  54   ptr = (char*)&rset[R_A0];
  55
  56   for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
  57     {
  58       collect_register (regcache, i, ptr);
  59       ptr += register_size (tdesc, i);
  60     }
  61
  62   if (XSHAL_ABI == XTHAL_ABI_CALL0)
  63     {
  64       int a0_regnum = find_regno (tdesc, "a0");
  65       ptr = (char *) &rset[R_A0 + 4 * rset[R_WB]];
  66
  67       for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
  68         {
  69           if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
  70             ptr = (char *) &rset[R_A0];
  71           collect_register (regcache, i, ptr);
  72           ptr += register_size (tdesc, i);
  73         }
  74     }
  75
  76   /* Loop registers, if hardware has it.  */
  77
  78 #if XCHAL_HAVE_LOOPS
  79   collect_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
  80   collect_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
  81   collect_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
  82 #endif
  83
  84   collect_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
  85   collect_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
  86   collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
  87   collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
  88   collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
  89 }
  90
  91 static void
  92 xtensa_store_gregset (struct regcache *regcache, const void *buf)
  93 {
  94   const elf_greg_t* rset = (const elf_greg_t*)buf;
  95   const struct target_desc *tdesc = regcache->tdesc;
  96   int ar0_regnum;
  97   char *ptr;
  98   int i;
  99
 100   /* Take care of AR registers.  */
 101
 102   ar0_regnum = find_regno (tdesc, "ar0");
 103   ptr = (char *)&rset[R_A0];
 104
 105   for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
 106     {
 107       supply_register (regcache, i, ptr);
 108       ptr += register_size (tdesc, i);
 109     }
 110
 111   if (XSHAL_ABI == XTHAL_ABI_CALL0)
 112     {
 113       int a0_regnum = find_regno (tdesc, "a0");
 114       ptr = (char *) &rset[R_A0 + (4 * rset[R_WB]) % XCHAL_NUM_AREGS];
 115
 116       for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
 117         {
 118           if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
 119             ptr = (char *) &rset[R_A0];
 120           supply_register (regcache, i, ptr);
 121           ptr += register_size (tdesc, i);
 122         }
 123     }
 124
 125   /* Loop registers, if hardware has it.  */
 126
 127 #if XCHAL_HAVE_LOOPS
 128   supply_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
 129   supply_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
 130   supply_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
 131 #endif
 132
 133   supply_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
 134   supply_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
 135   supply_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
 136   supply_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
 137   supply_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
 138 }
 139
 140 /* Xtensa GNU/Linux PTRACE interface includes extended register set.  */
 141
 142 static void
 143 xtensa_fill_xtregset (struct regcache *regcache, void *buf)
 144 {
 145   const xtensa_regtable_t *ptr;
 146
 147   for (ptr = xtensa_regmap_table; ptr->name; ptr++)
 148     {
 149       collect_register_by_name (regcache, ptr->name,
 150                                 (char*)buf + ptr->ptrace_offset);
 151     }
 152 }
 153
 154 static void
 155 xtensa_store_xtregset (struct regcache *regcache, const void *buf)
 156 {
 157   const xtensa_regtable_t *ptr;
 158
 159   for (ptr = xtensa_regmap_table; ptr->name; ptr++)
 160     {
 161       supply_register_by_name (regcache, ptr->name,
 162                                 (char*)buf + ptr->ptrace_offset);
 163     }
 164 }
 165
 166 static struct regset_info xtensa_regsets[] = {
 167   { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
 168     GENERAL_REGS,
 169     xtensa_fill_gregset, xtensa_store_gregset },
 170   { PTRACE_GETXTREGS, PTRACE_SETXTREGS, 0, XTENSA_ELF_XTREG_SIZE,
 171     EXTENDED_REGS,
 172     xtensa_fill_xtregset, xtensa_store_xtregset },
 173   NULL_REGSET
 174 };
 175
 176 #if XCHAL_HAVE_BE
 177 #define XTENSA_BREAKPOINT {0xd2,0x0f}
 178 #else
 179 #define XTENSA_BREAKPOINT {0x2d,0xf0}
 180 #endif
 181
 182 static const gdb_byte xtensa_breakpoint[] = XTENSA_BREAKPOINT;
 183 #define xtensa_breakpoint_len 2
 184
 185 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */
 186
 187 static const gdb_byte *
 188 xtensa_sw_breakpoint_from_kind (int kind, int *size)
 189 {
 190   *size = xtensa_breakpoint_len;
 191   return xtensa_breakpoint;
 192 }
 193
 194 static int
 195 xtensa_breakpoint_at (CORE_ADDR where)
 196 {
 197     unsigned long insn;
 198
 199     (*the_target->read_memory) (where, (unsigned char *) &insn,
 200                                 xtensa_breakpoint_len);
 201     return memcmp((char *) &insn,
 202                   xtensa_breakpoint, xtensa_breakpoint_len) == 0;
 203 }
 204
 205 /* Called by libthread_db.  */
 206
 207 ps_err_e
 208 ps_get_thread_area (struct ps_prochandle *ph,
 209                     lwpid_t lwpid, int idx, void **base)
 210 {
 211   xtensa_elf_gregset_t regs;
 212
 213   if (ptrace (PTRACE_GETREGS, lwpid, NULL, &regs) != 0)
 214     return PS_ERR;
 215
 216   /* IDX is the bias from the thread pointer to the beginning of the
 217      thread descriptor.  It has to be subtracted due to implementation
 218      quirks in libthread_db.  */
 219   *base = (void *) ((char *) regs.threadptr - idx);
 220
 221   return PS_OK;
 222 }
 223
 224 static struct regsets_info xtensa_regsets_info =
 225   {
 226     xtensa_regsets, /* regsets */
 227     0, /* num_regsets */
 228     NULL, /* disabled_regsets */
 229   };
 230
 231 static struct regs_info regs_info =
 232   {
 233     NULL, /* regset_bitmap */
 234     NULL, /* usrregs */
 235     &xtensa_regsets_info
 236   };
 237
 238 static void
 239 xtensa_arch_setup (void)
 240 {
 241   current_process ()->tdesc = tdesc_xtensa;
 242 }
 243
 244 /* Support for hardware single step.  */
 245
 246 static int
 247 xtensa_supports_hardware_single_step (void)
 248 {
 249   return 1;
 250 }
 251
 252 static const struct regs_info *
 253 xtensa_regs_info (void)
 254 {
 255   return &regs_info;
 256 }
 257
 258 struct linux_target_ops the_low_target = {
 259   xtensa_arch_setup,
 260   xtensa_regs_info,
 261   0,
 262   0,
 263   NULL, /* fetch_register */
 264   linux_get_pc_32bit,
 265   linux_set_pc_32bit,
 266   NULL, /* breakpoint_kind_from_pc */
 267   xtensa_sw_breakpoint_from_kind,
 268   NULL,
 269   0,
 270   xtensa_breakpoint_at,
 271   NULL, /* supports_z_point_type */
 272   NULL, /* insert_point */
 273   NULL, /* remove_point */
 274   NULL, /* stopped_by_watchpoint */
 275   NULL, /* stopped_data_address */
 276   NULL, /* collect_ptrace_register */
 277   NULL, /* supply_ptrace_register */
 278   NULL, /* siginfo_fixup */
 279   NULL, /* new_process */
 280   NULL, /* new_thread */
 281   NULL, /* new_fork */
 282   NULL, /* prepare_to_resume */
 283   NULL, /* process_qsupported */
 284   NULL, /* supports_tracepoints */
 285   NULL, /* get_thread_area */
 286   NULL, /* install_fast_tracepoint_jump_pad */
 287   NULL, /* emit_ops */
 288   NULL, /* get_min_fast_tracepoint_insn_len */
 289   NULL, /* supports_range_stepping */
 290   NULL, /* breakpoint_kind_from_current_state */
 291   xtensa_supports_hardware_single_step,
 292 };
 293
 294
 295 void
 296 initialize_low_arch (void)
 297 {
 298   /* Initialize the Linux target descriptions.  */
 299   init_registers_xtensa ();
 300
 301   initialize_regsets_info (&xtensa_regsets_info);
 302 }