2005-04-28 Andrew Cagney <cagney@gnu.org>
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
1 /* Target-machine dependent code for Renesas H8/300, for GDB.
2
3 Copyright 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
4 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 /*
24 Contributed by Steve Chamberlain
25 sac@cygnus.com
26 */
27
28 #include "defs.h"
29 #include "value.h"
30 #include "inferior.h"
31 #include "symfile.h"
32 #include "arch-utils.h"
33 #include "regcache.h"
34 #include "gdbcore.h"
35 #include "objfiles.h"
36 #include "gdbcmd.h"
37 #include "gdb_assert.h"
38 #include "dis-asm.h"
39 #include "dwarf2-frame.h"
40 #include "frame.h"
41 #include "frame-base.h"
42 #include "frame-unwind.h"
43
44 /* Extra info which is saved in each frame_info. */
45 struct frame_extra_info
46 {
47 CORE_ADDR from_pc;
48 };
49
50 enum
51 {
52 h8300_reg_size = 2,
53 h8300h_reg_size = 4,
54 h8300_max_reg_size = 4,
55 };
56
57 static int is_h8300hmode (struct gdbarch *gdbarch);
58 static int is_h8300smode (struct gdbarch *gdbarch);
59 static int is_h8300sxmode (struct gdbarch *gdbarch);
60 static int is_h8300_normal_mode (struct gdbarch *gdbarch);
61
62 #define BINWORD (is_h8300hmode (current_gdbarch) && \
63 !is_h8300_normal_mode (current_gdbarch) ? h8300h_reg_size : h8300_reg_size)
64
65 enum gdb_regnum
66 {
67 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
68 E_RET0_REGNUM = E_R0_REGNUM,
69 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
70 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
71 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
72 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
73 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
74 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
75 E_SP_REGNUM,
76 E_CCR_REGNUM,
77 E_PC_REGNUM,
78 E_CYCLES_REGNUM,
79 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
80 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
81 E_INSTS_REGNUM,
82 E_MACH_REGNUM,
83 E_MACL_REGNUM,
84 E_SBR_REGNUM,
85 E_VBR_REGNUM
86 };
87
88 #define H8300_MAX_NUM_REGS 18
89
90 #define E_PSEUDO_CCR_REGNUM (NUM_REGS)
91 #define E_PSEUDO_EXR_REGNUM (NUM_REGS+1)
92
93 #define UNSIGNED_SHORT(X) ((X) & 0xffff)
94
95 #define IS_PUSH(x) ((x & 0xfff0)==0x6df0)
96 #define IS_PUSH_FP(x) (x == 0x6df6)
97 #define IS_MOVE_FP(x) (x == 0x0d76 || x == 0x0ff6)
98 #define IS_MOV_SP_FP(x) (x == 0x0d76 || x == 0x0ff6)
99 #define IS_SUB2_SP(x) (x==0x1b87)
100 #define IS_SUB4_SP(x) (x==0x1b97)
101 #define IS_SUBL_SP(x) (x==0x7a37)
102 #define IS_MOVK_R5(x) (x==0x7905)
103 #define IS_SUB_R5SP(x) (x==0x1957)
104
105 /* If the instruction at PC is an argument register spill, return its
106 length. Otherwise, return zero.
107
108 An argument register spill is an instruction that moves an argument
109 from the register in which it was passed to the stack slot in which
110 it really lives. It is a byte, word, or longword move from an
111 argument register to a negative offset from the frame pointer.
112
113 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
114 is used, it could be a byte, word or long move to registers r3-r5. */
115
116 static int
117 h8300_is_argument_spill (CORE_ADDR pc)
118 {
119 int w = read_memory_unsigned_integer (pc, 2);
120
121 if (((w & 0xff88) == 0x0c88 /* mov.b Rsl, Rdl */
122 || (w & 0xff88) == 0x0d00 /* mov.w Rs, Rd */
123 || (w & 0xff88) == 0x0f80) /* mov.l Rs, Rd */
124 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
125 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
126 return 2;
127
128 if ((w & 0xfff0) == 0x6ee0 /* mov.b Rs,@(d:16,er6) */
129 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
130 {
131 int w2 = read_memory_integer (pc + 2, 2);
132
133 /* ... and d:16 is negative. */
134 if (w2 < 0)
135 return 4;
136 }
137 else if (w == 0x7860)
138 {
139 int w2 = read_memory_integer (pc + 2, 2);
140
141 if ((w2 & 0xfff0) == 0x6aa0) /* mov.b Rs, @(d:24,er6) */
142 {
143 LONGEST disp = read_memory_integer (pc + 4, 4);
144
145 /* ... and d:24 is negative. */
146 if (disp < 0 && disp > 0xffffff)
147 return 8;
148 }
149 }
150 else if ((w & 0xfff0) == 0x6fe0 /* mov.w Rs,@(d:16,er6) */
151 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
152 {
153 int w2 = read_memory_integer (pc + 2, 2);
154
155 /* ... and d:16 is negative. */
156 if (w2 < 0)
157 return 4;
158 }
159 else if (w == 0x78e0)
160 {
161 int w2 = read_memory_integer (pc + 2, 2);
162
163 if ((w2 & 0xfff0) == 0x6ba0) /* mov.b Rs, @(d:24,er6) */
164 {
165 LONGEST disp = read_memory_integer (pc + 4, 4);
166
167 /* ... and d:24 is negative. */
168 if (disp < 0 && disp > 0xffffff)
169 return 8;
170 }
171 }
172 else if (w == 0x0100)
173 {
174 int w2 = read_memory_integer (pc + 2, 2);
175
176 if ((w2 & 0xfff0) == 0x6fe0 /* mov.l Rs,@(d:16,er6) */
177 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
178 {
179 int w3 = read_memory_integer (pc + 4, 2);
180
181 /* ... and d:16 is negative. */
182 if (w3 < 0)
183 return 6;
184 }
185 else if (w2 == 0x78e0)
186 {
187 int w3 = read_memory_integer (pc + 4, 2);
188
189 if ((w3 & 0xfff0) == 0x6ba0) /* mov.l Rs, @(d:24,er6) */
190 {
191 LONGEST disp = read_memory_integer (pc + 6, 4);
192
193 /* ... and d:24 is negative. */
194 if (disp < 0 && disp > 0xffffff)
195 return 10;
196 }
197 }
198 }
199
200 return 0;
201 }
202
203 static CORE_ADDR
204 h8300_skip_prologue (CORE_ADDR start_pc)
205 {
206 short int w;
207 int adjust = 0;
208
209 /* Skip past all push and stm insns. */
210 while (1)
211 {
212 w = read_memory_unsigned_integer (start_pc, 2);
213 /* First look for push insns. */
214 if (w == 0x0100 || w == 0x0110 || w == 0x0120 || w == 0x0130)
215 {
216 w = read_memory_unsigned_integer (start_pc + 2, 2);
217 adjust = 2;
218 }
219
220 if (IS_PUSH (w))
221 {
222 start_pc += 2 + adjust;
223 w = read_memory_unsigned_integer (start_pc, 2);
224 continue;
225 }
226 adjust = 0;
227 break;
228 }
229
230 /* Skip past a move to FP, either word or long sized */
231 w = read_memory_unsigned_integer (start_pc, 2);
232 if (w == 0x0100)
233 {
234 w = read_memory_unsigned_integer (start_pc + 2, 2);
235 adjust += 2;
236 }
237
238 if (IS_MOVE_FP (w))
239 {
240 start_pc += 2 + adjust;
241 w = read_memory_unsigned_integer (start_pc, 2);
242 }
243
244 /* Check for loading either a word constant into r5;
245 long versions are handled by the SUBL_SP below. */
246 if (IS_MOVK_R5 (w))
247 {
248 start_pc += 2;
249 w = read_memory_unsigned_integer (start_pc, 2);
250 }
251
252 /* Now check for subtracting r5 from sp, word sized only. */
253 if (IS_SUB_R5SP (w))
254 {
255 start_pc += 2 + adjust;
256 w = read_memory_unsigned_integer (start_pc, 2);
257 }
258
259 /* Check for subs #2 and subs #4. */
260 while (IS_SUB2_SP (w) || IS_SUB4_SP (w))
261 {
262 start_pc += 2 + adjust;
263 w = read_memory_unsigned_integer (start_pc, 2);
264 }
265
266 /* Check for a 32bit subtract. */
267 if (IS_SUBL_SP (w))
268 start_pc += 6 + adjust;
269
270 /* Skip past another possible stm insn for registers R3 to R5 (possibly used
271 for register qualified arguments. */
272 w = read_memory_unsigned_integer (start_pc, 2);
273 /* First look for push insns. */
274 if (w == 0x0110 || w == 0x0120 || w == 0x0130)
275 {
276 w = read_memory_unsigned_integer (start_pc + 2, 2);
277 if (IS_PUSH (w) && (w & 0xf) >= 0x3 && (w & 0xf) <= 0x5)
278 start_pc += 4;
279 }
280
281 /* Check for spilling an argument register to the stack frame.
282 This could also be an initializing store from non-prologue code,
283 but I don't think there's any harm in skipping that. */
284 for (;;)
285 {
286 int spill_size = h8300_is_argument_spill (start_pc);
287 if (spill_size == 0)
288 break;
289 start_pc += spill_size;
290 }
291
292 return start_pc;
293 }
294
295 static CORE_ADDR
296 h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
297 {
298 char buf[8];
299
300 frame_unwind_register (next_frame, E_PC_REGNUM, buf);
301 return extract_typed_address (buf, builtin_type_void_func_ptr);
302 }
303
304 static struct frame_id
305 h8300_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
306 {
307 char buf[4];
308 CORE_ADDR fp;
309
310 frame_unwind_register (next_frame, E_FP_REGNUM, buf);
311 fp = extract_unsigned_integer (buf, 4);
312
313 return frame_id_build (fp, frame_pc_unwind (next_frame));
314 }
315
316 struct h8300_frame_cache
317 {
318 /* Base address. */
319 CORE_ADDR base;
320 CORE_ADDR sp_offset;
321 CORE_ADDR pc;
322
323 /* Saved registers. */
324 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
325 CORE_ADDR saved_sp;
326
327 /* Stack space reserved for local variables. */
328 long locals;
329 };
330
331 /* Normal frames. */
332
333 /* Allocate and initialize a frame cache. */
334
335 static struct h8300_frame_cache *
336 h8300_alloc_frame_cache (void)
337 {
338 struct h8300_frame_cache *cache;
339 int i;
340
341 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
342
343 /* Base address. */
344 cache->base = 0;
345 cache->sp_offset = -4;
346 cache->pc = 0;
347
348 /* Saved registers. We initialize these to -1 since zero is a valid
349 offset (that's where %fp is supposed to be stored). */
350 for (i = 0; i < NUM_REGS; i++)
351 cache->saved_regs[i] = -1;
352
353 /* Frameless until proven otherwise. */
354 cache->locals = -1;
355
356 return cache;
357 }
358
359 /* Check whether PC points at a code that sets up a new stack frame.
360 If so, it updates CACHE and returns the address of the first
361 instruction after the sequence that sets removes the "hidden"
362 argument from the stack or CURRENT_PC, whichever is smaller.
363 Otherwise, return PC. */
364
365 static CORE_ADDR
366 h8300_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc,
367 struct h8300_frame_cache *cache)
368 {
369 unsigned int op;
370 int subs_count;
371
372 if (pc >= current_pc)
373 return current_pc;
374
375 op = read_memory_unsigned_integer (pc, 4);
376
377 if (op == 0x6df60d76)
378 {
379 /* mov.w r6,@-sp; mov.w sp,r6 */
380 cache->saved_regs[E_FP_REGNUM] = 0;
381 cache->sp_offset += 2;
382 op = read_memory_unsigned_integer (pc + 4, 4);
383 if (((op >> 16) & 0xfff0) == 0x7900)
384 {
385 /* mov.w #imm,rN */
386 cache->locals = -(short) (op & 0xffff);
387 return pc + 8;
388 }
389 else if ((op >> 16) == 0x1b87)
390 {
391 /* subs #2,sp */
392 for (cache->locals = 0, pc += 4;
393 read_memory_unsigned_integer (pc, 2) == 0x1b87;
394 pc += 2, cache->locals += 2);
395 return pc;
396 }
397 }
398 else if (op == 0x01006df6)
399 {
400 /* mov.l er6,@-sp */
401 op = read_memory_unsigned_integer (pc + 4, 2);
402 if (op == 0x0ff6)
403 {
404 /* mov.l sp,er6 */
405 op = read_memory_unsigned_integer (pc + 6, 2);
406 if (op == 0x7a17)
407 {
408 /* add.l #-n,sp */
409 cache->locals = -read_memory_unsigned_integer (pc + 8, 4);
410 return pc + 12;
411 }
412 else if (op == 0x1b97)
413 {
414 /* subs #4,sp */
415 for (cache->locals = 0, pc += 6;
416 read_memory_unsigned_integer (pc, 2) == 0x1b97;
417 pc += 2, cache->locals += 2);
418 return pc;
419 }
420 }
421 }
422
423 return pc;
424 }
425
426 /* Check whether PC points at code that saves registers on the stack.
427 If so, it updates CACHE and returns the address of the first
428 instruction after the register saves or CURRENT_PC, whichever is
429 smaller. Otherwise, return PC. */
430
431 static CORE_ADDR
432 h8300_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
433 struct h8300_frame_cache *cache)
434 {
435 if (cache->locals >= 0)
436 {
437 CORE_ADDR offset;
438 int op;
439 int i, regno;
440
441 offset = -cache->locals;
442 while (pc < current_pc)
443 {
444 op = read_memory_unsigned_integer (pc, 2);
445 if ((op & 0xfff0) == 0x6df0)
446 {
447 /* mov.w rN,@-sp */
448 regno = op & 0x000f;
449 cache->saved_regs[regno] = offset;
450 offset -= 2;
451 pc += 2;
452 }
453 else if (op == 0x0100)
454 {
455 op = read_memory_unsigned_integer (pc + 2, 2);
456 if ((op & 0xfff0) == 0x6df0)
457 {
458 /* mov.l erN,@-sp */
459 regno = op & 0x000f;
460 cache->saved_regs[regno] = offset;
461 offset -= 4;
462 pc += 4;
463 }
464 else
465 break;
466 }
467 else if ((op & 0xffcf) == 0x0100)
468 {
469 int op1;
470 op1 = read_memory_unsigned_integer (pc + 2, 2);
471 if ((op1 & 0xfff0) == 0x6df0)
472 {
473 /* stm.l reglist,@-sp */
474 i = ((op & 0x0030) >> 4) + 1;
475 regno = op1 & 0x000f;
476 for (; i > 0; regno++, --i)
477 {
478 cache->saved_regs[regno] = offset;
479 offset -= 4;
480 }
481 pc += 4;
482 }
483 else
484 break;
485 }
486 else
487 break;
488 }
489 }
490 return pc;
491 }
492
493
494 /* Do a full analysis of the prologue at PC and update CACHE
495 accordingly. Bail out early if CURRENT_PC is reached. Return the
496 address where the analysis stopped.
497
498 We handle all cases that can be generated by gcc.
499
500 For allocating a stack frame:
501
502 mov.w r6,@-sp
503 mov.w sp,r6
504 mov.w #-n,rN
505 add.w rN,sp
506
507 mov.w r6,@-sp
508 mov.w sp,r6
509 subs #2,sp
510 (repeat)
511
512 mov.l er6,@-sp
513 mov.l sp,er6
514 add.l #-n,sp
515
516 mov.w r6,@-sp
517 mov.w sp,r6
518 subs #4,sp
519 (repeat)
520
521 For saving registers:
522
523 mov.w rN,@-sp
524 mov.l erN,@-sp
525 stm.l reglist,@-sp
526
527 For setting up the PIC register:
528
529 Future equivalence...
530
531 */
532
533 static CORE_ADDR
534 h8300_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
535 struct h8300_frame_cache *cache)
536 {
537 unsigned int op;
538
539 pc = h8300_analyze_frame_setup (pc, current_pc, cache);
540 pc = h8300_analyze_register_saves (pc, current_pc, cache);
541 if (pc >= current_pc)
542 return current_pc;
543
544 /* PIC support */
545
546 return pc;
547 }
548
549 static struct h8300_frame_cache *
550 h8300_frame_cache (struct frame_info *next_frame, void **this_cache)
551 {
552 struct h8300_frame_cache *cache;
553 char buf[4];
554 int i;
555
556 if (*this_cache)
557 return *this_cache;
558
559 cache = h8300_alloc_frame_cache ();
560 *this_cache = cache;
561
562 /* In principle, for normal frames, %fp holds the frame pointer,
563 which holds the base address for the current stack frame.
564 However, for functions that don't need it, the frame pointer is
565 optional. For these "frameless" functions the frame pointer is
566 actually the frame pointer of the calling frame. Signal
567 trampolines are just a special case of a "frameless" function.
568 They (usually) share their frame pointer with the frame that was
569 in progress when the signal occurred. */
570
571 frame_unwind_register (next_frame, E_FP_REGNUM, buf);
572 cache->base = extract_unsigned_integer (buf, 4);
573 if (cache->base == 0)
574 return cache;
575
576 /* For normal frames, %pc is stored at 4(%fp). */
577 cache->saved_regs[E_PC_REGNUM] = 4;
578
579 cache->pc = frame_func_unwind (next_frame);
580 if (cache->pc != 0)
581 h8300_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
582
583 if (cache->locals < 0)
584 {
585 /* We didn't find a valid frame, which means that CACHE->base
586 currently holds the frame pointer for our calling frame. If
587 we're at the start of a function, or somewhere half-way its
588 prologue, the function's frame probably hasn't been fully
589 setup yet. Try to reconstruct the base address for the stack
590 frame by looking at the stack pointer. For truly "frameless"
591 functions this might work too. */
592
593 frame_unwind_register (next_frame, E_SP_REGNUM, buf);
594 cache->base = extract_unsigned_integer (buf, 4) + cache->sp_offset;
595 }
596
597 /* Now that we have the base address for the stack frame we can
598 calculate the value of %sp in the calling frame. */
599 cache->saved_sp = cache->base;
600
601 /* Adjust all the saved registers such that they contain addresses
602 instead of offsets. */
603 for (i = 0; i < NUM_REGS; i++)
604 if (cache->saved_regs[i] != -1)
605 cache->saved_regs[i] += cache->base;
606
607 return cache;
608 }
609
610 static void
611 h8300_frame_this_id (struct frame_info *next_frame, void **this_cache,
612 struct frame_id *this_id)
613 {
614 struct h8300_frame_cache *cache =
615 h8300_frame_cache (next_frame, this_cache);
616
617 /* This marks the outermost frame. */
618 if (cache->base == 0)
619 return;
620
621 /* See the end of m68k_push_dummy_call. */
622 *this_id = frame_id_build (cache->base, cache->pc);
623 }
624
625 static void
626 h8300_frame_prev_register (struct frame_info *next_frame, void **this_cache,
627 int regnum, int *optimizedp,
628 enum lval_type *lvalp, CORE_ADDR *addrp,
629 int *realnump, void *valuep)
630 {
631 struct h8300_frame_cache *cache =
632 h8300_frame_cache (next_frame, this_cache);
633
634 gdb_assert (regnum >= 0);
635
636 if (regnum == E_SP_REGNUM && cache->saved_sp)
637 {
638 *optimizedp = 0;
639 *lvalp = not_lval;
640 *addrp = 0;
641 *realnump = -1;
642 if (valuep)
643 {
644 /* Store the value. */
645 store_unsigned_integer (valuep, 4, cache->saved_sp);
646 }
647 return;
648 }
649
650 if (regnum < NUM_REGS && cache->saved_regs[regnum] != -1)
651 {
652 *optimizedp = 0;
653 *lvalp = lval_memory;
654 *addrp = cache->saved_regs[regnum];
655 *realnump = -1;
656 if (valuep)
657 {
658 /* Read the value in from memory. */
659 read_memory (*addrp, valuep,
660 register_size (current_gdbarch, regnum));
661 }
662 return;
663 }
664
665 frame_register_unwind (next_frame, regnum,
666 optimizedp, lvalp, addrp, realnump, valuep);
667 }
668
669 static const struct frame_unwind h8300_frame_unwind = {
670 NORMAL_FRAME,
671 h8300_frame_this_id,
672 h8300_frame_prev_register
673 };
674
675 static const struct frame_unwind *
676 h8300_frame_sniffer (struct frame_info *next_frame)
677 {
678 return &h8300_frame_unwind;
679 }
680
681 /* Function: push_dummy_call
682 Setup the function arguments for calling a function in the inferior.
683 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
684 on the H8/300H.
685
686 There are actually two ABI's here: -mquickcall (the default) and
687 -mno-quickcall. With -mno-quickcall, all arguments are passed on
688 the stack after the return address, word-aligned. With
689 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
690 GCC doesn't indicate in the object file which ABI was used to
691 compile it, GDB only supports the default --- -mquickcall.
692
693 Here are the rules for -mquickcall, in detail:
694
695 Each argument, whether scalar or aggregate, is padded to occupy a
696 whole number of words. Arguments smaller than a word are padded at
697 the most significant end; those larger than a word are padded at
698 the least significant end.
699
700 The initial arguments are passed in r0 -- r2. Earlier arguments go in
701 lower-numbered registers. Multi-word arguments are passed in
702 consecutive registers, with the most significant end in the
703 lower-numbered register.
704
705 If an argument doesn't fit entirely in the remaining registers, it
706 is passed entirely on the stack. Stack arguments begin just after
707 the return address. Once an argument has overflowed onto the stack
708 this way, all subsequent arguments are passed on the stack.
709
710 The above rule has odd consequences. For example, on the h8/300s,
711 if a function takes two longs and an int as arguments:
712 - the first long will be passed in r0/r1,
713 - the second long will be passed entirely on the stack, since it
714 doesn't fit in r2,
715 - and the int will be passed on the stack, even though it could fit
716 in r2.
717
718 A weird exception: if an argument is larger than a word, but not a
719 whole number of words in length (before padding), it is passed on
720 the stack following the rules for stack arguments above, even if
721 there are sufficient registers available to hold it. Stranger
722 still, the argument registers are still `used up' --- even though
723 there's nothing in them.
724
725 So, for example, on the h8/300s, if a function expects a three-byte
726 structure and an int, the structure will go on the stack, and the
727 int will go in r2, not r0.
728
729 If the function returns an aggregate type (struct, union, or class)
730 by value, the caller must allocate space to hold the return value,
731 and pass the callee a pointer to this space as an invisible first
732 argument, in R0.
733
734 For varargs functions, the last fixed argument and all the variable
735 arguments are always passed on the stack. This means that calls to
736 varargs functions don't work properly unless there is a prototype
737 in scope.
738
739 Basically, this ABI is not good, for the following reasons:
740 - You can't call vararg functions properly unless a prototype is in scope.
741 - Structure passing is inconsistent, to no purpose I can see.
742 - It often wastes argument registers, of which there are only three
743 to begin with. */
744
745 static CORE_ADDR
746 h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
747 struct regcache *regcache, CORE_ADDR bp_addr,
748 int nargs, struct value **args, CORE_ADDR sp,
749 int struct_return, CORE_ADDR struct_addr)
750 {
751 int stack_alloc = 0, stack_offset = 0;
752 int wordsize = BINWORD;
753 int reg = E_ARG0_REGNUM;
754 int argument;
755
756 /* First, make sure the stack is properly aligned. */
757 sp = align_down (sp, wordsize);
758
759 /* Now make sure there's space on the stack for the arguments. We
760 may over-allocate a little here, but that won't hurt anything. */
761 for (argument = 0; argument < nargs; argument++)
762 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
763 wordsize);
764 sp -= stack_alloc;
765
766 /* Now load as many arguments as possible into registers, and push
767 the rest onto the stack.
768 If we're returning a structure by value, then we must pass a
769 pointer to the buffer for the return value as an invisible first
770 argument. */
771 if (struct_return)
772 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
773
774 for (argument = 0; argument < nargs; argument++)
775 {
776 struct type *type = value_type (args[argument]);
777 int len = TYPE_LENGTH (type);
778 char *contents = (char *) value_contents (args[argument]);
779
780 /* Pad the argument appropriately. */
781 int padded_len = align_up (len, wordsize);
782 char *padded = alloca (padded_len);
783
784 memset (padded, 0, padded_len);
785 memcpy (len < wordsize ? padded + padded_len - len : padded,
786 contents, len);
787
788 /* Could the argument fit in the remaining registers? */
789 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
790 {
791 /* Are we going to pass it on the stack anyway, for no good
792 reason? */
793 if (len > wordsize && len % wordsize)
794 {
795 /* I feel so unclean. */
796 write_memory (sp + stack_offset, padded, padded_len);
797 stack_offset += padded_len;
798
799 /* That's right --- even though we passed the argument
800 on the stack, we consume the registers anyway! Love
801 me, love my dog. */
802 reg += padded_len / wordsize;
803 }
804 else
805 {
806 /* Heavens to Betsy --- it's really going in registers!
807 It would be nice if we could use write_register_bytes
808 here, but on the h8/300s, there are gaps between
809 the registers in the register file. */
810 int offset;
811
812 for (offset = 0; offset < padded_len; offset += wordsize)
813 {
814 ULONGEST word = extract_unsigned_integer (padded + offset,
815 wordsize);
816 regcache_cooked_write_unsigned (regcache, reg++, word);
817 }
818 }
819 }
820 else
821 {
822 /* It doesn't fit in registers! Onto the stack it goes. */
823 write_memory (sp + stack_offset, padded, padded_len);
824 stack_offset += padded_len;
825
826 /* Once one argument has spilled onto the stack, all
827 subsequent arguments go on the stack. */
828 reg = E_ARGLAST_REGNUM + 1;
829 }
830 }
831
832 /* Store return address. */
833 sp -= wordsize;
834 write_memory_unsigned_integer (sp, wordsize, bp_addr);
835
836 /* Update stack pointer. */
837 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
838
839 return sp;
840 }
841
842 /* Function: extract_return_value
843 Figure out where in REGBUF the called function has left its return value.
844 Copy that into VALBUF. Be sure to account for CPU type. */
845
846 static void
847 h8300_extract_return_value (struct type *type, struct regcache *regcache,
848 void *valbuf)
849 {
850 int len = TYPE_LENGTH (type);
851 ULONGEST c, addr;
852
853 switch (len)
854 {
855 case 1:
856 case 2:
857 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
858 store_unsigned_integer (valbuf, len, c);
859 break;
860 case 4: /* Needs two registers on plain H8/300 */
861 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
862 store_unsigned_integer (valbuf, 2, c);
863 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
864 store_unsigned_integer ((void *) ((char *) valbuf + 2), 2, c);
865 break;
866 case 8: /* long long is now 8 bytes. */
867 if (TYPE_CODE (type) == TYPE_CODE_INT)
868 {
869 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
870 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
871 store_unsigned_integer (valbuf, len, c);
872 }
873 else
874 {
875 error ("I don't know how this 8 byte value is returned.");
876 }
877 break;
878 }
879 }
880
881 static void
882 h8300h_extract_return_value (struct type *type, struct regcache *regcache,
883 void *valbuf)
884 {
885 int len = TYPE_LENGTH (type);
886 ULONGEST c, addr;
887
888 switch (len)
889 {
890 case 1:
891 case 2:
892 case 4:
893 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
894 store_unsigned_integer (valbuf, len, c);
895 break;
896 case 8: /* long long is now 8 bytes. */
897 if (TYPE_CODE (type) == TYPE_CODE_INT)
898 {
899 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
900 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
901 store_unsigned_integer (valbuf, len, c);
902 }
903 else
904 {
905 error ("I don't know how this 8 byte value is returned.");
906 }
907 break;
908 }
909 }
910
911
912 /* Function: store_return_value
913 Place the appropriate value in the appropriate registers.
914 Primarily used by the RETURN command. */
915
916 static void
917 h8300_store_return_value (struct type *type, struct regcache *regcache,
918 const void *valbuf)
919 {
920 int len = TYPE_LENGTH (type);
921 ULONGEST val;
922
923 switch (len)
924 {
925 case 1:
926 case 2: /* short... */
927 val = extract_unsigned_integer (valbuf, len);
928 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
929 break;
930 case 4: /* long, float */
931 val = extract_unsigned_integer (valbuf, len);
932 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
933 (val >> 16) & 0xffff);
934 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
935 break;
936 case 8: /* long long, double and long double are all defined
937 as 4 byte types so far so this shouldn't happen. */
938 error ("I don't know how to return an 8 byte value.");
939 break;
940 }
941 }
942
943 static void
944 h8300h_store_return_value (struct type *type, struct regcache *regcache,
945 const void *valbuf)
946 {
947 int len = TYPE_LENGTH (type);
948 ULONGEST val;
949
950 switch (len)
951 {
952 case 1:
953 case 2:
954 case 4: /* long, float */
955 val = extract_unsigned_integer (valbuf, len);
956 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
957 break;
958 case 8: /* long long, double and long double are all defined
959 as 4 byte types so far so this shouldn't happen. */
960 error ("I don't know how to return an 8 byte value.");
961 break;
962 }
963 }
964
965 static struct cmd_list_element *setmachinelist;
966
967 static const char *
968 h8300_register_name (int regno)
969 {
970 /* The register names change depending on which h8300 processor
971 type is selected. */
972 static char *register_names[] = {
973 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
974 "sp", "", "pc", "cycles", "tick", "inst",
975 "ccr", /* pseudo register */
976 };
977 if (regno < 0
978 || regno >= (sizeof (register_names) / sizeof (*register_names)))
979 internal_error (__FILE__, __LINE__,
980 "h8300_register_name: illegal register number %d", regno);
981 else
982 return register_names[regno];
983 }
984
985 static const char *
986 h8300s_register_name (int regno)
987 {
988 static char *register_names[] = {
989 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
990 "sp", "", "pc", "cycles", "", "tick", "inst",
991 "mach", "macl",
992 "ccr", "exr" /* pseudo registers */
993 };
994 if (regno < 0
995 || regno >= (sizeof (register_names) / sizeof (*register_names)))
996 internal_error (__FILE__, __LINE__,
997 "h8300s_register_name: illegal register number %d",
998 regno);
999 else
1000 return register_names[regno];
1001 }
1002
1003 static const char *
1004 h8300sx_register_name (int regno)
1005 {
1006 static char *register_names[] = {
1007 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
1008 "sp", "", "pc", "cycles", "", "tick", "inst",
1009 "mach", "macl", "sbr", "vbr",
1010 "ccr", "exr" /* pseudo registers */
1011 };
1012 if (regno < 0
1013 || regno >= (sizeof (register_names) / sizeof (*register_names)))
1014 internal_error (__FILE__, __LINE__,
1015 "h8300sx_register_name: illegal register number %d",
1016 regno);
1017 else
1018 return register_names[regno];
1019 }
1020
1021 static void
1022 h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
1023 struct frame_info *frame, int regno)
1024 {
1025 LONGEST rval;
1026 const char *name = gdbarch_register_name (gdbarch, regno);
1027
1028 if (!name || !*name)
1029 return;
1030
1031 rval = get_frame_register_signed (frame, regno);
1032
1033 fprintf_filtered (file, "%-14s ", name);
1034 if ((regno == E_PSEUDO_CCR_REGNUM) || \
1035 (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch)))
1036 {
1037 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1038 print_longest (file, 'u', 1, rval);
1039 }
1040 else
1041 {
1042 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval, BINWORD));
1043 print_longest (file, 'd', 1, rval);
1044 }
1045 if (regno == E_PSEUDO_CCR_REGNUM)
1046 {
1047 /* CCR register */
1048 int C, Z, N, V;
1049 unsigned char l = rval & 0xff;
1050 fprintf_filtered (file, "\t");
1051 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
1052 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
1053 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
1054 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
1055 N = (l & 0x8) != 0;
1056 Z = (l & 0x4) != 0;
1057 V = (l & 0x2) != 0;
1058 C = (l & 0x1) != 0;
1059 fprintf_filtered (file, "N-%d ", N);
1060 fprintf_filtered (file, "Z-%d ", Z);
1061 fprintf_filtered (file, "V-%d ", V);
1062 fprintf_filtered (file, "C-%d ", C);
1063 if ((C | Z) == 0)
1064 fprintf_filtered (file, "u> ");
1065 if ((C | Z) == 1)
1066 fprintf_filtered (file, "u<= ");
1067 if ((C == 0))
1068 fprintf_filtered (file, "u>= ");
1069 if (C == 1)
1070 fprintf_filtered (file, "u< ");
1071 if (Z == 0)
1072 fprintf_filtered (file, "!= ");
1073 if (Z == 1)
1074 fprintf_filtered (file, "== ");
1075 if ((N ^ V) == 0)
1076 fprintf_filtered (file, ">= ");
1077 if ((N ^ V) == 1)
1078 fprintf_filtered (file, "< ");
1079 if ((Z | (N ^ V)) == 0)
1080 fprintf_filtered (file, "> ");
1081 if ((Z | (N ^ V)) == 1)
1082 fprintf_filtered (file, "<= ");
1083 }
1084 else if (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch))
1085 {
1086 /* EXR register */
1087 unsigned char l = rval & 0xff;
1088 fprintf_filtered (file, "\t");
1089 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1090 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1091 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1092 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1093 }
1094 fprintf_filtered (file, "\n");
1095 }
1096
1097 static void
1098 h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1099 struct frame_info *frame, int regno, int cpregs)
1100 {
1101 if (regno < 0)
1102 {
1103 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1104 h8300_print_register (gdbarch, file, frame, regno);
1105 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1106 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
1107 if (is_h8300smode (current_gdbarch))
1108 {
1109 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1110 if (is_h8300sxmode (current_gdbarch))
1111 {
1112 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1113 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1114 }
1115 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1116 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1117 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1118 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1119 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1120 }
1121 else
1122 {
1123 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1124 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1125 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1126 }
1127 }
1128 else
1129 {
1130 if (regno == E_CCR_REGNUM)
1131 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1132 else if (regno == E_PSEUDO_EXR_REGNUM
1133 && is_h8300smode (current_gdbarch))
1134 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1135 else
1136 h8300_print_register (gdbarch, file, frame, regno);
1137 }
1138 }
1139
1140 static struct type *
1141 h8300_register_type (struct gdbarch *gdbarch, int regno)
1142 {
1143 if (regno < 0 || regno >= NUM_REGS + NUM_PSEUDO_REGS)
1144 internal_error (__FILE__, __LINE__,
1145 "h8300_register_type: illegal register number %d", regno);
1146 else
1147 {
1148 switch (regno)
1149 {
1150 case E_PC_REGNUM:
1151 return builtin_type_void_func_ptr;
1152 case E_SP_REGNUM:
1153 case E_FP_REGNUM:
1154 return builtin_type_void_data_ptr;
1155 default:
1156 if (regno == E_PSEUDO_CCR_REGNUM)
1157 return builtin_type_uint8;
1158 else if (regno == E_PSEUDO_EXR_REGNUM)
1159 return builtin_type_uint8;
1160 else if (is_h8300hmode (current_gdbarch))
1161 return builtin_type_int32;
1162 else
1163 return builtin_type_int16;
1164 }
1165 }
1166 }
1167
1168 static void
1169 h8300_pseudo_register_read (struct gdbarch *gdbarch,
1170 struct regcache *regcache, int regno, void *buf)
1171 {
1172 if (regno == E_PSEUDO_CCR_REGNUM)
1173 regcache_raw_read (regcache, E_CCR_REGNUM, buf);
1174 else if (regno == E_PSEUDO_EXR_REGNUM)
1175 regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1176 else
1177 regcache_raw_read (regcache, regno, buf);
1178 }
1179
1180 static void
1181 h8300_pseudo_register_write (struct gdbarch *gdbarch,
1182 struct regcache *regcache, int regno,
1183 const void *buf)
1184 {
1185 if (regno == E_PSEUDO_CCR_REGNUM)
1186 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
1187 else if (regno == E_PSEUDO_EXR_REGNUM)
1188 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1189 else
1190 regcache_raw_write (regcache, regno, buf);
1191 }
1192
1193 static int
1194 h8300_dbg_reg_to_regnum (int regno)
1195 {
1196 if (regno == E_CCR_REGNUM)
1197 return E_PSEUDO_CCR_REGNUM;
1198 return regno;
1199 }
1200
1201 static int
1202 h8300s_dbg_reg_to_regnum (int regno)
1203 {
1204 if (regno == E_CCR_REGNUM)
1205 return E_PSEUDO_CCR_REGNUM;
1206 if (regno == E_EXR_REGNUM)
1207 return E_PSEUDO_EXR_REGNUM;
1208 return regno;
1209 }
1210
1211 static CORE_ADDR
1212 h8300_extract_struct_value_address (struct regcache *regcache)
1213 {
1214 ULONGEST addr;
1215 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
1216 return addr;
1217 }
1218
1219 const static unsigned char *
1220 h8300_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
1221 {
1222 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1223 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1224
1225 *lenptr = sizeof (breakpoint);
1226 return breakpoint;
1227 }
1228
1229 static CORE_ADDR
1230 h8300_push_dummy_code (struct gdbarch *gdbarch,
1231 CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc,
1232 struct value **args, int nargs,
1233 struct type *value_type,
1234 CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
1235 {
1236 /* Allocate space sufficient for a breakpoint. */
1237 sp = (sp - 2) & ~1;
1238 /* Store the address of that breakpoint */
1239 *bp_addr = sp;
1240 /* h8300 always starts the call at the callee's entry point. */
1241 *real_pc = funaddr;
1242 return sp;
1243 }
1244
1245 static void
1246 h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1247 struct frame_info *frame, const char *args)
1248 {
1249 fprintf_filtered (file, "\
1250 No floating-point info available for this processor.\n");
1251 }
1252
1253 static struct gdbarch *
1254 h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1255 {
1256 struct gdbarch_tdep *tdep = NULL;
1257 struct gdbarch *gdbarch;
1258
1259 arches = gdbarch_list_lookup_by_info (arches, &info);
1260 if (arches != NULL)
1261 return arches->gdbarch;
1262
1263 #if 0
1264 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1265 #endif
1266
1267 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1268 return NULL;
1269
1270 gdbarch = gdbarch_alloc (&info, 0);
1271
1272 switch (info.bfd_arch_info->mach)
1273 {
1274 case bfd_mach_h8300:
1275 set_gdbarch_num_regs (gdbarch, 13);
1276 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1277 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1278 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1279 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1280 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1281 set_gdbarch_register_name (gdbarch, h8300_register_name);
1282 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1283 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1284 set_gdbarch_extract_return_value (gdbarch, h8300_extract_return_value);
1285 set_gdbarch_store_return_value (gdbarch, h8300_store_return_value);
1286 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
1287 break;
1288 case bfd_mach_h8300h:
1289 case bfd_mach_h8300hn:
1290 set_gdbarch_num_regs (gdbarch, 13);
1291 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1292 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1293 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1294 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1295 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1296 set_gdbarch_register_name (gdbarch, h8300_register_name);
1297 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1298 {
1299 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1300 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1301 }
1302 else
1303 {
1304 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1305 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1306 }
1307 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1308 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
1309 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
1310 break;
1311 case bfd_mach_h8300s:
1312 case bfd_mach_h8300sn:
1313 set_gdbarch_num_regs (gdbarch, 16);
1314 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1315 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1316 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1317 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1318 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1319 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1320 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1321 {
1322 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1323 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1324 }
1325 else
1326 {
1327 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1328 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1329 }
1330 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1331 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
1332 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1333 break;
1334 case bfd_mach_h8300sx:
1335 case bfd_mach_h8300sxn:
1336 set_gdbarch_num_regs (gdbarch, 18);
1337 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1338 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1339 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1340 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1341 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1342 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1343 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1344 {
1345 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1346 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1347 }
1348 else
1349 {
1350 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1351 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1352 }
1353 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1354 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
1355 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1356 break;
1357 }
1358
1359 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1360 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1361
1362 /*
1363 * Basic register fields and methods.
1364 */
1365
1366 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1367 set_gdbarch_deprecated_fp_regnum (gdbarch, E_FP_REGNUM);
1368 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1369 set_gdbarch_register_type (gdbarch, h8300_register_type);
1370 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1371 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1372
1373 /*
1374 * Frame Info
1375 */
1376 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1377
1378 /* Frame unwinder. */
1379 set_gdbarch_unwind_dummy_id (gdbarch, h8300_unwind_dummy_id);
1380 set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc);
1381
1382 /* Hook in the DWARF CFI frame unwinder. */
1383 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1384
1385 /*
1386 * Miscelany
1387 */
1388 /* Stack grows up. */
1389 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1390
1391 set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
1392 h8300_extract_struct_value_address);
1393 set_gdbarch_deprecated_use_struct_convention (gdbarch,
1394 always_use_struct_convention);
1395 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
1396 set_gdbarch_push_dummy_code (gdbarch, h8300_push_dummy_code);
1397 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1398
1399 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1400 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1401 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1402 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1403 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1404
1405 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1406
1407 /* Char is unsigned. */
1408 set_gdbarch_char_signed (gdbarch, 0);
1409
1410 frame_unwind_append_sniffer (gdbarch, h8300_frame_sniffer);
1411
1412 return gdbarch;
1413
1414 }
1415
1416 extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1417
1418 void
1419 _initialize_h8300_tdep (void)
1420 {
1421 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1422 }
1423
1424 static int
1425 is_h8300hmode (struct gdbarch *gdbarch)
1426 {
1427 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1428 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1429 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1430 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1431 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1432 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1433 }
1434
1435 static int
1436 is_h8300smode (struct gdbarch *gdbarch)
1437 {
1438 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1439 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1440 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1441 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1442 }
1443
1444 static int
1445 is_h8300sxmode (struct gdbarch *gdbarch)
1446 {
1447 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1448 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1449 }
1450
1451 static int
1452 is_h8300_normal_mode (struct gdbarch *gdbarch)
1453 {
1454 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1455 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1456 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1457 }
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