* contrib/ari/gdb_ari.sh: Remove rules for xasprintf and
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
1 /* Target-machine dependent code for Renesas H8/300, for GDB.
2
3 Copyright (C) 1988, 1990-1996, 1998-2003, 2005, 2007-2012 Free
4 Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 /*
22 Contributed by Steve Chamberlain
23 sac@cygnus.com
24 */
25
26 #include "defs.h"
27 #include "value.h"
28 #include "arch-utils.h"
29 #include "regcache.h"
30 #include "gdbcore.h"
31 #include "objfiles.h"
32 #include "gdb_assert.h"
33 #include "dis-asm.h"
34 #include "dwarf2-frame.h"
35 #include "frame-base.h"
36 #include "frame-unwind.h"
37
38 enum gdb_regnum
39 {
40 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
41 E_RET0_REGNUM = E_R0_REGNUM,
42 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
43 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
44 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
45 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
46 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
47 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
48 E_SP_REGNUM,
49 E_CCR_REGNUM,
50 E_PC_REGNUM,
51 E_CYCLES_REGNUM,
52 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
53 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
54 E_INSTS_REGNUM,
55 E_MACH_REGNUM,
56 E_MACL_REGNUM,
57 E_SBR_REGNUM,
58 E_VBR_REGNUM
59 };
60
61 #define H8300_MAX_NUM_REGS 18
62
63 #define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch))
64 #define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1)
65
66 struct h8300_frame_cache
67 {
68 /* Base address. */
69 CORE_ADDR base;
70 CORE_ADDR sp_offset;
71 CORE_ADDR pc;
72
73 /* Flag showing that a frame has been created in the prologue code. */
74 int uses_fp;
75
76 /* Saved registers. */
77 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
78 CORE_ADDR saved_sp;
79 };
80
81 enum
82 {
83 h8300_reg_size = 2,
84 h8300h_reg_size = 4,
85 h8300_max_reg_size = 4,
86 };
87
88 static int is_h8300hmode (struct gdbarch *gdbarch);
89 static int is_h8300smode (struct gdbarch *gdbarch);
90 static int is_h8300sxmode (struct gdbarch *gdbarch);
91 static int is_h8300_normal_mode (struct gdbarch *gdbarch);
92
93 #define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \
94 && !is_h8300_normal_mode (gdbarch)) \
95 ? h8300h_reg_size : h8300_reg_size)
96
97 static CORE_ADDR
98 h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
99 {
100 return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM);
101 }
102
103 static CORE_ADDR
104 h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
105 {
106 return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
107 }
108
109 static struct frame_id
110 h8300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
111 {
112 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
113 return frame_id_build (sp, get_frame_pc (this_frame));
114 }
115
116 /* Normal frames. */
117
118 /* Allocate and initialize a frame cache. */
119
120 static void
121 h8300_init_frame_cache (struct gdbarch *gdbarch,
122 struct h8300_frame_cache *cache)
123 {
124 int i;
125
126 /* Base address. */
127 cache->base = 0;
128 cache->sp_offset = 0;
129 cache->pc = 0;
130
131 /* Frameless until proven otherwise. */
132 cache->uses_fp = 0;
133
134 /* Saved registers. We initialize these to -1 since zero is a valid
135 offset (that's where %fp is supposed to be stored). */
136 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
137 cache->saved_regs[i] = -1;
138 }
139
140 #define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
141 #define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
142 #define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
143 #define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
144 #define IS_MOVB_EXT(x) ((x) == 0x7860)
145 #define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
146 #define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
147 #define IS_MOVW_EXT(x) ((x) == 0x78e0)
148 #define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
149 /* Same instructions as mov.w, just prefixed with 0x0100. */
150 #define IS_MOVL_PRE(x) ((x) == 0x0100)
151 #define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
152 #define IS_MOVL_EXT(x) ((x) == 0x78e0)
153 #define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
154
155 #define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
156 #define IS_PUSH_FP(x) ((x) == 0x01006df6)
157 #define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
158 #define IS_SUB2_SP(x) ((x) == 0x1b87)
159 #define IS_SUB4_SP(x) ((x) == 0x1b97)
160 #define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
161 #define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
162 #define IS_SUBL4_SP(x) ((x) == 0x1acf)
163 #define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
164 #define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
165 #define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
166 #define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
167
168 /* If the instruction at PC is an argument register spill, return its
169 length. Otherwise, return zero.
170
171 An argument register spill is an instruction that moves an argument
172 from the register in which it was passed to the stack slot in which
173 it really lives. It is a byte, word, or longword move from an
174 argument register to a negative offset from the frame pointer.
175
176 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
177 is used, it could be a byte, word or long move to registers r3-r5. */
178
179 static int
180 h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc)
181 {
182 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
183 int w = read_memory_unsigned_integer (pc, 2, byte_order);
184
185 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
186 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
187 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
188 return 2;
189
190 if (IS_MOVB_Rn16_SP (w)
191 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
192 {
193 /* ... and d:16 is negative. */
194 if (read_memory_integer (pc + 2, 2, byte_order) < 0)
195 return 4;
196 }
197 else if (IS_MOVB_EXT (w))
198 {
199 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2,
200 2, byte_order)))
201 {
202 LONGEST disp = read_memory_integer (pc + 4, 4, byte_order);
203
204 /* ... and d:24 is negative. */
205 if (disp < 0 && disp > 0xffffff)
206 return 8;
207 }
208 }
209 else if (IS_MOVW_Rn16_SP (w)
210 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
211 {
212 /* ... and d:16 is negative. */
213 if (read_memory_integer (pc + 2, 2, byte_order) < 0)
214 return 4;
215 }
216 else if (IS_MOVW_EXT (w))
217 {
218 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2,
219 2, byte_order)))
220 {
221 LONGEST disp = read_memory_integer (pc + 4, 4, byte_order);
222
223 /* ... and d:24 is negative. */
224 if (disp < 0 && disp > 0xffffff)
225 return 8;
226 }
227 }
228 else if (IS_MOVL_PRE (w))
229 {
230 int w2 = read_memory_integer (pc + 2, 2, byte_order);
231
232 if (IS_MOVL_Rn16_SP (w2)
233 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
234 {
235 /* ... and d:16 is negative. */
236 if (read_memory_integer (pc + 4, 2, byte_order) < 0)
237 return 6;
238 }
239 else if (IS_MOVL_EXT (w2))
240 {
241 int w3 = read_memory_integer (pc + 4, 2, byte_order);
242
243 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2, byte_order)))
244 {
245 LONGEST disp = read_memory_integer (pc + 6, 4, byte_order);
246
247 /* ... and d:24 is negative. */
248 if (disp < 0 && disp > 0xffffff)
249 return 10;
250 }
251 }
252 }
253
254 return 0;
255 }
256
257 /* Do a full analysis of the prologue at PC and update CACHE
258 accordingly. Bail out early if CURRENT_PC is reached. Return the
259 address where the analysis stopped.
260
261 We handle all cases that can be generated by gcc.
262
263 For allocating a stack frame:
264
265 mov.w r6,@-sp
266 mov.w sp,r6
267 mov.w #-n,rN
268 add.w rN,sp
269
270 mov.w r6,@-sp
271 mov.w sp,r6
272 subs #2,sp
273 (repeat)
274
275 mov.l er6,@-sp
276 mov.l sp,er6
277 add.l #-n,sp
278
279 mov.w r6,@-sp
280 mov.w sp,r6
281 subs #4,sp
282 (repeat)
283
284 For saving registers:
285
286 mov.w rN,@-sp
287 mov.l erN,@-sp
288 stm.l reglist,@-sp
289
290 */
291
292 static CORE_ADDR
293 h8300_analyze_prologue (struct gdbarch *gdbarch,
294 CORE_ADDR pc, CORE_ADDR current_pc,
295 struct h8300_frame_cache *cache)
296 {
297 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
298 unsigned int op;
299 int regno, i, spill_size;
300
301 cache->sp_offset = 0;
302
303 if (pc >= current_pc)
304 return current_pc;
305
306 op = read_memory_unsigned_integer (pc, 4, byte_order);
307
308 if (IS_PUSHFP_MOVESPFP (op))
309 {
310 cache->saved_regs[E_FP_REGNUM] = 0;
311 cache->uses_fp = 1;
312 pc += 4;
313 }
314 else if (IS_PUSH_FP (op))
315 {
316 cache->saved_regs[E_FP_REGNUM] = 0;
317 pc += 4;
318 if (pc >= current_pc)
319 return current_pc;
320 op = read_memory_unsigned_integer (pc, 2, byte_order);
321 if (IS_MOV_SP_FP (op))
322 {
323 cache->uses_fp = 1;
324 pc += 2;
325 }
326 }
327
328 while (pc < current_pc)
329 {
330 op = read_memory_unsigned_integer (pc, 2, byte_order);
331 if (IS_SUB2_SP (op))
332 {
333 cache->sp_offset += 2;
334 pc += 2;
335 }
336 else if (IS_SUB4_SP (op))
337 {
338 cache->sp_offset += 4;
339 pc += 2;
340 }
341 else if (IS_ADD_IMM_SP (op))
342 {
343 cache->sp_offset += -read_memory_integer (pc + 2, 2, byte_order);
344 pc += 4;
345 }
346 else if (IS_SUB_IMM_SP (op))
347 {
348 cache->sp_offset += read_memory_integer (pc + 2, 2, byte_order);
349 pc += 4;
350 }
351 else if (IS_SUBL4_SP (op))
352 {
353 cache->sp_offset += 4;
354 pc += 2;
355 }
356 else if (IS_MOV_IMM_Rn (op))
357 {
358 int offset = read_memory_integer (pc + 2, 2, byte_order);
359 regno = op & 0x000f;
360 op = read_memory_unsigned_integer (pc + 4, 2, byte_order);
361 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
362 {
363 cache->sp_offset -= offset;
364 pc += 6;
365 }
366 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
367 {
368 cache->sp_offset += offset;
369 pc += 6;
370 }
371 else
372 break;
373 }
374 else if (IS_PUSH (op))
375 {
376 regno = op & 0x000f;
377 cache->sp_offset += 2;
378 cache->saved_regs[regno] = cache->sp_offset;
379 pc += 2;
380 }
381 else if (op == 0x0100)
382 {
383 op = read_memory_unsigned_integer (pc + 2, 2, byte_order);
384 if (IS_PUSH (op))
385 {
386 regno = op & 0x000f;
387 cache->sp_offset += 4;
388 cache->saved_regs[regno] = cache->sp_offset;
389 pc += 4;
390 }
391 else
392 break;
393 }
394 else if ((op & 0xffcf) == 0x0100)
395 {
396 int op1;
397 op1 = read_memory_unsigned_integer (pc + 2, 2, byte_order);
398 if (IS_PUSH (op1))
399 {
400 /* Since the prefix is 0x01x0, this is not a simple pushm but a
401 stm.l reglist,@-sp */
402 i = ((op & 0x0030) >> 4) + 1;
403 regno = op1 & 0x000f;
404 for (; i > 0; regno++, --i)
405 {
406 cache->sp_offset += 4;
407 cache->saved_regs[regno] = cache->sp_offset;
408 }
409 pc += 4;
410 }
411 else
412 break;
413 }
414 else
415 break;
416 }
417
418 /* Check for spilling an argument register to the stack frame.
419 This could also be an initializing store from non-prologue code,
420 but I don't think there's any harm in skipping that. */
421 while ((spill_size = h8300_is_argument_spill (gdbarch, pc)) > 0
422 && pc + spill_size <= current_pc)
423 pc += spill_size;
424
425 return pc;
426 }
427
428 static struct h8300_frame_cache *
429 h8300_frame_cache (struct frame_info *this_frame, void **this_cache)
430 {
431 struct gdbarch *gdbarch = get_frame_arch (this_frame);
432 struct h8300_frame_cache *cache;
433 int i;
434 CORE_ADDR current_pc;
435
436 if (*this_cache)
437 return *this_cache;
438
439 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
440 h8300_init_frame_cache (gdbarch, cache);
441 *this_cache = cache;
442
443 /* In principle, for normal frames, %fp holds the frame pointer,
444 which holds the base address for the current stack frame.
445 However, for functions that don't need it, the frame pointer is
446 optional. For these "frameless" functions the frame pointer is
447 actually the frame pointer of the calling frame. */
448
449 cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM);
450 if (cache->base == 0)
451 return cache;
452
453 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
454
455 cache->pc = get_frame_func (this_frame);
456 current_pc = get_frame_pc (this_frame);
457 if (cache->pc != 0)
458 h8300_analyze_prologue (gdbarch, cache->pc, current_pc, cache);
459
460 if (!cache->uses_fp)
461 {
462 /* We didn't find a valid frame, which means that CACHE->base
463 currently holds the frame pointer for our calling frame. If
464 we're at the start of a function, or somewhere half-way its
465 prologue, the function's frame probably hasn't been fully
466 setup yet. Try to reconstruct the base address for the stack
467 frame by looking at the stack pointer. For truly "frameless"
468 functions this might work too. */
469
470 cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM)
471 + cache->sp_offset;
472 cache->saved_sp = cache->base + BINWORD (gdbarch);
473 cache->saved_regs[E_PC_REGNUM] = 0;
474 }
475 else
476 {
477 cache->saved_sp = cache->base + 2 * BINWORD (gdbarch);
478 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
479 }
480
481 /* Adjust all the saved registers such that they contain addresses
482 instead of offsets. */
483 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
484 if (cache->saved_regs[i] != -1)
485 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
486
487 return cache;
488 }
489
490 static void
491 h8300_frame_this_id (struct frame_info *this_frame, void **this_cache,
492 struct frame_id *this_id)
493 {
494 struct h8300_frame_cache *cache =
495 h8300_frame_cache (this_frame, this_cache);
496
497 /* This marks the outermost frame. */
498 if (cache->base == 0)
499 return;
500
501 *this_id = frame_id_build (cache->saved_sp, cache->pc);
502 }
503
504 static struct value *
505 h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache,
506 int regnum)
507 {
508 struct gdbarch *gdbarch = get_frame_arch (this_frame);
509 struct h8300_frame_cache *cache =
510 h8300_frame_cache (this_frame, this_cache);
511
512 gdb_assert (regnum >= 0);
513
514 if (regnum == E_SP_REGNUM && cache->saved_sp)
515 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
516
517 if (regnum < gdbarch_num_regs (gdbarch)
518 && cache->saved_regs[regnum] != -1)
519 return frame_unwind_got_memory (this_frame, regnum,
520 cache->saved_regs[regnum]);
521
522 return frame_unwind_got_register (this_frame, regnum, regnum);
523 }
524
525 static const struct frame_unwind h8300_frame_unwind = {
526 NORMAL_FRAME,
527 default_frame_unwind_stop_reason,
528 h8300_frame_this_id,
529 h8300_frame_prev_register,
530 NULL,
531 default_frame_sniffer
532 };
533
534 static CORE_ADDR
535 h8300_frame_base_address (struct frame_info *this_frame, void **this_cache)
536 {
537 struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache);
538 return cache->base;
539 }
540
541 static const struct frame_base h8300_frame_base = {
542 &h8300_frame_unwind,
543 h8300_frame_base_address,
544 h8300_frame_base_address,
545 h8300_frame_base_address
546 };
547
548 static CORE_ADDR
549 h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
550 {
551 CORE_ADDR func_addr = 0 , func_end = 0;
552
553 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
554 {
555 struct symtab_and_line sal;
556 struct h8300_frame_cache cache;
557
558 /* Found a function. */
559 sal = find_pc_line (func_addr, 0);
560 if (sal.end && sal.end < func_end)
561 /* Found a line number, use it as end of prologue. */
562 return sal.end;
563
564 /* No useable line symbol. Use prologue parsing method. */
565 h8300_init_frame_cache (gdbarch, &cache);
566 return h8300_analyze_prologue (gdbarch, func_addr, func_end, &cache);
567 }
568
569 /* No function symbol -- just return the PC. */
570 return (CORE_ADDR) pc;
571 }
572
573 /* Function: push_dummy_call
574 Setup the function arguments for calling a function in the inferior.
575 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
576 on the H8/300H.
577
578 There are actually two ABI's here: -mquickcall (the default) and
579 -mno-quickcall. With -mno-quickcall, all arguments are passed on
580 the stack after the return address, word-aligned. With
581 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
582 GCC doesn't indicate in the object file which ABI was used to
583 compile it, GDB only supports the default --- -mquickcall.
584
585 Here are the rules for -mquickcall, in detail:
586
587 Each argument, whether scalar or aggregate, is padded to occupy a
588 whole number of words. Arguments smaller than a word are padded at
589 the most significant end; those larger than a word are padded at
590 the least significant end.
591
592 The initial arguments are passed in r0 -- r2. Earlier arguments go in
593 lower-numbered registers. Multi-word arguments are passed in
594 consecutive registers, with the most significant end in the
595 lower-numbered register.
596
597 If an argument doesn't fit entirely in the remaining registers, it
598 is passed entirely on the stack. Stack arguments begin just after
599 the return address. Once an argument has overflowed onto the stack
600 this way, all subsequent arguments are passed on the stack.
601
602 The above rule has odd consequences. For example, on the h8/300s,
603 if a function takes two longs and an int as arguments:
604 - the first long will be passed in r0/r1,
605 - the second long will be passed entirely on the stack, since it
606 doesn't fit in r2,
607 - and the int will be passed on the stack, even though it could fit
608 in r2.
609
610 A weird exception: if an argument is larger than a word, but not a
611 whole number of words in length (before padding), it is passed on
612 the stack following the rules for stack arguments above, even if
613 there are sufficient registers available to hold it. Stranger
614 still, the argument registers are still `used up' --- even though
615 there's nothing in them.
616
617 So, for example, on the h8/300s, if a function expects a three-byte
618 structure and an int, the structure will go on the stack, and the
619 int will go in r2, not r0.
620
621 If the function returns an aggregate type (struct, union, or class)
622 by value, the caller must allocate space to hold the return value,
623 and pass the callee a pointer to this space as an invisible first
624 argument, in R0.
625
626 For varargs functions, the last fixed argument and all the variable
627 arguments are always passed on the stack. This means that calls to
628 varargs functions don't work properly unless there is a prototype
629 in scope.
630
631 Basically, this ABI is not good, for the following reasons:
632 - You can't call vararg functions properly unless a prototype is in scope.
633 - Structure passing is inconsistent, to no purpose I can see.
634 - It often wastes argument registers, of which there are only three
635 to begin with. */
636
637 static CORE_ADDR
638 h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
639 struct regcache *regcache, CORE_ADDR bp_addr,
640 int nargs, struct value **args, CORE_ADDR sp,
641 int struct_return, CORE_ADDR struct_addr)
642 {
643 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
644 int stack_alloc = 0, stack_offset = 0;
645 int wordsize = BINWORD (gdbarch);
646 int reg = E_ARG0_REGNUM;
647 int argument;
648
649 /* First, make sure the stack is properly aligned. */
650 sp = align_down (sp, wordsize);
651
652 /* Now make sure there's space on the stack for the arguments. We
653 may over-allocate a little here, but that won't hurt anything. */
654 for (argument = 0; argument < nargs; argument++)
655 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
656 wordsize);
657 sp -= stack_alloc;
658
659 /* Now load as many arguments as possible into registers, and push
660 the rest onto the stack.
661 If we're returning a structure by value, then we must pass a
662 pointer to the buffer for the return value as an invisible first
663 argument. */
664 if (struct_return)
665 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
666
667 for (argument = 0; argument < nargs; argument++)
668 {
669 struct cleanup *back_to;
670 struct type *type = value_type (args[argument]);
671 int len = TYPE_LENGTH (type);
672 char *contents = (char *) value_contents (args[argument]);
673
674 /* Pad the argument appropriately. */
675 int padded_len = align_up (len, wordsize);
676 gdb_byte *padded = xmalloc (padded_len);
677 back_to = make_cleanup (xfree, padded);
678
679 memset (padded, 0, padded_len);
680 memcpy (len < wordsize ? padded + padded_len - len : padded,
681 contents, len);
682
683 /* Could the argument fit in the remaining registers? */
684 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
685 {
686 /* Are we going to pass it on the stack anyway, for no good
687 reason? */
688 if (len > wordsize && len % wordsize)
689 {
690 /* I feel so unclean. */
691 write_memory (sp + stack_offset, padded, padded_len);
692 stack_offset += padded_len;
693
694 /* That's right --- even though we passed the argument
695 on the stack, we consume the registers anyway! Love
696 me, love my dog. */
697 reg += padded_len / wordsize;
698 }
699 else
700 {
701 /* Heavens to Betsy --- it's really going in registers!
702 Note that on the h8/300s, there are gaps between the
703 registers in the register file. */
704 int offset;
705
706 for (offset = 0; offset < padded_len; offset += wordsize)
707 {
708 ULONGEST word
709 = extract_unsigned_integer (padded + offset,
710 wordsize, byte_order);
711 regcache_cooked_write_unsigned (regcache, reg++, word);
712 }
713 }
714 }
715 else
716 {
717 /* It doesn't fit in registers! Onto the stack it goes. */
718 write_memory (sp + stack_offset, padded, padded_len);
719 stack_offset += padded_len;
720
721 /* Once one argument has spilled onto the stack, all
722 subsequent arguments go on the stack. */
723 reg = E_ARGLAST_REGNUM + 1;
724 }
725
726 do_cleanups (back_to);
727 }
728
729 /* Store return address. */
730 sp -= wordsize;
731 write_memory_unsigned_integer (sp, wordsize, byte_order, bp_addr);
732
733 /* Update stack pointer. */
734 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
735
736 /* Return the new stack pointer minus the return address slot since
737 that's what DWARF2/GCC uses as the frame's CFA. */
738 return sp + wordsize;
739 }
740
741 /* Function: extract_return_value
742 Figure out where in REGBUF the called function has left its return value.
743 Copy that into VALBUF. Be sure to account for CPU type. */
744
745 static void
746 h8300_extract_return_value (struct type *type, struct regcache *regcache,
747 void *valbuf)
748 {
749 struct gdbarch *gdbarch = get_regcache_arch (regcache);
750 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
751 int len = TYPE_LENGTH (type);
752 ULONGEST c, addr;
753
754 switch (len)
755 {
756 case 1:
757 case 2:
758 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
759 store_unsigned_integer (valbuf, len, byte_order, c);
760 break;
761 case 4: /* Needs two registers on plain H8/300 */
762 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
763 store_unsigned_integer (valbuf, 2, byte_order, c);
764 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
765 store_unsigned_integer ((void *)((char *) valbuf + 2), 2, byte_order, c);
766 break;
767 case 8: /* long long is now 8 bytes. */
768 if (TYPE_CODE (type) == TYPE_CODE_INT)
769 {
770 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
771 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len, byte_order);
772 store_unsigned_integer (valbuf, len, byte_order, c);
773 }
774 else
775 {
776 error (_("I don't know how this 8 byte value is returned."));
777 }
778 break;
779 }
780 }
781
782 static void
783 h8300h_extract_return_value (struct type *type, struct regcache *regcache,
784 void *valbuf)
785 {
786 struct gdbarch *gdbarch = get_regcache_arch (regcache);
787 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
788 ULONGEST c;
789
790 switch (TYPE_LENGTH (type))
791 {
792 case 1:
793 case 2:
794 case 4:
795 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
796 store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, c);
797 break;
798 case 8: /* long long is now 8 bytes. */
799 if (TYPE_CODE (type) == TYPE_CODE_INT)
800 {
801 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
802 store_unsigned_integer (valbuf, 4, byte_order, c);
803 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
804 store_unsigned_integer ((void *) ((char *) valbuf + 4), 4,
805 byte_order, c);
806 }
807 else
808 {
809 error (_("I don't know how this 8 byte value is returned."));
810 }
811 break;
812 }
813 }
814
815 static int
816 h8300_use_struct_convention (struct type *value_type)
817 {
818 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
819 stack. */
820
821 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
822 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
823 return 1;
824 return !(TYPE_LENGTH (value_type) == 1
825 || TYPE_LENGTH (value_type) == 2
826 || TYPE_LENGTH (value_type) == 4);
827 }
828
829 static int
830 h8300h_use_struct_convention (struct type *value_type)
831 {
832 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
833 returned in R0/R1, everything else on the stack. */
834 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
835 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
836 return 1;
837 return !(TYPE_LENGTH (value_type) == 1
838 || TYPE_LENGTH (value_type) == 2
839 || TYPE_LENGTH (value_type) == 4
840 || (TYPE_LENGTH (value_type) == 8
841 && TYPE_CODE (value_type) == TYPE_CODE_INT));
842 }
843
844 /* Function: store_return_value
845 Place the appropriate value in the appropriate registers.
846 Primarily used by the RETURN command. */
847
848 static void
849 h8300_store_return_value (struct type *type, struct regcache *regcache,
850 const void *valbuf)
851 {
852 struct gdbarch *gdbarch = get_regcache_arch (regcache);
853 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
854 ULONGEST val;
855
856 switch (TYPE_LENGTH (type))
857 {
858 case 1:
859 case 2: /* short... */
860 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
861 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
862 break;
863 case 4: /* long, float */
864 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
865 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
866 (val >> 16) & 0xffff);
867 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
868 break;
869 case 8: /* long long, double and long double
870 are all defined as 4 byte types so
871 far so this shouldn't happen. */
872 error (_("I don't know how to return an 8 byte value."));
873 break;
874 }
875 }
876
877 static void
878 h8300h_store_return_value (struct type *type, struct regcache *regcache,
879 const void *valbuf)
880 {
881 struct gdbarch *gdbarch = get_regcache_arch (regcache);
882 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
883 ULONGEST val;
884
885 switch (TYPE_LENGTH (type))
886 {
887 case 1:
888 case 2:
889 case 4: /* long, float */
890 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
891 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
892 break;
893 case 8:
894 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order);
895 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
896 (val >> 32) & 0xffffffff);
897 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
898 val & 0xffffffff);
899 break;
900 }
901 }
902
903 static enum return_value_convention
904 h8300_return_value (struct gdbarch *gdbarch, struct value *function,
905 struct type *type, struct regcache *regcache,
906 gdb_byte *readbuf, const gdb_byte *writebuf)
907 {
908 if (h8300_use_struct_convention (type))
909 return RETURN_VALUE_STRUCT_CONVENTION;
910 if (writebuf)
911 h8300_store_return_value (type, regcache, writebuf);
912 else if (readbuf)
913 h8300_extract_return_value (type, regcache, readbuf);
914 return RETURN_VALUE_REGISTER_CONVENTION;
915 }
916
917 static enum return_value_convention
918 h8300h_return_value (struct gdbarch *gdbarch, struct value *function,
919 struct type *type, struct regcache *regcache,
920 gdb_byte *readbuf, const gdb_byte *writebuf)
921 {
922 if (h8300h_use_struct_convention (type))
923 {
924 if (readbuf)
925 {
926 ULONGEST addr;
927
928 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
929 read_memory (addr, readbuf, TYPE_LENGTH (type));
930 }
931
932 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
933 }
934 if (writebuf)
935 h8300h_store_return_value (type, regcache, writebuf);
936 else if (readbuf)
937 h8300h_extract_return_value (type, regcache, readbuf);
938 return RETURN_VALUE_REGISTER_CONVENTION;
939 }
940
941 static struct cmd_list_element *setmachinelist;
942
943 static const char *
944 h8300_register_name (struct gdbarch *gdbarch, int regno)
945 {
946 /* The register names change depending on which h8300 processor
947 type is selected. */
948 static char *register_names[] = {
949 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
950 "sp", "", "pc", "cycles", "tick", "inst",
951 "ccr", /* pseudo register */
952 };
953 if (regno < 0
954 || regno >= (sizeof (register_names) / sizeof (*register_names)))
955 internal_error (__FILE__, __LINE__,
956 _("h8300_register_name: illegal register number %d"),
957 regno);
958 else
959 return register_names[regno];
960 }
961
962 static const char *
963 h8300s_register_name (struct gdbarch *gdbarch, int regno)
964 {
965 static char *register_names[] = {
966 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
967 "sp", "", "pc", "cycles", "", "tick", "inst",
968 "mach", "macl",
969 "ccr", "exr" /* pseudo registers */
970 };
971 if (regno < 0
972 || regno >= (sizeof (register_names) / sizeof (*register_names)))
973 internal_error (__FILE__, __LINE__,
974 _("h8300s_register_name: illegal register number %d"),
975 regno);
976 else
977 return register_names[regno];
978 }
979
980 static const char *
981 h8300sx_register_name (struct gdbarch *gdbarch, int regno)
982 {
983 static char *register_names[] = {
984 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
985 "sp", "", "pc", "cycles", "", "tick", "inst",
986 "mach", "macl", "sbr", "vbr",
987 "ccr", "exr" /* pseudo registers */
988 };
989 if (regno < 0
990 || regno >= (sizeof (register_names) / sizeof (*register_names)))
991 internal_error (__FILE__, __LINE__,
992 _("h8300sx_register_name: illegal register number %d"),
993 regno);
994 else
995 return register_names[regno];
996 }
997
998 static void
999 h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
1000 struct frame_info *frame, int regno)
1001 {
1002 LONGEST rval;
1003 const char *name = gdbarch_register_name (gdbarch, regno);
1004
1005 if (!name || !*name)
1006 return;
1007
1008 rval = get_frame_register_signed (frame, regno);
1009
1010 fprintf_filtered (file, "%-14s ", name);
1011 if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \
1012 (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)))
1013 {
1014 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1015 print_longest (file, 'u', 1, rval);
1016 }
1017 else
1018 {
1019 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval,
1020 BINWORD (gdbarch)));
1021 print_longest (file, 'd', 1, rval);
1022 }
1023 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1024 {
1025 /* CCR register */
1026 int C, Z, N, V;
1027 unsigned char l = rval & 0xff;
1028 fprintf_filtered (file, "\t");
1029 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
1030 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
1031 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
1032 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
1033 N = (l & 0x8) != 0;
1034 Z = (l & 0x4) != 0;
1035 V = (l & 0x2) != 0;
1036 C = (l & 0x1) != 0;
1037 fprintf_filtered (file, "N-%d ", N);
1038 fprintf_filtered (file, "Z-%d ", Z);
1039 fprintf_filtered (file, "V-%d ", V);
1040 fprintf_filtered (file, "C-%d ", C);
1041 if ((C | Z) == 0)
1042 fprintf_filtered (file, "u> ");
1043 if ((C | Z) == 1)
1044 fprintf_filtered (file, "u<= ");
1045 if ((C == 0))
1046 fprintf_filtered (file, "u>= ");
1047 if (C == 1)
1048 fprintf_filtered (file, "u< ");
1049 if (Z == 0)
1050 fprintf_filtered (file, "!= ");
1051 if (Z == 1)
1052 fprintf_filtered (file, "== ");
1053 if ((N ^ V) == 0)
1054 fprintf_filtered (file, ">= ");
1055 if ((N ^ V) == 1)
1056 fprintf_filtered (file, "< ");
1057 if ((Z | (N ^ V)) == 0)
1058 fprintf_filtered (file, "> ");
1059 if ((Z | (N ^ V)) == 1)
1060 fprintf_filtered (file, "<= ");
1061 }
1062 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))
1063 {
1064 /* EXR register */
1065 unsigned char l = rval & 0xff;
1066 fprintf_filtered (file, "\t");
1067 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1068 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1069 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1070 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1071 }
1072 fprintf_filtered (file, "\n");
1073 }
1074
1075 static void
1076 h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1077 struct frame_info *frame, int regno, int cpregs)
1078 {
1079 if (regno < 0)
1080 {
1081 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1082 h8300_print_register (gdbarch, file, frame, regno);
1083 h8300_print_register (gdbarch, file, frame,
1084 E_PSEUDO_CCR_REGNUM (gdbarch));
1085 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
1086 if (is_h8300smode (gdbarch))
1087 {
1088 h8300_print_register (gdbarch, file, frame,
1089 E_PSEUDO_EXR_REGNUM (gdbarch));
1090 if (is_h8300sxmode (gdbarch))
1091 {
1092 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1093 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1094 }
1095 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1096 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1097 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1098 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1099 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1100 }
1101 else
1102 {
1103 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1104 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1105 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1106 }
1107 }
1108 else
1109 {
1110 if (regno == E_CCR_REGNUM)
1111 h8300_print_register (gdbarch, file, frame,
1112 E_PSEUDO_CCR_REGNUM (gdbarch));
1113 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)
1114 && is_h8300smode (gdbarch))
1115 h8300_print_register (gdbarch, file, frame,
1116 E_PSEUDO_EXR_REGNUM (gdbarch));
1117 else
1118 h8300_print_register (gdbarch, file, frame, regno);
1119 }
1120 }
1121
1122 static struct type *
1123 h8300_register_type (struct gdbarch *gdbarch, int regno)
1124 {
1125 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch)
1126 + gdbarch_num_pseudo_regs (gdbarch))
1127 internal_error (__FILE__, __LINE__,
1128 _("h8300_register_type: illegal register number %d"),
1129 regno);
1130 else
1131 {
1132 switch (regno)
1133 {
1134 case E_PC_REGNUM:
1135 return builtin_type (gdbarch)->builtin_func_ptr;
1136 case E_SP_REGNUM:
1137 case E_FP_REGNUM:
1138 return builtin_type (gdbarch)->builtin_data_ptr;
1139 default:
1140 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1141 return builtin_type (gdbarch)->builtin_uint8;
1142 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1143 return builtin_type (gdbarch)->builtin_uint8;
1144 else if (is_h8300hmode (gdbarch))
1145 return builtin_type (gdbarch)->builtin_int32;
1146 else
1147 return builtin_type (gdbarch)->builtin_int16;
1148 }
1149 }
1150 }
1151
1152 static enum register_status
1153 h8300_pseudo_register_read (struct gdbarch *gdbarch,
1154 struct regcache *regcache, int regno,
1155 gdb_byte *buf)
1156 {
1157 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1158 return regcache_raw_read (regcache, E_CCR_REGNUM, buf);
1159 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1160 return regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1161 else
1162 return regcache_raw_read (regcache, regno, buf);
1163 }
1164
1165 static void
1166 h8300_pseudo_register_write (struct gdbarch *gdbarch,
1167 struct regcache *regcache, int regno,
1168 const gdb_byte *buf)
1169 {
1170 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1171 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
1172 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1173 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1174 else
1175 regcache_raw_write (regcache, regno, buf);
1176 }
1177
1178 static int
1179 h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
1180 {
1181 if (regno == E_CCR_REGNUM)
1182 return E_PSEUDO_CCR_REGNUM (gdbarch);
1183 return regno;
1184 }
1185
1186 static int
1187 h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
1188 {
1189 if (regno == E_CCR_REGNUM)
1190 return E_PSEUDO_CCR_REGNUM (gdbarch);
1191 if (regno == E_EXR_REGNUM)
1192 return E_PSEUDO_EXR_REGNUM (gdbarch);
1193 return regno;
1194 }
1195
1196 const static unsigned char *
1197 h8300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
1198 int *lenptr)
1199 {
1200 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1201 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1202
1203 *lenptr = sizeof (breakpoint);
1204 return breakpoint;
1205 }
1206
1207 static void
1208 h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1209 struct frame_info *frame, const char *args)
1210 {
1211 fprintf_filtered (file, "\
1212 No floating-point info available for this processor.\n");
1213 }
1214
1215 static struct gdbarch *
1216 h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1217 {
1218 struct gdbarch_tdep *tdep = NULL;
1219 struct gdbarch *gdbarch;
1220
1221 arches = gdbarch_list_lookup_by_info (arches, &info);
1222 if (arches != NULL)
1223 return arches->gdbarch;
1224
1225 #if 0
1226 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1227 #endif
1228
1229 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1230 return NULL;
1231
1232 gdbarch = gdbarch_alloc (&info, 0);
1233
1234 switch (info.bfd_arch_info->mach)
1235 {
1236 case bfd_mach_h8300:
1237 set_gdbarch_num_regs (gdbarch, 13);
1238 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1239 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1240 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1241 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1242 set_gdbarch_register_name (gdbarch, h8300_register_name);
1243 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1244 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1245 set_gdbarch_return_value (gdbarch, h8300_return_value);
1246 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
1247 break;
1248 case bfd_mach_h8300h:
1249 case bfd_mach_h8300hn:
1250 set_gdbarch_num_regs (gdbarch, 13);
1251 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1252 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1253 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1254 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1255 set_gdbarch_register_name (gdbarch, h8300_register_name);
1256 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1257 {
1258 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1259 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1260 }
1261 else
1262 {
1263 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1264 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1265 }
1266 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1267 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
1268 break;
1269 case bfd_mach_h8300s:
1270 case bfd_mach_h8300sn:
1271 set_gdbarch_num_regs (gdbarch, 16);
1272 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1273 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1274 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1275 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1276 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1277 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1278 {
1279 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1280 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1281 }
1282 else
1283 {
1284 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1285 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1286 }
1287 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1288 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1289 break;
1290 case bfd_mach_h8300sx:
1291 case bfd_mach_h8300sxn:
1292 set_gdbarch_num_regs (gdbarch, 18);
1293 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1294 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1295 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1296 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1297 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1298 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1299 {
1300 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1301 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1302 }
1303 else
1304 {
1305 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1306 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1307 }
1308 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1309 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1310 break;
1311 }
1312
1313 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1314 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1315
1316 /*
1317 * Basic register fields and methods.
1318 */
1319
1320 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1321 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1322 set_gdbarch_register_type (gdbarch, h8300_register_type);
1323 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1324 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1325
1326 /*
1327 * Frame Info
1328 */
1329 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1330
1331 /* Frame unwinder. */
1332 set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc);
1333 set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp);
1334 set_gdbarch_dummy_id (gdbarch, h8300_dummy_id);
1335 frame_base_set_default (gdbarch, &h8300_frame_base);
1336
1337 /*
1338 * Miscelany
1339 */
1340 /* Stack grows up. */
1341 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1342
1343 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
1344 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1345
1346 set_gdbarch_char_signed (gdbarch, 0);
1347 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1348 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1349 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1350 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1351 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1352 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1353 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
1354
1355 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1356
1357 /* Hook in the DWARF CFI frame unwinder. */
1358 dwarf2_append_unwinders (gdbarch);
1359 frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind);
1360
1361 return gdbarch;
1362
1363 }
1364
1365 extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1366
1367 void
1368 _initialize_h8300_tdep (void)
1369 {
1370 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1371 }
1372
1373 static int
1374 is_h8300hmode (struct gdbarch *gdbarch)
1375 {
1376 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1377 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1378 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1379 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1380 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1381 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1382 }
1383
1384 static int
1385 is_h8300smode (struct gdbarch *gdbarch)
1386 {
1387 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1388 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1389 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1390 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1391 }
1392
1393 static int
1394 is_h8300sxmode (struct gdbarch *gdbarch)
1395 {
1396 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1397 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1398 }
1399
1400 static int
1401 is_h8300_normal_mode (struct gdbarch *gdbarch)
1402 {
1403 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1404 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1405 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1406 }
This page took 0.075064 seconds and 4 git commands to generate.