2004-08-02 Andrew Cagney <cagney@gnu.org>
[deliverable/binutils-gdb.git] / gdb / h8300-tdep.c
1 /* Target-machine dependent code for Renesas H8/300, for GDB.
2
3 Copyright 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
4 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 /*
24 Contributed by Steve Chamberlain
25 sac@cygnus.com
26 */
27
28 #include "defs.h"
29 #include "value.h"
30 #include "inferior.h"
31 #include "symfile.h"
32 #include "arch-utils.h"
33 #include "regcache.h"
34 #include "gdbcore.h"
35 #include "objfiles.h"
36 #include "gdbcmd.h"
37 #include "gdb_assert.h"
38 #include "dis-asm.h"
39
40 /* Extra info which is saved in each frame_info. */
41 struct frame_extra_info
42 {
43 CORE_ADDR from_pc;
44 };
45
46 enum
47 {
48 h8300_reg_size = 2,
49 h8300h_reg_size = 4,
50 h8300_max_reg_size = 4,
51 };
52
53 static int is_h8300hmode (struct gdbarch *gdbarch);
54 static int is_h8300smode (struct gdbarch *gdbarch);
55 static int is_h8300sxmode (struct gdbarch *gdbarch);
56 static int is_h8300_normal_mode (struct gdbarch *gdbarch);
57
58 #define BINWORD (is_h8300hmode (current_gdbarch) && \
59 !is_h8300_normal_mode (current_gdbarch) ? h8300h_reg_size : h8300_reg_size)
60
61 enum gdb_regnum
62 {
63 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
64 E_RET0_REGNUM = E_R0_REGNUM,
65 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
66 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
67 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
68 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
69 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
70 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
71 E_SP_REGNUM,
72 E_CCR_REGNUM,
73 E_PC_REGNUM,
74 E_CYCLES_REGNUM,
75 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
76 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
77 E_INSTS_REGNUM,
78 E_MACH_REGNUM,
79 E_MACL_REGNUM,
80 E_SBR_REGNUM,
81 E_VBR_REGNUM
82 };
83
84 #define E_PSEUDO_CCR_REGNUM (NUM_REGS)
85 #define E_PSEUDO_EXR_REGNUM (NUM_REGS+1)
86
87 #define UNSIGNED_SHORT(X) ((X) & 0xffff)
88
89 #define IS_PUSH(x) ((x & 0xfff0)==0x6df0)
90 #define IS_PUSH_FP(x) (x == 0x6df6)
91 #define IS_MOVE_FP(x) (x == 0x0d76 || x == 0x0ff6)
92 #define IS_MOV_SP_FP(x) (x == 0x0d76 || x == 0x0ff6)
93 #define IS_SUB2_SP(x) (x==0x1b87)
94 #define IS_SUB4_SP(x) (x==0x1b97)
95 #define IS_SUBL_SP(x) (x==0x7a37)
96 #define IS_MOVK_R5(x) (x==0x7905)
97 #define IS_SUB_R5SP(x) (x==0x1957)
98
99 /* If the instruction at PC is an argument register spill, return its
100 length. Otherwise, return zero.
101
102 An argument register spill is an instruction that moves an argument
103 from the register in which it was passed to the stack slot in which
104 it really lives. It is a byte, word, or longword move from an
105 argument register to a negative offset from the frame pointer.
106
107 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
108 is used, it could be a byte, word or long move to registers r3-r5. */
109
110 static int
111 h8300_is_argument_spill (CORE_ADDR pc)
112 {
113 int w = read_memory_unsigned_integer (pc, 2);
114
115 if (((w & 0xff88) == 0x0c88 /* mov.b Rsl, Rdl */
116 || (w & 0xff88) == 0x0d00 /* mov.w Rs, Rd */
117 || (w & 0xff88) == 0x0f80) /* mov.l Rs, Rd */
118 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
119 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5)/* Rd is R3, R4 or R5 */
120 return 2;
121
122 if ((w & 0xfff0) == 0x6ee0 /* mov.b Rs,@(d:16,er6) */
123 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
124 {
125 int w2 = read_memory_integer (pc + 2, 2);
126
127 /* ... and d:16 is negative. */
128 if (w2 < 0)
129 return 4;
130 }
131 else if (w == 0x7860)
132 {
133 int w2 = read_memory_integer (pc + 2, 2);
134
135 if ((w2 & 0xfff0) == 0x6aa0) /* mov.b Rs, @(d:24,er6) */
136 {
137 LONGEST disp = read_memory_integer (pc + 4, 4);
138
139 /* ... and d:24 is negative. */
140 if (disp < 0 && disp > 0xffffff)
141 return 8;
142 }
143 }
144 else if ((w & 0xfff0) == 0x6fe0 /* mov.w Rs,@(d:16,er6) */
145 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
146 {
147 int w2 = read_memory_integer (pc + 2, 2);
148
149 /* ... and d:16 is negative. */
150 if (w2 < 0)
151 return 4;
152 }
153 else if (w == 0x78e0)
154 {
155 int w2 = read_memory_integer (pc + 2, 2);
156
157 if ((w2 & 0xfff0) == 0x6ba0) /* mov.b Rs, @(d:24,er6) */
158 {
159 LONGEST disp = read_memory_integer (pc + 4, 4);
160
161 /* ... and d:24 is negative. */
162 if (disp < 0 && disp > 0xffffff)
163 return 8;
164 }
165 }
166 else if (w == 0x0100)
167 {
168 int w2 = read_memory_integer (pc + 2, 2);
169
170 if ((w2 & 0xfff0) == 0x6fe0 /* mov.l Rs,@(d:16,er6) */
171 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
172 {
173 int w3 = read_memory_integer (pc + 4, 2);
174
175 /* ... and d:16 is negative. */
176 if (w3 < 0)
177 return 6;
178 }
179 else if (w2 == 0x78e0)
180 {
181 int w3 = read_memory_integer (pc + 4, 2);
182
183 if ((w3 & 0xfff0) == 0x6ba0) /* mov.l Rs, @(d:24,er6) */
184 {
185 LONGEST disp = read_memory_integer (pc + 6, 4);
186
187 /* ... and d:24 is negative. */
188 if (disp < 0 && disp > 0xffffff)
189 return 10;
190 }
191 }
192 }
193
194 return 0;
195 }
196
197 static CORE_ADDR
198 h8300_skip_prologue (CORE_ADDR start_pc)
199 {
200 short int w;
201 int adjust = 0;
202
203 /* Skip past all push and stm insns. */
204 while (1)
205 {
206 w = read_memory_unsigned_integer (start_pc, 2);
207 /* First look for push insns. */
208 if (w == 0x0100 || w == 0x0110 || w == 0x0120 || w == 0x0130)
209 {
210 w = read_memory_unsigned_integer (start_pc + 2, 2);
211 adjust = 2;
212 }
213
214 if (IS_PUSH (w))
215 {
216 start_pc += 2 + adjust;
217 w = read_memory_unsigned_integer (start_pc, 2);
218 continue;
219 }
220 adjust = 0;
221 break;
222 }
223
224 /* Skip past a move to FP, either word or long sized */
225 w = read_memory_unsigned_integer (start_pc, 2);
226 if (w == 0x0100)
227 {
228 w = read_memory_unsigned_integer (start_pc + 2, 2);
229 adjust += 2;
230 }
231
232 if (IS_MOVE_FP (w))
233 {
234 start_pc += 2 + adjust;
235 w = read_memory_unsigned_integer (start_pc, 2);
236 }
237
238 /* Check for loading either a word constant into r5;
239 long versions are handled by the SUBL_SP below. */
240 if (IS_MOVK_R5 (w))
241 {
242 start_pc += 2;
243 w = read_memory_unsigned_integer (start_pc, 2);
244 }
245
246 /* Now check for subtracting r5 from sp, word sized only. */
247 if (IS_SUB_R5SP (w))
248 {
249 start_pc += 2 + adjust;
250 w = read_memory_unsigned_integer (start_pc, 2);
251 }
252
253 /* Check for subs #2 and subs #4. */
254 while (IS_SUB2_SP (w) || IS_SUB4_SP (w))
255 {
256 start_pc += 2 + adjust;
257 w = read_memory_unsigned_integer (start_pc, 2);
258 }
259
260 /* Check for a 32bit subtract. */
261 if (IS_SUBL_SP (w))
262 start_pc += 6 + adjust;
263
264 /* Skip past another possible stm insn for registers R3 to R5 (possibly used
265 for register qualified arguments. */
266 w = read_memory_unsigned_integer (start_pc, 2);
267 /* First look for push insns. */
268 if (w == 0x0110 || w == 0x0120 || w == 0x0130)
269 {
270 w = read_memory_unsigned_integer (start_pc + 2, 2);
271 if (IS_PUSH (w) && (w & 0xf) >= 0x3 && (w & 0xf) <= 0x5)
272 start_pc += 4;
273 }
274
275 /* Check for spilling an argument register to the stack frame.
276 This could also be an initializing store from non-prologue code,
277 but I don't think there's any harm in skipping that. */
278 for (;;)
279 {
280 int spill_size = h8300_is_argument_spill (start_pc);
281 if (spill_size == 0)
282 break;
283 start_pc += spill_size;
284 }
285
286 return start_pc;
287 }
288
289 /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
290 is not the address of a valid instruction, the address of the next
291 instruction beyond ADDR otherwise. *PWORD1 receives the first word
292 of the instruction. */
293
294 static CORE_ADDR
295 h8300_next_prologue_insn (CORE_ADDR addr,
296 CORE_ADDR lim,
297 unsigned short* pword1)
298 {
299 char buf[2];
300 if (addr < lim + 8)
301 {
302 read_memory (addr, buf, 2);
303 *pword1 = extract_signed_integer (buf, 2);
304
305 return addr + 2;
306 }
307 return 0;
308 }
309
310 /* Examine the prologue of a function. `ip' points to the first instruction.
311 `limit' is the limit of the prologue (e.g. the addr of the first
312 linenumber, or perhaps the program counter if we're stepping through).
313 `frame_sp' is the stack pointer value in use in this frame.
314 `fsr' is a pointer to a frame_saved_regs structure into which we put
315 info about the registers saved by this frame.
316 `fi' is a struct frame_info pointer; we fill in various fields in it
317 to reflect the offsets of the arg pointer and the locals pointer. */
318
319 /* Any function with a frame looks like this
320 SECOND ARG
321 FIRST ARG
322 RET PC
323 SAVED R2
324 SAVED R3
325 SAVED FP <-FP POINTS HERE
326 LOCALS0
327 LOCALS1 <-SP POINTS HERE
328 */
329
330 static CORE_ADDR
331 h8300_examine_prologue (CORE_ADDR ip, CORE_ADDR limit,
332 CORE_ADDR after_prolog_fp, CORE_ADDR *fsr,
333 struct frame_info *fi)
334 {
335 CORE_ADDR next_ip;
336 int r;
337 int have_fp = 0;
338 unsigned short insn_word;
339 /* Number of things pushed onto stack, starts at 2/4, 'cause the
340 PC is already there */
341 unsigned int reg_save_depth = BINWORD;
342
343 unsigned int auto_depth = 0; /* Number of bytes of autos */
344
345 char in_frame[11]; /* One for each reg */
346
347 int adjust = 0;
348
349 memset (in_frame, 1, 11);
350 for (r = 0; r < 8; r++)
351 {
352 fsr[r] = 0;
353 }
354 if (after_prolog_fp == 0)
355 {
356 after_prolog_fp = read_register (E_SP_REGNUM);
357 }
358
359 /* If the PC isn't valid, quit now. */
360 if (ip == 0 || ip & (is_h8300hmode (current_gdbarch) &&
361 !is_h8300_normal_mode (current_gdbarch) ? ~0xffffff : ~0xffff))
362 return 0;
363
364 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
365
366 if (insn_word == 0x0100) /* mov.l */
367 {
368 insn_word = read_memory_unsigned_integer (ip + 2, 2);
369 adjust = 2;
370 }
371
372 /* Skip over any fp push instructions */
373 fsr[E_FP_REGNUM] = after_prolog_fp;
374 while (next_ip && IS_PUSH_FP (insn_word))
375 {
376 ip = next_ip + adjust;
377
378 in_frame[insn_word & 0x7] = reg_save_depth;
379 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
380 reg_save_depth += 2 + adjust;
381 }
382
383 /* Is this a move into the fp */
384 if (next_ip && IS_MOV_SP_FP (insn_word))
385 {
386 ip = next_ip;
387 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
388 have_fp = 1;
389 }
390
391 /* Skip over any stack adjustment, happens either with a number of
392 sub#2,sp or a mov #x,r5 sub r5,sp */
393
394 if (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word)))
395 {
396 while (next_ip && (IS_SUB2_SP (insn_word) || IS_SUB4_SP (insn_word)))
397 {
398 auto_depth += IS_SUB2_SP (insn_word) ? 2 : 4;
399 ip = next_ip;
400 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
401 }
402 }
403 else
404 {
405 if (next_ip && IS_MOVK_R5 (insn_word))
406 {
407 ip = next_ip;
408 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
409 auto_depth += insn_word;
410
411 next_ip = h8300_next_prologue_insn (next_ip, limit, &insn_word);
412 auto_depth += insn_word;
413 }
414 if (next_ip && IS_SUBL_SP (insn_word))
415 {
416 ip = next_ip;
417 auto_depth += read_memory_unsigned_integer (ip, 4);
418 ip += 4;
419
420 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
421 }
422 }
423
424 /* Now examine the push insns to determine where everything lives
425 on the stack. */
426 while (1)
427 {
428 adjust = 0;
429 if (!next_ip)
430 break;
431
432 if (insn_word == 0x0100)
433 {
434 ip = next_ip;
435 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
436 adjust = 2;
437 }
438
439 if (IS_PUSH (insn_word))
440 {
441 auto_depth += 2 + adjust;
442 fsr[insn_word & 0x7] = after_prolog_fp - auto_depth;
443 ip = next_ip;
444 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
445 continue;
446 }
447
448 /* Now check for push multiple insns. */
449 if (insn_word == 0x0110 || insn_word == 0x0120 || insn_word == 0x0130)
450 {
451 int count = ((insn_word >> 4) & 0xf) + 1;
452 int start, i;
453
454 ip = next_ip;
455 next_ip = h8300_next_prologue_insn (ip, limit, &insn_word);
456 start = insn_word & 0x7;
457
458 for (i = start; i < start + count; i++)
459 {
460 auto_depth += 4;
461 fsr[i] = after_prolog_fp - auto_depth;
462 }
463 }
464 break;
465 }
466
467 /* The PC is at a known place */
468 get_frame_extra_info (fi)->from_pc =
469 read_memory_unsigned_integer (after_prolog_fp + BINWORD, BINWORD);
470
471 /* Rememeber any others too */
472 in_frame[E_PC_REGNUM] = 0;
473
474 if (have_fp)
475 /* We keep the old FP in the SP spot */
476 fsr[E_SP_REGNUM] = read_memory_unsigned_integer (fsr[E_FP_REGNUM],
477 BINWORD);
478 else
479 fsr[E_SP_REGNUM] = after_prolog_fp + auto_depth;
480
481 return (ip);
482 }
483
484 static void
485 h8300_frame_init_saved_regs (struct frame_info *fi)
486 {
487 CORE_ADDR func_addr, func_end;
488
489 if (!deprecated_get_frame_saved_regs (fi))
490 {
491 frame_saved_regs_zalloc (fi);
492
493 /* Find the beginning of this function, so we can analyze its
494 prologue. */
495 if (find_pc_partial_function (get_frame_pc (fi), NULL,
496 &func_addr, &func_end))
497 {
498 struct symtab_and_line sal = find_pc_line (func_addr, 0);
499 CORE_ADDR limit = (sal.end && sal.end < get_frame_pc (fi))
500 ? sal.end : get_frame_pc (fi);
501 /* This will fill in fields in fi. */
502 h8300_examine_prologue (func_addr, limit, get_frame_base (fi),
503 deprecated_get_frame_saved_regs (fi), fi);
504 }
505 /* Else we're out of luck (can't debug completely stripped code).
506 FIXME. */
507 }
508 }
509
510 /* Given a GDB frame, determine the address of the calling function's
511 frame. This will be used to create a new GDB frame struct, and
512 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
513 will be called for the new frame.
514
515 For us, the frame address is its stack pointer value, so we look up
516 the function prologue to determine the caller's sp value, and
517 return it. */
518
519 static CORE_ADDR
520 h8300_frame_chain (struct frame_info *thisframe)
521 {
522 if (deprecated_pc_in_call_dummy (get_frame_pc (thisframe)))
523 { /* initialize the from_pc now */
524 get_frame_extra_info (thisframe)->from_pc =
525 deprecated_read_register_dummy (get_frame_pc (thisframe),
526 get_frame_base (thisframe),
527 E_PC_REGNUM);
528 return get_frame_base (thisframe);
529 }
530 return deprecated_get_frame_saved_regs (thisframe)[E_SP_REGNUM];
531 }
532
533 /* Return the saved PC from this frame.
534
535 If the frame has a memory copy of SRP_REGNUM, use that. If not,
536 just use the register SRP_REGNUM itself. */
537
538 static CORE_ADDR
539 h8300_frame_saved_pc (struct frame_info *frame)
540 {
541 if (deprecated_pc_in_call_dummy (get_frame_pc (frame)))
542 return deprecated_read_register_dummy (get_frame_pc (frame),
543 get_frame_base (frame),
544 E_PC_REGNUM);
545 else
546 return get_frame_extra_info (frame)->from_pc;
547 }
548
549 static void
550 h8300_init_extra_frame_info (int fromleaf, struct frame_info *fi)
551 {
552 if (!get_frame_extra_info (fi))
553 {
554 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
555 get_frame_extra_info (fi)->from_pc = 0;
556
557 if (!get_frame_pc (fi))
558 {
559 if (get_next_frame (fi))
560 deprecated_update_frame_pc_hack (fi, h8300_frame_saved_pc (get_next_frame (fi)));
561 }
562 h8300_frame_init_saved_regs (fi);
563 }
564 }
565
566 /* Function: push_dummy_call
567 Setup the function arguments for calling a function in the inferior.
568 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
569 on the H8/300H.
570
571 There are actually two ABI's here: -mquickcall (the default) and
572 -mno-quickcall. With -mno-quickcall, all arguments are passed on
573 the stack after the return address, word-aligned. With
574 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
575 GCC doesn't indicate in the object file which ABI was used to
576 compile it, GDB only supports the default --- -mquickcall.
577
578 Here are the rules for -mquickcall, in detail:
579
580 Each argument, whether scalar or aggregate, is padded to occupy a
581 whole number of words. Arguments smaller than a word are padded at
582 the most significant end; those larger than a word are padded at
583 the least significant end.
584
585 The initial arguments are passed in r0 -- r2. Earlier arguments go in
586 lower-numbered registers. Multi-word arguments are passed in
587 consecutive registers, with the most significant end in the
588 lower-numbered register.
589
590 If an argument doesn't fit entirely in the remaining registers, it
591 is passed entirely on the stack. Stack arguments begin just after
592 the return address. Once an argument has overflowed onto the stack
593 this way, all subsequent arguments are passed on the stack.
594
595 The above rule has odd consequences. For example, on the h8/300s,
596 if a function takes two longs and an int as arguments:
597 - the first long will be passed in r0/r1,
598 - the second long will be passed entirely on the stack, since it
599 doesn't fit in r2,
600 - and the int will be passed on the stack, even though it could fit
601 in r2.
602
603 A weird exception: if an argument is larger than a word, but not a
604 whole number of words in length (before padding), it is passed on
605 the stack following the rules for stack arguments above, even if
606 there are sufficient registers available to hold it. Stranger
607 still, the argument registers are still `used up' --- even though
608 there's nothing in them.
609
610 So, for example, on the h8/300s, if a function expects a three-byte
611 structure and an int, the structure will go on the stack, and the
612 int will go in r2, not r0.
613
614 If the function returns an aggregate type (struct, union, or class)
615 by value, the caller must allocate space to hold the return value,
616 and pass the callee a pointer to this space as an invisible first
617 argument, in R0.
618
619 For varargs functions, the last fixed argument and all the variable
620 arguments are always passed on the stack. This means that calls to
621 varargs functions don't work properly unless there is a prototype
622 in scope.
623
624 Basically, this ABI is not good, for the following reasons:
625 - You can't call vararg functions properly unless a prototype is in scope.
626 - Structure passing is inconsistent, to no purpose I can see.
627 - It often wastes argument registers, of which there are only three
628 to begin with. */
629
630 static CORE_ADDR
631 h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
632 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
633 struct value **args, CORE_ADDR sp, int struct_return,
634 CORE_ADDR struct_addr)
635 {
636 int stack_alloc = 0, stack_offset = 0;
637 int wordsize = BINWORD;
638 int reg = E_ARG0_REGNUM;
639 int argument;
640
641 /* First, make sure the stack is properly aligned. */
642 sp = align_down (sp, wordsize);
643
644 /* Now make sure there's space on the stack for the arguments. We
645 may over-allocate a little here, but that won't hurt anything. */
646 for (argument = 0; argument < nargs; argument++)
647 stack_alloc += align_up (TYPE_LENGTH (VALUE_TYPE (args[argument])),
648 wordsize);
649 sp -= stack_alloc;
650
651 /* Now load as many arguments as possible into registers, and push
652 the rest onto the stack.
653 If we're returning a structure by value, then we must pass a
654 pointer to the buffer for the return value as an invisible first
655 argument. */
656 if (struct_return)
657 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
658
659 for (argument = 0; argument < nargs; argument++)
660 {
661 struct type *type = VALUE_TYPE (args[argument]);
662 int len = TYPE_LENGTH (type);
663 char *contents = (char *) VALUE_CONTENTS (args[argument]);
664
665 /* Pad the argument appropriately. */
666 int padded_len = align_up (len, wordsize);
667 char *padded = alloca (padded_len);
668
669 memset (padded, 0, padded_len);
670 memcpy (len < wordsize ? padded + padded_len - len : padded,
671 contents, len);
672
673 /* Could the argument fit in the remaining registers? */
674 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
675 {
676 /* Are we going to pass it on the stack anyway, for no good
677 reason? */
678 if (len > wordsize && len % wordsize)
679 {
680 /* I feel so unclean. */
681 write_memory (sp + stack_offset, padded, padded_len);
682 stack_offset += padded_len;
683
684 /* That's right --- even though we passed the argument
685 on the stack, we consume the registers anyway! Love
686 me, love my dog. */
687 reg += padded_len / wordsize;
688 }
689 else
690 {
691 /* Heavens to Betsy --- it's really going in registers!
692 It would be nice if we could use write_register_bytes
693 here, but on the h8/300s, there are gaps between
694 the registers in the register file. */
695 int offset;
696
697 for (offset = 0; offset < padded_len; offset += wordsize)
698 {
699 ULONGEST word = extract_unsigned_integer (padded + offset,
700 wordsize);
701 regcache_cooked_write_unsigned (regcache, reg++, word);
702 }
703 }
704 }
705 else
706 {
707 /* It doesn't fit in registers! Onto the stack it goes. */
708 write_memory (sp + stack_offset, padded, padded_len);
709 stack_offset += padded_len;
710
711 /* Once one argument has spilled onto the stack, all
712 subsequent arguments go on the stack. */
713 reg = E_ARGLAST_REGNUM + 1;
714 }
715 }
716
717 /* Store return address. */
718 sp -= wordsize;
719 write_memory_unsigned_integer (sp, wordsize, bp_addr);
720
721 /* Update stack pointer. */
722 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
723
724 return sp;
725 }
726
727 /* Function: h8300_pop_frame
728 Restore the machine to the state it had before the current frame
729 was created. Usually used either by the "RETURN" command, or by
730 call_function_by_hand after the dummy_frame is finished. */
731
732 static void
733 h8300_pop_frame (void)
734 {
735 unsigned regno;
736 struct frame_info *frame = get_current_frame ();
737
738 if (deprecated_pc_in_call_dummy (get_frame_pc (frame)))
739 {
740 deprecated_pop_dummy_frame ();
741 }
742 else
743 {
744 for (regno = 0; regno < 8; regno++)
745 {
746 /* Don't forget E_SP_REGNUM is a frame_saved_regs struct is the
747 actual value we want, not the address of the value we want. */
748 if (deprecated_get_frame_saved_regs (frame)[regno] && regno != E_SP_REGNUM)
749 write_register (regno,
750 read_memory_integer
751 (deprecated_get_frame_saved_regs (frame)[regno], BINWORD));
752 else if (deprecated_get_frame_saved_regs (frame)[regno] && regno == E_SP_REGNUM)
753 write_register (regno, get_frame_base (frame) + 2 * BINWORD);
754 }
755
756 /* Don't forget to update the PC too! */
757 write_register (E_PC_REGNUM, get_frame_extra_info (frame)->from_pc);
758 }
759 flush_cached_frames ();
760 }
761
762 /* Function: extract_return_value
763 Figure out where in REGBUF the called function has left its return value.
764 Copy that into VALBUF. Be sure to account for CPU type. */
765
766 static void
767 h8300_extract_return_value (struct type *type, struct regcache *regcache,
768 void *valbuf)
769 {
770 int len = TYPE_LENGTH (type);
771 ULONGEST c, addr;
772
773 switch (len)
774 {
775 case 1:
776 case 2:
777 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
778 store_unsigned_integer (valbuf, len, c);
779 break;
780 case 4: /* Needs two registers on plain H8/300 */
781 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
782 store_unsigned_integer (valbuf, 2, c);
783 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
784 store_unsigned_integer ((void*)((char *)valbuf + 2), 2, c);
785 break;
786 case 8: /* long long is now 8 bytes. */
787 if (TYPE_CODE (type) == TYPE_CODE_INT)
788 {
789 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
790 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
791 store_unsigned_integer (valbuf, len, c);
792 }
793 else
794 {
795 error ("I don't know how this 8 byte value is returned.");
796 }
797 break;
798 }
799 }
800
801 static void
802 h8300h_extract_return_value (struct type *type, struct regcache *regcache,
803 void *valbuf)
804 {
805 int len = TYPE_LENGTH (type);
806 ULONGEST c, addr;
807
808 switch (len)
809 {
810 case 1:
811 case 2:
812 case 4:
813 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
814 store_unsigned_integer (valbuf, len, c);
815 break;
816 case 8: /* long long is now 8 bytes. */
817 if (TYPE_CODE (type) == TYPE_CODE_INT)
818 {
819 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
820 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
821 store_unsigned_integer (valbuf, len, c);
822 }
823 else
824 {
825 error ("I don't know how this 8 byte value is returned.");
826 }
827 break;
828 }
829 }
830
831
832 /* Function: store_return_value
833 Place the appropriate value in the appropriate registers.
834 Primarily used by the RETURN command. */
835
836 static void
837 h8300_store_return_value (struct type *type, struct regcache *regcache,
838 const void *valbuf)
839 {
840 int len = TYPE_LENGTH (type);
841 ULONGEST val;
842
843 switch (len)
844 {
845 case 1:
846 case 2: /* short... */
847 val = extract_unsigned_integer (valbuf, len);
848 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
849 break;
850 case 4: /* long, float */
851 val = extract_unsigned_integer (valbuf, len);
852 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
853 (val >> 16) &0xffff);
854 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
855 break;
856 case 8: /* long long, double and long double are all defined
857 as 4 byte types so far so this shouldn't happen. */
858 error ("I don't know how to return an 8 byte value.");
859 break;
860 }
861 }
862
863 static void
864 h8300h_store_return_value (struct type *type, struct regcache *regcache,
865 const void *valbuf)
866 {
867 int len = TYPE_LENGTH (type);
868 ULONGEST val;
869
870 switch (len)
871 {
872 case 1:
873 case 2:
874 case 4: /* long, float */
875 val = extract_unsigned_integer (valbuf, len);
876 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
877 break;
878 case 8: /* long long, double and long double are all defined
879 as 4 byte types so far so this shouldn't happen. */
880 error ("I don't know how to return an 8 byte value.");
881 break;
882 }
883 }
884
885 static struct cmd_list_element *setmachinelist;
886
887 static const char *
888 h8300_register_name (int regno)
889 {
890 /* The register names change depending on which h8300 processor
891 type is selected. */
892 static char *register_names[] = {
893 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
894 "sp", "","pc","cycles", "tick", "inst",
895 "ccr", /* pseudo register */
896 };
897 if (regno < 0
898 || regno >= (sizeof (register_names) / sizeof (*register_names)))
899 internal_error (__FILE__, __LINE__,
900 "h8300_register_name: illegal register number %d", regno);
901 else
902 return register_names[regno];
903 }
904
905 static const char *
906 h8300s_register_name (int regno)
907 {
908 static char *register_names[] = {
909 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
910 "sp", "", "pc", "cycles", "", "tick", "inst",
911 "mach", "macl",
912 "ccr", "exr" /* pseudo registers */
913 };
914 if (regno < 0
915 || regno >= (sizeof (register_names) / sizeof (*register_names)))
916 internal_error (__FILE__, __LINE__,
917 "h8300s_register_name: illegal register number %d", regno);
918 else
919 return register_names[regno];
920 }
921
922 static const char *
923 h8300sx_register_name (int regno)
924 {
925 static char *register_names[] = {
926 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
927 "sp", "", "pc", "cycles", "", "tick", "inst",
928 "mach", "macl", "sbr", "vbr",
929 "ccr", "exr" /* pseudo registers */
930 };
931 if (regno < 0
932 || regno >= (sizeof (register_names) / sizeof (*register_names)))
933 internal_error (__FILE__, __LINE__,
934 "h8300sx_register_name: illegal register number %d", regno);
935 else
936 return register_names[regno];
937 }
938
939 static void
940 h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
941 struct frame_info *frame, int regno)
942 {
943 LONGEST rval;
944 const char *name = gdbarch_register_name (gdbarch, regno);
945
946 if (!name || !*name)
947 return;
948
949 rval = get_frame_register_signed (frame, regno);
950
951 fprintf_filtered (file, "%-14s ", name);
952 if (regno == E_PSEUDO_CCR_REGNUM ||
953 (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch)))
954 {
955 fprintf_filtered (file, "0x%02x ", (unsigned char)rval);
956 print_longest (file, 'u', 1, rval);
957 }
958 else
959 {
960 fprintf_filtered (file, "0x%s ", phex ((ULONGEST)rval, BINWORD));
961 print_longest (file, 'd', 1, rval);
962 }
963 if (regno == E_PSEUDO_CCR_REGNUM)
964 {
965 /* CCR register */
966 int C, Z, N, V;
967 unsigned char l = rval & 0xff;
968 fprintf_filtered (file, "\t");
969 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
970 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
971 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
972 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
973 N = (l & 0x8) != 0;
974 Z = (l & 0x4) != 0;
975 V = (l & 0x2) != 0;
976 C = (l & 0x1) != 0;
977 fprintf_filtered (file, "N-%d ", N);
978 fprintf_filtered (file, "Z-%d ", Z);
979 fprintf_filtered (file, "V-%d ", V);
980 fprintf_filtered (file, "C-%d ", C);
981 if ((C | Z) == 0)
982 fprintf_filtered (file, "u> ");
983 if ((C | Z) == 1)
984 fprintf_filtered (file, "u<= ");
985 if ((C == 0))
986 fprintf_filtered (file, "u>= ");
987 if (C == 1)
988 fprintf_filtered (file, "u< ");
989 if (Z == 0)
990 fprintf_filtered (file, "!= ");
991 if (Z == 1)
992 fprintf_filtered (file, "== ");
993 if ((N ^ V) == 0)
994 fprintf_filtered (file, ">= ");
995 if ((N ^ V) == 1)
996 fprintf_filtered (file, "< ");
997 if ((Z | (N ^ V)) == 0)
998 fprintf_filtered (file, "> ");
999 if ((Z | (N ^ V)) == 1)
1000 fprintf_filtered (file, "<= ");
1001 }
1002 else if (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch))
1003 {
1004 /* EXR register */
1005 unsigned char l = rval & 0xff;
1006 fprintf_filtered (file, "\t");
1007 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1008 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1009 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1010 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1011 }
1012 fprintf_filtered (file, "\n");
1013 }
1014
1015 static void
1016 h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1017 struct frame_info *frame, int regno, int cpregs)
1018 {
1019 if (regno < 0)
1020 {
1021 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1022 h8300_print_register (gdbarch, file, frame, regno);
1023 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1024 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
1025 if (is_h8300smode (current_gdbarch))
1026 {
1027 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1028 if (is_h8300sxmode (current_gdbarch))
1029 {
1030 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1031 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1032 }
1033 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1034 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1035 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1036 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1037 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1038 }
1039 else
1040 {
1041 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1042 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1043 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1044 }
1045 }
1046 else
1047 {
1048 if (regno == E_CCR_REGNUM)
1049 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1050 else if (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch))
1051 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1052 else
1053 h8300_print_register (gdbarch, file, frame, regno);
1054 }
1055 }
1056
1057 static CORE_ADDR
1058 h8300_saved_pc_after_call (struct frame_info *ignore)
1059 {
1060 return read_memory_unsigned_integer (read_register (E_SP_REGNUM), BINWORD);
1061 }
1062
1063 static struct type *
1064 h8300_register_type (struct gdbarch *gdbarch, int regno)
1065 {
1066 if (regno < 0 || regno >= NUM_REGS + NUM_PSEUDO_REGS)
1067 internal_error (__FILE__, __LINE__,
1068 "h8300_register_type: illegal register number %d",
1069 regno);
1070 else
1071 {
1072 switch (regno)
1073 {
1074 case E_PC_REGNUM:
1075 return builtin_type_void_func_ptr;
1076 case E_SP_REGNUM:
1077 case E_FP_REGNUM:
1078 return builtin_type_void_data_ptr;
1079 default:
1080 if (regno == E_PSEUDO_CCR_REGNUM)
1081 return builtin_type_uint8;
1082 else if (regno == E_PSEUDO_EXR_REGNUM)
1083 return builtin_type_uint8;
1084 else if (is_h8300hmode (current_gdbarch))
1085 return builtin_type_int32;
1086 else
1087 return builtin_type_int16;
1088 }
1089 }
1090 }
1091
1092 static void
1093 h8300_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
1094 int regno, void *buf)
1095 {
1096 if (regno == E_PSEUDO_CCR_REGNUM)
1097 regcache_raw_read (regcache, E_CCR_REGNUM, buf);
1098 else if (regno == E_PSEUDO_EXR_REGNUM)
1099 regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1100 else
1101 regcache_raw_read (regcache, regno, buf);
1102 }
1103
1104 static void
1105 h8300_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1106 int regno, const void *buf)
1107 {
1108 if (regno == E_PSEUDO_CCR_REGNUM)
1109 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
1110 else if (regno == E_PSEUDO_EXR_REGNUM)
1111 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1112 else
1113 regcache_raw_write (regcache, regno, buf);
1114 }
1115
1116 static int
1117 h8300_dbg_reg_to_regnum (int regno)
1118 {
1119 if (regno == E_CCR_REGNUM)
1120 return E_PSEUDO_CCR_REGNUM;
1121 return regno;
1122 }
1123
1124 static int
1125 h8300s_dbg_reg_to_regnum (int regno)
1126 {
1127 if (regno == E_CCR_REGNUM)
1128 return E_PSEUDO_CCR_REGNUM;
1129 if (regno == E_EXR_REGNUM)
1130 return E_PSEUDO_EXR_REGNUM;
1131 return regno;
1132 }
1133
1134 static CORE_ADDR
1135 h8300_extract_struct_value_address (struct regcache *regcache)
1136 {
1137 ULONGEST addr;
1138 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
1139 return addr;
1140 }
1141
1142 const static unsigned char *
1143 h8300_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
1144 {
1145 /*static unsigned char breakpoint[] = { 0x7A, 0xFF };*/ /* ??? */
1146 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1147
1148 *lenptr = sizeof (breakpoint);
1149 return breakpoint;
1150 }
1151
1152 static CORE_ADDR
1153 h8300_push_dummy_code (struct gdbarch *gdbarch,
1154 CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc,
1155 struct value **args, int nargs,
1156 struct type *value_type,
1157 CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
1158 {
1159 /* Allocate space sufficient for a breakpoint. */
1160 sp = (sp - 2) & ~1;
1161 /* Store the address of that breakpoint */
1162 *bp_addr = sp;
1163 /* h8300 always starts the call at the callee's entry point. */
1164 *real_pc = funaddr;
1165 return sp;
1166 }
1167
1168 static void
1169 h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1170 struct frame_info *frame, const char *args)
1171 {
1172 fprintf_filtered (file, "\
1173 No floating-point info available for this processor.\n");
1174 }
1175
1176 static struct gdbarch *
1177 h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1178 {
1179 struct gdbarch_tdep *tdep = NULL;
1180 struct gdbarch *gdbarch;
1181
1182 arches = gdbarch_list_lookup_by_info (arches, &info);
1183 if (arches != NULL)
1184 return arches->gdbarch;
1185
1186 #if 0
1187 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1188 #endif
1189
1190 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1191 return NULL;
1192
1193 gdbarch = gdbarch_alloc (&info, 0);
1194
1195 switch (info.bfd_arch_info->mach)
1196 {
1197 case bfd_mach_h8300:
1198 set_gdbarch_num_regs (gdbarch, 13);
1199 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1200 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1201 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1202 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1203 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1204 set_gdbarch_register_name (gdbarch, h8300_register_name);
1205 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1206 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1207 set_gdbarch_extract_return_value (gdbarch, h8300_extract_return_value);
1208 set_gdbarch_store_return_value (gdbarch, h8300_store_return_value);
1209 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
1210 break;
1211 case bfd_mach_h8300h:
1212 case bfd_mach_h8300hn:
1213 set_gdbarch_num_regs (gdbarch, 13);
1214 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1215 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1216 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1217 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1218 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1219 set_gdbarch_register_name (gdbarch, h8300_register_name);
1220 if(info.bfd_arch_info->mach != bfd_mach_h8300hn)
1221 {
1222 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1223 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1224 }
1225 else
1226 {
1227 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1228 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1229 }
1230 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1231 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
1232 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
1233 break;
1234 case bfd_mach_h8300s:
1235 case bfd_mach_h8300sn:
1236 set_gdbarch_num_regs (gdbarch, 16);
1237 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1238 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1239 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1240 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1241 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1242 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1243 if(info.bfd_arch_info->mach != bfd_mach_h8300sn)
1244 {
1245 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1246 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1247 }
1248 else
1249 {
1250 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1251 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1252 }
1253 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1254 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
1255 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1256 break;
1257 case bfd_mach_h8300sx:
1258 case bfd_mach_h8300sxn:
1259 set_gdbarch_num_regs (gdbarch, 18);
1260 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1261 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1262 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1263 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1264 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1265 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1266 if(info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1267 {
1268 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1269 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1270 }
1271 else
1272 {
1273 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1274 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1275 }
1276 set_gdbarch_extract_return_value (gdbarch, h8300h_extract_return_value);
1277 set_gdbarch_store_return_value (gdbarch, h8300h_store_return_value);
1278 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1279 break;
1280 }
1281
1282 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1283 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1284
1285 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1286 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1287 set_gdbarch_deprecated_init_frame_pc (gdbarch, deprecated_init_frame_pc_default);
1288
1289 /*
1290 * Basic register fields and methods.
1291 */
1292
1293 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1294 set_gdbarch_deprecated_fp_regnum (gdbarch, E_FP_REGNUM);
1295 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1296 set_gdbarch_register_type (gdbarch, h8300_register_type);
1297 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1298 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1299
1300 /*
1301 * Frame Info
1302 */
1303 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1304
1305 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch,
1306 h8300_frame_init_saved_regs);
1307 set_gdbarch_deprecated_init_extra_frame_info (gdbarch,
1308 h8300_init_extra_frame_info);
1309 set_gdbarch_deprecated_frame_chain (gdbarch, h8300_frame_chain);
1310 set_gdbarch_deprecated_saved_pc_after_call (gdbarch,
1311 h8300_saved_pc_after_call);
1312 set_gdbarch_deprecated_frame_saved_pc (gdbarch, h8300_frame_saved_pc);
1313 set_gdbarch_deprecated_pop_frame (gdbarch, h8300_pop_frame);
1314
1315 /*
1316 * Miscelany
1317 */
1318 /* Stack grows up. */
1319 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1320
1321 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, h8300_extract_struct_value_address);
1322 set_gdbarch_deprecated_use_struct_convention (gdbarch, always_use_struct_convention);
1323 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
1324 set_gdbarch_push_dummy_code (gdbarch, h8300_push_dummy_code);
1325 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1326
1327 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1328 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1329 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1330 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1331 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1332
1333 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1334
1335 /* Char is unsigned. */
1336 set_gdbarch_char_signed (gdbarch, 0);
1337
1338 return gdbarch;
1339 }
1340
1341 extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1342
1343 void
1344 _initialize_h8300_tdep (void)
1345 {
1346 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1347 }
1348
1349 static int
1350 is_h8300hmode (struct gdbarch *gdbarch)
1351 {
1352 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1353 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1354 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1355 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1356 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1357 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1358 }
1359
1360 static int
1361 is_h8300smode (struct gdbarch *gdbarch)
1362 {
1363 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1364 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1365 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1366 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1367 }
1368
1369 static int
1370 is_h8300sxmode (struct gdbarch *gdbarch)
1371 {
1372 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1373 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1374 }
1375
1376 static int
1377 is_h8300_normal_mode (struct gdbarch *gdbarch)
1378 {
1379 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1380 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1381 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1382 }
1383
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