1 /* Native-dependent code for the i386.
3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "breakpoint.h"
26 #include "gdb_assert.h"
29 /* Support for hardware watchpoints and breakpoints using the i386
32 This provides several functions for inserting and removing
33 hardware-assisted breakpoints and watchpoints, testing if one or
34 more of the watchpoints triggered and at what address, checking
35 whether a given region can be watched, etc.
37 The functions below implement debug registers sharing by reference
38 counts, and allow to watch regions up to 16 bytes long. */
40 /* Whether or not to print the mirrored debug registers. */
41 static int debug_hw_points
;
43 /* Function used for printing mirrored debug registers. */
44 #define debug_printf(fmt, args...) \
45 fprintf_unfiltered (gdb_stdlog, fmt, ##args);
47 /* Low-level function vector. */
48 struct i386_dr_low_type i386_dr_low
;
50 /* Support for 8-byte wide hw watchpoints. */
51 #define TARGET_HAS_DR_LEN_8 (i386_get_debug_register_length () == 8)
53 /* DR7 Debug Control register fields. */
55 /* How many bits to skip in DR7 to get to R/W and LEN fields. */
56 #define DR_CONTROL_SHIFT 16
57 /* How many bits in DR7 per R/W and LEN field for each watchpoint. */
58 #define DR_CONTROL_SIZE 4
60 /* Watchpoint/breakpoint read/write fields in DR7. */
61 #define DR_RW_EXECUTE (0x0) /* Break on instruction execution. */
62 #define DR_RW_WRITE (0x1) /* Break on data writes. */
63 #define DR_RW_READ (0x3) /* Break on data reads or writes. */
65 /* This is here for completeness. No platform supports this
66 functionality yet (as of March 2001). Note that the DE flag in the
67 CR4 register needs to be set to support this. */
69 #define DR_RW_IORW (0x2) /* Break on I/O reads or writes. */
72 /* Watchpoint/breakpoint length fields in DR7. The 2-bit left shift
73 is so we could OR this with the read/write field defined above. */
74 #define DR_LEN_1 (0x0 << 2) /* 1-byte region watch or breakpoint. */
75 #define DR_LEN_2 (0x1 << 2) /* 2-byte region watch. */
76 #define DR_LEN_4 (0x3 << 2) /* 4-byte region watch. */
77 #define DR_LEN_8 (0x2 << 2) /* 8-byte region watch (AMD64). */
79 /* Local and Global Enable flags in DR7.
81 When the Local Enable flag is set, the breakpoint/watchpoint is
82 enabled only for the current task; the processor automatically
83 clears this flag on every task switch. When the Global Enable flag
84 is set, the breakpoint/watchpoint is enabled for all tasks; the
85 processor never clears this flag.
87 Currently, all watchpoint are locally enabled. If you need to
88 enable them globally, read the comment which pertains to this in
89 i386_dr_insert_aligned_watchpoint below. */
90 #define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit. */
91 #define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit. */
92 #define DR_ENABLE_SIZE 2 /* Two enable bits per debug register. */
94 /* Local and global exact breakpoint enable flags (a.k.a. slowdown
95 flags). These are only required on i386, to allow detection of the
96 exact instruction which caused a watchpoint to break; i486 and
97 later processors do that automatically. We set these flags for
98 backwards compatibility. */
99 #define DR_LOCAL_SLOWDOWN (0x100)
100 #define DR_GLOBAL_SLOWDOWN (0x200)
102 /* Fields reserved by Intel. This includes the GD (General Detect
103 Enable) flag, which causes a debug exception to be generated when a
104 MOV instruction accesses one of the debug registers.
106 FIXME: My Intel manual says we should use 0xF800, not 0xFC00. */
107 #define DR_CONTROL_RESERVED (0xFC00)
109 /* Auxiliary helper macros. */
111 /* A value that masks all fields in DR7 that are reserved by Intel. */
112 #define I386_DR_CONTROL_MASK (~DR_CONTROL_RESERVED)
114 /* The I'th debug register is vacant if its Local and Global Enable
115 bits are reset in the Debug Control register. */
116 #define I386_DR_VACANT(state, i) \
117 (((state)->dr_control_mirror & (3 << (DR_ENABLE_SIZE * (i)))) == 0)
119 /* Locally enable the break/watchpoint in the I'th debug register. */
120 #define I386_DR_LOCAL_ENABLE(state, i) \
122 (state)->dr_control_mirror |= \
123 (1 << (DR_LOCAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))); \
126 /* Globally enable the break/watchpoint in the I'th debug register. */
127 #define I386_DR_GLOBAL_ENABLE(state, i) \
129 (state)->dr_control_mirror |= \
130 (1 << (DR_GLOBAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))); \
133 /* Disable the break/watchpoint in the I'th debug register. */
134 #define I386_DR_DISABLE(state, i) \
136 (state)->dr_control_mirror &= \
137 ~(3 << (DR_ENABLE_SIZE * (i))); \
140 /* Set in DR7 the RW and LEN fields for the I'th debug register. */
141 #define I386_DR_SET_RW_LEN(state, i, rwlen) \
143 (state)->dr_control_mirror &= \
144 ~(0x0f << (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))); \
145 (state)->dr_control_mirror |= \
146 ((rwlen) << (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))); \
149 /* Get from DR7 the RW and LEN fields for the I'th debug register. */
150 #define I386_DR_GET_RW_LEN(dr7, i) \
152 >> (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))) & 0x0f)
154 /* Did the watchpoint whose address is in the I'th register break? */
155 #define I386_DR_WATCH_HIT(dr6, i) ((dr6) & (1 << (i)))
157 /* Per-process data. We don't bind this to a per-inferior registry
158 because of targets like x86 GNU/Linux that need to keep track of
159 processes that aren't bound to any inferior (e.g., fork children,
162 struct i386_process_info
165 struct i386_process_info
*next
;
167 /* The process identifier. */
170 /* Copy of i386 hardware debug registers. */
171 struct i386_debug_reg_state state
;
174 static struct i386_process_info
*i386_process_list
= NULL
;
176 /* Find process data for process PID. */
178 static struct i386_process_info
*
179 i386_find_process_pid (pid_t pid
)
181 struct i386_process_info
*proc
;
183 for (proc
= i386_process_list
; proc
; proc
= proc
->next
)
184 if (proc
->pid
== pid
)
190 /* Add process data for process PID. Returns newly allocated info
193 static struct i386_process_info
*
194 i386_add_process (pid_t pid
)
196 struct i386_process_info
*proc
;
198 proc
= xcalloc (1, sizeof (*proc
));
201 proc
->next
= i386_process_list
;
202 i386_process_list
= proc
;
207 /* Get data specific info for process PID, creating it if necessary.
208 Never returns NULL. */
210 static struct i386_process_info
*
211 i386_process_info_get (pid_t pid
)
213 struct i386_process_info
*proc
;
215 proc
= i386_find_process_pid (pid
);
217 proc
= i386_add_process (pid
);
222 /* Get debug registers state for process PID. */
224 struct i386_debug_reg_state
*
225 i386_debug_reg_state (pid_t pid
)
227 return &i386_process_info_get (pid
)->state
;
230 /* See declaration in i386-nat.h. */
233 i386_forget_process (pid_t pid
)
235 struct i386_process_info
*proc
, **proc_link
;
237 proc
= i386_process_list
;
238 proc_link
= &i386_process_list
;
242 if (proc
->pid
== pid
)
244 *proc_link
= proc
->next
;
250 proc_link
= &proc
->next
;
255 /* Types of operations supported by i386_handle_nonaligned_watchpoint. */
256 typedef enum { WP_INSERT
, WP_REMOVE
, WP_COUNT
} i386_wp_op_t
;
258 /* Implementation. */
260 /* Clear the reference counts and forget everything we knew about the
264 i386_cleanup_dregs (void)
266 /* Starting from scratch has the same effect. */
267 i386_forget_process (ptid_get_pid (inferior_ptid
));
270 /* Print the values of the mirrored debug registers. */
273 i386_dr_show (struct i386_debug_reg_state
*state
,
274 const char *func
, CORE_ADDR addr
,
275 int len
, enum target_hw_bp_type type
)
279 debug_printf ("%s", func
);
281 debug_printf (" (addr=%s, len=%d, type=%s)",
283 type
== hw_write
? "data-write"
284 : (type
== hw_read
? "data-read"
285 : (type
== hw_access
? "data-read/write"
286 : (type
== hw_execute
? "instruction-execute"
287 /* FIXME: if/when I/O read/write
288 watchpoints are supported, add them
291 debug_printf (":\n");
292 debug_printf ("\tCONTROL (DR7): %s STATUS (DR6): %s\n",
293 phex (state
->dr_control_mirror
, 8),
294 phex (state
->dr_status_mirror
, 8));
295 ALL_DEBUG_REGISTERS (i
)
298 \tDR%d: addr=0x%s, ref.count=%d DR%d: addr=0x%s, ref.count=%d\n",
299 i
, phex (state
->dr_mirror
[i
],
300 i386_get_debug_register_length ()),
301 state
->dr_ref_count
[i
],
302 i
+ 1, phex (state
->dr_mirror
[i
+ 1],
303 i386_get_debug_register_length ()),
304 state
->dr_ref_count
[i
+ 1]);
309 /* Return the value of a 4-bit field for DR7 suitable for watching a
310 region of LEN bytes for accesses of type TYPE. LEN is assumed to
311 have the value of 1, 2, or 4. */
314 i386_dr_length_and_rw_bits (int len
, enum target_hw_bp_type type
)
327 internal_error (__FILE__
, __LINE__
,
328 _("The i386 doesn't support "
329 "data-read watchpoints.\n"));
334 /* Not yet supported. */
340 internal_error (__FILE__
, __LINE__
, _("\
341 Invalid hardware breakpoint type %d in i386_dr_length_and_rw_bits.\n"),
348 return (DR_LEN_1
| rw
);
350 return (DR_LEN_2
| rw
);
352 return (DR_LEN_4
| rw
);
354 if (TARGET_HAS_DR_LEN_8
)
355 return (DR_LEN_8
| rw
);
356 /* ELSE FALL THROUGH */
358 internal_error (__FILE__
, __LINE__
, _("\
359 Invalid hardware breakpoint length %d in i386_dr_length_and_rw_bits.\n"), len
);
363 /* Insert a watchpoint at address ADDR, which is assumed to be aligned
364 according to the length of the region to watch. LEN_RW_BITS is the
365 value of the bits from DR7 which describes the length and access
366 type of the region to be watched by this watchpoint. Return 0 on
367 success, -1 on failure. */
370 i386_dr_insert_aligned_watchpoint (struct i386_debug_reg_state
*state
,
371 CORE_ADDR addr
, unsigned len_rw_bits
)
375 if (!i386_dr_low_can_set_addr () || !i386_dr_low_can_set_control ())
378 /* First, look for an occupied debug register with the same address
379 and the same RW and LEN definitions. If we find one, we can
380 reuse it for this watchpoint as well (and save a register). */
381 ALL_DEBUG_REGISTERS (i
)
383 if (!I386_DR_VACANT (state
, i
)
384 && state
->dr_mirror
[i
] == addr
385 && I386_DR_GET_RW_LEN (state
->dr_control_mirror
, i
) == len_rw_bits
)
387 state
->dr_ref_count
[i
]++;
392 /* Next, look for a vacant debug register. */
393 ALL_DEBUG_REGISTERS (i
)
395 if (I386_DR_VACANT (state
, i
))
399 /* No more debug registers! */
403 /* Now set up the register I to watch our region. */
405 /* Record the info in our local mirrored array. */
406 state
->dr_mirror
[i
] = addr
;
407 state
->dr_ref_count
[i
] = 1;
408 I386_DR_SET_RW_LEN (state
, i
, len_rw_bits
);
409 /* Note: we only enable the watchpoint locally, i.e. in the current
410 task. Currently, no i386 target allows or supports global
411 watchpoints; however, if any target would want that in the
412 future, GDB should probably provide a command to control whether
413 to enable watchpoints globally or locally, and the code below
414 should use global or local enable and slow-down flags as
416 I386_DR_LOCAL_ENABLE (state
, i
);
417 state
->dr_control_mirror
|= DR_LOCAL_SLOWDOWN
;
418 state
->dr_control_mirror
&= I386_DR_CONTROL_MASK
;
423 /* Remove a watchpoint at address ADDR, which is assumed to be aligned
424 according to the length of the region to watch. LEN_RW_BITS is the
425 value of the bits from DR7 which describes the length and access
426 type of the region watched by this watchpoint. Return 0 on
427 success, -1 on failure. */
430 i386_dr_remove_aligned_watchpoint (struct i386_debug_reg_state
*state
,
431 CORE_ADDR addr
, unsigned len_rw_bits
)
435 ALL_DEBUG_REGISTERS (i
)
437 if (!I386_DR_VACANT (state
, i
)
438 && state
->dr_mirror
[i
] == addr
439 && I386_DR_GET_RW_LEN (state
->dr_control_mirror
, i
) == len_rw_bits
)
441 if (--state
->dr_ref_count
[i
] == 0) /* No longer in use? */
443 /* Reset our mirror. */
444 state
->dr_mirror
[i
] = 0;
445 I386_DR_DISABLE (state
, i
);
454 /* Insert or remove a (possibly non-aligned) watchpoint, or count the
455 number of debug registers required to watch a region at address
456 ADDR whose length is LEN for accesses of type TYPE. Return 0 on
457 successful insertion or removal, a positive number when queried
458 about the number of registers, or -1 on failure. If WHAT is not a
459 valid value, bombs through internal_error. */
462 i386_handle_nonaligned_watchpoint (struct i386_debug_reg_state
*state
,
463 i386_wp_op_t what
, CORE_ADDR addr
, int len
,
464 enum target_hw_bp_type type
)
467 int max_wp_len
= TARGET_HAS_DR_LEN_8
? 8 : 4;
469 static const int size_try_array
[8][8] =
471 {1, 1, 1, 1, 1, 1, 1, 1}, /* Trying size one. */
472 {2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size two. */
473 {2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size three. */
474 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size four. */
475 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size five. */
476 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size six. */
477 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size seven. */
478 {8, 1, 2, 1, 4, 1, 2, 1}, /* Trying size eight. */
483 int align
= addr
% max_wp_len
;
484 /* Four (eight on AMD64) is the maximum length a debug register
486 int try = (len
> max_wp_len
? (max_wp_len
- 1) : len
- 1);
487 int size
= size_try_array
[try][align
];
489 if (what
== WP_COUNT
)
491 /* size_try_array[] is defined such that each iteration
492 through the loop is guaranteed to produce an address and a
493 size that can be watched with a single debug register.
494 Thus, for counting the registers required to watch a
495 region, we simply need to increment the count on each
501 unsigned len_rw
= i386_dr_length_and_rw_bits (size
, type
);
503 if (what
== WP_INSERT
)
504 retval
= i386_dr_insert_aligned_watchpoint (state
, addr
, len_rw
);
505 else if (what
== WP_REMOVE
)
506 retval
= i386_dr_remove_aligned_watchpoint (state
, addr
, len_rw
);
508 internal_error (__FILE__
, __LINE__
, _("\
509 Invalid value %d of operation in i386_handle_nonaligned_watchpoint.\n"),
522 /* Update the inferior debug registers state, in STATE, with the
523 new debug registers state, in NEW_STATE. */
526 i386_dr_update_inferior_debug_regs (struct i386_debug_reg_state
*state
,
527 struct i386_debug_reg_state
*new_state
)
531 ALL_DEBUG_REGISTERS (i
)
533 if (I386_DR_VACANT (new_state
, i
) != I386_DR_VACANT (state
, i
))
534 i386_dr_low_set_addr (new_state
, i
);
536 gdb_assert (new_state
->dr_mirror
[i
] == state
->dr_mirror
[i
]);
539 if (new_state
->dr_control_mirror
!= state
->dr_control_mirror
)
540 i386_dr_low_set_control (new_state
);
545 /* Insert a watchpoint to watch a memory region which starts at
546 address ADDR and whose length is LEN bytes. Watch memory accesses
547 of the type TYPE. Return 0 on success, -1 on failure. */
550 i386_insert_watchpoint (struct target_ops
*self
,
551 CORE_ADDR addr
, int len
, int type
,
552 struct expression
*cond
)
554 struct i386_debug_reg_state
*state
555 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
557 /* Work on a local copy of the debug registers, and on success,
558 commit the change back to the inferior. */
559 struct i386_debug_reg_state local_state
= *state
;
562 return 1; /* unsupported */
564 if (((len
!= 1 && len
!= 2 && len
!= 4)
565 && !(TARGET_HAS_DR_LEN_8
&& len
== 8))
568 retval
= i386_handle_nonaligned_watchpoint (&local_state
,
574 unsigned len_rw
= i386_dr_length_and_rw_bits (len
, type
);
576 retval
= i386_dr_insert_aligned_watchpoint (&local_state
,
581 i386_dr_update_inferior_debug_regs (state
, &local_state
);
584 i386_dr_show (state
, "insert_watchpoint", addr
, len
, type
);
589 /* Remove a watchpoint that watched the memory region which starts at
590 address ADDR, whose length is LEN bytes, and for accesses of the
591 type TYPE. Return 0 on success, -1 on failure. */
593 i386_remove_watchpoint (struct target_ops
*self
,
594 CORE_ADDR addr
, int len
, int type
,
595 struct expression
*cond
)
597 struct i386_debug_reg_state
*state
598 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
600 /* Work on a local copy of the debug registers, and on success,
601 commit the change back to the inferior. */
602 struct i386_debug_reg_state local_state
= *state
;
604 if (((len
!= 1 && len
!= 2 && len
!= 4)
605 && !(TARGET_HAS_DR_LEN_8
&& len
== 8))
608 retval
= i386_handle_nonaligned_watchpoint (&local_state
,
614 unsigned len_rw
= i386_dr_length_and_rw_bits (len
, type
);
616 retval
= i386_dr_remove_aligned_watchpoint (&local_state
,
621 i386_dr_update_inferior_debug_regs (state
, &local_state
);
624 i386_dr_show (state
, "remove_watchpoint", addr
, len
, type
);
629 /* Return non-zero if we can watch a memory region that starts at
630 address ADDR and whose length is LEN bytes. */
633 i386_region_ok_for_watchpoint (struct target_ops
*self
,
634 CORE_ADDR addr
, int len
)
636 struct i386_debug_reg_state
*state
637 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
640 /* Compute how many aligned watchpoints we would need to cover this
642 nregs
= i386_handle_nonaligned_watchpoint (state
, WP_COUNT
,
643 addr
, len
, hw_write
);
644 return nregs
<= DR_NADDR
? 1 : 0;
647 /* If the inferior has some break/watchpoint that triggered, set the
648 address associated with that break/watchpoint and return non-zero.
649 Otherwise, return zero. */
652 i386_stopped_data_address (struct target_ops
*ops
, CORE_ADDR
*addr_p
)
654 struct i386_debug_reg_state
*state
655 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
659 /* The current thread's DR_STATUS. We always need to read this to
660 check whether some watchpoint caused the trap. */
662 /* We need DR_CONTROL as well, but only iff DR_STATUS indicates a
663 data breakpoint trap. Only fetch it when necessary, to avoid an
664 unnecessary extra syscall when no watchpoint triggered. */
666 unsigned control
= 0;
668 /* In non-stop/async, threads can be running while we change the
669 global dr_mirror (and friends). Say, we set a watchpoint, and
670 let threads resume. Now, say you delete the watchpoint, or
671 add/remove watchpoints such that dr_mirror changes while threads
672 are running. On targets that support non-stop,
673 inserting/deleting watchpoints updates the global dr_mirror only.
674 It does not update the real thread's debug registers; that's only
675 done prior to resume. Instead, if threads are running when the
676 mirror changes, a temporary and transparent stop on all threads
677 is forced so they can get their copy of the debug registers
678 updated on re-resume. Now, say, a thread hit a watchpoint before
679 having been updated with the new dr_mirror contents, and we
680 haven't yet handled the corresponding SIGTRAP. If we trusted
681 dr_mirror below, we'd mistake the real trapped address (from the
682 last time we had updated debug registers in the thread) with
683 whatever was currently in dr_mirror. So to fix this, dr_mirror
684 always represents intention, what we _want_ threads to have in
685 debug registers. To get at the address and cause of the trap, we
686 need to read the state the thread still has in its debug
689 In sum, always get the current debug register values the current
690 thread has, instead of trusting the global mirror. If the thread
691 was running when we last changed watchpoints, the mirror no
692 longer represents what was set in this thread's debug
694 status
= i386_dr_low_get_status ();
696 ALL_DEBUG_REGISTERS (i
)
698 if (!I386_DR_WATCH_HIT (status
, i
))
703 control
= i386_dr_low_get_control ();
707 /* This second condition makes sure DRi is set up for a data
708 watchpoint, not a hardware breakpoint. The reason is that
709 GDB doesn't call the target_stopped_data_address method
710 except for data watchpoints. In other words, I'm being
712 if (I386_DR_GET_RW_LEN (control
, i
) != 0)
714 addr
= i386_dr_low_get_addr (i
);
717 i386_dr_show (state
, "watchpoint_hit", addr
, -1, hw_write
);
721 if (debug_hw_points
&& addr
== 0)
722 i386_dr_show (state
, "stopped_data_addr", 0, 0, hw_write
);
729 /* Return non-zero if the inferior has some watchpoint that triggered.
730 Otherwise return zero. */
733 i386_stopped_by_watchpoint (struct target_ops
*ops
)
736 return i386_stopped_data_address (ops
, &addr
);
739 /* Insert a hardware-assisted breakpoint at BP_TGT->placed_address.
740 Return 0 on success, EBUSY on failure. */
742 i386_insert_hw_breakpoint (struct target_ops
*self
, struct gdbarch
*gdbarch
,
743 struct bp_target_info
*bp_tgt
)
745 struct i386_debug_reg_state
*state
746 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
747 unsigned len_rw
= i386_dr_length_and_rw_bits (1, hw_execute
);
748 CORE_ADDR addr
= bp_tgt
->placed_address
;
749 /* Work on a local copy of the debug registers, and on success,
750 commit the change back to the inferior. */
751 struct i386_debug_reg_state local_state
= *state
;
752 int retval
= i386_dr_insert_aligned_watchpoint (&local_state
,
757 i386_dr_update_inferior_debug_regs (state
, &local_state
);
760 i386_dr_show (state
, "insert_hwbp", addr
, 1, hw_execute
);
765 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
766 Return 0 on success, -1 on failure. */
769 i386_remove_hw_breakpoint (struct target_ops
*self
, struct gdbarch
*gdbarch
,
770 struct bp_target_info
*bp_tgt
)
772 struct i386_debug_reg_state
*state
773 = i386_debug_reg_state (ptid_get_pid (inferior_ptid
));
774 unsigned len_rw
= i386_dr_length_and_rw_bits (1, hw_execute
);
775 CORE_ADDR addr
= bp_tgt
->placed_address
;
776 /* Work on a local copy of the debug registers, and on success,
777 commit the change back to the inferior. */
778 struct i386_debug_reg_state local_state
= *state
;
779 int retval
= i386_dr_remove_aligned_watchpoint (&local_state
,
783 i386_dr_update_inferior_debug_regs (state
, &local_state
);
786 i386_dr_show (state
, "remove_hwbp", addr
, 1, hw_execute
);
791 /* Returns the number of hardware watchpoints of type TYPE that we can
792 set. Value is positive if we can set CNT watchpoints, zero if
793 setting watchpoints of type TYPE is not supported, and negative if
794 CNT is more than the maximum number of watchpoints of type TYPE
795 that we can support. TYPE is one of bp_hardware_watchpoint,
796 bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
797 CNT is the number of such watchpoints used so far (including this
798 one). OTHERTYPE is non-zero if other types of watchpoints are
801 We always return 1 here because we don't have enough information
802 about possible overlap of addresses that they want to watch. As an
803 extreme example, consider the case where all the watchpoints watch
804 the same address and the same region length: then we can handle a
805 virtually unlimited number of watchpoints, due to debug register
806 sharing implemented via reference counts in i386-nat.c. */
809 i386_can_use_hw_breakpoint (struct target_ops
*self
,
810 int type
, int cnt
, int othertype
)
816 add_show_debug_regs_command (void)
818 /* A maintenance command to enable printing the internal DRi mirror
820 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance
,
821 &debug_hw_points
, _("\
822 Set whether to show variables that mirror the x86 debug registers."), _("\
823 Show whether to show variables that mirror the x86 debug registers."), _("\
824 Use \"on\" to enable, \"off\" to disable.\n\
825 If enabled, the debug registers values are shown when GDB inserts\n\
826 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
827 triggers a breakpoint or watchpoint."),
830 &maintenance_set_cmdlist
,
831 &maintenance_show_cmdlist
);
834 /* There are only two global functions left. */
837 i386_use_watchpoints (struct target_ops
*t
)
839 /* After a watchpoint trap, the PC points to the instruction after the
840 one that caused the trap. Therefore we don't need to step over it.
841 But we do need to reset the status register to avoid another trap. */
842 t
->to_have_continuable_watchpoint
= 1;
844 t
->to_can_use_hw_breakpoint
= i386_can_use_hw_breakpoint
;
845 t
->to_region_ok_for_hw_watchpoint
= i386_region_ok_for_watchpoint
;
846 t
->to_stopped_by_watchpoint
= i386_stopped_by_watchpoint
;
847 t
->to_stopped_data_address
= i386_stopped_data_address
;
848 t
->to_insert_watchpoint
= i386_insert_watchpoint
;
849 t
->to_remove_watchpoint
= i386_remove_watchpoint
;
850 t
->to_insert_hw_breakpoint
= i386_insert_hw_breakpoint
;
851 t
->to_remove_hw_breakpoint
= i386_remove_hw_breakpoint
;
855 i386_set_debug_register_length (int len
)
857 /* This function should be called only once for each native target. */
858 gdb_assert (i386_dr_low
.debug_register_length
== 0);
859 gdb_assert (len
== 4 || len
== 8);
860 i386_dr_low
.debug_register_length
= len
;
861 add_show_debug_regs_command ();