1 /* Native-dependent code for the i386.
3 Copyright (C) 2001, 2004-2005, 2007-2012 Free Software Foundation,
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "breakpoint.h"
27 #include "gdb_assert.h"
29 /* Support for hardware watchpoints and breakpoints using the i386
32 This provides several functions for inserting and removing
33 hardware-assisted breakpoints and watchpoints, testing if one or
34 more of the watchpoints triggered and at what address, checking
35 whether a given region can be watched, etc.
37 The functions below implement debug registers sharing by reference
38 counts, and allow to watch regions up to 16 bytes long. */
40 struct i386_dr_low_type i386_dr_low
;
43 /* Support for 8-byte wide hw watchpoints. */
44 #define TARGET_HAS_DR_LEN_8 (i386_dr_low.debug_register_length == 8)
46 /* DR7 Debug Control register fields. */
48 /* How many bits to skip in DR7 to get to R/W and LEN fields. */
49 #define DR_CONTROL_SHIFT 16
50 /* How many bits in DR7 per R/W and LEN field for each watchpoint. */
51 #define DR_CONTROL_SIZE 4
53 /* Watchpoint/breakpoint read/write fields in DR7. */
54 #define DR_RW_EXECUTE (0x0) /* Break on instruction execution. */
55 #define DR_RW_WRITE (0x1) /* Break on data writes. */
56 #define DR_RW_READ (0x3) /* Break on data reads or writes. */
58 /* This is here for completeness. No platform supports this
59 functionality yet (as of March 2001). Note that the DE flag in the
60 CR4 register needs to be set to support this. */
62 #define DR_RW_IORW (0x2) /* Break on I/O reads or writes. */
65 /* Watchpoint/breakpoint length fields in DR7. The 2-bit left shift
66 is so we could OR this with the read/write field defined above. */
67 #define DR_LEN_1 (0x0 << 2) /* 1-byte region watch or breakpoint. */
68 #define DR_LEN_2 (0x1 << 2) /* 2-byte region watch. */
69 #define DR_LEN_4 (0x3 << 2) /* 4-byte region watch. */
70 #define DR_LEN_8 (0x2 << 2) /* 8-byte region watch (AMD64). */
72 /* Local and Global Enable flags in DR7.
74 When the Local Enable flag is set, the breakpoint/watchpoint is
75 enabled only for the current task; the processor automatically
76 clears this flag on every task switch. When the Global Enable flag
77 is set, the breakpoint/watchpoint is enabled for all tasks; the
78 processor never clears this flag.
80 Currently, all watchpoint are locally enabled. If you need to
81 enable them globally, read the comment which pertains to this in
82 i386_insert_aligned_watchpoint below. */
83 #define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit. */
84 #define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit. */
85 #define DR_ENABLE_SIZE 2 /* Two enable bits per debug register. */
87 /* Local and global exact breakpoint enable flags (a.k.a. slowdown
88 flags). These are only required on i386, to allow detection of the
89 exact instruction which caused a watchpoint to break; i486 and
90 later processors do that automatically. We set these flags for
91 backwards compatibility. */
92 #define DR_LOCAL_SLOWDOWN (0x100)
93 #define DR_GLOBAL_SLOWDOWN (0x200)
95 /* Fields reserved by Intel. This includes the GD (General Detect
96 Enable) flag, which causes a debug exception to be generated when a
97 MOV instruction accesses one of the debug registers.
99 FIXME: My Intel manual says we should use 0xF800, not 0xFC00. */
100 #define DR_CONTROL_RESERVED (0xFC00)
102 /* Auxiliary helper macros. */
104 /* A value that masks all fields in DR7 that are reserved by Intel. */
105 #define I386_DR_CONTROL_MASK (~DR_CONTROL_RESERVED)
107 /* The I'th debug register is vacant if its Local and Global Enable
108 bits are reset in the Debug Control register. */
109 #define I386_DR_VACANT(state, i) \
110 (((state)->dr_control_mirror & (3 << (DR_ENABLE_SIZE * (i)))) == 0)
112 /* Locally enable the break/watchpoint in the I'th debug register. */
113 #define I386_DR_LOCAL_ENABLE(state, i) \
115 (state)->dr_control_mirror |= \
116 (1 << (DR_LOCAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))); \
119 /* Globally enable the break/watchpoint in the I'th debug register. */
120 #define I386_DR_GLOBAL_ENABLE(state, i) \
122 (state)->dr_control_mirror |= \
123 (1 << (DR_GLOBAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))); \
126 /* Disable the break/watchpoint in the I'th debug register. */
127 #define I386_DR_DISABLE(state, i) \
129 (state)->dr_control_mirror &= \
130 ~(3 << (DR_ENABLE_SIZE * (i))); \
133 /* Set in DR7 the RW and LEN fields for the I'th debug register. */
134 #define I386_DR_SET_RW_LEN(state, i, rwlen) \
136 (state)->dr_control_mirror &= \
137 ~(0x0f << (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))); \
138 (state)->dr_control_mirror |= \
139 ((rwlen) << (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))); \
142 /* Get from DR7 the RW and LEN fields for the I'th debug register. */
143 #define I386_DR_GET_RW_LEN(dr7, i) \
145 >> (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))) & 0x0f)
147 /* Mask that this I'th watchpoint has triggered. */
148 #define I386_DR_WATCH_MASK(i) (1 << (i))
150 /* Did the watchpoint whose address is in the I'th register break? */
151 #define I386_DR_WATCH_HIT(dr6, i) ((dr6) & (1 << (i)))
153 /* A macro to loop over all debug registers. */
154 #define ALL_DEBUG_REGISTERS(i) for (i = 0; i < DR_NADDR; i++)
156 /* Clear the reference counts and forget everything we knew about the
160 i386_init_dregs (struct i386_debug_reg_state
*state
)
164 ALL_DEBUG_REGISTERS (i
)
166 state
->dr_mirror
[i
] = 0;
167 state
->dr_ref_count
[i
] = 0;
169 state
->dr_control_mirror
= 0;
170 state
->dr_status_mirror
= 0;
173 /* The local mirror of the inferior's debug registers. Currently this
174 is a global, but it should really be per-inferior. */
175 static struct i386_debug_reg_state dr_mirror
;
177 struct i386_debug_reg_state
*
178 i386_debug_reg_state (void)
183 /* Whether or not to print the mirrored debug registers. */
184 static int maint_show_dr
;
186 /* Types of operations supported by i386_handle_nonaligned_watchpoint. */
187 typedef enum { WP_INSERT
, WP_REMOVE
, WP_COUNT
} i386_wp_op_t
;
189 /* Internal functions. */
191 /* Return the value of a 4-bit field for DR7 suitable for watching a
192 region of LEN bytes for accesses of type TYPE. LEN is assumed to
193 have the value of 1, 2, or 4. */
194 static unsigned i386_length_and_rw_bits (int len
, enum target_hw_bp_type type
);
196 /* Insert a watchpoint at address ADDR, which is assumed to be aligned
197 according to the length of the region to watch. LEN_RW_BITS is the
198 value of the bit-field from DR7 which describes the length and
199 access type of the region to be watched by this watchpoint. Return
200 0 on success, -1 on failure. */
201 static int i386_insert_aligned_watchpoint (struct i386_debug_reg_state
*state
,
203 unsigned len_rw_bits
);
205 /* Remove a watchpoint at address ADDR, which is assumed to be aligned
206 according to the length of the region to watch. LEN_RW_BITS is the
207 value of the bits from DR7 which describes the length and access
208 type of the region watched by this watchpoint. Return 0 on
209 success, -1 on failure. */
210 static int i386_remove_aligned_watchpoint (struct i386_debug_reg_state
*state
,
212 unsigned len_rw_bits
);
214 /* Insert or remove a (possibly non-aligned) watchpoint, or count the
215 number of debug registers required to watch a region at address
216 ADDR whose length is LEN for accesses of type TYPE. Return 0 on
217 successful insertion or removal, a positive number when queried
218 about the number of registers, or -1 on failure. If WHAT is not a
219 valid value, bombs through internal_error. */
220 static int i386_handle_nonaligned_watchpoint (struct i386_debug_reg_state
*state
,
222 CORE_ADDR addr
, int len
,
223 enum target_hw_bp_type type
);
225 /* Implementation. */
227 /* Clear the reference counts and forget everything we knew about the
231 i386_cleanup_dregs (void)
233 i386_init_dregs (&dr_mirror
);
236 /* Print the values of the mirrored debug registers. This is called
237 when maint_show_dr is non-zero. To set that up, type "maint
238 show-debug-regs" at GDB's prompt. */
241 i386_show_dr (struct i386_debug_reg_state
*state
,
242 const char *func
, CORE_ADDR addr
,
243 int len
, enum target_hw_bp_type type
)
245 int addr_size
= gdbarch_addr_bit (target_gdbarch
) / 8;
248 puts_unfiltered (func
);
250 printf_unfiltered (" (addr=%lx, len=%d, type=%s)",
251 /* This code is for ia32, so casting CORE_ADDR
252 to unsigned long should be okay. */
253 (unsigned long)addr
, len
,
254 type
== hw_write
? "data-write"
255 : (type
== hw_read
? "data-read"
256 : (type
== hw_access
? "data-read/write"
257 : (type
== hw_execute
? "instruction-execute"
258 /* FIXME: if/when I/O read/write
259 watchpoints are supported, add them
262 puts_unfiltered (":\n");
263 printf_unfiltered ("\tCONTROL (DR7): %s STATUS (DR6): %s\n",
264 phex (state
->dr_control_mirror
, 8),
265 phex (state
->dr_status_mirror
, 8));
266 ALL_DEBUG_REGISTERS(i
)
268 printf_unfiltered ("\
269 \tDR%d: addr=0x%s, ref.count=%d DR%d: addr=0x%s, ref.count=%d\n",
270 i
, phex (state
->dr_mirror
[i
], addr_size
),
271 state
->dr_ref_count
[i
],
272 i
+ 1, phex (state
->dr_mirror
[i
+ 1], addr_size
),
273 state
->dr_ref_count
[i
+1]);
278 /* Return the value of a 4-bit field for DR7 suitable for watching a
279 region of LEN bytes for accesses of type TYPE. LEN is assumed to
280 have the value of 1, 2, or 4. */
283 i386_length_and_rw_bits (int len
, enum target_hw_bp_type type
)
296 internal_error (__FILE__
, __LINE__
,
297 _("The i386 doesn't support "
298 "data-read watchpoints.\n"));
303 /* Not yet supported. */
309 internal_error (__FILE__
, __LINE__
, _("\
310 Invalid hardware breakpoint type %d in i386_length_and_rw_bits.\n"),
317 return (DR_LEN_1
| rw
);
319 return (DR_LEN_2
| rw
);
321 return (DR_LEN_4
| rw
);
323 if (TARGET_HAS_DR_LEN_8
)
324 return (DR_LEN_8
| rw
);
325 /* ELSE FALL THROUGH */
327 internal_error (__FILE__
, __LINE__
, _("\
328 Invalid hardware breakpoint length %d in i386_length_and_rw_bits.\n"), len
);
332 /* Insert a watchpoint at address ADDR, which is assumed to be aligned
333 according to the length of the region to watch. LEN_RW_BITS is the
334 value of the bits from DR7 which describes the length and access
335 type of the region to be watched by this watchpoint. Return 0 on
336 success, -1 on failure. */
339 i386_insert_aligned_watchpoint (struct i386_debug_reg_state
*state
,
340 CORE_ADDR addr
, unsigned len_rw_bits
)
344 if (!i386_dr_low
.set_addr
|| !i386_dr_low
.set_control
)
347 /* First, look for an occupied debug register with the same address
348 and the same RW and LEN definitions. If we find one, we can
349 reuse it for this watchpoint as well (and save a register). */
350 ALL_DEBUG_REGISTERS(i
)
352 if (!I386_DR_VACANT (state
, i
)
353 && state
->dr_mirror
[i
] == addr
354 && I386_DR_GET_RW_LEN (state
->dr_control_mirror
, i
) == len_rw_bits
)
356 state
->dr_ref_count
[i
]++;
361 /* Next, look for a vacant debug register. */
362 ALL_DEBUG_REGISTERS(i
)
364 if (I386_DR_VACANT (state
, i
))
368 /* No more debug registers! */
372 /* Now set up the register I to watch our region. */
374 /* Record the info in our local mirrored array. */
375 state
->dr_mirror
[i
] = addr
;
376 state
->dr_ref_count
[i
] = 1;
377 I386_DR_SET_RW_LEN (state
, i
, len_rw_bits
);
378 /* Note: we only enable the watchpoint locally, i.e. in the current
379 task. Currently, no i386 target allows or supports global
380 watchpoints; however, if any target would want that in the
381 future, GDB should probably provide a command to control whether
382 to enable watchpoints globally or locally, and the code below
383 should use global or local enable and slow-down flags as
385 I386_DR_LOCAL_ENABLE (state
, i
);
386 state
->dr_control_mirror
|= DR_LOCAL_SLOWDOWN
;
387 state
->dr_control_mirror
&= I386_DR_CONTROL_MASK
;
392 /* Remove a watchpoint at address ADDR, which is assumed to be aligned
393 according to the length of the region to watch. LEN_RW_BITS is the
394 value of the bits from DR7 which describes the length and access
395 type of the region watched by this watchpoint. Return 0 on
396 success, -1 on failure. */
399 i386_remove_aligned_watchpoint (struct i386_debug_reg_state
*state
,
400 CORE_ADDR addr
, unsigned len_rw_bits
)
404 ALL_DEBUG_REGISTERS(i
)
406 if (!I386_DR_VACANT (state
, i
)
407 && state
->dr_mirror
[i
] == addr
408 && I386_DR_GET_RW_LEN (state
->dr_control_mirror
, i
) == len_rw_bits
)
410 if (--state
->dr_ref_count
[i
] == 0) /* no longer in use? */
412 /* Reset our mirror. */
413 state
->dr_mirror
[i
] = 0;
414 I386_DR_DISABLE (state
, i
);
423 /* Insert or remove a (possibly non-aligned) watchpoint, or count the
424 number of debug registers required to watch a region at address
425 ADDR whose length is LEN for accesses of type TYPE. Return 0 on
426 successful insertion or removal, a positive number when queried
427 about the number of registers, or -1 on failure. If WHAT is not a
428 valid value, bombs through internal_error. */
431 i386_handle_nonaligned_watchpoint (struct i386_debug_reg_state
*state
,
432 i386_wp_op_t what
, CORE_ADDR addr
, int len
,
433 enum target_hw_bp_type type
)
436 int max_wp_len
= TARGET_HAS_DR_LEN_8
? 8 : 4;
438 static int size_try_array
[8][8] =
440 {1, 1, 1, 1, 1, 1, 1, 1}, /* Trying size one. */
441 {2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size two. */
442 {2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size three. */
443 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size four. */
444 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size five. */
445 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size six. */
446 {4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size seven. */
447 {8, 1, 2, 1, 4, 1, 2, 1}, /* Trying size eight. */
452 int align
= addr
% max_wp_len
;
453 /* Four (eight on AMD64) is the maximum length a debug register
455 int try = (len
> max_wp_len
? (max_wp_len
- 1) : len
- 1);
456 int size
= size_try_array
[try][align
];
458 if (what
== WP_COUNT
)
460 /* size_try_array[] is defined such that each iteration
461 through the loop is guaranteed to produce an address and a
462 size that can be watched with a single debug register.
463 Thus, for counting the registers required to watch a
464 region, we simply need to increment the count on each
470 unsigned len_rw
= i386_length_and_rw_bits (size
, type
);
472 if (what
== WP_INSERT
)
473 retval
= i386_insert_aligned_watchpoint (state
, addr
, len_rw
);
474 else if (what
== WP_REMOVE
)
475 retval
= i386_remove_aligned_watchpoint (state
, addr
, len_rw
);
477 internal_error (__FILE__
, __LINE__
, _("\
478 Invalid value %d of operation in i386_handle_nonaligned_watchpoint.\n"),
491 /* Update the inferior's debug registers with the new debug registers
492 state, in NEW_STATE, and then update our local mirror to match. */
495 i386_update_inferior_debug_regs (struct i386_debug_reg_state
*new_state
)
499 ALL_DEBUG_REGISTERS (i
)
501 if (I386_DR_VACANT (new_state
, i
) != I386_DR_VACANT (&dr_mirror
, i
))
502 i386_dr_low
.set_addr (i
, new_state
->dr_mirror
[i
]);
504 gdb_assert (new_state
->dr_mirror
[i
] == dr_mirror
.dr_mirror
[i
]);
507 if (new_state
->dr_control_mirror
!= dr_mirror
.dr_control_mirror
)
508 i386_dr_low
.set_control (new_state
->dr_control_mirror
);
510 dr_mirror
= *new_state
;
513 /* Insert a watchpoint to watch a memory region which starts at
514 address ADDR and whose length is LEN bytes. Watch memory accesses
515 of the type TYPE. Return 0 on success, -1 on failure. */
518 i386_insert_watchpoint (CORE_ADDR addr
, int len
, int type
,
519 struct expression
*cond
)
522 /* Work on a local copy of the debug registers, and on success,
523 commit the change back to the inferior. */
524 struct i386_debug_reg_state local_state
= dr_mirror
;
527 return 1; /* unsupported */
529 if (((len
!= 1 && len
!=2 && len
!=4) && !(TARGET_HAS_DR_LEN_8
&& len
== 8))
531 retval
= i386_handle_nonaligned_watchpoint (&local_state
,
532 WP_INSERT
, addr
, len
, type
);
535 unsigned len_rw
= i386_length_and_rw_bits (len
, type
);
537 retval
= i386_insert_aligned_watchpoint (&local_state
,
542 i386_update_inferior_debug_regs (&local_state
);
545 i386_show_dr (&dr_mirror
, "insert_watchpoint", addr
, len
, type
);
550 /* Remove a watchpoint that watched the memory region which starts at
551 address ADDR, whose length is LEN bytes, and for accesses of the
552 type TYPE. Return 0 on success, -1 on failure. */
554 i386_remove_watchpoint (CORE_ADDR addr
, int len
, int type
,
555 struct expression
*cond
)
558 /* Work on a local copy of the debug registers, and on success,
559 commit the change back to the inferior. */
560 struct i386_debug_reg_state local_state
= dr_mirror
;
562 if (((len
!= 1 && len
!=2 && len
!=4) && !(TARGET_HAS_DR_LEN_8
&& len
== 8))
564 retval
= i386_handle_nonaligned_watchpoint (&local_state
,
565 WP_REMOVE
, addr
, len
, type
);
568 unsigned len_rw
= i386_length_and_rw_bits (len
, type
);
570 retval
= i386_remove_aligned_watchpoint (&local_state
,
575 i386_update_inferior_debug_regs (&local_state
);
578 i386_show_dr (&dr_mirror
, "remove_watchpoint", addr
, len
, type
);
583 /* Return non-zero if we can watch a memory region that starts at
584 address ADDR and whose length is LEN bytes. */
587 i386_region_ok_for_watchpoint (CORE_ADDR addr
, int len
)
591 /* Compute how many aligned watchpoints we would need to cover this
593 nregs
= i386_handle_nonaligned_watchpoint (&dr_mirror
,
594 WP_COUNT
, addr
, len
, hw_write
);
595 return nregs
<= DR_NADDR
? 1 : 0;
598 /* If the inferior has some watchpoint that triggered, set the
599 address associated with that watchpoint and return non-zero.
600 Otherwise, return zero. */
603 i386_stopped_data_address (struct target_ops
*ops
, CORE_ADDR
*addr_p
)
608 /* The current thread's DR_STATUS. We always need to read this to
609 check whether some watchpoint caused the trap. */
611 /* We need DR_CONTROL as well, but only iff DR_STATUS indicates a
612 data breakpoint trap. Only fetch it when necessary, to avoid an
613 unnecessary extra syscall when no watchpoint triggered. */
615 unsigned control
= 0;
617 /* In non-stop/async, threads can be running while we change the
618 global dr_mirror (and friends). Say, we set a watchpoint, and
619 let threads resume. Now, say you delete the watchpoint, or
620 add/remove watchpoints such that dr_mirror changes while threads
621 are running. On targets that support non-stop,
622 inserting/deleting watchpoints updates the global dr_mirror only.
623 It does not update the real thread's debug registers; that's only
624 done prior to resume. Instead, if threads are running when the
625 mirror changes, a temporary and transparent stop on all threads
626 is forced so they can get their copy of the debug registers
627 updated on re-resume. Now, say, a thread hit a watchpoint before
628 having been updated with the new dr_mirror contents, and we
629 haven't yet handled the corresponding SIGTRAP. If we trusted
630 dr_mirror below, we'd mistake the real trapped address (from the
631 last time we had updated debug registers in the thread) with
632 whatever was currently in dr_mirror. So to fix this, dr_mirror
633 always represents intention, what we _want_ threads to have in
634 debug registers. To get at the address and cause of the trap, we
635 need to read the state the thread still has in its debug
638 In sum, always get the current debug register values the current
639 thread has, instead of trusting the global mirror. If the thread
640 was running when we last changed watchpoints, the mirror no
641 longer represents what was set in this thread's debug
643 status
= i386_dr_low
.get_status ();
645 ALL_DEBUG_REGISTERS(i
)
647 if (!I386_DR_WATCH_HIT (status
, i
))
652 control
= i386_dr_low
.get_control ();
656 /* This second condition makes sure DRi is set up for a data
657 watchpoint, not a hardware breakpoint. The reason is that
658 GDB doesn't call the target_stopped_data_address method
659 except for data watchpoints. In other words, I'm being
661 if (I386_DR_GET_RW_LEN (control
, i
) != 0)
663 addr
= i386_dr_low
.get_addr (i
);
666 i386_show_dr (&dr_mirror
, "watchpoint_hit", addr
, -1, hw_write
);
669 if (maint_show_dr
&& addr
== 0)
670 i386_show_dr (&dr_mirror
, "stopped_data_addr", 0, 0, hw_write
);
678 i386_stopped_by_watchpoint (void)
681 return i386_stopped_data_address (¤t_target
, &addr
);
684 /* Insert a hardware-assisted breakpoint at BP_TGT->placed_address.
685 Return 0 on success, EBUSY on failure. */
687 i386_insert_hw_breakpoint (struct gdbarch
*gdbarch
,
688 struct bp_target_info
*bp_tgt
)
690 unsigned len_rw
= i386_length_and_rw_bits (1, hw_execute
);
691 CORE_ADDR addr
= bp_tgt
->placed_address
;
692 /* Work on a local copy of the debug registers, and on success,
693 commit the change back to the inferior. */
694 struct i386_debug_reg_state local_state
= dr_mirror
;
695 int retval
= i386_insert_aligned_watchpoint (&local_state
,
696 addr
, len_rw
) ? EBUSY
: 0;
699 i386_update_inferior_debug_regs (&local_state
);
702 i386_show_dr (&dr_mirror
, "insert_hwbp", addr
, 1, hw_execute
);
707 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
708 Return 0 on success, -1 on failure. */
711 i386_remove_hw_breakpoint (struct gdbarch
*gdbarch
,
712 struct bp_target_info
*bp_tgt
)
714 unsigned len_rw
= i386_length_and_rw_bits (1, hw_execute
);
715 CORE_ADDR addr
= bp_tgt
->placed_address
;
716 /* Work on a local copy of the debug registers, and on success,
717 commit the change back to the inferior. */
718 struct i386_debug_reg_state local_state
= dr_mirror
;
719 int retval
= i386_remove_aligned_watchpoint (&local_state
,
723 i386_update_inferior_debug_regs (&local_state
);
726 i386_show_dr (&dr_mirror
, "remove_hwbp", addr
, 1, hw_execute
);
731 /* Returns the number of hardware watchpoints of type TYPE that we can
732 set. Value is positive if we can set CNT watchpoints, zero if
733 setting watchpoints of type TYPE is not supported, and negative if
734 CNT is more than the maximum number of watchpoints of type TYPE
735 that we can support. TYPE is one of bp_hardware_watchpoint,
736 bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
737 CNT is the number of such watchpoints used so far (including this
738 one). OTHERTYPE is non-zero if other types of watchpoints are
741 We always return 1 here because we don't have enough information
742 about possible overlap of addresses that they want to watch. As an
743 extreme example, consider the case where all the watchpoints watch
744 the same address and the same region length: then we can handle a
745 virtually unlimited number of watchpoints, due to debug register
746 sharing implemented via reference counts in i386-nat.c. */
749 i386_can_use_hw_breakpoint (int type
, int cnt
, int othertype
)
755 add_show_debug_regs_command (void)
757 /* A maintenance command to enable printing the internal DRi mirror
759 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance
,
761 Set whether to show variables that mirror the x86 debug registers."), _("\
762 Show whether to show variables that mirror the x86 debug registers."), _("\
763 Use \"on\" to enable, \"off\" to disable.\n\
764 If enabled, the debug registers values are shown when GDB inserts\n\
765 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
766 triggers a breakpoint or watchpoint."),
769 &maintenance_set_cmdlist
,
770 &maintenance_show_cmdlist
);
773 /* There are only two global functions left. */
776 i386_use_watchpoints (struct target_ops
*t
)
778 /* After a watchpoint trap, the PC points to the instruction after the
779 one that caused the trap. Therefore we don't need to step over it.
780 But we do need to reset the status register to avoid another trap. */
781 t
->to_have_continuable_watchpoint
= 1;
783 t
->to_can_use_hw_breakpoint
= i386_can_use_hw_breakpoint
;
784 t
->to_region_ok_for_hw_watchpoint
= i386_region_ok_for_watchpoint
;
785 t
->to_stopped_by_watchpoint
= i386_stopped_by_watchpoint
;
786 t
->to_stopped_data_address
= i386_stopped_data_address
;
787 t
->to_insert_watchpoint
= i386_insert_watchpoint
;
788 t
->to_remove_watchpoint
= i386_remove_watchpoint
;
789 t
->to_insert_hw_breakpoint
= i386_insert_hw_breakpoint
;
790 t
->to_remove_hw_breakpoint
= i386_remove_hw_breakpoint
;
794 i386_set_debug_register_length (int len
)
796 /* This function should be called only once for each native target. */
797 gdb_assert (i386_dr_low
.debug_register_length
== 0);
798 gdb_assert (len
== 4 || len
== 8);
799 i386_dr_low
.debug_register_length
= len
;
800 add_show_debug_regs_command ();