1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988-2020 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "opcode/i386.h"
22 #include "arch-utils.h"
24 #include "dummy-frame.h"
25 #include "dwarf2/frame.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
37 #include "reggroups.h"
42 #include "target-float.h"
47 #include "i386-tdep.h"
48 #include "i387-tdep.h"
49 #include "gdbsupport/x86-xstate.h"
53 #include "record-full.h"
54 #include "target-descriptions.h"
55 #include "arch/i386.h"
60 #include "stap-probe.h"
61 #include "user-regs.h"
62 #include "cli/cli-utils.h"
63 #include "expression.h"
64 #include "parser-defs.h"
67 #include <unordered_set>
71 static const char *i386_register_names
[] =
73 "eax", "ecx", "edx", "ebx",
74 "esp", "ebp", "esi", "edi",
75 "eip", "eflags", "cs", "ss",
76 "ds", "es", "fs", "gs",
77 "st0", "st1", "st2", "st3",
78 "st4", "st5", "st6", "st7",
79 "fctrl", "fstat", "ftag", "fiseg",
80 "fioff", "foseg", "fooff", "fop",
81 "xmm0", "xmm1", "xmm2", "xmm3",
82 "xmm4", "xmm5", "xmm6", "xmm7",
86 static const char *i386_zmm_names
[] =
88 "zmm0", "zmm1", "zmm2", "zmm3",
89 "zmm4", "zmm5", "zmm6", "zmm7"
92 static const char *i386_zmmh_names
[] =
94 "zmm0h", "zmm1h", "zmm2h", "zmm3h",
95 "zmm4h", "zmm5h", "zmm6h", "zmm7h"
98 static const char *i386_k_names
[] =
100 "k0", "k1", "k2", "k3",
101 "k4", "k5", "k6", "k7"
104 static const char *i386_ymm_names
[] =
106 "ymm0", "ymm1", "ymm2", "ymm3",
107 "ymm4", "ymm5", "ymm6", "ymm7",
110 static const char *i386_ymmh_names
[] =
112 "ymm0h", "ymm1h", "ymm2h", "ymm3h",
113 "ymm4h", "ymm5h", "ymm6h", "ymm7h",
116 static const char *i386_mpx_names
[] =
118 "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
121 static const char* i386_pkeys_names
[] =
126 /* Register names for MPX pseudo-registers. */
128 static const char *i386_bnd_names
[] =
130 "bnd0", "bnd1", "bnd2", "bnd3"
133 /* Register names for MMX pseudo-registers. */
135 static const char *i386_mmx_names
[] =
137 "mm0", "mm1", "mm2", "mm3",
138 "mm4", "mm5", "mm6", "mm7"
141 /* Register names for byte pseudo-registers. */
143 static const char *i386_byte_names
[] =
145 "al", "cl", "dl", "bl",
146 "ah", "ch", "dh", "bh"
149 /* Register names for word pseudo-registers. */
151 static const char *i386_word_names
[] =
153 "ax", "cx", "dx", "bx",
157 /* Constant used for reading/writing pseudo registers. In 64-bit mode, we have
158 16 lower ZMM regs that extend corresponding xmm/ymm registers. In addition,
159 we have 16 upper ZMM regs that have to be handled differently. */
161 const int num_lower_zmm_regs
= 16;
166 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
168 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
169 int mm0_regnum
= tdep
->mm0_regnum
;
174 regnum
-= mm0_regnum
;
175 return regnum
>= 0 && regnum
< tdep
->num_mmx_regs
;
181 i386_byte_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
183 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
185 regnum
-= tdep
->al_regnum
;
186 return regnum
>= 0 && regnum
< tdep
->num_byte_regs
;
192 i386_word_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
194 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
196 regnum
-= tdep
->ax_regnum
;
197 return regnum
>= 0 && regnum
< tdep
->num_word_regs
;
200 /* Dword register? */
203 i386_dword_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
205 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
206 int eax_regnum
= tdep
->eax_regnum
;
211 regnum
-= eax_regnum
;
212 return regnum
>= 0 && regnum
< tdep
->num_dword_regs
;
215 /* AVX512 register? */
218 i386_zmmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
220 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
221 int zmm0h_regnum
= tdep
->zmm0h_regnum
;
223 if (zmm0h_regnum
< 0)
226 regnum
-= zmm0h_regnum
;
227 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
231 i386_zmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
233 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
234 int zmm0_regnum
= tdep
->zmm0_regnum
;
239 regnum
-= zmm0_regnum
;
240 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
244 i386_k_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
246 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
247 int k0_regnum
= tdep
->k0_regnum
;
253 return regnum
>= 0 && regnum
< I387_NUM_K_REGS
;
257 i386_ymmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
259 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
260 int ymm0h_regnum
= tdep
->ymm0h_regnum
;
262 if (ymm0h_regnum
< 0)
265 regnum
-= ymm0h_regnum
;
266 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
272 i386_ymm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
274 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
275 int ymm0_regnum
= tdep
->ymm0_regnum
;
280 regnum
-= ymm0_regnum
;
281 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
285 i386_ymmh_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
287 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
288 int ymm16h_regnum
= tdep
->ymm16h_regnum
;
290 if (ymm16h_regnum
< 0)
293 regnum
-= ymm16h_regnum
;
294 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
298 i386_ymm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
300 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
301 int ymm16_regnum
= tdep
->ymm16_regnum
;
303 if (ymm16_regnum
< 0)
306 regnum
-= ymm16_regnum
;
307 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
313 i386_bnd_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
315 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
316 int bnd0_regnum
= tdep
->bnd0_regnum
;
321 regnum
-= bnd0_regnum
;
322 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
328 i386_xmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
330 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
331 int num_xmm_regs
= I387_NUM_XMM_REGS (tdep
);
333 if (num_xmm_regs
== 0)
336 regnum
-= I387_XMM0_REGNUM (tdep
);
337 return regnum
>= 0 && regnum
< num_xmm_regs
;
340 /* XMM_512 register? */
343 i386_xmm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
345 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
346 int num_xmm_avx512_regs
= I387_NUM_XMM_AVX512_REGS (tdep
);
348 if (num_xmm_avx512_regs
== 0)
351 regnum
-= I387_XMM16_REGNUM (tdep
);
352 return regnum
>= 0 && regnum
< num_xmm_avx512_regs
;
356 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
358 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
360 if (I387_NUM_XMM_REGS (tdep
) == 0)
363 return (regnum
== I387_MXCSR_REGNUM (tdep
));
369 i386_fp_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
371 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
373 if (I387_ST0_REGNUM (tdep
) < 0)
376 return (I387_ST0_REGNUM (tdep
) <= regnum
377 && regnum
< I387_FCTRL_REGNUM (tdep
));
381 i386_fpc_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
383 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
385 if (I387_ST0_REGNUM (tdep
) < 0)
388 return (I387_FCTRL_REGNUM (tdep
) <= regnum
389 && regnum
< I387_XMM0_REGNUM (tdep
));
392 /* BNDr (raw) register? */
395 i386_bndr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
397 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
399 if (I387_BND0R_REGNUM (tdep
) < 0)
402 regnum
-= tdep
->bnd0r_regnum
;
403 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
406 /* BND control register? */
409 i386_mpx_ctrl_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
411 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
413 if (I387_BNDCFGU_REGNUM (tdep
) < 0)
416 regnum
-= I387_BNDCFGU_REGNUM (tdep
);
417 return regnum
>= 0 && regnum
< I387_NUM_MPX_CTRL_REGS
;
423 i386_pkru_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
425 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
426 int pkru_regnum
= tdep
->pkru_regnum
;
431 regnum
-= pkru_regnum
;
432 return regnum
>= 0 && regnum
< I387_NUM_PKEYS_REGS
;
435 /* Return the name of register REGNUM, or the empty string if it is
436 an anonymous register. */
439 i386_register_name (struct gdbarch
*gdbarch
, int regnum
)
441 /* Hide the upper YMM registers. */
442 if (i386_ymmh_regnum_p (gdbarch
, regnum
))
445 /* Hide the upper YMM16-31 registers. */
446 if (i386_ymmh_avx512_regnum_p (gdbarch
, regnum
))
449 /* Hide the upper ZMM registers. */
450 if (i386_zmmh_regnum_p (gdbarch
, regnum
))
453 return tdesc_register_name (gdbarch
, regnum
);
456 /* Return the name of register REGNUM. */
459 i386_pseudo_register_name (struct gdbarch
*gdbarch
, int regnum
)
461 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
462 if (i386_bnd_regnum_p (gdbarch
, regnum
))
463 return i386_bnd_names
[regnum
- tdep
->bnd0_regnum
];
464 if (i386_mmx_regnum_p (gdbarch
, regnum
))
465 return i386_mmx_names
[regnum
- I387_MM0_REGNUM (tdep
)];
466 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
467 return i386_ymm_names
[regnum
- tdep
->ymm0_regnum
];
468 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
469 return i386_zmm_names
[regnum
- tdep
->zmm0_regnum
];
470 else if (i386_byte_regnum_p (gdbarch
, regnum
))
471 return i386_byte_names
[regnum
- tdep
->al_regnum
];
472 else if (i386_word_regnum_p (gdbarch
, regnum
))
473 return i386_word_names
[regnum
- tdep
->ax_regnum
];
475 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
478 /* Convert a dbx register number REG to the appropriate register
479 number used by GDB. */
482 i386_dbx_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
484 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
486 /* This implements what GCC calls the "default" register map
487 (dbx_register_map[]). */
489 if (reg
>= 0 && reg
<= 7)
491 /* General-purpose registers. The debug info calls %ebp
492 register 4, and %esp register 5. */
499 else if (reg
>= 12 && reg
<= 19)
501 /* Floating-point registers. */
502 return reg
- 12 + I387_ST0_REGNUM (tdep
);
504 else if (reg
>= 21 && reg
<= 28)
507 int ymm0_regnum
= tdep
->ymm0_regnum
;
510 && i386_xmm_regnum_p (gdbarch
, reg
))
511 return reg
- 21 + ymm0_regnum
;
513 return reg
- 21 + I387_XMM0_REGNUM (tdep
);
515 else if (reg
>= 29 && reg
<= 36)
518 return reg
- 29 + I387_MM0_REGNUM (tdep
);
521 /* This will hopefully provoke a warning. */
522 return gdbarch_num_cooked_regs (gdbarch
);
525 /* Convert SVR4 DWARF register number REG to the appropriate register number
529 i386_svr4_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
531 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
533 /* This implements the GCC register map that tries to be compatible
534 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
536 /* The SVR4 register numbering includes %eip and %eflags, and
537 numbers the floating point registers differently. */
538 if (reg
>= 0 && reg
<= 9)
540 /* General-purpose registers. */
543 else if (reg
>= 11 && reg
<= 18)
545 /* Floating-point registers. */
546 return reg
- 11 + I387_ST0_REGNUM (tdep
);
548 else if (reg
>= 21 && reg
<= 36)
550 /* The SSE and MMX registers have the same numbers as with dbx. */
551 return i386_dbx_reg_to_regnum (gdbarch
, reg
);
556 case 37: return I387_FCTRL_REGNUM (tdep
);
557 case 38: return I387_FSTAT_REGNUM (tdep
);
558 case 39: return I387_MXCSR_REGNUM (tdep
);
559 case 40: return I386_ES_REGNUM
;
560 case 41: return I386_CS_REGNUM
;
561 case 42: return I386_SS_REGNUM
;
562 case 43: return I386_DS_REGNUM
;
563 case 44: return I386_FS_REGNUM
;
564 case 45: return I386_GS_REGNUM
;
570 /* Wrapper on i386_svr4_dwarf_reg_to_regnum to return
571 num_regs + num_pseudo_regs for other debug formats. */
574 i386_svr4_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
576 int regnum
= i386_svr4_dwarf_reg_to_regnum (gdbarch
, reg
);
579 return gdbarch_num_cooked_regs (gdbarch
);
585 /* This is the variable that is set with "set disassembly-flavor", and
586 its legitimate values. */
587 static const char att_flavor
[] = "att";
588 static const char intel_flavor
[] = "intel";
589 static const char *const valid_flavors
[] =
595 static const char *disassembly_flavor
= att_flavor
;
598 /* Use the program counter to determine the contents and size of a
599 breakpoint instruction. Return a pointer to a string of bytes that
600 encode a breakpoint instruction, store the length of the string in
601 *LEN and optionally adjust *PC to point to the correct memory
602 location for inserting the breakpoint.
604 On the i386 we have a single breakpoint that fits in a single byte
605 and can be inserted anywhere.
607 This function is 64-bit safe. */
609 constexpr gdb_byte i386_break_insn
[] = { 0xcc }; /* int 3 */
611 typedef BP_MANIPULATION (i386_break_insn
) i386_breakpoint
;
614 /* Displaced instruction handling. */
616 /* Skip the legacy instruction prefixes in INSN.
617 Not all prefixes are valid for any particular insn
618 but we needn't care, the insn will fault if it's invalid.
619 The result is a pointer to the first opcode byte,
620 or NULL if we run off the end of the buffer. */
623 i386_skip_prefixes (gdb_byte
*insn
, size_t max_len
)
625 gdb_byte
*end
= insn
+ max_len
;
631 case DATA_PREFIX_OPCODE
:
632 case ADDR_PREFIX_OPCODE
:
633 case CS_PREFIX_OPCODE
:
634 case DS_PREFIX_OPCODE
:
635 case ES_PREFIX_OPCODE
:
636 case FS_PREFIX_OPCODE
:
637 case GS_PREFIX_OPCODE
:
638 case SS_PREFIX_OPCODE
:
639 case LOCK_PREFIX_OPCODE
:
640 case REPE_PREFIX_OPCODE
:
641 case REPNE_PREFIX_OPCODE
:
653 i386_absolute_jmp_p (const gdb_byte
*insn
)
655 /* jmp far (absolute address in operand). */
661 /* jump near, absolute indirect (/4). */
662 if ((insn
[1] & 0x38) == 0x20)
665 /* jump far, absolute indirect (/5). */
666 if ((insn
[1] & 0x38) == 0x28)
673 /* Return non-zero if INSN is a jump, zero otherwise. */
676 i386_jmp_p (const gdb_byte
*insn
)
678 /* jump short, relative. */
682 /* jump near, relative. */
686 return i386_absolute_jmp_p (insn
);
690 i386_absolute_call_p (const gdb_byte
*insn
)
692 /* call far, absolute. */
698 /* Call near, absolute indirect (/2). */
699 if ((insn
[1] & 0x38) == 0x10)
702 /* Call far, absolute indirect (/3). */
703 if ((insn
[1] & 0x38) == 0x18)
711 i386_ret_p (const gdb_byte
*insn
)
715 case 0xc2: /* ret near, pop N bytes. */
716 case 0xc3: /* ret near */
717 case 0xca: /* ret far, pop N bytes. */
718 case 0xcb: /* ret far */
719 case 0xcf: /* iret */
728 i386_call_p (const gdb_byte
*insn
)
730 if (i386_absolute_call_p (insn
))
733 /* call near, relative. */
740 /* Return non-zero if INSN is a system call, and set *LENGTHP to its
741 length in bytes. Otherwise, return zero. */
744 i386_syscall_p (const gdb_byte
*insn
, int *lengthp
)
746 /* Is it 'int $0x80'? */
747 if ((insn
[0] == 0xcd && insn
[1] == 0x80)
748 /* Or is it 'sysenter'? */
749 || (insn
[0] == 0x0f && insn
[1] == 0x34)
750 /* Or is it 'syscall'? */
751 || (insn
[0] == 0x0f && insn
[1] == 0x05))
760 /* The gdbarch insn_is_call method. */
763 i386_insn_is_call (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
765 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
767 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
768 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
770 return i386_call_p (insn
);
773 /* The gdbarch insn_is_ret method. */
776 i386_insn_is_ret (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
778 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
780 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
781 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
783 return i386_ret_p (insn
);
786 /* The gdbarch insn_is_jump method. */
789 i386_insn_is_jump (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
791 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
793 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
794 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
796 return i386_jmp_p (insn
);
799 /* Some kernels may run one past a syscall insn, so we have to cope. */
801 displaced_step_closure_up
802 i386_displaced_step_copy_insn (struct gdbarch
*gdbarch
,
803 CORE_ADDR from
, CORE_ADDR to
,
804 struct regcache
*regs
)
806 size_t len
= gdbarch_max_insn_length (gdbarch
);
807 std::unique_ptr
<i386_displaced_step_closure
> closure
808 (new i386_displaced_step_closure (len
));
809 gdb_byte
*buf
= closure
->buf
.data ();
811 read_memory (from
, buf
, len
);
813 /* GDB may get control back after the insn after the syscall.
814 Presumably this is a kernel bug.
815 If this is a syscall, make sure there's a nop afterwards. */
820 insn
= i386_skip_prefixes (buf
, len
);
821 if (insn
!= NULL
&& i386_syscall_p (insn
, &syscall_length
))
822 insn
[syscall_length
] = NOP_OPCODE
;
825 write_memory (to
, buf
, len
);
829 fprintf_unfiltered (gdb_stdlog
, "displaced: copy %s->%s: ",
830 paddress (gdbarch
, from
), paddress (gdbarch
, to
));
831 displaced_step_dump_bytes (gdb_stdlog
, buf
, len
);
834 /* This is a work around for a problem with g++ 4.8. */
835 return displaced_step_closure_up (closure
.release ());
838 /* Fix up the state of registers and memory after having single-stepped
839 a displaced instruction. */
842 i386_displaced_step_fixup (struct gdbarch
*gdbarch
,
843 struct displaced_step_closure
*closure_
,
844 CORE_ADDR from
, CORE_ADDR to
,
845 struct regcache
*regs
)
847 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
849 /* The offset we applied to the instruction's address.
850 This could well be negative (when viewed as a signed 32-bit
851 value), but ULONGEST won't reflect that, so take care when
853 ULONGEST insn_offset
= to
- from
;
855 i386_displaced_step_closure
*closure
856 = (i386_displaced_step_closure
*) closure_
;
857 gdb_byte
*insn
= closure
->buf
.data ();
858 /* The start of the insn, needed in case we see some prefixes. */
859 gdb_byte
*insn_start
= insn
;
862 fprintf_unfiltered (gdb_stdlog
,
863 "displaced: fixup (%s, %s), "
864 "insn = 0x%02x 0x%02x ...\n",
865 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
868 /* The list of issues to contend with here is taken from
869 resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
870 Yay for Free Software! */
872 /* Relocate the %eip, if necessary. */
874 /* The instruction recognizers we use assume any leading prefixes
875 have been skipped. */
877 /* This is the size of the buffer in closure. */
878 size_t max_insn_len
= gdbarch_max_insn_length (gdbarch
);
879 gdb_byte
*opcode
= i386_skip_prefixes (insn
, max_insn_len
);
880 /* If there are too many prefixes, just ignore the insn.
881 It will fault when run. */
886 /* Except in the case of absolute or indirect jump or call
887 instructions, or a return instruction, the new eip is relative to
888 the displaced instruction; make it relative. Well, signal
889 handler returns don't need relocation either, but we use the
890 value of %eip to recognize those; see below. */
891 if (! i386_absolute_jmp_p (insn
)
892 && ! i386_absolute_call_p (insn
)
893 && ! i386_ret_p (insn
))
898 regcache_cooked_read_unsigned (regs
, I386_EIP_REGNUM
, &orig_eip
);
900 /* A signal trampoline system call changes the %eip, resuming
901 execution of the main program after the signal handler has
902 returned. That makes them like 'return' instructions; we
903 shouldn't relocate %eip.
905 But most system calls don't, and we do need to relocate %eip.
907 Our heuristic for distinguishing these cases: if stepping
908 over the system call instruction left control directly after
909 the instruction, the we relocate --- control almost certainly
910 doesn't belong in the displaced copy. Otherwise, we assume
911 the instruction has put control where it belongs, and leave
912 it unrelocated. Goodness help us if there are PC-relative
914 if (i386_syscall_p (insn
, &insn_len
)
915 && orig_eip
!= to
+ (insn
- insn_start
) + insn_len
916 /* GDB can get control back after the insn after the syscall.
917 Presumably this is a kernel bug.
918 i386_displaced_step_copy_insn ensures its a nop,
919 we add one to the length for it. */
920 && orig_eip
!= to
+ (insn
- insn_start
) + insn_len
+ 1)
923 fprintf_unfiltered (gdb_stdlog
,
924 "displaced: syscall changed %%eip; "
929 ULONGEST eip
= (orig_eip
- insn_offset
) & 0xffffffffUL
;
931 /* If we just stepped over a breakpoint insn, we don't backup
932 the pc on purpose; this is to match behaviour without
935 regcache_cooked_write_unsigned (regs
, I386_EIP_REGNUM
, eip
);
938 fprintf_unfiltered (gdb_stdlog
,
940 "relocated %%eip from %s to %s\n",
941 paddress (gdbarch
, orig_eip
),
942 paddress (gdbarch
, eip
));
946 /* If the instruction was PUSHFL, then the TF bit will be set in the
947 pushed value, and should be cleared. We'll leave this for later,
948 since GDB already messes up the TF flag when stepping over a
951 /* If the instruction was a call, the return address now atop the
952 stack is the address following the copied instruction. We need
953 to make it the address following the original instruction. */
954 if (i386_call_p (insn
))
958 const ULONGEST retaddr_len
= 4;
960 regcache_cooked_read_unsigned (regs
, I386_ESP_REGNUM
, &esp
);
961 retaddr
= read_memory_unsigned_integer (esp
, retaddr_len
, byte_order
);
962 retaddr
= (retaddr
- insn_offset
) & 0xffffffffUL
;
963 write_memory_unsigned_integer (esp
, retaddr_len
, byte_order
, retaddr
);
966 fprintf_unfiltered (gdb_stdlog
,
967 "displaced: relocated return addr at %s to %s\n",
968 paddress (gdbarch
, esp
),
969 paddress (gdbarch
, retaddr
));
974 append_insns (CORE_ADDR
*to
, ULONGEST len
, const gdb_byte
*buf
)
976 target_write_memory (*to
, buf
, len
);
981 i386_relocate_instruction (struct gdbarch
*gdbarch
,
982 CORE_ADDR
*to
, CORE_ADDR oldloc
)
984 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
985 gdb_byte buf
[I386_MAX_INSN_LEN
];
986 int offset
= 0, rel32
, newrel
;
988 gdb_byte
*insn
= buf
;
990 read_memory (oldloc
, buf
, I386_MAX_INSN_LEN
);
992 insn_length
= gdb_buffered_insn_length (gdbarch
, insn
,
993 I386_MAX_INSN_LEN
, oldloc
);
995 /* Get past the prefixes. */
996 insn
= i386_skip_prefixes (insn
, I386_MAX_INSN_LEN
);
998 /* Adjust calls with 32-bit relative addresses as push/jump, with
999 the address pushed being the location where the original call in
1000 the user program would return to. */
1001 if (insn
[0] == 0xe8)
1003 gdb_byte push_buf
[16];
1004 unsigned int ret_addr
;
1006 /* Where "ret" in the original code will return to. */
1007 ret_addr
= oldloc
+ insn_length
;
1008 push_buf
[0] = 0x68; /* pushq $... */
1009 store_unsigned_integer (&push_buf
[1], 4, byte_order
, ret_addr
);
1010 /* Push the push. */
1011 append_insns (to
, 5, push_buf
);
1013 /* Convert the relative call to a relative jump. */
1016 /* Adjust the destination offset. */
1017 rel32
= extract_signed_integer (insn
+ 1, 4, byte_order
);
1018 newrel
= (oldloc
- *to
) + rel32
;
1019 store_signed_integer (insn
+ 1, 4, byte_order
, newrel
);
1021 if (debug_displaced
)
1022 fprintf_unfiltered (gdb_stdlog
,
1023 "Adjusted insn rel32=%s at %s to"
1024 " rel32=%s at %s\n",
1025 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1026 hex_string (newrel
), paddress (gdbarch
, *to
));
1028 /* Write the adjusted jump into its displaced location. */
1029 append_insns (to
, 5, insn
);
1033 /* Adjust jumps with 32-bit relative addresses. Calls are already
1035 if (insn
[0] == 0xe9)
1037 /* Adjust conditional jumps. */
1038 else if (insn
[0] == 0x0f && (insn
[1] & 0xf0) == 0x80)
1043 rel32
= extract_signed_integer (insn
+ offset
, 4, byte_order
);
1044 newrel
= (oldloc
- *to
) + rel32
;
1045 store_signed_integer (insn
+ offset
, 4, byte_order
, newrel
);
1046 if (debug_displaced
)
1047 fprintf_unfiltered (gdb_stdlog
,
1048 "Adjusted insn rel32=%s at %s to"
1049 " rel32=%s at %s\n",
1050 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1051 hex_string (newrel
), paddress (gdbarch
, *to
));
1054 /* Write the adjusted instructions into their displaced
1056 append_insns (to
, insn_length
, buf
);
1060 #ifdef I386_REGNO_TO_SYMMETRY
1061 #error "The Sequent Symmetry is no longer supported."
1064 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
1065 and %esp "belong" to the calling function. Therefore these
1066 registers should be saved if they're going to be modified. */
1068 /* The maximum number of saved registers. This should include all
1069 registers mentioned above, and %eip. */
1070 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
1072 struct i386_frame_cache
1080 /* Saved registers. */
1081 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
1086 /* Stack space reserved for local variables. */
1090 /* Allocate and initialize a frame cache. */
1092 static struct i386_frame_cache
*
1093 i386_alloc_frame_cache (void)
1095 struct i386_frame_cache
*cache
;
1098 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
1103 cache
->sp_offset
= -4;
1106 /* Saved registers. We initialize these to -1 since zero is a valid
1107 offset (that's where %ebp is supposed to be stored). */
1108 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
1109 cache
->saved_regs
[i
] = -1;
1110 cache
->saved_sp
= 0;
1111 cache
->saved_sp_reg
= -1;
1112 cache
->pc_in_eax
= 0;
1114 /* Frameless until proven otherwise. */
1120 /* If the instruction at PC is a jump, return the address of its
1121 target. Otherwise, return PC. */
1124 i386_follow_jump (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1126 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1131 if (target_read_code (pc
, &op
, 1))
1138 op
= read_code_unsigned_integer (pc
+ 1, 1, byte_order
);
1144 /* Relative jump: if data16 == 0, disp32, else disp16. */
1147 delta
= read_memory_integer (pc
+ 2, 2, byte_order
);
1149 /* Include the size of the jmp instruction (including the
1155 delta
= read_memory_integer (pc
+ 1, 4, byte_order
);
1157 /* Include the size of the jmp instruction. */
1162 /* Relative jump, disp8 (ignore data16). */
1163 delta
= read_memory_integer (pc
+ data16
+ 1, 1, byte_order
);
1165 delta
+= data16
+ 2;
1172 /* Check whether PC points at a prologue for a function returning a
1173 structure or union. If so, it updates CACHE and returns the
1174 address of the first instruction after the code sequence that
1175 removes the "hidden" argument from the stack or CURRENT_PC,
1176 whichever is smaller. Otherwise, return PC. */
1179 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
1180 struct i386_frame_cache
*cache
)
1182 /* Functions that return a structure or union start with:
1185 xchgl %eax, (%esp) 0x87 0x04 0x24
1186 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
1188 (the System V compiler puts out the second `xchg' instruction,
1189 and the assembler doesn't try to optimize it, so the 'sib' form
1190 gets generated). This sequence is used to get the address of the
1191 return buffer for a function that returns a structure. */
1192 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
1193 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
1197 if (current_pc
<= pc
)
1200 if (target_read_code (pc
, &op
, 1))
1203 if (op
!= 0x58) /* popl %eax */
1206 if (target_read_code (pc
+ 1, buf
, 4))
1209 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
1212 if (current_pc
== pc
)
1214 cache
->sp_offset
+= 4;
1218 if (current_pc
== pc
+ 1)
1220 cache
->pc_in_eax
= 1;
1224 if (buf
[1] == proto1
[1])
1231 i386_skip_probe (CORE_ADDR pc
)
1233 /* A function may start with
1247 if (target_read_code (pc
, &op
, 1))
1250 if (op
== 0x68 || op
== 0x6a)
1254 /* Skip past the `pushl' instruction; it has either a one-byte or a
1255 four-byte operand, depending on the opcode. */
1261 /* Read the following 8 bytes, which should be `call _probe' (6
1262 bytes) followed by `addl $4,%esp' (2 bytes). */
1263 read_memory (pc
+ delta
, buf
, sizeof (buf
));
1264 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
1265 pc
+= delta
+ sizeof (buf
);
1271 /* GCC 4.1 and later, can put code in the prologue to realign the
1272 stack pointer. Check whether PC points to such code, and update
1273 CACHE accordingly. Return the first instruction after the code
1274 sequence or CURRENT_PC, whichever is smaller. If we don't
1275 recognize the code, return PC. */
1278 i386_analyze_stack_align (CORE_ADDR pc
, CORE_ADDR current_pc
,
1279 struct i386_frame_cache
*cache
)
1281 /* There are 2 code sequences to re-align stack before the frame
1284 1. Use a caller-saved saved register:
1290 2. Use a callee-saved saved register:
1297 "andl $-XXX, %esp" can be either 3 bytes or 6 bytes:
1299 0x83 0xe4 0xf0 andl $-16, %esp
1300 0x81 0xe4 0x00 0xff 0xff 0xff andl $-256, %esp
1305 int offset
, offset_and
;
1306 static int regnums
[8] = {
1307 I386_EAX_REGNUM
, /* %eax */
1308 I386_ECX_REGNUM
, /* %ecx */
1309 I386_EDX_REGNUM
, /* %edx */
1310 I386_EBX_REGNUM
, /* %ebx */
1311 I386_ESP_REGNUM
, /* %esp */
1312 I386_EBP_REGNUM
, /* %ebp */
1313 I386_ESI_REGNUM
, /* %esi */
1314 I386_EDI_REGNUM
/* %edi */
1317 if (target_read_code (pc
, buf
, sizeof buf
))
1320 /* Check caller-saved saved register. The first instruction has
1321 to be "leal 4(%esp), %reg". */
1322 if (buf
[0] == 0x8d && buf
[2] == 0x24 && buf
[3] == 0x4)
1324 /* MOD must be binary 10 and R/M must be binary 100. */
1325 if ((buf
[1] & 0xc7) != 0x44)
1328 /* REG has register number. */
1329 reg
= (buf
[1] >> 3) & 7;
1334 /* Check callee-saved saved register. The first instruction
1335 has to be "pushl %reg". */
1336 if ((buf
[0] & 0xf8) != 0x50)
1342 /* The next instruction has to be "leal 8(%esp), %reg". */
1343 if (buf
[1] != 0x8d || buf
[3] != 0x24 || buf
[4] != 0x8)
1346 /* MOD must be binary 10 and R/M must be binary 100. */
1347 if ((buf
[2] & 0xc7) != 0x44)
1350 /* REG has register number. Registers in pushl and leal have to
1352 if (reg
!= ((buf
[2] >> 3) & 7))
1358 /* Rigister can't be %esp nor %ebp. */
1359 if (reg
== 4 || reg
== 5)
1362 /* The next instruction has to be "andl $-XXX, %esp". */
1363 if (buf
[offset
+ 1] != 0xe4
1364 || (buf
[offset
] != 0x81 && buf
[offset
] != 0x83))
1367 offset_and
= offset
;
1368 offset
+= buf
[offset
] == 0x81 ? 6 : 3;
1370 /* The next instruction has to be "pushl -4(%reg)". 8bit -4 is
1371 0xfc. REG must be binary 110 and MOD must be binary 01. */
1372 if (buf
[offset
] != 0xff
1373 || buf
[offset
+ 2] != 0xfc
1374 || (buf
[offset
+ 1] & 0xf8) != 0x70)
1377 /* R/M has register. Registers in leal and pushl have to be the
1379 if (reg
!= (buf
[offset
+ 1] & 7))
1382 if (current_pc
> pc
+ offset_and
)
1383 cache
->saved_sp_reg
= regnums
[reg
];
1385 return std::min (pc
+ offset
+ 3, current_pc
);
1388 /* Maximum instruction length we need to handle. */
1389 #define I386_MAX_MATCHED_INSN_LEN 6
1391 /* Instruction description. */
1395 gdb_byte insn
[I386_MAX_MATCHED_INSN_LEN
];
1396 gdb_byte mask
[I386_MAX_MATCHED_INSN_LEN
];
1399 /* Return whether instruction at PC matches PATTERN. */
1402 i386_match_pattern (CORE_ADDR pc
, struct i386_insn pattern
)
1406 if (target_read_code (pc
, &op
, 1))
1409 if ((op
& pattern
.mask
[0]) == pattern
.insn
[0])
1411 gdb_byte buf
[I386_MAX_MATCHED_INSN_LEN
- 1];
1412 int insn_matched
= 1;
1415 gdb_assert (pattern
.len
> 1);
1416 gdb_assert (pattern
.len
<= I386_MAX_MATCHED_INSN_LEN
);
1418 if (target_read_code (pc
+ 1, buf
, pattern
.len
- 1))
1421 for (i
= 1; i
< pattern
.len
; i
++)
1423 if ((buf
[i
- 1] & pattern
.mask
[i
]) != pattern
.insn
[i
])
1426 return insn_matched
;
1431 /* Search for the instruction at PC in the list INSN_PATTERNS. Return
1432 the first instruction description that matches. Otherwise, return
1435 static struct i386_insn
*
1436 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1438 struct i386_insn
*pattern
;
1440 for (pattern
= insn_patterns
; pattern
->len
> 0; pattern
++)
1442 if (i386_match_pattern (pc
, *pattern
))
1449 /* Return whether PC points inside a sequence of instructions that
1450 matches INSN_PATTERNS. */
1453 i386_match_insn_block (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1455 CORE_ADDR current_pc
;
1457 struct i386_insn
*insn
;
1459 insn
= i386_match_insn (pc
, insn_patterns
);
1464 ix
= insn
- insn_patterns
;
1465 for (i
= ix
- 1; i
>= 0; i
--)
1467 current_pc
-= insn_patterns
[i
].len
;
1469 if (!i386_match_pattern (current_pc
, insn_patterns
[i
]))
1473 current_pc
= pc
+ insn
->len
;
1474 for (insn
= insn_patterns
+ ix
+ 1; insn
->len
> 0; insn
++)
1476 if (!i386_match_pattern (current_pc
, *insn
))
1479 current_pc
+= insn
->len
;
1485 /* Some special instructions that might be migrated by GCC into the
1486 part of the prologue that sets up the new stack frame. Because the
1487 stack frame hasn't been setup yet, no registers have been saved
1488 yet, and only the scratch registers %eax, %ecx and %edx can be
1491 struct i386_insn i386_frame_setup_skip_insns
[] =
1493 /* Check for `movb imm8, r' and `movl imm32, r'.
1495 ??? Should we handle 16-bit operand-sizes here? */
1497 /* `movb imm8, %al' and `movb imm8, %ah' */
1498 /* `movb imm8, %cl' and `movb imm8, %ch' */
1499 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
1500 /* `movb imm8, %dl' and `movb imm8, %dh' */
1501 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
1502 /* `movl imm32, %eax' and `movl imm32, %ecx' */
1503 { 5, { 0xb8 }, { 0xfe } },
1504 /* `movl imm32, %edx' */
1505 { 5, { 0xba }, { 0xff } },
1507 /* Check for `mov imm32, r32'. Note that there is an alternative
1508 encoding for `mov m32, %eax'.
1510 ??? Should we handle SIB addressing here?
1511 ??? Should we handle 16-bit operand-sizes here? */
1513 /* `movl m32, %eax' */
1514 { 5, { 0xa1 }, { 0xff } },
1515 /* `movl m32, %eax' and `mov; m32, %ecx' */
1516 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
1517 /* `movl m32, %edx' */
1518 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
1520 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
1521 Because of the symmetry, there are actually two ways to encode
1522 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
1523 opcode bytes 0x31 and 0x33 for `xorl'. */
1525 /* `subl %eax, %eax' */
1526 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
1527 /* `subl %ecx, %ecx' */
1528 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
1529 /* `subl %edx, %edx' */
1530 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
1531 /* `xorl %eax, %eax' */
1532 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
1533 /* `xorl %ecx, %ecx' */
1534 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
1535 /* `xorl %edx, %edx' */
1536 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
1541 /* Check whether PC points to a no-op instruction. */
1543 i386_skip_noop (CORE_ADDR pc
)
1548 if (target_read_code (pc
, &op
, 1))
1554 /* Ignore `nop' instruction. */
1558 if (target_read_code (pc
, &op
, 1))
1562 /* Ignore no-op instruction `mov %edi, %edi'.
1563 Microsoft system dlls often start with
1564 a `mov %edi,%edi' instruction.
1565 The 5 bytes before the function start are
1566 filled with `nop' instructions.
1567 This pattern can be used for hot-patching:
1568 The `mov %edi, %edi' instruction can be replaced by a
1569 near jump to the location of the 5 `nop' instructions
1570 which can be replaced by a 32-bit jump to anywhere
1571 in the 32-bit address space. */
1573 else if (op
== 0x8b)
1575 if (target_read_code (pc
+ 1, &op
, 1))
1581 if (target_read_code (pc
, &op
, 1))
1591 /* Check whether PC points at a code that sets up a new stack frame.
1592 If so, it updates CACHE and returns the address of the first
1593 instruction after the sequence that sets up the frame or LIMIT,
1594 whichever is smaller. If we don't recognize the code, return PC. */
1597 i386_analyze_frame_setup (struct gdbarch
*gdbarch
,
1598 CORE_ADDR pc
, CORE_ADDR limit
,
1599 struct i386_frame_cache
*cache
)
1601 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1602 struct i386_insn
*insn
;
1609 if (target_read_code (pc
, &op
, 1))
1612 if (op
== 0x55) /* pushl %ebp */
1614 /* Take into account that we've executed the `pushl %ebp' that
1615 starts this instruction sequence. */
1616 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
1617 cache
->sp_offset
+= 4;
1620 /* If that's all, return now. */
1624 /* Check for some special instructions that might be migrated by
1625 GCC into the prologue and skip them. At this point in the
1626 prologue, code should only touch the scratch registers %eax,
1627 %ecx and %edx, so while the number of possibilities is sheer,
1630 Make sure we only skip these instructions if we later see the
1631 `movl %esp, %ebp' that actually sets up the frame. */
1632 while (pc
+ skip
< limit
)
1634 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
1641 /* If that's all, return now. */
1642 if (limit
<= pc
+ skip
)
1645 if (target_read_code (pc
+ skip
, &op
, 1))
1648 /* The i386 prologue looks like
1654 and a different prologue can be generated for atom.
1658 lea -0x10(%esp),%esp
1660 We handle both of them here. */
1664 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
1666 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1672 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1677 case 0x8d: /* Check for 'lea (%ebp), %ebp'. */
1678 if (read_code_unsigned_integer (pc
+ skip
+ 1, 2, byte_order
)
1687 /* OK, we actually have a frame. We just don't know how large
1688 it is yet. Set its size to zero. We'll adjust it if
1689 necessary. We also now commit to skipping the special
1690 instructions mentioned before. */
1693 /* If that's all, return now. */
1697 /* Check for stack adjustment
1703 NOTE: You can't subtract a 16-bit immediate from a 32-bit
1704 reg, so we don't have to worry about a data16 prefix. */
1705 if (target_read_code (pc
, &op
, 1))
1709 /* `subl' with 8-bit immediate. */
1710 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1711 /* Some instruction starting with 0x83 other than `subl'. */
1714 /* `subl' with signed 8-bit immediate (though it wouldn't
1715 make sense to be negative). */
1716 cache
->locals
= read_code_integer (pc
+ 2, 1, byte_order
);
1719 else if (op
== 0x81)
1721 /* Maybe it is `subl' with a 32-bit immediate. */
1722 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1723 /* Some instruction starting with 0x81 other than `subl'. */
1726 /* It is `subl' with a 32-bit immediate. */
1727 cache
->locals
= read_code_integer (pc
+ 2, 4, byte_order
);
1730 else if (op
== 0x8d)
1732 /* The ModR/M byte is 0x64. */
1733 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0x64)
1735 /* 'lea' with 8-bit displacement. */
1736 cache
->locals
= -1 * read_code_integer (pc
+ 3, 1, byte_order
);
1741 /* Some instruction other than `subl' nor 'lea'. */
1745 else if (op
== 0xc8) /* enter */
1747 cache
->locals
= read_code_unsigned_integer (pc
+ 1, 2, byte_order
);
1754 /* Check whether PC points at code that saves registers on the stack.
1755 If so, it updates CACHE and returns the address of the first
1756 instruction after the register saves or CURRENT_PC, whichever is
1757 smaller. Otherwise, return PC. */
1760 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
1761 struct i386_frame_cache
*cache
)
1763 CORE_ADDR offset
= 0;
1767 if (cache
->locals
> 0)
1768 offset
-= cache
->locals
;
1769 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
1771 if (target_read_code (pc
, &op
, 1))
1773 if (op
< 0x50 || op
> 0x57)
1777 cache
->saved_regs
[op
- 0x50] = offset
;
1778 cache
->sp_offset
+= 4;
1785 /* Do a full analysis of the prologue at PC and update CACHE
1786 accordingly. Bail out early if CURRENT_PC is reached. Return the
1787 address where the analysis stopped.
1789 We handle these cases:
1791 The startup sequence can be at the start of the function, or the
1792 function can start with a branch to startup code at the end.
1794 %ebp can be set up with either the 'enter' instruction, or "pushl
1795 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
1796 once used in the System V compiler).
1798 Local space is allocated just below the saved %ebp by either the
1799 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
1800 16-bit unsigned argument for space to allocate, and the 'addl'
1801 instruction could have either a signed byte, or 32-bit immediate.
1803 Next, the registers used by this function are pushed. With the
1804 System V compiler they will always be in the order: %edi, %esi,
1805 %ebx (and sometimes a harmless bug causes it to also save but not
1806 restore %eax); however, the code below is willing to see the pushes
1807 in any order, and will handle up to 8 of them.
1809 If the setup sequence is at the end of the function, then the next
1810 instruction will be a branch back to the start. */
1813 i386_analyze_prologue (struct gdbarch
*gdbarch
,
1814 CORE_ADDR pc
, CORE_ADDR current_pc
,
1815 struct i386_frame_cache
*cache
)
1817 pc
= i386_skip_noop (pc
);
1818 pc
= i386_follow_jump (gdbarch
, pc
);
1819 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
1820 pc
= i386_skip_probe (pc
);
1821 pc
= i386_analyze_stack_align (pc
, current_pc
, cache
);
1822 pc
= i386_analyze_frame_setup (gdbarch
, pc
, current_pc
, cache
);
1823 return i386_analyze_register_saves (pc
, current_pc
, cache
);
1826 /* Return PC of first real instruction. */
1829 i386_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
)
1831 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1833 static gdb_byte pic_pat
[6] =
1835 0xe8, 0, 0, 0, 0, /* call 0x0 */
1836 0x5b, /* popl %ebx */
1838 struct i386_frame_cache cache
;
1842 CORE_ADDR func_addr
;
1844 if (find_pc_partial_function (start_pc
, NULL
, &func_addr
, NULL
))
1846 CORE_ADDR post_prologue_pc
1847 = skip_prologue_using_sal (gdbarch
, func_addr
);
1848 struct compunit_symtab
*cust
= find_pc_compunit_symtab (func_addr
);
1850 /* Clang always emits a line note before the prologue and another
1851 one after. We trust clang to emit usable line notes. */
1852 if (post_prologue_pc
1854 && COMPUNIT_PRODUCER (cust
) != NULL
1855 && startswith (COMPUNIT_PRODUCER (cust
), "clang ")))
1856 return std::max (start_pc
, post_prologue_pc
);
1860 pc
= i386_analyze_prologue (gdbarch
, start_pc
, 0xffffffff, &cache
);
1861 if (cache
.locals
< 0)
1864 /* Found valid frame setup. */
1866 /* The native cc on SVR4 in -K PIC mode inserts the following code
1867 to get the address of the global offset table (GOT) into register
1872 movl %ebx,x(%ebp) (optional)
1875 This code is with the rest of the prologue (at the end of the
1876 function), so we have to skip it to get to the first real
1877 instruction at the start of the function. */
1879 for (i
= 0; i
< 6; i
++)
1881 if (target_read_code (pc
+ i
, &op
, 1))
1884 if (pic_pat
[i
] != op
)
1891 if (target_read_code (pc
+ delta
, &op
, 1))
1894 if (op
== 0x89) /* movl %ebx, x(%ebp) */
1896 op
= read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
);
1898 if (op
== 0x5d) /* One byte offset from %ebp. */
1900 else if (op
== 0x9d) /* Four byte offset from %ebp. */
1902 else /* Unexpected instruction. */
1905 if (target_read_code (pc
+ delta
, &op
, 1))
1910 if (delta
> 0 && op
== 0x81
1911 && read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
)
1918 /* If the function starts with a branch (to startup code at the end)
1919 the last instruction should bring us back to the first
1920 instruction of the real code. */
1921 if (i386_follow_jump (gdbarch
, start_pc
) != start_pc
)
1922 pc
= i386_follow_jump (gdbarch
, pc
);
1927 /* Check that the code pointed to by PC corresponds to a call to
1928 __main, skip it if so. Return PC otherwise. */
1931 i386_skip_main_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1933 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1936 if (target_read_code (pc
, &op
, 1))
1942 if (target_read_code (pc
+ 1, buf
, sizeof buf
) == 0)
1944 /* Make sure address is computed correctly as a 32bit
1945 integer even if CORE_ADDR is 64 bit wide. */
1946 struct bound_minimal_symbol s
;
1947 CORE_ADDR call_dest
;
1949 call_dest
= pc
+ 5 + extract_signed_integer (buf
, 4, byte_order
);
1950 call_dest
= call_dest
& 0xffffffffU
;
1951 s
= lookup_minimal_symbol_by_pc (call_dest
);
1952 if (s
.minsym
!= NULL
1953 && s
.minsym
->linkage_name () != NULL
1954 && strcmp (s
.minsym
->linkage_name (), "__main") == 0)
1962 /* This function is 64-bit safe. */
1965 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1969 frame_unwind_register (next_frame
, gdbarch_pc_regnum (gdbarch
), buf
);
1970 return extract_typed_address (buf
, builtin_type (gdbarch
)->builtin_func_ptr
);
1974 /* Normal frames. */
1977 i386_frame_cache_1 (struct frame_info
*this_frame
,
1978 struct i386_frame_cache
*cache
)
1980 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1981 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1985 cache
->pc
= get_frame_func (this_frame
);
1987 /* In principle, for normal frames, %ebp holds the frame pointer,
1988 which holds the base address for the current stack frame.
1989 However, for functions that don't need it, the frame pointer is
1990 optional. For these "frameless" functions the frame pointer is
1991 actually the frame pointer of the calling frame. Signal
1992 trampolines are just a special case of a "frameless" function.
1993 They (usually) share their frame pointer with the frame that was
1994 in progress when the signal occurred. */
1996 get_frame_register (this_frame
, I386_EBP_REGNUM
, buf
);
1997 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
);
1998 if (cache
->base
== 0)
2004 /* For normal frames, %eip is stored at 4(%ebp). */
2005 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
2008 i386_analyze_prologue (gdbarch
, cache
->pc
, get_frame_pc (this_frame
),
2011 if (cache
->locals
< 0)
2013 /* We didn't find a valid frame, which means that CACHE->base
2014 currently holds the frame pointer for our calling frame. If
2015 we're at the start of a function, or somewhere half-way its
2016 prologue, the function's frame probably hasn't been fully
2017 setup yet. Try to reconstruct the base address for the stack
2018 frame by looking at the stack pointer. For truly "frameless"
2019 functions this might work too. */
2021 if (cache
->saved_sp_reg
!= -1)
2023 /* Saved stack pointer has been saved. */
2024 get_frame_register (this_frame
, cache
->saved_sp_reg
, buf
);
2025 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2027 /* We're halfway aligning the stack. */
2028 cache
->base
= ((cache
->saved_sp
- 4) & 0xfffffff0) - 4;
2029 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->saved_sp
- 4;
2031 /* This will be added back below. */
2032 cache
->saved_regs
[I386_EIP_REGNUM
] -= cache
->base
;
2034 else if (cache
->pc
!= 0
2035 || target_read_code (get_frame_pc (this_frame
), buf
, 1))
2037 /* We're in a known function, but did not find a frame
2038 setup. Assume that the function does not use %ebp.
2039 Alternatively, we may have jumped to an invalid
2040 address; in that case there is definitely no new
2042 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2043 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
)
2047 /* We're in an unknown function. We could not find the start
2048 of the function to analyze the prologue; our best option is
2049 to assume a typical frame layout with the caller's %ebp
2051 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
2054 if (cache
->saved_sp_reg
!= -1)
2056 /* Saved stack pointer has been saved (but the SAVED_SP_REG
2057 register may be unavailable). */
2058 if (cache
->saved_sp
== 0
2059 && deprecated_frame_register_read (this_frame
,
2060 cache
->saved_sp_reg
, buf
))
2061 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2063 /* Now that we have the base address for the stack frame we can
2064 calculate the value of %esp in the calling frame. */
2065 else if (cache
->saved_sp
== 0)
2066 cache
->saved_sp
= cache
->base
+ 8;
2068 /* Adjust all the saved registers such that they contain addresses
2069 instead of offsets. */
2070 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
2071 if (cache
->saved_regs
[i
] != -1)
2072 cache
->saved_regs
[i
] += cache
->base
;
2077 static struct i386_frame_cache
*
2078 i386_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2080 struct i386_frame_cache
*cache
;
2083 return (struct i386_frame_cache
*) *this_cache
;
2085 cache
= i386_alloc_frame_cache ();
2086 *this_cache
= cache
;
2090 i386_frame_cache_1 (this_frame
, cache
);
2092 catch (const gdb_exception_error
&ex
)
2094 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2102 i386_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2103 struct frame_id
*this_id
)
2105 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2108 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2109 else if (cache
->base
== 0)
2111 /* This marks the outermost frame. */
2115 /* See the end of i386_push_dummy_call. */
2116 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2120 static enum unwind_stop_reason
2121 i386_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2124 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2127 return UNWIND_UNAVAILABLE
;
2129 /* This marks the outermost frame. */
2130 if (cache
->base
== 0)
2131 return UNWIND_OUTERMOST
;
2133 return UNWIND_NO_REASON
;
2136 static struct value
*
2137 i386_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
2140 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2142 gdb_assert (regnum
>= 0);
2144 /* The System V ABI says that:
2146 "The flags register contains the system flags, such as the
2147 direction flag and the carry flag. The direction flag must be
2148 set to the forward (that is, zero) direction before entry and
2149 upon exit from a function. Other user flags have no specified
2150 role in the standard calling sequence and are not preserved."
2152 To guarantee the "upon exit" part of that statement we fake a
2153 saved flags register that has its direction flag cleared.
2155 Note that GCC doesn't seem to rely on the fact that the direction
2156 flag is cleared after a function return; it always explicitly
2157 clears the flag before operations where it matters.
2159 FIXME: kettenis/20030316: I'm not quite sure whether this is the
2160 right thing to do. The way we fake the flags register here makes
2161 it impossible to change it. */
2163 if (regnum
== I386_EFLAGS_REGNUM
)
2167 val
= get_frame_register_unsigned (this_frame
, regnum
);
2169 return frame_unwind_got_constant (this_frame
, regnum
, val
);
2172 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
2173 return frame_unwind_got_register (this_frame
, regnum
, I386_EAX_REGNUM
);
2175 if (regnum
== I386_ESP_REGNUM
2176 && (cache
->saved_sp
!= 0 || cache
->saved_sp_reg
!= -1))
2178 /* If the SP has been saved, but we don't know where, then this
2179 means that SAVED_SP_REG register was found unavailable back
2180 when we built the cache. */
2181 if (cache
->saved_sp
== 0)
2182 return frame_unwind_got_register (this_frame
, regnum
,
2183 cache
->saved_sp_reg
);
2185 return frame_unwind_got_constant (this_frame
, regnum
,
2189 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
2190 return frame_unwind_got_memory (this_frame
, regnum
,
2191 cache
->saved_regs
[regnum
]);
2193 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2196 static const struct frame_unwind i386_frame_unwind
=
2199 i386_frame_unwind_stop_reason
,
2201 i386_frame_prev_register
,
2203 default_frame_sniffer
2206 /* Normal frames, but in a function epilogue. */
2208 /* Implement the stack_frame_destroyed_p gdbarch method.
2210 The epilogue is defined here as the 'ret' instruction, which will
2211 follow any instruction such as 'leave' or 'pop %ebp' that destroys
2212 the function's stack frame. */
2215 i386_stack_frame_destroyed_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
2218 struct compunit_symtab
*cust
;
2220 cust
= find_pc_compunit_symtab (pc
);
2221 if (cust
!= NULL
&& COMPUNIT_EPILOGUE_UNWIND_VALID (cust
))
2224 if (target_read_memory (pc
, &insn
, 1))
2225 return 0; /* Can't read memory at pc. */
2227 if (insn
!= 0xc3) /* 'ret' instruction. */
2234 i386_epilogue_frame_sniffer (const struct frame_unwind
*self
,
2235 struct frame_info
*this_frame
,
2236 void **this_prologue_cache
)
2238 if (frame_relative_level (this_frame
) == 0)
2239 return i386_stack_frame_destroyed_p (get_frame_arch (this_frame
),
2240 get_frame_pc (this_frame
));
2245 static struct i386_frame_cache
*
2246 i386_epilogue_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2248 struct i386_frame_cache
*cache
;
2252 return (struct i386_frame_cache
*) *this_cache
;
2254 cache
= i386_alloc_frame_cache ();
2255 *this_cache
= cache
;
2259 cache
->pc
= get_frame_func (this_frame
);
2261 /* At this point the stack looks as if we just entered the
2262 function, with the return address at the top of the
2264 sp
= get_frame_register_unsigned (this_frame
, I386_ESP_REGNUM
);
2265 cache
->base
= sp
+ cache
->sp_offset
;
2266 cache
->saved_sp
= cache
->base
+ 8;
2267 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->base
+ 4;
2271 catch (const gdb_exception_error
&ex
)
2273 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2280 static enum unwind_stop_reason
2281 i386_epilogue_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2284 struct i386_frame_cache
*cache
=
2285 i386_epilogue_frame_cache (this_frame
, this_cache
);
2288 return UNWIND_UNAVAILABLE
;
2290 return UNWIND_NO_REASON
;
2294 i386_epilogue_frame_this_id (struct frame_info
*this_frame
,
2296 struct frame_id
*this_id
)
2298 struct i386_frame_cache
*cache
=
2299 i386_epilogue_frame_cache (this_frame
, this_cache
);
2302 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2304 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2307 static struct value
*
2308 i386_epilogue_frame_prev_register (struct frame_info
*this_frame
,
2309 void **this_cache
, int regnum
)
2311 /* Make sure we've initialized the cache. */
2312 i386_epilogue_frame_cache (this_frame
, this_cache
);
2314 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2317 static const struct frame_unwind i386_epilogue_frame_unwind
=
2320 i386_epilogue_frame_unwind_stop_reason
,
2321 i386_epilogue_frame_this_id
,
2322 i386_epilogue_frame_prev_register
,
2324 i386_epilogue_frame_sniffer
2328 /* Stack-based trampolines. */
2330 /* These trampolines are used on cross x86 targets, when taking the
2331 address of a nested function. When executing these trampolines,
2332 no stack frame is set up, so we are in a similar situation as in
2333 epilogues and i386_epilogue_frame_this_id can be re-used. */
2335 /* Static chain passed in register. */
2337 struct i386_insn i386_tramp_chain_in_reg_insns
[] =
2339 /* `movl imm32, %eax' and `movl imm32, %ecx' */
2340 { 5, { 0xb8 }, { 0xfe } },
2343 { 5, { 0xe9 }, { 0xff } },
2348 /* Static chain passed on stack (when regparm=3). */
2350 struct i386_insn i386_tramp_chain_on_stack_insns
[] =
2353 { 5, { 0x68 }, { 0xff } },
2356 { 5, { 0xe9 }, { 0xff } },
2361 /* Return whether PC points inside a stack trampoline. */
2364 i386_in_stack_tramp_p (CORE_ADDR pc
)
2369 /* A stack trampoline is detected if no name is associated
2370 to the current pc and if it points inside a trampoline
2373 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2377 if (target_read_memory (pc
, &insn
, 1))
2380 if (!i386_match_insn_block (pc
, i386_tramp_chain_in_reg_insns
)
2381 && !i386_match_insn_block (pc
, i386_tramp_chain_on_stack_insns
))
2388 i386_stack_tramp_frame_sniffer (const struct frame_unwind
*self
,
2389 struct frame_info
*this_frame
,
2392 if (frame_relative_level (this_frame
) == 0)
2393 return i386_in_stack_tramp_p (get_frame_pc (this_frame
));
2398 static const struct frame_unwind i386_stack_tramp_frame_unwind
=
2401 i386_epilogue_frame_unwind_stop_reason
,
2402 i386_epilogue_frame_this_id
,
2403 i386_epilogue_frame_prev_register
,
2405 i386_stack_tramp_frame_sniffer
2408 /* Generate a bytecode expression to get the value of the saved PC. */
2411 i386_gen_return_address (struct gdbarch
*gdbarch
,
2412 struct agent_expr
*ax
, struct axs_value
*value
,
2415 /* The following sequence assumes the traditional use of the base
2417 ax_reg (ax
, I386_EBP_REGNUM
);
2419 ax_simple (ax
, aop_add
);
2420 value
->type
= register_type (gdbarch
, I386_EIP_REGNUM
);
2421 value
->kind
= axs_lvalue_memory
;
2425 /* Signal trampolines. */
2427 static struct i386_frame_cache
*
2428 i386_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2430 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2431 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2432 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2433 struct i386_frame_cache
*cache
;
2438 return (struct i386_frame_cache
*) *this_cache
;
2440 cache
= i386_alloc_frame_cache ();
2444 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2445 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
) - 4;
2447 addr
= tdep
->sigcontext_addr (this_frame
);
2448 if (tdep
->sc_reg_offset
)
2452 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
2454 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
2455 if (tdep
->sc_reg_offset
[i
] != -1)
2456 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
2460 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
2461 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
2466 catch (const gdb_exception_error
&ex
)
2468 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2472 *this_cache
= cache
;
2476 static enum unwind_stop_reason
2477 i386_sigtramp_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2480 struct i386_frame_cache
*cache
=
2481 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2484 return UNWIND_UNAVAILABLE
;
2486 return UNWIND_NO_REASON
;
2490 i386_sigtramp_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2491 struct frame_id
*this_id
)
2493 struct i386_frame_cache
*cache
=
2494 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2497 (*this_id
) = frame_id_build_unavailable_stack (get_frame_pc (this_frame
));
2500 /* See the end of i386_push_dummy_call. */
2501 (*this_id
) = frame_id_build (cache
->base
+ 8, get_frame_pc (this_frame
));
2505 static struct value
*
2506 i386_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2507 void **this_cache
, int regnum
)
2509 /* Make sure we've initialized the cache. */
2510 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2512 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2516 i386_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2517 struct frame_info
*this_frame
,
2518 void **this_prologue_cache
)
2520 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2522 /* We shouldn't even bother if we don't have a sigcontext_addr
2524 if (tdep
->sigcontext_addr
== NULL
)
2527 if (tdep
->sigtramp_p
!= NULL
)
2529 if (tdep
->sigtramp_p (this_frame
))
2533 if (tdep
->sigtramp_start
!= 0)
2535 CORE_ADDR pc
= get_frame_pc (this_frame
);
2537 gdb_assert (tdep
->sigtramp_end
!= 0);
2538 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
2545 static const struct frame_unwind i386_sigtramp_frame_unwind
=
2548 i386_sigtramp_frame_unwind_stop_reason
,
2549 i386_sigtramp_frame_this_id
,
2550 i386_sigtramp_frame_prev_register
,
2552 i386_sigtramp_frame_sniffer
2557 i386_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2559 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2564 static const struct frame_base i386_frame_base
=
2567 i386_frame_base_address
,
2568 i386_frame_base_address
,
2569 i386_frame_base_address
2572 static struct frame_id
2573 i386_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
2577 fp
= get_frame_register_unsigned (this_frame
, I386_EBP_REGNUM
);
2579 /* See the end of i386_push_dummy_call. */
2580 return frame_id_build (fp
+ 8, get_frame_pc (this_frame
));
2583 /* _Decimal128 function return values need 16-byte alignment on the
2587 i386_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
2589 return sp
& -(CORE_ADDR
)16;
2593 /* Figure out where the longjmp will land. Slurp the args out of the
2594 stack. We expect the first arg to be a pointer to the jmp_buf
2595 structure from which we extract the address that we will land at.
2596 This address is copied into PC. This routine returns non-zero on
2600 i386_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
2603 CORE_ADDR sp
, jb_addr
;
2604 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2605 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2606 int jb_pc_offset
= gdbarch_tdep (gdbarch
)->jb_pc_offset
;
2608 /* If JB_PC_OFFSET is -1, we have no way to find out where the
2609 longjmp will land. */
2610 if (jb_pc_offset
== -1)
2613 get_frame_register (frame
, I386_ESP_REGNUM
, buf
);
2614 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2615 if (target_read_memory (sp
+ 4, buf
, 4))
2618 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
2619 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, 4))
2622 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
2627 /* Check whether TYPE must be 16-byte-aligned when passed as a
2628 function argument. 16-byte vectors, _Decimal128 and structures or
2629 unions containing such types must be 16-byte-aligned; other
2630 arguments are 4-byte-aligned. */
2633 i386_16_byte_align_p (struct type
*type
)
2635 type
= check_typedef (type
);
2636 if ((TYPE_CODE (type
) == TYPE_CODE_DECFLOAT
2637 || (TYPE_CODE (type
) == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type
)))
2638 && TYPE_LENGTH (type
) == 16)
2640 if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
2641 return i386_16_byte_align_p (TYPE_TARGET_TYPE (type
));
2642 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
2643 || TYPE_CODE (type
) == TYPE_CODE_UNION
)
2646 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
2648 if (i386_16_byte_align_p (TYPE_FIELD_TYPE (type
, i
)))
2655 /* Implementation for set_gdbarch_push_dummy_code. */
2658 i386_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
2659 struct value
**args
, int nargs
, struct type
*value_type
,
2660 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
2661 struct regcache
*regcache
)
2663 /* Use 0xcc breakpoint - 1 byte. */
2667 /* Keep the stack aligned. */
2672 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2673 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
2674 struct value
**args
, CORE_ADDR sp
,
2675 function_call_return_method return_method
,
2676 CORE_ADDR struct_addr
)
2678 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2684 /* BND registers can be in arbitrary values at the moment of the
2685 inferior call. This can cause boundary violations that are not
2686 due to a real bug or even desired by the user. The best to be done
2687 is set the BND registers to allow access to the whole memory, INIT
2688 state, before pushing the inferior call. */
2689 i387_reset_bnd_regs (gdbarch
, regcache
);
2691 /* Determine the total space required for arguments and struct
2692 return address in a first pass (allowing for 16-byte-aligned
2693 arguments), then push arguments in a second pass. */
2695 for (write_pass
= 0; write_pass
< 2; write_pass
++)
2697 int args_space_used
= 0;
2699 if (return_method
== return_method_struct
)
2703 /* Push value address. */
2704 store_unsigned_integer (buf
, 4, byte_order
, struct_addr
);
2705 write_memory (sp
, buf
, 4);
2706 args_space_used
+= 4;
2712 for (i
= 0; i
< nargs
; i
++)
2714 int len
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
2718 if (i386_16_byte_align_p (value_enclosing_type (args
[i
])))
2719 args_space_used
= align_up (args_space_used
, 16);
2721 write_memory (sp
+ args_space_used
,
2722 value_contents_all (args
[i
]), len
);
2723 /* The System V ABI says that:
2725 "An argument's size is increased, if necessary, to make it a
2726 multiple of [32-bit] words. This may require tail padding,
2727 depending on the size of the argument."
2729 This makes sure the stack stays word-aligned. */
2730 args_space_used
+= align_up (len
, 4);
2734 if (i386_16_byte_align_p (value_enclosing_type (args
[i
])))
2735 args_space
= align_up (args_space
, 16);
2736 args_space
+= align_up (len
, 4);
2744 /* The original System V ABI only requires word alignment,
2745 but modern incarnations need 16-byte alignment in order
2746 to support SSE. Since wasting a few bytes here isn't
2747 harmful we unconditionally enforce 16-byte alignment. */
2752 /* Store return address. */
2754 store_unsigned_integer (buf
, 4, byte_order
, bp_addr
);
2755 write_memory (sp
, buf
, 4);
2757 /* Finally, update the stack pointer... */
2758 store_unsigned_integer (buf
, 4, byte_order
, sp
);
2759 regcache
->cooked_write (I386_ESP_REGNUM
, buf
);
2761 /* ...and fake a frame pointer. */
2762 regcache
->cooked_write (I386_EBP_REGNUM
, buf
);
2764 /* MarkK wrote: This "+ 8" is all over the place:
2765 (i386_frame_this_id, i386_sigtramp_frame_this_id,
2766 i386_dummy_id). It's there, since all frame unwinders for
2767 a given target have to agree (within a certain margin) on the
2768 definition of the stack address of a frame. Otherwise frame id
2769 comparison might not work correctly. Since DWARF2/GCC uses the
2770 stack address *before* the function call as a frame's CFA. On
2771 the i386, when %ebp is used as a frame pointer, the offset
2772 between the contents %ebp and the CFA as defined by GCC. */
2776 /* These registers are used for returning integers (and on some
2777 targets also for returning `struct' and `union' values when their
2778 size and alignment match an integer type). */
2779 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
2780 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
2782 /* Read, for architecture GDBARCH, a function return value of TYPE
2783 from REGCACHE, and copy that into VALBUF. */
2786 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2787 struct regcache
*regcache
, gdb_byte
*valbuf
)
2789 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2790 int len
= TYPE_LENGTH (type
);
2791 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2793 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2795 if (tdep
->st0_regnum
< 0)
2797 warning (_("Cannot find floating-point return value."));
2798 memset (valbuf
, 0, len
);
2802 /* Floating-point return values can be found in %st(0). Convert
2803 its contents to the desired type. This is probably not
2804 exactly how it would happen on the target itself, but it is
2805 the best we can do. */
2806 regcache
->raw_read (I386_ST0_REGNUM
, buf
);
2807 target_float_convert (buf
, i387_ext_type (gdbarch
), valbuf
, type
);
2811 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2812 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2814 if (len
<= low_size
)
2816 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2817 memcpy (valbuf
, buf
, len
);
2819 else if (len
<= (low_size
+ high_size
))
2821 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2822 memcpy (valbuf
, buf
, low_size
);
2823 regcache
->raw_read (HIGH_RETURN_REGNUM
, buf
);
2824 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
2827 internal_error (__FILE__
, __LINE__
,
2828 _("Cannot extract return value of %d bytes long."),
2833 /* Write, for architecture GDBARCH, a function return value of TYPE
2834 from VALBUF into REGCACHE. */
2837 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2838 struct regcache
*regcache
, const gdb_byte
*valbuf
)
2840 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2841 int len
= TYPE_LENGTH (type
);
2843 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2846 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2848 if (tdep
->st0_regnum
< 0)
2850 warning (_("Cannot set floating-point return value."));
2854 /* Returning floating-point values is a bit tricky. Apart from
2855 storing the return value in %st(0), we have to simulate the
2856 state of the FPU at function return point. */
2858 /* Convert the value found in VALBUF to the extended
2859 floating-point format used by the FPU. This is probably
2860 not exactly how it would happen on the target itself, but
2861 it is the best we can do. */
2862 target_float_convert (valbuf
, type
, buf
, i387_ext_type (gdbarch
));
2863 regcache
->raw_write (I386_ST0_REGNUM
, buf
);
2865 /* Set the top of the floating-point register stack to 7. The
2866 actual value doesn't really matter, but 7 is what a normal
2867 function return would end up with if the program started out
2868 with a freshly initialized FPU. */
2869 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
2871 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
2873 /* Mark %st(1) through %st(7) as empty. Since we set the top of
2874 the floating-point register stack to 7, the appropriate value
2875 for the tag word is 0x3fff. */
2876 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
2880 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2881 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2883 if (len
<= low_size
)
2884 regcache
->raw_write_part (LOW_RETURN_REGNUM
, 0, len
, valbuf
);
2885 else if (len
<= (low_size
+ high_size
))
2887 regcache
->raw_write (LOW_RETURN_REGNUM
, valbuf
);
2888 regcache
->raw_write_part (HIGH_RETURN_REGNUM
, 0, len
- low_size
,
2892 internal_error (__FILE__
, __LINE__
,
2893 _("Cannot store return value of %d bytes long."), len
);
2898 /* This is the variable that is set with "set struct-convention", and
2899 its legitimate values. */
2900 static const char default_struct_convention
[] = "default";
2901 static const char pcc_struct_convention
[] = "pcc";
2902 static const char reg_struct_convention
[] = "reg";
2903 static const char *const valid_conventions
[] =
2905 default_struct_convention
,
2906 pcc_struct_convention
,
2907 reg_struct_convention
,
2910 static const char *struct_convention
= default_struct_convention
;
2912 /* Return non-zero if TYPE, which is assumed to be a structure,
2913 a union type, or an array type, should be returned in registers
2914 for architecture GDBARCH. */
2917 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
2919 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2920 enum type_code code
= TYPE_CODE (type
);
2921 int len
= TYPE_LENGTH (type
);
2923 gdb_assert (code
== TYPE_CODE_STRUCT
2924 || code
== TYPE_CODE_UNION
2925 || code
== TYPE_CODE_ARRAY
);
2927 if (struct_convention
== pcc_struct_convention
2928 || (struct_convention
== default_struct_convention
2929 && tdep
->struct_return
== pcc_struct_return
))
2932 /* Structures consisting of a single `float', `double' or 'long
2933 double' member are returned in %st(0). */
2934 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
2936 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
2937 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2938 return (len
== 4 || len
== 8 || len
== 12);
2941 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
2944 /* Determine, for architecture GDBARCH, how a return value of TYPE
2945 should be returned. If it is supposed to be returned in registers,
2946 and READBUF is non-zero, read the appropriate value from REGCACHE,
2947 and copy it into READBUF. If WRITEBUF is non-zero, write the value
2948 from WRITEBUF into REGCACHE. */
2950 static enum return_value_convention
2951 i386_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
2952 struct type
*type
, struct regcache
*regcache
,
2953 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
2955 enum type_code code
= TYPE_CODE (type
);
2957 if (((code
== TYPE_CODE_STRUCT
2958 || code
== TYPE_CODE_UNION
2959 || code
== TYPE_CODE_ARRAY
)
2960 && !i386_reg_struct_return_p (gdbarch
, type
))
2961 /* Complex double and long double uses the struct return convention. */
2962 || (code
== TYPE_CODE_COMPLEX
&& TYPE_LENGTH (type
) == 16)
2963 || (code
== TYPE_CODE_COMPLEX
&& TYPE_LENGTH (type
) == 24)
2964 /* 128-bit decimal float uses the struct return convention. */
2965 || (code
== TYPE_CODE_DECFLOAT
&& TYPE_LENGTH (type
) == 16))
2967 /* The System V ABI says that:
2969 "A function that returns a structure or union also sets %eax
2970 to the value of the original address of the caller's area
2971 before it returns. Thus when the caller receives control
2972 again, the address of the returned object resides in register
2973 %eax and can be used to access the object."
2975 So the ABI guarantees that we can always find the return
2976 value just after the function has returned. */
2978 /* Note that the ABI doesn't mention functions returning arrays,
2979 which is something possible in certain languages such as Ada.
2980 In this case, the value is returned as if it was wrapped in
2981 a record, so the convention applied to records also applies
2988 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
2989 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
2992 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
2995 /* This special case is for structures consisting of a single
2996 `float', `double' or 'long double' member. These structures are
2997 returned in %st(0). For these structures, we call ourselves
2998 recursively, changing TYPE into the type of the first member of
2999 the structure. Since that should work for all structures that
3000 have only one member, we don't bother to check the member's type
3002 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
3004 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
3005 return i386_return_value (gdbarch
, function
, type
, regcache
,
3010 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
3012 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
3014 return RETURN_VALUE_REGISTER_CONVENTION
;
3019 i387_ext_type (struct gdbarch
*gdbarch
)
3021 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3023 if (!tdep
->i387_ext_type
)
3025 tdep
->i387_ext_type
= tdesc_find_type (gdbarch
, "i387_ext");
3026 gdb_assert (tdep
->i387_ext_type
!= NULL
);
3029 return tdep
->i387_ext_type
;
3032 /* Construct type for pseudo BND registers. We can't use
3033 tdesc_find_type since a complement of one value has to be used
3034 to describe the upper bound. */
3036 static struct type
*
3037 i386_bnd_type (struct gdbarch
*gdbarch
)
3039 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3042 if (!tdep
->i386_bnd_type
)
3045 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3047 /* The type we're building is described bellow: */
3052 void *ubound
; /* One complement of raw ubound field. */
3056 t
= arch_composite_type (gdbarch
,
3057 "__gdb_builtin_type_bound128", TYPE_CODE_STRUCT
);
3059 append_composite_type_field (t
, "lbound", bt
->builtin_data_ptr
);
3060 append_composite_type_field (t
, "ubound", bt
->builtin_data_ptr
);
3062 TYPE_NAME (t
) = "builtin_type_bound128";
3063 tdep
->i386_bnd_type
= t
;
3066 return tdep
->i386_bnd_type
;
3069 /* Construct vector type for pseudo ZMM registers. We can't use
3070 tdesc_find_type since ZMM isn't described in target description. */
3072 static struct type
*
3073 i386_zmm_type (struct gdbarch
*gdbarch
)
3075 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3077 if (!tdep
->i386_zmm_type
)
3079 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3081 /* The type we're building is this: */
3083 union __gdb_builtin_type_vec512i
3085 int128_t uint128
[4];
3086 int64_t v4_int64
[8];
3087 int32_t v8_int32
[16];
3088 int16_t v16_int16
[32];
3089 int8_t v32_int8
[64];
3090 double v4_double
[8];
3097 t
= arch_composite_type (gdbarch
,
3098 "__gdb_builtin_type_vec512i", TYPE_CODE_UNION
);
3099 append_composite_type_field (t
, "v16_float",
3100 init_vector_type (bt
->builtin_float
, 16));
3101 append_composite_type_field (t
, "v8_double",
3102 init_vector_type (bt
->builtin_double
, 8));
3103 append_composite_type_field (t
, "v64_int8",
3104 init_vector_type (bt
->builtin_int8
, 64));
3105 append_composite_type_field (t
, "v32_int16",
3106 init_vector_type (bt
->builtin_int16
, 32));
3107 append_composite_type_field (t
, "v16_int32",
3108 init_vector_type (bt
->builtin_int32
, 16));
3109 append_composite_type_field (t
, "v8_int64",
3110 init_vector_type (bt
->builtin_int64
, 8));
3111 append_composite_type_field (t
, "v4_int128",
3112 init_vector_type (bt
->builtin_int128
, 4));
3114 TYPE_VECTOR (t
) = 1;
3115 TYPE_NAME (t
) = "builtin_type_vec512i";
3116 tdep
->i386_zmm_type
= t
;
3119 return tdep
->i386_zmm_type
;
3122 /* Construct vector type for pseudo YMM registers. We can't use
3123 tdesc_find_type since YMM isn't described in target description. */
3125 static struct type
*
3126 i386_ymm_type (struct gdbarch
*gdbarch
)
3128 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3130 if (!tdep
->i386_ymm_type
)
3132 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3134 /* The type we're building is this: */
3136 union __gdb_builtin_type_vec256i
3138 int128_t uint128
[2];
3139 int64_t v2_int64
[4];
3140 int32_t v4_int32
[8];
3141 int16_t v8_int16
[16];
3142 int8_t v16_int8
[32];
3143 double v2_double
[4];
3150 t
= arch_composite_type (gdbarch
,
3151 "__gdb_builtin_type_vec256i", TYPE_CODE_UNION
);
3152 append_composite_type_field (t
, "v8_float",
3153 init_vector_type (bt
->builtin_float
, 8));
3154 append_composite_type_field (t
, "v4_double",
3155 init_vector_type (bt
->builtin_double
, 4));
3156 append_composite_type_field (t
, "v32_int8",
3157 init_vector_type (bt
->builtin_int8
, 32));
3158 append_composite_type_field (t
, "v16_int16",
3159 init_vector_type (bt
->builtin_int16
, 16));
3160 append_composite_type_field (t
, "v8_int32",
3161 init_vector_type (bt
->builtin_int32
, 8));
3162 append_composite_type_field (t
, "v4_int64",
3163 init_vector_type (bt
->builtin_int64
, 4));
3164 append_composite_type_field (t
, "v2_int128",
3165 init_vector_type (bt
->builtin_int128
, 2));
3167 TYPE_VECTOR (t
) = 1;
3168 TYPE_NAME (t
) = "builtin_type_vec256i";
3169 tdep
->i386_ymm_type
= t
;
3172 return tdep
->i386_ymm_type
;
3175 /* Construct vector type for MMX registers. */
3176 static struct type
*
3177 i386_mmx_type (struct gdbarch
*gdbarch
)
3179 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3181 if (!tdep
->i386_mmx_type
)
3183 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3185 /* The type we're building is this: */
3187 union __gdb_builtin_type_vec64i
3190 int32_t v2_int32
[2];
3191 int16_t v4_int16
[4];
3198 t
= arch_composite_type (gdbarch
,
3199 "__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
3201 append_composite_type_field (t
, "uint64", bt
->builtin_int64
);
3202 append_composite_type_field (t
, "v2_int32",
3203 init_vector_type (bt
->builtin_int32
, 2));
3204 append_composite_type_field (t
, "v4_int16",
3205 init_vector_type (bt
->builtin_int16
, 4));
3206 append_composite_type_field (t
, "v8_int8",
3207 init_vector_type (bt
->builtin_int8
, 8));
3209 TYPE_VECTOR (t
) = 1;
3210 TYPE_NAME (t
) = "builtin_type_vec64i";
3211 tdep
->i386_mmx_type
= t
;
3214 return tdep
->i386_mmx_type
;
3217 /* Return the GDB type object for the "standard" data type of data in
3221 i386_pseudo_register_type (struct gdbarch
*gdbarch
, int regnum
)
3223 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3224 return i386_bnd_type (gdbarch
);
3225 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3226 return i386_mmx_type (gdbarch
);
3227 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3228 return i386_ymm_type (gdbarch
);
3229 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3230 return i386_ymm_type (gdbarch
);
3231 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3232 return i386_zmm_type (gdbarch
);
3235 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3236 if (i386_byte_regnum_p (gdbarch
, regnum
))
3237 return bt
->builtin_int8
;
3238 else if (i386_word_regnum_p (gdbarch
, regnum
))
3239 return bt
->builtin_int16
;
3240 else if (i386_dword_regnum_p (gdbarch
, regnum
))
3241 return bt
->builtin_int32
;
3242 else if (i386_k_regnum_p (gdbarch
, regnum
))
3243 return bt
->builtin_int64
;
3246 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3249 /* Map a cooked register onto a raw register or memory. For the i386,
3250 the MMX registers need to be mapped onto floating point registers. */
3253 i386_mmx_regnum_to_fp_regnum (readable_regcache
*regcache
, int regnum
)
3255 struct gdbarch_tdep
*tdep
= gdbarch_tdep (regcache
->arch ());
3260 mmxreg
= regnum
- tdep
->mm0_regnum
;
3261 regcache
->raw_read (I387_FSTAT_REGNUM (tdep
), &fstat
);
3262 tos
= (fstat
>> 11) & 0x7;
3263 fpreg
= (mmxreg
+ tos
) % 8;
3265 return (I387_ST0_REGNUM (tdep
) + fpreg
);
3268 /* A helper function for us by i386_pseudo_register_read_value and
3269 amd64_pseudo_register_read_value. It does all the work but reads
3270 the data into an already-allocated value. */
3273 i386_pseudo_register_read_into_value (struct gdbarch
*gdbarch
,
3274 readable_regcache
*regcache
,
3276 struct value
*result_value
)
3278 gdb_byte raw_buf
[I386_MAX_REGISTER_SIZE
];
3279 enum register_status status
;
3280 gdb_byte
*buf
= value_contents_raw (result_value
);
3282 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3284 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
3286 /* Extract (always little endian). */
3287 status
= regcache
->raw_read (fpnum
, raw_buf
);
3288 if (status
!= REG_VALID
)
3289 mark_value_bytes_unavailable (result_value
, 0,
3290 TYPE_LENGTH (value_type (result_value
)));
3292 memcpy (buf
, raw_buf
, register_size (gdbarch
, regnum
));
3296 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3297 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3299 regnum
-= tdep
->bnd0_regnum
;
3301 /* Extract (always little endian). Read lower 128bits. */
3302 status
= regcache
->raw_read (I387_BND0R_REGNUM (tdep
) + regnum
,
3304 if (status
!= REG_VALID
)
3305 mark_value_bytes_unavailable (result_value
, 0, 16);
3308 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
3309 LONGEST upper
, lower
;
3310 int size
= TYPE_LENGTH (builtin_type (gdbarch
)->builtin_data_ptr
);
3312 lower
= extract_unsigned_integer (raw_buf
, 8, byte_order
);
3313 upper
= extract_unsigned_integer (raw_buf
+ 8, 8, byte_order
);
3316 memcpy (buf
, &lower
, size
);
3317 memcpy (buf
+ size
, &upper
, size
);
3320 else if (i386_k_regnum_p (gdbarch
, regnum
))
3322 regnum
-= tdep
->k0_regnum
;
3324 /* Extract (always little endian). */
3325 status
= regcache
->raw_read (tdep
->k0_regnum
+ regnum
, raw_buf
);
3326 if (status
!= REG_VALID
)
3327 mark_value_bytes_unavailable (result_value
, 0, 8);
3329 memcpy (buf
, raw_buf
, 8);
3331 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3333 regnum
-= tdep
->zmm0_regnum
;
3335 if (regnum
< num_lower_zmm_regs
)
3337 /* Extract (always little endian). Read lower 128bits. */
3338 status
= regcache
->raw_read (I387_XMM0_REGNUM (tdep
) + regnum
,
3340 if (status
!= REG_VALID
)
3341 mark_value_bytes_unavailable (result_value
, 0, 16);
3343 memcpy (buf
, raw_buf
, 16);
3345 /* Extract (always little endian). Read upper 128bits. */
3346 status
= regcache
->raw_read (tdep
->ymm0h_regnum
+ regnum
,
3348 if (status
!= REG_VALID
)
3349 mark_value_bytes_unavailable (result_value
, 16, 16);
3351 memcpy (buf
+ 16, raw_buf
, 16);
3355 /* Extract (always little endian). Read lower 128bits. */
3356 status
= regcache
->raw_read (I387_XMM16_REGNUM (tdep
) + regnum
3357 - num_lower_zmm_regs
,
3359 if (status
!= REG_VALID
)
3360 mark_value_bytes_unavailable (result_value
, 0, 16);
3362 memcpy (buf
, raw_buf
, 16);
3364 /* Extract (always little endian). Read upper 128bits. */
3365 status
= regcache
->raw_read (I387_YMM16H_REGNUM (tdep
) + regnum
3366 - num_lower_zmm_regs
,
3368 if (status
!= REG_VALID
)
3369 mark_value_bytes_unavailable (result_value
, 16, 16);
3371 memcpy (buf
+ 16, raw_buf
, 16);
3374 /* Read upper 256bits. */
3375 status
= regcache
->raw_read (tdep
->zmm0h_regnum
+ regnum
,
3377 if (status
!= REG_VALID
)
3378 mark_value_bytes_unavailable (result_value
, 32, 32);
3380 memcpy (buf
+ 32, raw_buf
, 32);
3382 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3384 regnum
-= tdep
->ymm0_regnum
;
3386 /* Extract (always little endian). Read lower 128bits. */
3387 status
= regcache
->raw_read (I387_XMM0_REGNUM (tdep
) + regnum
,
3389 if (status
!= REG_VALID
)
3390 mark_value_bytes_unavailable (result_value
, 0, 16);
3392 memcpy (buf
, raw_buf
, 16);
3393 /* Read upper 128bits. */
3394 status
= regcache
->raw_read (tdep
->ymm0h_regnum
+ regnum
,
3396 if (status
!= REG_VALID
)
3397 mark_value_bytes_unavailable (result_value
, 16, 32);
3399 memcpy (buf
+ 16, raw_buf
, 16);
3401 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3403 regnum
-= tdep
->ymm16_regnum
;
3404 /* Extract (always little endian). Read lower 128bits. */
3405 status
= regcache
->raw_read (I387_XMM16_REGNUM (tdep
) + regnum
,
3407 if (status
!= REG_VALID
)
3408 mark_value_bytes_unavailable (result_value
, 0, 16);
3410 memcpy (buf
, raw_buf
, 16);
3411 /* Read upper 128bits. */
3412 status
= regcache
->raw_read (tdep
->ymm16h_regnum
+ regnum
,
3414 if (status
!= REG_VALID
)
3415 mark_value_bytes_unavailable (result_value
, 16, 16);
3417 memcpy (buf
+ 16, raw_buf
, 16);
3419 else if (i386_word_regnum_p (gdbarch
, regnum
))
3421 int gpnum
= regnum
- tdep
->ax_regnum
;
3423 /* Extract (always little endian). */
3424 status
= regcache
->raw_read (gpnum
, raw_buf
);
3425 if (status
!= REG_VALID
)
3426 mark_value_bytes_unavailable (result_value
, 0,
3427 TYPE_LENGTH (value_type (result_value
)));
3429 memcpy (buf
, raw_buf
, 2);
3431 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3433 int gpnum
= regnum
- tdep
->al_regnum
;
3435 /* Extract (always little endian). We read both lower and
3437 status
= regcache
->raw_read (gpnum
% 4, raw_buf
);
3438 if (status
!= REG_VALID
)
3439 mark_value_bytes_unavailable (result_value
, 0,
3440 TYPE_LENGTH (value_type (result_value
)));
3441 else if (gpnum
>= 4)
3442 memcpy (buf
, raw_buf
+ 1, 1);
3444 memcpy (buf
, raw_buf
, 1);
3447 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3451 static struct value
*
3452 i386_pseudo_register_read_value (struct gdbarch
*gdbarch
,
3453 readable_regcache
*regcache
,
3456 struct value
*result
;
3458 result
= allocate_value (register_type (gdbarch
, regnum
));
3459 VALUE_LVAL (result
) = lval_register
;
3460 VALUE_REGNUM (result
) = regnum
;
3462 i386_pseudo_register_read_into_value (gdbarch
, regcache
, regnum
, result
);
3468 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3469 int regnum
, const gdb_byte
*buf
)
3471 gdb_byte raw_buf
[I386_MAX_REGISTER_SIZE
];
3473 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3475 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
3478 regcache
->raw_read (fpnum
, raw_buf
);
3479 /* ... Modify ... (always little endian). */
3480 memcpy (raw_buf
, buf
, register_size (gdbarch
, regnum
));
3482 regcache
->raw_write (fpnum
, raw_buf
);
3486 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3488 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3490 ULONGEST upper
, lower
;
3491 int size
= TYPE_LENGTH (builtin_type (gdbarch
)->builtin_data_ptr
);
3492 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
3494 /* New values from input value. */
3495 regnum
-= tdep
->bnd0_regnum
;
3496 lower
= extract_unsigned_integer (buf
, size
, byte_order
);
3497 upper
= extract_unsigned_integer (buf
+ size
, size
, byte_order
);
3499 /* Fetching register buffer. */
3500 regcache
->raw_read (I387_BND0R_REGNUM (tdep
) + regnum
,
3505 /* Set register bits. */
3506 memcpy (raw_buf
, &lower
, 8);
3507 memcpy (raw_buf
+ 8, &upper
, 8);
3509 regcache
->raw_write (I387_BND0R_REGNUM (tdep
) + regnum
, raw_buf
);
3511 else if (i386_k_regnum_p (gdbarch
, regnum
))
3513 regnum
-= tdep
->k0_regnum
;
3515 regcache
->raw_write (tdep
->k0_regnum
+ regnum
, buf
);
3517 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3519 regnum
-= tdep
->zmm0_regnum
;
3521 if (regnum
< num_lower_zmm_regs
)
3523 /* Write lower 128bits. */
3524 regcache
->raw_write (I387_XMM0_REGNUM (tdep
) + regnum
, buf
);
3525 /* Write upper 128bits. */
3526 regcache
->raw_write (I387_YMM0_REGNUM (tdep
) + regnum
, buf
+ 16);
3530 /* Write lower 128bits. */
3531 regcache
->raw_write (I387_XMM16_REGNUM (tdep
) + regnum
3532 - num_lower_zmm_regs
, buf
);
3533 /* Write upper 128bits. */
3534 regcache
->raw_write (I387_YMM16H_REGNUM (tdep
) + regnum
3535 - num_lower_zmm_regs
, buf
+ 16);
3537 /* Write upper 256bits. */
3538 regcache
->raw_write (tdep
->zmm0h_regnum
+ regnum
, buf
+ 32);
3540 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3542 regnum
-= tdep
->ymm0_regnum
;
3544 /* ... Write lower 128bits. */
3545 regcache
->raw_write (I387_XMM0_REGNUM (tdep
) + regnum
, buf
);
3546 /* ... Write upper 128bits. */
3547 regcache
->raw_write (tdep
->ymm0h_regnum
+ regnum
, buf
+ 16);
3549 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3551 regnum
-= tdep
->ymm16_regnum
;
3553 /* ... Write lower 128bits. */
3554 regcache
->raw_write (I387_XMM16_REGNUM (tdep
) + regnum
, buf
);
3555 /* ... Write upper 128bits. */
3556 regcache
->raw_write (tdep
->ymm16h_regnum
+ regnum
, buf
+ 16);
3558 else if (i386_word_regnum_p (gdbarch
, regnum
))
3560 int gpnum
= regnum
- tdep
->ax_regnum
;
3563 regcache
->raw_read (gpnum
, raw_buf
);
3564 /* ... Modify ... (always little endian). */
3565 memcpy (raw_buf
, buf
, 2);
3567 regcache
->raw_write (gpnum
, raw_buf
);
3569 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3571 int gpnum
= regnum
- tdep
->al_regnum
;
3573 /* Read ... We read both lower and upper registers. */
3574 regcache
->raw_read (gpnum
% 4, raw_buf
);
3575 /* ... Modify ... (always little endian). */
3577 memcpy (raw_buf
+ 1, buf
, 1);
3579 memcpy (raw_buf
, buf
, 1);
3581 regcache
->raw_write (gpnum
% 4, raw_buf
);
3584 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3588 /* Implement the 'ax_pseudo_register_collect' gdbarch method. */
3591 i386_ax_pseudo_register_collect (struct gdbarch
*gdbarch
,
3592 struct agent_expr
*ax
, int regnum
)
3594 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3596 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3598 /* MMX to FPU register mapping depends on current TOS. Let's just
3599 not care and collect everything... */
3602 ax_reg_mask (ax
, I387_FSTAT_REGNUM (tdep
));
3603 for (i
= 0; i
< 8; i
++)
3604 ax_reg_mask (ax
, I387_ST0_REGNUM (tdep
) + i
);
3607 else if (i386_bnd_regnum_p (gdbarch
, regnum
))
3609 regnum
-= tdep
->bnd0_regnum
;
3610 ax_reg_mask (ax
, I387_BND0R_REGNUM (tdep
) + regnum
);
3613 else if (i386_k_regnum_p (gdbarch
, regnum
))
3615 regnum
-= tdep
->k0_regnum
;
3616 ax_reg_mask (ax
, tdep
->k0_regnum
+ regnum
);
3619 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3621 regnum
-= tdep
->zmm0_regnum
;
3622 if (regnum
< num_lower_zmm_regs
)
3624 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3625 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3629 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
3630 - num_lower_zmm_regs
);
3631 ax_reg_mask (ax
, I387_YMM16H_REGNUM (tdep
) + regnum
3632 - num_lower_zmm_regs
);
3634 ax_reg_mask (ax
, tdep
->zmm0h_regnum
+ regnum
);
3637 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3639 regnum
-= tdep
->ymm0_regnum
;
3640 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3641 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3644 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3646 regnum
-= tdep
->ymm16_regnum
;
3647 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
);
3648 ax_reg_mask (ax
, tdep
->ymm16h_regnum
+ regnum
);
3651 else if (i386_word_regnum_p (gdbarch
, regnum
))
3653 int gpnum
= regnum
- tdep
->ax_regnum
;
3655 ax_reg_mask (ax
, gpnum
);
3658 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3660 int gpnum
= regnum
- tdep
->al_regnum
;
3662 ax_reg_mask (ax
, gpnum
% 4);
3666 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3671 /* Return the register number of the register allocated by GCC after
3672 REGNUM, or -1 if there is no such register. */
3675 i386_next_regnum (int regnum
)
3677 /* GCC allocates the registers in the order:
3679 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
3681 Since storing a variable in %esp doesn't make any sense we return
3682 -1 for %ebp and for %esp itself. */
3683 static int next_regnum
[] =
3685 I386_EDX_REGNUM
, /* Slot for %eax. */
3686 I386_EBX_REGNUM
, /* Slot for %ecx. */
3687 I386_ECX_REGNUM
, /* Slot for %edx. */
3688 I386_ESI_REGNUM
, /* Slot for %ebx. */
3689 -1, -1, /* Slots for %esp and %ebp. */
3690 I386_EDI_REGNUM
, /* Slot for %esi. */
3691 I386_EBP_REGNUM
/* Slot for %edi. */
3694 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
3695 return next_regnum
[regnum
];
3700 /* Return nonzero if a value of type TYPE stored in register REGNUM
3701 needs any special handling. */
3704 i386_convert_register_p (struct gdbarch
*gdbarch
,
3705 int regnum
, struct type
*type
)
3707 int len
= TYPE_LENGTH (type
);
3709 /* Values may be spread across multiple registers. Most debugging
3710 formats aren't expressive enough to specify the locations, so
3711 some heuristics is involved. Right now we only handle types that
3712 have a length that is a multiple of the word size, since GCC
3713 doesn't seem to put any other types into registers. */
3714 if (len
> 4 && len
% 4 == 0)
3716 int last_regnum
= regnum
;
3720 last_regnum
= i386_next_regnum (last_regnum
);
3724 if (last_regnum
!= -1)
3728 return i387_convert_register_p (gdbarch
, regnum
, type
);
3731 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
3732 return its contents in TO. */
3735 i386_register_to_value (struct frame_info
*frame
, int regnum
,
3736 struct type
*type
, gdb_byte
*to
,
3737 int *optimizedp
, int *unavailablep
)
3739 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3740 int len
= TYPE_LENGTH (type
);
3742 if (i386_fp_regnum_p (gdbarch
, regnum
))
3743 return i387_register_to_value (frame
, regnum
, type
, to
,
3744 optimizedp
, unavailablep
);
3746 /* Read a value spread across multiple registers. */
3748 gdb_assert (len
> 4 && len
% 4 == 0);
3752 gdb_assert (regnum
!= -1);
3753 gdb_assert (register_size (gdbarch
, regnum
) == 4);
3755 if (!get_frame_register_bytes (frame
, regnum
, 0,
3756 register_size (gdbarch
, regnum
),
3757 to
, optimizedp
, unavailablep
))
3760 regnum
= i386_next_regnum (regnum
);
3765 *optimizedp
= *unavailablep
= 0;
3769 /* Write the contents FROM of a value of type TYPE into register
3770 REGNUM in frame FRAME. */
3773 i386_value_to_register (struct frame_info
*frame
, int regnum
,
3774 struct type
*type
, const gdb_byte
*from
)
3776 int len
= TYPE_LENGTH (type
);
3778 if (i386_fp_regnum_p (get_frame_arch (frame
), regnum
))
3780 i387_value_to_register (frame
, regnum
, type
, from
);
3784 /* Write a value spread across multiple registers. */
3786 gdb_assert (len
> 4 && len
% 4 == 0);
3790 gdb_assert (regnum
!= -1);
3791 gdb_assert (register_size (get_frame_arch (frame
), regnum
) == 4);
3793 put_frame_register (frame
, regnum
, from
);
3794 regnum
= i386_next_regnum (regnum
);
3800 /* Supply register REGNUM from the buffer specified by GREGS and LEN
3801 in the general-purpose register set REGSET to register cache
3802 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3805 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
3806 int regnum
, const void *gregs
, size_t len
)
3808 struct gdbarch
*gdbarch
= regcache
->arch ();
3809 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3810 const gdb_byte
*regs
= (const gdb_byte
*) gregs
;
3813 gdb_assert (len
>= tdep
->sizeof_gregset
);
3815 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3817 if ((regnum
== i
|| regnum
== -1)
3818 && tdep
->gregset_reg_offset
[i
] != -1)
3819 regcache
->raw_supply (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3823 /* Collect register REGNUM from the register cache REGCACHE and store
3824 it in the buffer specified by GREGS and LEN as described by the
3825 general-purpose register set REGSET. If REGNUM is -1, do this for
3826 all registers in REGSET. */
3829 i386_collect_gregset (const struct regset
*regset
,
3830 const struct regcache
*regcache
,
3831 int regnum
, void *gregs
, size_t len
)
3833 struct gdbarch
*gdbarch
= regcache
->arch ();
3834 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3835 gdb_byte
*regs
= (gdb_byte
*) gregs
;
3838 gdb_assert (len
>= tdep
->sizeof_gregset
);
3840 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3842 if ((regnum
== i
|| regnum
== -1)
3843 && tdep
->gregset_reg_offset
[i
] != -1)
3844 regcache
->raw_collect (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3848 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
3849 in the floating-point register set REGSET to register cache
3850 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3853 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
3854 int regnum
, const void *fpregs
, size_t len
)
3856 struct gdbarch
*gdbarch
= regcache
->arch ();
3857 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3859 if (len
== I387_SIZEOF_FXSAVE
)
3861 i387_supply_fxsave (regcache
, regnum
, fpregs
);
3865 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3866 i387_supply_fsave (regcache
, regnum
, fpregs
);
3869 /* Collect register REGNUM from the register cache REGCACHE and store
3870 it in the buffer specified by FPREGS and LEN as described by the
3871 floating-point register set REGSET. If REGNUM is -1, do this for
3872 all registers in REGSET. */
3875 i386_collect_fpregset (const struct regset
*regset
,
3876 const struct regcache
*regcache
,
3877 int regnum
, void *fpregs
, size_t len
)
3879 struct gdbarch
*gdbarch
= regcache
->arch ();
3880 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3882 if (len
== I387_SIZEOF_FXSAVE
)
3884 i387_collect_fxsave (regcache
, regnum
, fpregs
);
3888 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3889 i387_collect_fsave (regcache
, regnum
, fpregs
);
3892 /* Register set definitions. */
3894 const struct regset i386_gregset
=
3896 NULL
, i386_supply_gregset
, i386_collect_gregset
3899 const struct regset i386_fpregset
=
3901 NULL
, i386_supply_fpregset
, i386_collect_fpregset
3904 /* Default iterator over core file register note sections. */
3907 i386_iterate_over_regset_sections (struct gdbarch
*gdbarch
,
3908 iterate_over_regset_sections_cb
*cb
,
3910 const struct regcache
*regcache
)
3912 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3914 cb (".reg", tdep
->sizeof_gregset
, tdep
->sizeof_gregset
, &i386_gregset
, NULL
,
3916 if (tdep
->sizeof_fpregset
)
3917 cb (".reg2", tdep
->sizeof_fpregset
, tdep
->sizeof_fpregset
, tdep
->fpregset
,
3922 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
3925 i386_pe_skip_trampoline_code (struct frame_info
*frame
,
3926 CORE_ADDR pc
, char *name
)
3928 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3929 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3932 if (pc
&& read_memory_unsigned_integer (pc
, 2, byte_order
) == 0x25ff)
3934 unsigned long indirect
=
3935 read_memory_unsigned_integer (pc
+ 2, 4, byte_order
);
3936 struct minimal_symbol
*indsym
=
3937 indirect
? lookup_minimal_symbol_by_pc (indirect
).minsym
: 0;
3938 const char *symname
= indsym
? indsym
->linkage_name () : 0;
3942 if (startswith (symname
, "__imp_")
3943 || startswith (symname
, "_imp_"))
3945 read_memory_unsigned_integer (indirect
, 4, byte_order
);
3948 return 0; /* Not a trampoline. */
3952 /* Return whether the THIS_FRAME corresponds to a sigtramp
3956 i386_sigtramp_p (struct frame_info
*this_frame
)
3958 CORE_ADDR pc
= get_frame_pc (this_frame
);
3961 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
3962 return (name
&& strcmp ("_sigtramp", name
) == 0);
3966 /* We have two flavours of disassembly. The machinery on this page
3967 deals with switching between those. */
3970 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
3972 gdb_assert (disassembly_flavor
== att_flavor
3973 || disassembly_flavor
== intel_flavor
);
3975 info
->disassembler_options
= disassembly_flavor
;
3977 return default_print_insn (pc
, info
);
3981 /* There are a few i386 architecture variants that differ only
3982 slightly from the generic i386 target. For now, we don't give them
3983 their own source file, but include them here. As a consequence,
3984 they'll always be included. */
3986 /* System V Release 4 (SVR4). */
3988 /* Return whether THIS_FRAME corresponds to a SVR4 sigtramp
3992 i386_svr4_sigtramp_p (struct frame_info
*this_frame
)
3994 CORE_ADDR pc
= get_frame_pc (this_frame
);
3997 /* The origin of these symbols is currently unknown. */
3998 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
3999 return (name
&& (strcmp ("_sigreturn", name
) == 0
4000 || strcmp ("sigvechandler", name
) == 0));
4003 /* Assuming THIS_FRAME is for a SVR4 sigtramp routine, return the
4004 address of the associated sigcontext (ucontext) structure. */
4007 i386_svr4_sigcontext_addr (struct frame_info
*this_frame
)
4009 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
4010 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4014 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
4015 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
4017 return read_memory_unsigned_integer (sp
+ 8, 4, byte_order
);
4022 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
4026 i386_stap_is_single_operand (struct gdbarch
*gdbarch
, const char *s
)
4028 return (*s
== '$' /* Literal number. */
4029 || (isdigit (*s
) && s
[1] == '(' && s
[2] == '%') /* Displacement. */
4030 || (*s
== '(' && s
[1] == '%') /* Register indirection. */
4031 || (*s
== '%' && isalpha (s
[1]))); /* Register access. */
4034 /* Helper function for i386_stap_parse_special_token.
4036 This function parses operands of the form `-8+3+1(%rbp)', which
4037 must be interpreted as `*(-8 + 3 - 1 + (void *) $eax)'.
4039 Return true if the operand was parsed successfully, false
4043 i386_stap_parse_special_token_triplet (struct gdbarch
*gdbarch
,
4044 struct stap_parse_info
*p
)
4046 const char *s
= p
->arg
;
4048 if (isdigit (*s
) || *s
== '-' || *s
== '+')
4052 long displacements
[3];
4059 got_minus
[0] = false;
4065 got_minus
[0] = true;
4068 if (!isdigit ((unsigned char) *s
))
4071 displacements
[0] = strtol (s
, &endp
, 10);
4074 if (*s
!= '+' && *s
!= '-')
4076 /* We are not dealing with a triplet. */
4080 got_minus
[1] = false;
4086 got_minus
[1] = true;
4089 if (!isdigit ((unsigned char) *s
))
4092 displacements
[1] = strtol (s
, &endp
, 10);
4095 if (*s
!= '+' && *s
!= '-')
4097 /* We are not dealing with a triplet. */
4101 got_minus
[2] = false;
4107 got_minus
[2] = true;
4110 if (!isdigit ((unsigned char) *s
))
4113 displacements
[2] = strtol (s
, &endp
, 10);
4116 if (*s
!= '(' || s
[1] != '%')
4122 while (isalnum (*s
))
4128 len
= s
- start
- 1;
4129 regname
= (char *) alloca (len
+ 1);
4131 strncpy (regname
, start
, len
);
4132 regname
[len
] = '\0';
4134 if (user_reg_map_name_to_regnum (gdbarch
, regname
, len
) == -1)
4135 error (_("Invalid register name `%s' on expression `%s'."),
4136 regname
, p
->saved_arg
);
4138 for (i
= 0; i
< 3; i
++)
4140 write_exp_elt_opcode (&p
->pstate
, OP_LONG
);
4142 (&p
->pstate
, builtin_type (gdbarch
)->builtin_long
);
4143 write_exp_elt_longcst (&p
->pstate
, displacements
[i
]);
4144 write_exp_elt_opcode (&p
->pstate
, OP_LONG
);
4146 write_exp_elt_opcode (&p
->pstate
, UNOP_NEG
);
4149 write_exp_elt_opcode (&p
->pstate
, OP_REGISTER
);
4152 write_exp_string (&p
->pstate
, str
);
4153 write_exp_elt_opcode (&p
->pstate
, OP_REGISTER
);
4155 write_exp_elt_opcode (&p
->pstate
, UNOP_CAST
);
4156 write_exp_elt_type (&p
->pstate
,
4157 builtin_type (gdbarch
)->builtin_data_ptr
);
4158 write_exp_elt_opcode (&p
->pstate
, UNOP_CAST
);
4160 write_exp_elt_opcode (&p
->pstate
, BINOP_ADD
);
4161 write_exp_elt_opcode (&p
->pstate
, BINOP_ADD
);
4162 write_exp_elt_opcode (&p
->pstate
, BINOP_ADD
);
4164 write_exp_elt_opcode (&p
->pstate
, UNOP_CAST
);
4165 write_exp_elt_type (&p
->pstate
,
4166 lookup_pointer_type (p
->arg_type
));
4167 write_exp_elt_opcode (&p
->pstate
, UNOP_CAST
);
4169 write_exp_elt_opcode (&p
->pstate
, UNOP_IND
);
4179 /* Helper function for i386_stap_parse_special_token.
4181 This function parses operands of the form `register base +
4182 (register index * size) + offset', as represented in
4183 `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4185 Return true if the operand was parsed successfully, false
4189 i386_stap_parse_special_token_three_arg_disp (struct gdbarch
*gdbarch
,
4190 struct stap_parse_info
*p
)
4192 const char *s
= p
->arg
;
4194 if (isdigit (*s
) || *s
== '(' || *s
== '-' || *s
== '+')
4196 bool offset_minus
= false;
4198 bool size_minus
= false;
4205 struct stoken base_token
, index_token
;
4212 offset_minus
= true;
4215 if (offset_minus
&& !isdigit (*s
))
4222 offset
= strtol (s
, &endp
, 10);
4226 if (*s
!= '(' || s
[1] != '%')
4232 while (isalnum (*s
))
4235 if (*s
!= ',' || s
[1] != '%')
4238 len_base
= s
- start
;
4239 base
= (char *) alloca (len_base
+ 1);
4240 strncpy (base
, start
, len_base
);
4241 base
[len_base
] = '\0';
4243 if (user_reg_map_name_to_regnum (gdbarch
, base
, len_base
) == -1)
4244 error (_("Invalid register name `%s' on expression `%s'."),
4245 base
, p
->saved_arg
);
4250 while (isalnum (*s
))
4253 len_index
= s
- start
;
4254 index
= (char *) alloca (len_index
+ 1);
4255 strncpy (index
, start
, len_index
);
4256 index
[len_index
] = '\0';
4258 if (user_reg_map_name_to_regnum (gdbarch
, index
, len_index
) == -1)
4259 error (_("Invalid register name `%s' on expression `%s'."),
4260 index
, p
->saved_arg
);
4262 if (*s
!= ',' && *s
!= ')')
4278 size
= strtol (s
, &endp
, 10);
4289 write_exp_elt_opcode (&p
->pstate
, OP_LONG
);
4290 write_exp_elt_type (&p
->pstate
,
4291 builtin_type (gdbarch
)->builtin_long
);
4292 write_exp_elt_longcst (&p
->pstate
, offset
);
4293 write_exp_elt_opcode (&p
->pstate
, OP_LONG
);
4295 write_exp_elt_opcode (&p
->pstate
, UNOP_NEG
);
4298 write_exp_elt_opcode (&p
->pstate
, OP_REGISTER
);
4299 base_token
.ptr
= base
;
4300 base_token
.length
= len_base
;
4301 write_exp_string (&p
->pstate
, base_token
);
4302 write_exp_elt_opcode (&p
->pstate
, OP_REGISTER
);
4305 write_exp_elt_opcode (&p
->pstate
, BINOP_ADD
);
4307 write_exp_elt_opcode (&p
->pstate
, OP_REGISTER
);
4308 index_token
.ptr
= index
;
4309 index_token
.length
= len_index
;
4310 write_exp_string (&p
->pstate
, index_token
);
4311 write_exp_elt_opcode (&p
->pstate
, OP_REGISTER
);
4315 write_exp_elt_opcode (&p
->pstate
, OP_LONG
);
4316 write_exp_elt_type (&p
->pstate
,
4317 builtin_type (gdbarch
)->builtin_long
);
4318 write_exp_elt_longcst (&p
->pstate
, size
);
4319 write_exp_elt_opcode (&p
->pstate
, OP_LONG
);
4321 write_exp_elt_opcode (&p
->pstate
, UNOP_NEG
);
4322 write_exp_elt_opcode (&p
->pstate
, BINOP_MUL
);
4325 write_exp_elt_opcode (&p
->pstate
, BINOP_ADD
);
4327 write_exp_elt_opcode (&p
->pstate
, UNOP_CAST
);
4328 write_exp_elt_type (&p
->pstate
,
4329 lookup_pointer_type (p
->arg_type
));
4330 write_exp_elt_opcode (&p
->pstate
, UNOP_CAST
);
4332 write_exp_elt_opcode (&p
->pstate
, UNOP_IND
);
4342 /* Implementation of `gdbarch_stap_parse_special_token', as defined in
4346 i386_stap_parse_special_token (struct gdbarch
*gdbarch
,
4347 struct stap_parse_info
*p
)
4349 /* In order to parse special tokens, we use a state-machine that go
4350 through every known token and try to get a match. */
4354 THREE_ARG_DISPLACEMENT
,
4359 current_state
= TRIPLET
;
4361 /* The special tokens to be parsed here are:
4363 - `register base + (register index * size) + offset', as represented
4364 in `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4366 - Operands of the form `-8+3+1(%rbp)', which must be interpreted as
4367 `*(-8 + 3 - 1 + (void *) $eax)'. */
4369 while (current_state
!= DONE
)
4371 switch (current_state
)
4374 if (i386_stap_parse_special_token_triplet (gdbarch
, p
))
4378 case THREE_ARG_DISPLACEMENT
:
4379 if (i386_stap_parse_special_token_three_arg_disp (gdbarch
, p
))
4384 /* Advancing to the next state. */
4391 /* Implementation of 'gdbarch_stap_adjust_register', as defined in
4395 i386_stap_adjust_register (struct gdbarch
*gdbarch
, struct stap_parse_info
*p
,
4396 const std::string
®name
, int regnum
)
4398 static const std::unordered_set
<std::string
> reg_assoc
4399 = { "ax", "bx", "cx", "dx",
4400 "si", "di", "bp", "sp" };
4402 /* If we are dealing with a register whose size is less than the size
4403 specified by the "[-]N@" prefix, and it is one of the registers that
4404 we know has an extended variant available, then use the extended
4405 version of the register instead. */
4406 if (register_size (gdbarch
, regnum
) < TYPE_LENGTH (p
->arg_type
)
4407 && reg_assoc
.find (regname
) != reg_assoc
.end ())
4408 return "e" + regname
;
4410 /* Otherwise, just use the requested register. */
4416 /* gdbarch gnu_triplet_regexp method. Both arches are acceptable as GDB always
4417 also supplies -m64 or -m32 by gdbarch_gcc_target_options. */
4420 i386_gnu_triplet_regexp (struct gdbarch
*gdbarch
)
4422 return "(x86_64|i.86)";
4427 /* Implement the "in_indirect_branch_thunk" gdbarch function. */
4430 i386_in_indirect_branch_thunk (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
4432 return x86_in_indirect_branch_thunk (pc
, i386_register_names
,
4433 I386_EAX_REGNUM
, I386_EIP_REGNUM
);
4439 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4441 static const char *const stap_integer_prefixes
[] = { "$", NULL
};
4442 static const char *const stap_register_prefixes
[] = { "%", NULL
};
4443 static const char *const stap_register_indirection_prefixes
[] = { "(",
4445 static const char *const stap_register_indirection_suffixes
[] = { ")",
4448 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
4449 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
4451 /* Registering SystemTap handlers. */
4452 set_gdbarch_stap_integer_prefixes (gdbarch
, stap_integer_prefixes
);
4453 set_gdbarch_stap_register_prefixes (gdbarch
, stap_register_prefixes
);
4454 set_gdbarch_stap_register_indirection_prefixes (gdbarch
,
4455 stap_register_indirection_prefixes
);
4456 set_gdbarch_stap_register_indirection_suffixes (gdbarch
,
4457 stap_register_indirection_suffixes
);
4458 set_gdbarch_stap_is_single_operand (gdbarch
,
4459 i386_stap_is_single_operand
);
4460 set_gdbarch_stap_parse_special_token (gdbarch
,
4461 i386_stap_parse_special_token
);
4462 set_gdbarch_stap_adjust_register (gdbarch
,
4463 i386_stap_adjust_register
);
4465 set_gdbarch_in_indirect_branch_thunk (gdbarch
,
4466 i386_in_indirect_branch_thunk
);
4469 /* System V Release 4 (SVR4). */
4472 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4474 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4476 /* System V Release 4 uses ELF. */
4477 i386_elf_init_abi (info
, gdbarch
);
4479 /* System V Release 4 has shared libraries. */
4480 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
4482 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
4483 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
4484 tdep
->sc_pc_offset
= 36 + 14 * 4;
4485 tdep
->sc_sp_offset
= 36 + 17 * 4;
4487 tdep
->jb_pc_offset
= 20;
4492 /* i386 register groups. In addition to the normal groups, add "mmx"
4495 static struct reggroup
*i386_sse_reggroup
;
4496 static struct reggroup
*i386_mmx_reggroup
;
4499 i386_init_reggroups (void)
4501 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
4502 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
4506 i386_add_reggroups (struct gdbarch
*gdbarch
)
4508 reggroup_add (gdbarch
, i386_sse_reggroup
);
4509 reggroup_add (gdbarch
, i386_mmx_reggroup
);
4510 reggroup_add (gdbarch
, general_reggroup
);
4511 reggroup_add (gdbarch
, float_reggroup
);
4512 reggroup_add (gdbarch
, all_reggroup
);
4513 reggroup_add (gdbarch
, save_reggroup
);
4514 reggroup_add (gdbarch
, restore_reggroup
);
4515 reggroup_add (gdbarch
, vector_reggroup
);
4516 reggroup_add (gdbarch
, system_reggroup
);
4520 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
4521 struct reggroup
*group
)
4523 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4524 int fp_regnum_p
, mmx_regnum_p
, xmm_regnum_p
, mxcsr_regnum_p
,
4525 ymm_regnum_p
, ymmh_regnum_p
, ymm_avx512_regnum_p
, ymmh_avx512_regnum_p
,
4526 bndr_regnum_p
, bnd_regnum_p
, zmm_regnum_p
, zmmh_regnum_p
,
4527 mpx_ctrl_regnum_p
, xmm_avx512_regnum_p
,
4528 avx512_p
, avx_p
, sse_p
, pkru_regnum_p
;
4530 /* Don't include pseudo registers, except for MMX, in any register
4532 if (i386_byte_regnum_p (gdbarch
, regnum
))
4535 if (i386_word_regnum_p (gdbarch
, regnum
))
4538 if (i386_dword_regnum_p (gdbarch
, regnum
))
4541 mmx_regnum_p
= i386_mmx_regnum_p (gdbarch
, regnum
);
4542 if (group
== i386_mmx_reggroup
)
4543 return mmx_regnum_p
;
4545 pkru_regnum_p
= i386_pkru_regnum_p(gdbarch
, regnum
);
4546 xmm_regnum_p
= i386_xmm_regnum_p (gdbarch
, regnum
);
4547 xmm_avx512_regnum_p
= i386_xmm_avx512_regnum_p (gdbarch
, regnum
);
4548 mxcsr_regnum_p
= i386_mxcsr_regnum_p (gdbarch
, regnum
);
4549 if (group
== i386_sse_reggroup
)
4550 return xmm_regnum_p
|| xmm_avx512_regnum_p
|| mxcsr_regnum_p
;
4552 ymm_regnum_p
= i386_ymm_regnum_p (gdbarch
, regnum
);
4553 ymm_avx512_regnum_p
= i386_ymm_avx512_regnum_p (gdbarch
, regnum
);
4554 zmm_regnum_p
= i386_zmm_regnum_p (gdbarch
, regnum
);
4556 avx512_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4557 == X86_XSTATE_AVX_AVX512_MASK
);
4558 avx_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4559 == X86_XSTATE_AVX_MASK
) && !avx512_p
;
4560 sse_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4561 == X86_XSTATE_SSE_MASK
) && !avx512_p
&& ! avx_p
;
4563 if (group
== vector_reggroup
)
4564 return (mmx_regnum_p
4565 || (zmm_regnum_p
&& avx512_p
)
4566 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && avx_p
)
4567 || ((xmm_regnum_p
|| xmm_avx512_regnum_p
) && sse_p
)
4570 fp_regnum_p
= (i386_fp_regnum_p (gdbarch
, regnum
)
4571 || i386_fpc_regnum_p (gdbarch
, regnum
));
4572 if (group
== float_reggroup
)
4575 /* For "info reg all", don't include upper YMM registers nor XMM
4576 registers when AVX is supported. */
4577 ymmh_regnum_p
= i386_ymmh_regnum_p (gdbarch
, regnum
);
4578 ymmh_avx512_regnum_p
= i386_ymmh_avx512_regnum_p (gdbarch
, regnum
);
4579 zmmh_regnum_p
= i386_zmmh_regnum_p (gdbarch
, regnum
);
4580 if (group
== all_reggroup
4581 && (((xmm_regnum_p
|| xmm_avx512_regnum_p
) && !sse_p
)
4582 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && !avx_p
)
4584 || ymmh_avx512_regnum_p
4588 bnd_regnum_p
= i386_bnd_regnum_p (gdbarch
, regnum
);
4589 if (group
== all_reggroup
4590 && ((bnd_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4591 return bnd_regnum_p
;
4593 bndr_regnum_p
= i386_bndr_regnum_p (gdbarch
, regnum
);
4594 if (group
== all_reggroup
4595 && ((bndr_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4598 mpx_ctrl_regnum_p
= i386_mpx_ctrl_regnum_p (gdbarch
, regnum
);
4599 if (group
== all_reggroup
4600 && ((mpx_ctrl_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4601 return mpx_ctrl_regnum_p
;
4603 if (group
== general_reggroup
)
4604 return (!fp_regnum_p
4608 && !xmm_avx512_regnum_p
4611 && !ymm_avx512_regnum_p
4612 && !ymmh_avx512_regnum_p
4615 && !mpx_ctrl_regnum_p
4620 return default_register_reggroup_p (gdbarch
, regnum
, group
);
4624 /* Get the ARGIth function argument for the current function. */
4627 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
4630 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
4631 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4632 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
4633 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4, byte_order
);
4636 #define PREFIX_REPZ 0x01
4637 #define PREFIX_REPNZ 0x02
4638 #define PREFIX_LOCK 0x04
4639 #define PREFIX_DATA 0x08
4640 #define PREFIX_ADDR 0x10
4652 /* i386 arith/logic operations */
4665 struct i386_record_s
4667 struct gdbarch
*gdbarch
;
4668 struct regcache
*regcache
;
4669 CORE_ADDR orig_addr
;
4675 uint8_t mod
, reg
, rm
;
4684 /* Parse the "modrm" part of the memory address irp->addr points at.
4685 Returns -1 if something goes wrong, 0 otherwise. */
4688 i386_record_modrm (struct i386_record_s
*irp
)
4690 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4692 if (record_read_memory (gdbarch
, irp
->addr
, &irp
->modrm
, 1))
4696 irp
->mod
= (irp
->modrm
>> 6) & 3;
4697 irp
->reg
= (irp
->modrm
>> 3) & 7;
4698 irp
->rm
= irp
->modrm
& 7;
4703 /* Extract the memory address that the current instruction writes to,
4704 and return it in *ADDR. Return -1 if something goes wrong. */
4707 i386_record_lea_modrm_addr (struct i386_record_s
*irp
, uint64_t *addr
)
4709 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4710 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4715 if (irp
->aflag
|| irp
->regmap
[X86_RECORD_R8_REGNUM
])
4722 uint8_t base
= irp
->rm
;
4727 if (record_read_memory (gdbarch
, irp
->addr
, &byte
, 1))
4730 scale
= (byte
>> 6) & 3;
4731 index
= ((byte
>> 3) & 7) | irp
->rex_x
;
4739 if ((base
& 7) == 5)
4742 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4745 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4746 if (irp
->regmap
[X86_RECORD_R8_REGNUM
] && !havesib
)
4747 *addr
+= irp
->addr
+ irp
->rip_offset
;
4751 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4754 *addr
= (int8_t) buf
[0];
4757 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4759 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4767 if (base
== 4 && irp
->popl_esp_hack
)
4768 *addr
+= irp
->popl_esp_hack
;
4769 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[base
],
4772 if (irp
->aflag
== 2)
4777 *addr
= (uint32_t) (offset64
+ *addr
);
4779 if (havesib
&& (index
!= 4 || scale
!= 0))
4781 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[index
],
4783 if (irp
->aflag
== 2)
4784 *addr
+= offset64
<< scale
;
4786 *addr
= (uint32_t) (*addr
+ (offset64
<< scale
));
4791 /* Since we are in 64-bit mode with ADDR32 prefix, zero-extend
4792 address from 32-bit to 64-bit. */
4793 *addr
= (uint32_t) *addr
;
4804 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4807 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4813 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4816 *addr
= (int8_t) buf
[0];
4819 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4822 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4829 regcache_raw_read_unsigned (irp
->regcache
,
4830 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4832 *addr
= (uint32_t) (*addr
+ offset64
);
4833 regcache_raw_read_unsigned (irp
->regcache
,
4834 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4836 *addr
= (uint32_t) (*addr
+ offset64
);
4839 regcache_raw_read_unsigned (irp
->regcache
,
4840 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4842 *addr
= (uint32_t) (*addr
+ offset64
);
4843 regcache_raw_read_unsigned (irp
->regcache
,
4844 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4846 *addr
= (uint32_t) (*addr
+ offset64
);
4849 regcache_raw_read_unsigned (irp
->regcache
,
4850 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4852 *addr
= (uint32_t) (*addr
+ offset64
);
4853 regcache_raw_read_unsigned (irp
->regcache
,
4854 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4856 *addr
= (uint32_t) (*addr
+ offset64
);
4859 regcache_raw_read_unsigned (irp
->regcache
,
4860 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4862 *addr
= (uint32_t) (*addr
+ offset64
);
4863 regcache_raw_read_unsigned (irp
->regcache
,
4864 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4866 *addr
= (uint32_t) (*addr
+ offset64
);
4869 regcache_raw_read_unsigned (irp
->regcache
,
4870 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4872 *addr
= (uint32_t) (*addr
+ offset64
);
4875 regcache_raw_read_unsigned (irp
->regcache
,
4876 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4878 *addr
= (uint32_t) (*addr
+ offset64
);
4881 regcache_raw_read_unsigned (irp
->regcache
,
4882 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4884 *addr
= (uint32_t) (*addr
+ offset64
);
4887 regcache_raw_read_unsigned (irp
->regcache
,
4888 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4890 *addr
= (uint32_t) (*addr
+ offset64
);
4900 /* Record the address and contents of the memory that will be changed
4901 by the current instruction. Return -1 if something goes wrong, 0
4905 i386_record_lea_modrm (struct i386_record_s
*irp
)
4907 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4910 if (irp
->override
>= 0)
4912 if (record_full_memory_query
)
4915 Process record ignores the memory change of instruction at address %s\n\
4916 because it can't get the value of the segment register.\n\
4917 Do you want to stop the program?"),
4918 paddress (gdbarch
, irp
->orig_addr
)))
4925 if (i386_record_lea_modrm_addr (irp
, &addr
))
4928 if (record_full_arch_list_add_mem (addr
, 1 << irp
->ot
))
4934 /* Record the effects of a push operation. Return -1 if something
4935 goes wrong, 0 otherwise. */
4938 i386_record_push (struct i386_record_s
*irp
, int size
)
4942 if (record_full_arch_list_add_reg (irp
->regcache
,
4943 irp
->regmap
[X86_RECORD_RESP_REGNUM
]))
4945 regcache_raw_read_unsigned (irp
->regcache
,
4946 irp
->regmap
[X86_RECORD_RESP_REGNUM
],
4948 if (record_full_arch_list_add_mem ((CORE_ADDR
) addr
- size
, size
))
4955 /* Defines contents to record. */
4956 #define I386_SAVE_FPU_REGS 0xfffd
4957 #define I386_SAVE_FPU_ENV 0xfffe
4958 #define I386_SAVE_FPU_ENV_REG_STACK 0xffff
4960 /* Record the values of the floating point registers which will be
4961 changed by the current instruction. Returns -1 if something is
4962 wrong, 0 otherwise. */
4964 static int i386_record_floats (struct gdbarch
*gdbarch
,
4965 struct i386_record_s
*ir
,
4968 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4971 /* Oza: Because of floating point insn push/pop of fpu stack is going to
4972 happen. Currently we store st0-st7 registers, but we need not store all
4973 registers all the time, in future we use ftag register and record only
4974 those who are not marked as an empty. */
4976 if (I386_SAVE_FPU_REGS
== iregnum
)
4978 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_ST0_REGNUM (tdep
) + 7; i
++)
4980 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4984 else if (I386_SAVE_FPU_ENV
== iregnum
)
4986 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4988 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4992 else if (I386_SAVE_FPU_ENV_REG_STACK
== iregnum
)
4994 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4996 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
5000 else if ((iregnum
>= I387_ST0_REGNUM (tdep
)) &&
5001 (iregnum
<= I387_FOP_REGNUM (tdep
)))
5003 if (record_full_arch_list_add_reg (ir
->regcache
,iregnum
))
5008 /* Parameter error. */
5011 if(I386_SAVE_FPU_ENV
!= iregnum
)
5013 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
5015 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
5022 /* Parse the current instruction, and record the values of the
5023 registers and memory that will be changed by the current
5024 instruction. Returns -1 if something goes wrong, 0 otherwise. */
5026 #define I386_RECORD_FULL_ARCH_LIST_ADD_REG(regnum) \
5027 record_full_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)])
5030 i386_process_record (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
5031 CORE_ADDR input_addr
)
5033 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
5039 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
5040 struct i386_record_s ir
;
5041 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
5045 memset (&ir
, 0, sizeof (struct i386_record_s
));
5046 ir
.regcache
= regcache
;
5047 ir
.addr
= input_addr
;
5048 ir
.orig_addr
= input_addr
;
5052 ir
.popl_esp_hack
= 0;
5053 ir
.regmap
= tdep
->record_regmap
;
5054 ir
.gdbarch
= gdbarch
;
5056 if (record_debug
> 1)
5057 fprintf_unfiltered (gdb_stdlog
, "Process record: i386_process_record "
5059 paddress (gdbarch
, ir
.addr
));
5064 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5067 switch (opcode8
) /* Instruction prefixes */
5069 case REPE_PREFIX_OPCODE
:
5070 prefixes
|= PREFIX_REPZ
;
5072 case REPNE_PREFIX_OPCODE
:
5073 prefixes
|= PREFIX_REPNZ
;
5075 case LOCK_PREFIX_OPCODE
:
5076 prefixes
|= PREFIX_LOCK
;
5078 case CS_PREFIX_OPCODE
:
5079 ir
.override
= X86_RECORD_CS_REGNUM
;
5081 case SS_PREFIX_OPCODE
:
5082 ir
.override
= X86_RECORD_SS_REGNUM
;
5084 case DS_PREFIX_OPCODE
:
5085 ir
.override
= X86_RECORD_DS_REGNUM
;
5087 case ES_PREFIX_OPCODE
:
5088 ir
.override
= X86_RECORD_ES_REGNUM
;
5090 case FS_PREFIX_OPCODE
:
5091 ir
.override
= X86_RECORD_FS_REGNUM
;
5093 case GS_PREFIX_OPCODE
:
5094 ir
.override
= X86_RECORD_GS_REGNUM
;
5096 case DATA_PREFIX_OPCODE
:
5097 prefixes
|= PREFIX_DATA
;
5099 case ADDR_PREFIX_OPCODE
:
5100 prefixes
|= PREFIX_ADDR
;
5102 case 0x40: /* i386 inc %eax */
5103 case 0x41: /* i386 inc %ecx */
5104 case 0x42: /* i386 inc %edx */
5105 case 0x43: /* i386 inc %ebx */
5106 case 0x44: /* i386 inc %esp */
5107 case 0x45: /* i386 inc %ebp */
5108 case 0x46: /* i386 inc %esi */
5109 case 0x47: /* i386 inc %edi */
5110 case 0x48: /* i386 dec %eax */
5111 case 0x49: /* i386 dec %ecx */
5112 case 0x4a: /* i386 dec %edx */
5113 case 0x4b: /* i386 dec %ebx */
5114 case 0x4c: /* i386 dec %esp */
5115 case 0x4d: /* i386 dec %ebp */
5116 case 0x4e: /* i386 dec %esi */
5117 case 0x4f: /* i386 dec %edi */
5118 if (ir
.regmap
[X86_RECORD_R8_REGNUM
]) /* 64 bit target */
5121 rex_w
= (opcode8
>> 3) & 1;
5122 rex_r
= (opcode8
& 0x4) << 1;
5123 ir
.rex_x
= (opcode8
& 0x2) << 2;
5124 ir
.rex_b
= (opcode8
& 0x1) << 3;
5126 else /* 32 bit target */
5135 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && rex_w
== 1)
5141 if (prefixes
& PREFIX_DATA
)
5144 if (prefixes
& PREFIX_ADDR
)
5146 else if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5149 /* Now check op code. */
5150 opcode
= (uint32_t) opcode8
;
5155 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5158 opcode
= (uint32_t) opcode8
| 0x0f00;
5162 case 0x00: /* arith & logic */
5210 if (((opcode
>> 3) & 7) != OP_CMPL
)
5212 if ((opcode
& 1) == 0)
5215 ir
.ot
= ir
.dflag
+ OT_WORD
;
5217 switch ((opcode
>> 1) & 3)
5219 case 0: /* OP Ev, Gv */
5220 if (i386_record_modrm (&ir
))
5224 if (i386_record_lea_modrm (&ir
))
5230 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5232 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5235 case 1: /* OP Gv, Ev */
5236 if (i386_record_modrm (&ir
))
5239 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5241 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5243 case 2: /* OP A, Iv */
5244 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5248 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5251 case 0x80: /* GRP1 */
5255 if (i386_record_modrm (&ir
))
5258 if (ir
.reg
!= OP_CMPL
)
5260 if ((opcode
& 1) == 0)
5263 ir
.ot
= ir
.dflag
+ OT_WORD
;
5270 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5271 if (i386_record_lea_modrm (&ir
))
5275 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5277 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5280 case 0x40: /* inc */
5289 case 0x48: /* dec */
5298 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 7);
5299 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5302 case 0xf6: /* GRP3 */
5304 if ((opcode
& 1) == 0)
5307 ir
.ot
= ir
.dflag
+ OT_WORD
;
5308 if (i386_record_modrm (&ir
))
5311 if (ir
.mod
!= 3 && ir
.reg
== 0)
5312 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5317 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5323 if (i386_record_lea_modrm (&ir
))
5329 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5331 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5333 if (ir
.reg
== 3) /* neg */
5334 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5340 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5341 if (ir
.ot
!= OT_BYTE
)
5342 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5343 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5347 opcode
= opcode
<< 8 | ir
.modrm
;
5353 case 0xfe: /* GRP4 */
5354 case 0xff: /* GRP5 */
5355 if (i386_record_modrm (&ir
))
5357 if (ir
.reg
>= 2 && opcode
== 0xfe)
5360 opcode
= opcode
<< 8 | ir
.modrm
;
5367 if ((opcode
& 1) == 0)
5370 ir
.ot
= ir
.dflag
+ OT_WORD
;
5373 if (i386_record_lea_modrm (&ir
))
5379 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5381 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5383 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5386 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5388 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5390 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5393 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
5394 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5396 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5400 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5403 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5405 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5410 opcode
= opcode
<< 8 | ir
.modrm
;
5416 case 0x84: /* test */
5420 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5423 case 0x98: /* CWDE/CBW */
5424 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5427 case 0x99: /* CDQ/CWD */
5428 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5429 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5432 case 0x0faf: /* imul */
5435 ir
.ot
= ir
.dflag
+ OT_WORD
;
5436 if (i386_record_modrm (&ir
))
5439 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5440 else if (opcode
== 0x6b)
5443 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5445 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5446 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5449 case 0x0fc0: /* xadd */
5451 if ((opcode
& 1) == 0)
5454 ir
.ot
= ir
.dflag
+ OT_WORD
;
5455 if (i386_record_modrm (&ir
))
5460 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5462 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5463 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5465 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5469 if (i386_record_lea_modrm (&ir
))
5471 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5473 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5475 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5478 case 0x0fb0: /* cmpxchg */
5480 if ((opcode
& 1) == 0)
5483 ir
.ot
= ir
.dflag
+ OT_WORD
;
5484 if (i386_record_modrm (&ir
))
5489 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5490 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5492 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5496 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5497 if (i386_record_lea_modrm (&ir
))
5500 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5503 case 0x0fc7: /* cmpxchg8b / rdrand / rdseed */
5504 if (i386_record_modrm (&ir
))
5508 /* rdrand and rdseed use the 3 bits of the REG field of ModR/M as
5509 an extended opcode. rdrand has bits 110 (/6) and rdseed
5510 has bits 111 (/7). */
5511 if (ir
.reg
== 6 || ir
.reg
== 7)
5513 /* The storage register is described by the 3 R/M bits, but the
5514 REX.B prefix may be used to give access to registers
5515 R8~R15. In this case ir.rex_b + R/M will give us the register
5516 in the range R8~R15.
5518 REX.W may also be used to access 64-bit registers, but we
5519 already record entire registers and not just partial bits
5521 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
+ ir
.rm
);
5522 /* These instructions also set conditional bits. */
5523 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5528 /* We don't handle this particular instruction yet. */
5530 opcode
= opcode
<< 8 | ir
.modrm
;
5534 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5535 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5536 if (i386_record_lea_modrm (&ir
))
5538 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5541 case 0x50: /* push */
5551 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5553 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5557 case 0x06: /* push es */
5558 case 0x0e: /* push cs */
5559 case 0x16: /* push ss */
5560 case 0x1e: /* push ds */
5561 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5566 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5570 case 0x0fa0: /* push fs */
5571 case 0x0fa8: /* push gs */
5572 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5577 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5581 case 0x60: /* pusha */
5582 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5587 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 4)))
5591 case 0x58: /* pop */
5599 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5600 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5603 case 0x61: /* popa */
5604 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5609 for (regnum
= X86_RECORD_REAX_REGNUM
;
5610 regnum
<= X86_RECORD_REDI_REGNUM
;
5612 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5615 case 0x8f: /* pop */
5616 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5617 ir
.ot
= ir
.dflag
? OT_QUAD
: OT_WORD
;
5619 ir
.ot
= ir
.dflag
+ OT_WORD
;
5620 if (i386_record_modrm (&ir
))
5623 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5626 ir
.popl_esp_hack
= 1 << ir
.ot
;
5627 if (i386_record_lea_modrm (&ir
))
5630 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5633 case 0xc8: /* enter */
5634 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5635 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5637 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5641 case 0xc9: /* leave */
5642 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5643 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5646 case 0x07: /* pop es */
5647 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5652 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5653 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_ES_REGNUM
);
5654 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5657 case 0x17: /* pop ss */
5658 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5663 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5664 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_SS_REGNUM
);
5665 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5668 case 0x1f: /* pop ds */
5669 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5674 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5675 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_DS_REGNUM
);
5676 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5679 case 0x0fa1: /* pop fs */
5680 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5681 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_FS_REGNUM
);
5682 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5685 case 0x0fa9: /* pop gs */
5686 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5687 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
5688 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5691 case 0x88: /* mov */
5695 if ((opcode
& 1) == 0)
5698 ir
.ot
= ir
.dflag
+ OT_WORD
;
5700 if (i386_record_modrm (&ir
))
5705 if (opcode
== 0xc6 || opcode
== 0xc7)
5706 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5707 if (i386_record_lea_modrm (&ir
))
5712 if (opcode
== 0xc6 || opcode
== 0xc7)
5714 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5716 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5720 case 0x8a: /* mov */
5722 if ((opcode
& 1) == 0)
5725 ir
.ot
= ir
.dflag
+ OT_WORD
;
5726 if (i386_record_modrm (&ir
))
5729 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5731 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5734 case 0x8c: /* mov seg */
5735 if (i386_record_modrm (&ir
))
5740 opcode
= opcode
<< 8 | ir
.modrm
;
5745 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5749 if (i386_record_lea_modrm (&ir
))
5754 case 0x8e: /* mov seg */
5755 if (i386_record_modrm (&ir
))
5760 regnum
= X86_RECORD_ES_REGNUM
;
5763 regnum
= X86_RECORD_SS_REGNUM
;
5766 regnum
= X86_RECORD_DS_REGNUM
;
5769 regnum
= X86_RECORD_FS_REGNUM
;
5772 regnum
= X86_RECORD_GS_REGNUM
;
5776 opcode
= opcode
<< 8 | ir
.modrm
;
5780 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5781 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5784 case 0x0fb6: /* movzbS */
5785 case 0x0fb7: /* movzwS */
5786 case 0x0fbe: /* movsbS */
5787 case 0x0fbf: /* movswS */
5788 if (i386_record_modrm (&ir
))
5790 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5793 case 0x8d: /* lea */
5794 if (i386_record_modrm (&ir
))
5799 opcode
= opcode
<< 8 | ir
.modrm
;
5804 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5806 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5809 case 0xa0: /* mov EAX */
5812 case 0xd7: /* xlat */
5813 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5816 case 0xa2: /* mov EAX */
5818 if (ir
.override
>= 0)
5820 if (record_full_memory_query
)
5823 Process record ignores the memory change of instruction at address %s\n\
5824 because it can't get the value of the segment register.\n\
5825 Do you want to stop the program?"),
5826 paddress (gdbarch
, ir
.orig_addr
)))
5832 if ((opcode
& 1) == 0)
5835 ir
.ot
= ir
.dflag
+ OT_WORD
;
5838 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 8))
5841 addr
= extract_unsigned_integer (buf
, 8, byte_order
);
5845 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 4))
5848 addr
= extract_unsigned_integer (buf
, 4, byte_order
);
5852 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 2))
5855 addr
= extract_unsigned_integer (buf
, 2, byte_order
);
5857 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
5862 case 0xb0: /* mov R, Ib */
5870 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((ir
.regmap
[X86_RECORD_R8_REGNUM
])
5871 ? ((opcode
& 0x7) | ir
.rex_b
)
5872 : ((opcode
& 0x7) & 0x3));
5875 case 0xb8: /* mov R, Iv */
5883 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5886 case 0x91: /* xchg R, EAX */
5893 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5894 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 0x7);
5897 case 0x86: /* xchg Ev, Gv */
5899 if ((opcode
& 1) == 0)
5902 ir
.ot
= ir
.dflag
+ OT_WORD
;
5903 if (i386_record_modrm (&ir
))
5908 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5910 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5914 if (i386_record_lea_modrm (&ir
))
5918 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5920 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5923 case 0xc4: /* les Gv */
5924 case 0xc5: /* lds Gv */
5925 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5931 case 0x0fb2: /* lss Gv */
5932 case 0x0fb4: /* lfs Gv */
5933 case 0x0fb5: /* lgs Gv */
5934 if (i386_record_modrm (&ir
))
5942 opcode
= opcode
<< 8 | ir
.modrm
;
5947 case 0xc4: /* les Gv */
5948 regnum
= X86_RECORD_ES_REGNUM
;
5950 case 0xc5: /* lds Gv */
5951 regnum
= X86_RECORD_DS_REGNUM
;
5953 case 0x0fb2: /* lss Gv */
5954 regnum
= X86_RECORD_SS_REGNUM
;
5956 case 0x0fb4: /* lfs Gv */
5957 regnum
= X86_RECORD_FS_REGNUM
;
5959 case 0x0fb5: /* lgs Gv */
5960 regnum
= X86_RECORD_GS_REGNUM
;
5963 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5964 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5965 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5968 case 0xc0: /* shifts */
5974 if ((opcode
& 1) == 0)
5977 ir
.ot
= ir
.dflag
+ OT_WORD
;
5978 if (i386_record_modrm (&ir
))
5980 if (ir
.mod
!= 3 && (opcode
== 0xd2 || opcode
== 0xd3))
5982 if (i386_record_lea_modrm (&ir
))
5988 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5990 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5992 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5999 if (i386_record_modrm (&ir
))
6003 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
))
6008 if (i386_record_lea_modrm (&ir
))
6013 case 0xd8: /* Floats. */
6021 if (i386_record_modrm (&ir
))
6023 ir
.reg
|= ((opcode
& 7) << 3);
6029 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6037 /* For fcom, ficom nothing to do. */
6043 /* For fcomp, ficomp pop FPU stack, store all. */
6044 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6071 /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,
6072 fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension
6073 of code, always affects st(0) register. */
6074 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6098 /* Handling fld, fild. */
6099 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6103 switch (ir
.reg
>> 4)
6106 if (record_full_arch_list_add_mem (addr64
, 4))
6110 if (record_full_arch_list_add_mem (addr64
, 8))
6116 if (record_full_arch_list_add_mem (addr64
, 2))
6122 switch (ir
.reg
>> 4)
6125 if (record_full_arch_list_add_mem (addr64
, 4))
6127 if (3 == (ir
.reg
& 7))
6129 /* For fstp m32fp. */
6130 if (i386_record_floats (gdbarch
, &ir
,
6131 I386_SAVE_FPU_REGS
))
6136 if (record_full_arch_list_add_mem (addr64
, 4))
6138 if ((3 == (ir
.reg
& 7))
6139 || (5 == (ir
.reg
& 7))
6140 || (7 == (ir
.reg
& 7)))
6142 /* For fstp insn. */
6143 if (i386_record_floats (gdbarch
, &ir
,
6144 I386_SAVE_FPU_REGS
))
6149 if (record_full_arch_list_add_mem (addr64
, 8))
6151 if (3 == (ir
.reg
& 7))
6153 /* For fstp m64fp. */
6154 if (i386_record_floats (gdbarch
, &ir
,
6155 I386_SAVE_FPU_REGS
))
6160 if ((3 <= (ir
.reg
& 7)) && (6 <= (ir
.reg
& 7)))
6162 /* For fistp, fbld, fild, fbstp. */
6163 if (i386_record_floats (gdbarch
, &ir
,
6164 I386_SAVE_FPU_REGS
))
6169 if (record_full_arch_list_add_mem (addr64
, 2))
6178 if (i386_record_floats (gdbarch
, &ir
,
6179 I386_SAVE_FPU_ENV_REG_STACK
))
6184 if (i386_record_floats (gdbarch
, &ir
, I387_FCTRL_REGNUM (tdep
)))
6189 if (i386_record_floats (gdbarch
, &ir
,
6190 I386_SAVE_FPU_ENV_REG_STACK
))
6196 if (record_full_arch_list_add_mem (addr64
, 28))
6201 if (record_full_arch_list_add_mem (addr64
, 14))
6207 if (record_full_arch_list_add_mem (addr64
, 2))
6209 /* Insn fstp, fbstp. */
6210 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6215 if (record_full_arch_list_add_mem (addr64
, 10))
6221 if (record_full_arch_list_add_mem (addr64
, 28))
6227 if (record_full_arch_list_add_mem (addr64
, 14))
6231 if (record_full_arch_list_add_mem (addr64
, 80))
6234 if (i386_record_floats (gdbarch
, &ir
,
6235 I386_SAVE_FPU_ENV_REG_STACK
))
6239 if (record_full_arch_list_add_mem (addr64
, 8))
6242 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6247 opcode
= opcode
<< 8 | ir
.modrm
;
6252 /* Opcode is an extension of modR/M byte. */
6258 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6262 if (0x0c == (ir
.modrm
>> 4))
6264 if ((ir
.modrm
& 0x0f) <= 7)
6266 if (i386_record_floats (gdbarch
, &ir
,
6267 I386_SAVE_FPU_REGS
))
6272 if (i386_record_floats (gdbarch
, &ir
,
6273 I387_ST0_REGNUM (tdep
)))
6275 /* If only st(0) is changing, then we have already
6277 if ((ir
.modrm
& 0x0f) - 0x08)
6279 if (i386_record_floats (gdbarch
, &ir
,
6280 I387_ST0_REGNUM (tdep
) +
6281 ((ir
.modrm
& 0x0f) - 0x08)))
6299 if (i386_record_floats (gdbarch
, &ir
,
6300 I387_ST0_REGNUM (tdep
)))
6318 if (i386_record_floats (gdbarch
, &ir
,
6319 I386_SAVE_FPU_REGS
))
6323 if (i386_record_floats (gdbarch
, &ir
,
6324 I387_ST0_REGNUM (tdep
)))
6326 if (i386_record_floats (gdbarch
, &ir
,
6327 I387_ST0_REGNUM (tdep
) + 1))
6334 if (0xe9 == ir
.modrm
)
6336 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6339 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6341 if (i386_record_floats (gdbarch
, &ir
,
6342 I387_ST0_REGNUM (tdep
)))
6344 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6346 if (i386_record_floats (gdbarch
, &ir
,
6347 I387_ST0_REGNUM (tdep
) +
6351 else if ((ir
.modrm
& 0x0f) - 0x08)
6353 if (i386_record_floats (gdbarch
, &ir
,
6354 I387_ST0_REGNUM (tdep
) +
6355 ((ir
.modrm
& 0x0f) - 0x08)))
6361 if (0xe3 == ir
.modrm
)
6363 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_ENV
))
6366 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6368 if (i386_record_floats (gdbarch
, &ir
,
6369 I387_ST0_REGNUM (tdep
)))
6371 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6373 if (i386_record_floats (gdbarch
, &ir
,
6374 I387_ST0_REGNUM (tdep
) +
6378 else if ((ir
.modrm
& 0x0f) - 0x08)
6380 if (i386_record_floats (gdbarch
, &ir
,
6381 I387_ST0_REGNUM (tdep
) +
6382 ((ir
.modrm
& 0x0f) - 0x08)))
6388 if ((0x0c == ir
.modrm
>> 4)
6389 || (0x0d == ir
.modrm
>> 4)
6390 || (0x0f == ir
.modrm
>> 4))
6392 if ((ir
.modrm
& 0x0f) <= 7)
6394 if (i386_record_floats (gdbarch
, &ir
,
6395 I387_ST0_REGNUM (tdep
) +
6401 if (i386_record_floats (gdbarch
, &ir
,
6402 I387_ST0_REGNUM (tdep
) +
6403 ((ir
.modrm
& 0x0f) - 0x08)))
6409 if (0x0c == ir
.modrm
>> 4)
6411 if (i386_record_floats (gdbarch
, &ir
,
6412 I387_FTAG_REGNUM (tdep
)))
6415 else if ((0x0d == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6417 if ((ir
.modrm
& 0x0f) <= 7)
6419 if (i386_record_floats (gdbarch
, &ir
,
6420 I387_ST0_REGNUM (tdep
) +
6426 if (i386_record_floats (gdbarch
, &ir
,
6427 I386_SAVE_FPU_REGS
))
6433 if ((0x0c == ir
.modrm
>> 4)
6434 || (0x0e == ir
.modrm
>> 4)
6435 || (0x0f == ir
.modrm
>> 4)
6436 || (0xd9 == ir
.modrm
))
6438 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6443 if (0xe0 == ir
.modrm
)
6445 if (record_full_arch_list_add_reg (ir
.regcache
,
6449 else if ((0x0f == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6451 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6459 case 0xa4: /* movsS */
6461 case 0xaa: /* stosS */
6463 case 0x6c: /* insS */
6465 regcache_raw_read_unsigned (ir
.regcache
,
6466 ir
.regmap
[X86_RECORD_RECX_REGNUM
],
6472 if ((opcode
& 1) == 0)
6475 ir
.ot
= ir
.dflag
+ OT_WORD
;
6476 regcache_raw_read_unsigned (ir
.regcache
,
6477 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
6480 regcache_raw_read_unsigned (ir
.regcache
,
6481 ir
.regmap
[X86_RECORD_ES_REGNUM
],
6483 regcache_raw_read_unsigned (ir
.regcache
,
6484 ir
.regmap
[X86_RECORD_DS_REGNUM
],
6486 if (ir
.aflag
&& (es
!= ds
))
6488 /* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
6489 if (record_full_memory_query
)
6492 Process record ignores the memory change of instruction at address %s\n\
6493 because it can't get the value of the segment register.\n\
6494 Do you want to stop the program?"),
6495 paddress (gdbarch
, ir
.orig_addr
)))
6501 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
6505 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6506 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6507 if (opcode
== 0xa4 || opcode
== 0xa5)
6508 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6509 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6510 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6514 case 0xa6: /* cmpsS */
6516 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6517 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6518 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6519 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6520 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6523 case 0xac: /* lodsS */
6525 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6526 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6527 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6528 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6529 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6532 case 0xae: /* scasS */
6534 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6535 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6536 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6537 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6540 case 0x6e: /* outsS */
6542 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6543 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6544 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6545 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6548 case 0xe4: /* port I/O */
6552 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6553 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6563 case 0xc2: /* ret im */
6564 case 0xc3: /* ret */
6565 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6566 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6569 case 0xca: /* lret im */
6570 case 0xcb: /* lret */
6571 case 0xcf: /* iret */
6572 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6573 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6574 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6577 case 0xe8: /* call im */
6578 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6580 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6584 case 0x9a: /* lcall im */
6585 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6590 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6591 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6595 case 0xe9: /* jmp im */
6596 case 0xea: /* ljmp im */
6597 case 0xeb: /* jmp Jb */
6598 case 0x70: /* jcc Jb */
6614 case 0x0f80: /* jcc Jv */
6632 case 0x0f90: /* setcc Gv */
6648 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6650 if (i386_record_modrm (&ir
))
6653 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
? (ir
.rm
| ir
.rex_b
)
6657 if (i386_record_lea_modrm (&ir
))
6662 case 0x0f40: /* cmov Gv, Ev */
6678 if (i386_record_modrm (&ir
))
6681 if (ir
.dflag
== OT_BYTE
)
6683 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
6687 case 0x9c: /* pushf */
6688 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6689 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6691 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6695 case 0x9d: /* popf */
6696 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6697 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6700 case 0x9e: /* sahf */
6701 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6707 case 0xf5: /* cmc */
6708 case 0xf8: /* clc */
6709 case 0xf9: /* stc */
6710 case 0xfc: /* cld */
6711 case 0xfd: /* std */
6712 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6715 case 0x9f: /* lahf */
6716 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6721 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6722 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6725 /* bit operations */
6726 case 0x0fba: /* bt/bts/btr/btc Gv, im */
6727 ir
.ot
= ir
.dflag
+ OT_WORD
;
6728 if (i386_record_modrm (&ir
))
6733 opcode
= opcode
<< 8 | ir
.modrm
;
6739 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6742 if (i386_record_lea_modrm (&ir
))
6746 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6749 case 0x0fa3: /* bt Gv, Ev */
6750 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6753 case 0x0fab: /* bts */
6754 case 0x0fb3: /* btr */
6755 case 0x0fbb: /* btc */
6756 ir
.ot
= ir
.dflag
+ OT_WORD
;
6757 if (i386_record_modrm (&ir
))
6760 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6764 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6766 regcache_raw_read_unsigned (ir
.regcache
,
6767 ir
.regmap
[ir
.reg
| rex_r
],
6772 addr64
+= ((int16_t) addr
>> 4) << 4;
6775 addr64
+= ((int32_t) addr
>> 5) << 5;
6778 addr64
+= ((int64_t) addr
>> 6) << 6;
6781 if (record_full_arch_list_add_mem (addr64
, 1 << ir
.ot
))
6783 if (i386_record_lea_modrm (&ir
))
6786 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6789 case 0x0fbc: /* bsf */
6790 case 0x0fbd: /* bsr */
6791 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
6792 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6796 case 0x27: /* daa */
6797 case 0x2f: /* das */
6798 case 0x37: /* aaa */
6799 case 0x3f: /* aas */
6800 case 0xd4: /* aam */
6801 case 0xd5: /* aad */
6802 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6807 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6808 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6812 case 0x90: /* nop */
6813 if (prefixes
& PREFIX_LOCK
)
6820 case 0x9b: /* fwait */
6821 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
6823 opcode
= (uint32_t) opcode8
;
6829 case 0xcc: /* int3 */
6830 printf_unfiltered (_("Process record does not support instruction "
6837 case 0xcd: /* int */
6841 if (record_read_memory (gdbarch
, ir
.addr
, &interrupt
, 1))
6844 if (interrupt
!= 0x80
6845 || tdep
->i386_intx80_record
== NULL
)
6847 printf_unfiltered (_("Process record does not support "
6848 "instruction int 0x%02x.\n"),
6853 ret
= tdep
->i386_intx80_record (ir
.regcache
);
6860 case 0xce: /* into */
6861 printf_unfiltered (_("Process record does not support "
6862 "instruction into.\n"));
6867 case 0xfa: /* cli */
6868 case 0xfb: /* sti */
6871 case 0x62: /* bound */
6872 printf_unfiltered (_("Process record does not support "
6873 "instruction bound.\n"));
6878 case 0x0fc8: /* bswap reg */
6886 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 7) | ir
.rex_b
);
6889 case 0xd6: /* salc */
6890 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6895 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6896 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6899 case 0xe0: /* loopnz */
6900 case 0xe1: /* loopz */
6901 case 0xe2: /* loop */
6902 case 0xe3: /* jecxz */
6903 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6904 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6907 case 0x0f30: /* wrmsr */
6908 printf_unfiltered (_("Process record does not support "
6909 "instruction wrmsr.\n"));
6914 case 0x0f32: /* rdmsr */
6915 printf_unfiltered (_("Process record does not support "
6916 "instruction rdmsr.\n"));
6921 case 0x0f31: /* rdtsc */
6922 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6923 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
6926 case 0x0f34: /* sysenter */
6929 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6934 if (tdep
->i386_sysenter_record
== NULL
)
6936 printf_unfiltered (_("Process record does not support "
6937 "instruction sysenter.\n"));
6941 ret
= tdep
->i386_sysenter_record (ir
.regcache
);
6947 case 0x0f35: /* sysexit */
6948 printf_unfiltered (_("Process record does not support "
6949 "instruction sysexit.\n"));
6954 case 0x0f05: /* syscall */
6957 if (tdep
->i386_syscall_record
== NULL
)
6959 printf_unfiltered (_("Process record does not support "
6960 "instruction syscall.\n"));
6964 ret
= tdep
->i386_syscall_record (ir
.regcache
);
6970 case 0x0f07: /* sysret */
6971 printf_unfiltered (_("Process record does not support "
6972 "instruction sysret.\n"));
6977 case 0x0fa2: /* cpuid */
6978 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6979 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6980 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
6981 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
6984 case 0xf4: /* hlt */
6985 printf_unfiltered (_("Process record does not support "
6986 "instruction hlt.\n"));
6992 if (i386_record_modrm (&ir
))
6999 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7003 if (i386_record_lea_modrm (&ir
))
7012 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7016 opcode
= opcode
<< 8 | ir
.modrm
;
7023 if (i386_record_modrm (&ir
))
7034 opcode
= opcode
<< 8 | ir
.modrm
;
7037 if (ir
.override
>= 0)
7039 if (record_full_memory_query
)
7042 Process record ignores the memory change of instruction at address %s\n\
7043 because it can't get the value of the segment register.\n\
7044 Do you want to stop the program?"),
7045 paddress (gdbarch
, ir
.orig_addr
)))
7051 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7053 if (record_full_arch_list_add_mem (addr64
, 2))
7056 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7058 if (record_full_arch_list_add_mem (addr64
, 8))
7063 if (record_full_arch_list_add_mem (addr64
, 4))
7074 case 0: /* monitor */
7077 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7081 opcode
= opcode
<< 8 | ir
.modrm
;
7089 if (ir
.override
>= 0)
7091 if (record_full_memory_query
)
7094 Process record ignores the memory change of instruction at address %s\n\
7095 because it can't get the value of the segment register.\n\
7096 Do you want to stop the program?"),
7097 paddress (gdbarch
, ir
.orig_addr
)))
7105 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7107 if (record_full_arch_list_add_mem (addr64
, 2))
7110 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7112 if (record_full_arch_list_add_mem (addr64
, 8))
7117 if (record_full_arch_list_add_mem (addr64
, 4))
7129 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7130 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7134 else if (ir
.rm
== 1)
7142 opcode
= opcode
<< 8 | ir
.modrm
;
7149 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
| ir
.rex_b
))
7155 if (i386_record_lea_modrm (&ir
))
7158 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7161 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7163 case 7: /* invlpg */
7166 if (ir
.rm
== 0 && ir
.regmap
[X86_RECORD_R8_REGNUM
])
7167 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
7171 opcode
= opcode
<< 8 | ir
.modrm
;
7176 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7180 opcode
= opcode
<< 8 | ir
.modrm
;
7186 case 0x0f08: /* invd */
7187 case 0x0f09: /* wbinvd */
7190 case 0x63: /* arpl */
7191 if (i386_record_modrm (&ir
))
7193 if (ir
.mod
== 3 || ir
.regmap
[X86_RECORD_R8_REGNUM
])
7195 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.regmap
[X86_RECORD_R8_REGNUM
]
7196 ? (ir
.reg
| rex_r
) : ir
.rm
);
7200 ir
.ot
= ir
.dflag
? OT_LONG
: OT_WORD
;
7201 if (i386_record_lea_modrm (&ir
))
7204 if (!ir
.regmap
[X86_RECORD_R8_REGNUM
])
7205 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7208 case 0x0f02: /* lar */
7209 case 0x0f03: /* lsl */
7210 if (i386_record_modrm (&ir
))
7212 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7213 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7217 if (i386_record_modrm (&ir
))
7219 if (ir
.mod
== 3 && ir
.reg
== 3)
7222 opcode
= opcode
<< 8 | ir
.modrm
;
7234 /* nop (multi byte) */
7237 case 0x0f20: /* mov reg, crN */
7238 case 0x0f22: /* mov crN, reg */
7239 if (i386_record_modrm (&ir
))
7241 if ((ir
.modrm
& 0xc0) != 0xc0)
7244 opcode
= opcode
<< 8 | ir
.modrm
;
7255 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7257 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7261 opcode
= opcode
<< 8 | ir
.modrm
;
7267 case 0x0f21: /* mov reg, drN */
7268 case 0x0f23: /* mov drN, reg */
7269 if (i386_record_modrm (&ir
))
7271 if ((ir
.modrm
& 0xc0) != 0xc0 || ir
.reg
== 4
7272 || ir
.reg
== 5 || ir
.reg
>= 8)
7275 opcode
= opcode
<< 8 | ir
.modrm
;
7279 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7281 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7284 case 0x0f06: /* clts */
7285 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7288 /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
7290 case 0x0f0d: /* 3DNow! prefetch */
7293 case 0x0f0e: /* 3DNow! femms */
7294 case 0x0f77: /* emms */
7295 if (i386_fpc_regnum_p (gdbarch
, I387_FTAG_REGNUM(tdep
)))
7297 record_full_arch_list_add_reg (ir
.regcache
, I387_FTAG_REGNUM(tdep
));
7300 case 0x0f0f: /* 3DNow! data */
7301 if (i386_record_modrm (&ir
))
7303 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7308 case 0x0c: /* 3DNow! pi2fw */
7309 case 0x0d: /* 3DNow! pi2fd */
7310 case 0x1c: /* 3DNow! pf2iw */
7311 case 0x1d: /* 3DNow! pf2id */
7312 case 0x8a: /* 3DNow! pfnacc */
7313 case 0x8e: /* 3DNow! pfpnacc */
7314 case 0x90: /* 3DNow! pfcmpge */
7315 case 0x94: /* 3DNow! pfmin */
7316 case 0x96: /* 3DNow! pfrcp */
7317 case 0x97: /* 3DNow! pfrsqrt */
7318 case 0x9a: /* 3DNow! pfsub */
7319 case 0x9e: /* 3DNow! pfadd */
7320 case 0xa0: /* 3DNow! pfcmpgt */
7321 case 0xa4: /* 3DNow! pfmax */
7322 case 0xa6: /* 3DNow! pfrcpit1 */
7323 case 0xa7: /* 3DNow! pfrsqit1 */
7324 case 0xaa: /* 3DNow! pfsubr */
7325 case 0xae: /* 3DNow! pfacc */
7326 case 0xb0: /* 3DNow! pfcmpeq */
7327 case 0xb4: /* 3DNow! pfmul */
7328 case 0xb6: /* 3DNow! pfrcpit2 */
7329 case 0xb7: /* 3DNow! pmulhrw */
7330 case 0xbb: /* 3DNow! pswapd */
7331 case 0xbf: /* 3DNow! pavgusb */
7332 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7333 goto no_support_3dnow_data
;
7334 record_full_arch_list_add_reg (ir
.regcache
, ir
.reg
);
7338 no_support_3dnow_data
:
7339 opcode
= (opcode
<< 8) | opcode8
;
7345 case 0x0faa: /* rsm */
7346 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7347 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7348 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
7349 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7350 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
7351 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
7352 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
7353 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
7354 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
7358 if (i386_record_modrm (&ir
))
7362 case 0: /* fxsave */
7366 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7367 if (i386_record_lea_modrm_addr (&ir
, &tmpu64
))
7369 if (record_full_arch_list_add_mem (tmpu64
, 512))
7374 case 1: /* fxrstor */
7378 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7380 for (i
= I387_MM0_REGNUM (tdep
);
7381 i386_mmx_regnum_p (gdbarch
, i
); i
++)
7382 record_full_arch_list_add_reg (ir
.regcache
, i
);
7384 for (i
= I387_XMM0_REGNUM (tdep
);
7385 i386_xmm_regnum_p (gdbarch
, i
); i
++)
7386 record_full_arch_list_add_reg (ir
.regcache
, i
);
7388 if (i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7389 record_full_arch_list_add_reg (ir
.regcache
,
7390 I387_MXCSR_REGNUM(tdep
));
7392 for (i
= I387_ST0_REGNUM (tdep
);
7393 i386_fp_regnum_p (gdbarch
, i
); i
++)
7394 record_full_arch_list_add_reg (ir
.regcache
, i
);
7396 for (i
= I387_FCTRL_REGNUM (tdep
);
7397 i386_fpc_regnum_p (gdbarch
, i
); i
++)
7398 record_full_arch_list_add_reg (ir
.regcache
, i
);
7402 case 2: /* ldmxcsr */
7403 if (!i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7405 record_full_arch_list_add_reg (ir
.regcache
, I387_MXCSR_REGNUM(tdep
));
7408 case 3: /* stmxcsr */
7410 if (i386_record_lea_modrm (&ir
))
7414 case 5: /* lfence */
7415 case 6: /* mfence */
7416 case 7: /* sfence clflush */
7420 opcode
= (opcode
<< 8) | ir
.modrm
;
7426 case 0x0fc3: /* movnti */
7427 ir
.ot
= (ir
.dflag
== 2) ? OT_QUAD
: OT_LONG
;
7428 if (i386_record_modrm (&ir
))
7433 if (i386_record_lea_modrm (&ir
))
7437 /* Add prefix to opcode. */
7552 /* Mask out PREFIX_ADDR. */
7553 switch ((prefixes
& ~PREFIX_ADDR
))
7565 reswitch_prefix_add
:
7573 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7576 opcode
= (uint32_t) opcode8
| opcode
<< 8;
7577 goto reswitch_prefix_add
;
7580 case 0x0f10: /* movups */
7581 case 0x660f10: /* movupd */
7582 case 0xf30f10: /* movss */
7583 case 0xf20f10: /* movsd */
7584 case 0x0f12: /* movlps */
7585 case 0x660f12: /* movlpd */
7586 case 0xf30f12: /* movsldup */
7587 case 0xf20f12: /* movddup */
7588 case 0x0f14: /* unpcklps */
7589 case 0x660f14: /* unpcklpd */
7590 case 0x0f15: /* unpckhps */
7591 case 0x660f15: /* unpckhpd */
7592 case 0x0f16: /* movhps */
7593 case 0x660f16: /* movhpd */
7594 case 0xf30f16: /* movshdup */
7595 case 0x0f28: /* movaps */
7596 case 0x660f28: /* movapd */
7597 case 0x0f2a: /* cvtpi2ps */
7598 case 0x660f2a: /* cvtpi2pd */
7599 case 0xf30f2a: /* cvtsi2ss */
7600 case 0xf20f2a: /* cvtsi2sd */
7601 case 0x0f2c: /* cvttps2pi */
7602 case 0x660f2c: /* cvttpd2pi */
7603 case 0x0f2d: /* cvtps2pi */
7604 case 0x660f2d: /* cvtpd2pi */
7605 case 0x660f3800: /* pshufb */
7606 case 0x660f3801: /* phaddw */
7607 case 0x660f3802: /* phaddd */
7608 case 0x660f3803: /* phaddsw */
7609 case 0x660f3804: /* pmaddubsw */
7610 case 0x660f3805: /* phsubw */
7611 case 0x660f3806: /* phsubd */
7612 case 0x660f3807: /* phsubsw */
7613 case 0x660f3808: /* psignb */
7614 case 0x660f3809: /* psignw */
7615 case 0x660f380a: /* psignd */
7616 case 0x660f380b: /* pmulhrsw */
7617 case 0x660f3810: /* pblendvb */
7618 case 0x660f3814: /* blendvps */
7619 case 0x660f3815: /* blendvpd */
7620 case 0x660f381c: /* pabsb */
7621 case 0x660f381d: /* pabsw */
7622 case 0x660f381e: /* pabsd */
7623 case 0x660f3820: /* pmovsxbw */
7624 case 0x660f3821: /* pmovsxbd */
7625 case 0x660f3822: /* pmovsxbq */
7626 case 0x660f3823: /* pmovsxwd */
7627 case 0x660f3824: /* pmovsxwq */
7628 case 0x660f3825: /* pmovsxdq */
7629 case 0x660f3828: /* pmuldq */
7630 case 0x660f3829: /* pcmpeqq */
7631 case 0x660f382a: /* movntdqa */
7632 case 0x660f3a08: /* roundps */
7633 case 0x660f3a09: /* roundpd */
7634 case 0x660f3a0a: /* roundss */
7635 case 0x660f3a0b: /* roundsd */
7636 case 0x660f3a0c: /* blendps */
7637 case 0x660f3a0d: /* blendpd */
7638 case 0x660f3a0e: /* pblendw */
7639 case 0x660f3a0f: /* palignr */
7640 case 0x660f3a20: /* pinsrb */
7641 case 0x660f3a21: /* insertps */
7642 case 0x660f3a22: /* pinsrd pinsrq */
7643 case 0x660f3a40: /* dpps */
7644 case 0x660f3a41: /* dppd */
7645 case 0x660f3a42: /* mpsadbw */
7646 case 0x660f3a60: /* pcmpestrm */
7647 case 0x660f3a61: /* pcmpestri */
7648 case 0x660f3a62: /* pcmpistrm */
7649 case 0x660f3a63: /* pcmpistri */
7650 case 0x0f51: /* sqrtps */
7651 case 0x660f51: /* sqrtpd */
7652 case 0xf20f51: /* sqrtsd */
7653 case 0xf30f51: /* sqrtss */
7654 case 0x0f52: /* rsqrtps */
7655 case 0xf30f52: /* rsqrtss */
7656 case 0x0f53: /* rcpps */
7657 case 0xf30f53: /* rcpss */
7658 case 0x0f54: /* andps */
7659 case 0x660f54: /* andpd */
7660 case 0x0f55: /* andnps */
7661 case 0x660f55: /* andnpd */
7662 case 0x0f56: /* orps */
7663 case 0x660f56: /* orpd */
7664 case 0x0f57: /* xorps */
7665 case 0x660f57: /* xorpd */
7666 case 0x0f58: /* addps */
7667 case 0x660f58: /* addpd */
7668 case 0xf20f58: /* addsd */
7669 case 0xf30f58: /* addss */
7670 case 0x0f59: /* mulps */
7671 case 0x660f59: /* mulpd */
7672 case 0xf20f59: /* mulsd */
7673 case 0xf30f59: /* mulss */
7674 case 0x0f5a: /* cvtps2pd */
7675 case 0x660f5a: /* cvtpd2ps */
7676 case 0xf20f5a: /* cvtsd2ss */
7677 case 0xf30f5a: /* cvtss2sd */
7678 case 0x0f5b: /* cvtdq2ps */
7679 case 0x660f5b: /* cvtps2dq */
7680 case 0xf30f5b: /* cvttps2dq */
7681 case 0x0f5c: /* subps */
7682 case 0x660f5c: /* subpd */
7683 case 0xf20f5c: /* subsd */
7684 case 0xf30f5c: /* subss */
7685 case 0x0f5d: /* minps */
7686 case 0x660f5d: /* minpd */
7687 case 0xf20f5d: /* minsd */
7688 case 0xf30f5d: /* minss */
7689 case 0x0f5e: /* divps */
7690 case 0x660f5e: /* divpd */
7691 case 0xf20f5e: /* divsd */
7692 case 0xf30f5e: /* divss */
7693 case 0x0f5f: /* maxps */
7694 case 0x660f5f: /* maxpd */
7695 case 0xf20f5f: /* maxsd */
7696 case 0xf30f5f: /* maxss */
7697 case 0x660f60: /* punpcklbw */
7698 case 0x660f61: /* punpcklwd */
7699 case 0x660f62: /* punpckldq */
7700 case 0x660f63: /* packsswb */
7701 case 0x660f64: /* pcmpgtb */
7702 case 0x660f65: /* pcmpgtw */
7703 case 0x660f66: /* pcmpgtd */
7704 case 0x660f67: /* packuswb */
7705 case 0x660f68: /* punpckhbw */
7706 case 0x660f69: /* punpckhwd */
7707 case 0x660f6a: /* punpckhdq */
7708 case 0x660f6b: /* packssdw */
7709 case 0x660f6c: /* punpcklqdq */
7710 case 0x660f6d: /* punpckhqdq */
7711 case 0x660f6e: /* movd */
7712 case 0x660f6f: /* movdqa */
7713 case 0xf30f6f: /* movdqu */
7714 case 0x660f70: /* pshufd */
7715 case 0xf20f70: /* pshuflw */
7716 case 0xf30f70: /* pshufhw */
7717 case 0x660f74: /* pcmpeqb */
7718 case 0x660f75: /* pcmpeqw */
7719 case 0x660f76: /* pcmpeqd */
7720 case 0x660f7c: /* haddpd */
7721 case 0xf20f7c: /* haddps */
7722 case 0x660f7d: /* hsubpd */
7723 case 0xf20f7d: /* hsubps */
7724 case 0xf30f7e: /* movq */
7725 case 0x0fc2: /* cmpps */
7726 case 0x660fc2: /* cmppd */
7727 case 0xf20fc2: /* cmpsd */
7728 case 0xf30fc2: /* cmpss */
7729 case 0x660fc4: /* pinsrw */
7730 case 0x0fc6: /* shufps */
7731 case 0x660fc6: /* shufpd */
7732 case 0x660fd0: /* addsubpd */
7733 case 0xf20fd0: /* addsubps */
7734 case 0x660fd1: /* psrlw */
7735 case 0x660fd2: /* psrld */
7736 case 0x660fd3: /* psrlq */
7737 case 0x660fd4: /* paddq */
7738 case 0x660fd5: /* pmullw */
7739 case 0xf30fd6: /* movq2dq */
7740 case 0x660fd8: /* psubusb */
7741 case 0x660fd9: /* psubusw */
7742 case 0x660fda: /* pminub */
7743 case 0x660fdb: /* pand */
7744 case 0x660fdc: /* paddusb */
7745 case 0x660fdd: /* paddusw */
7746 case 0x660fde: /* pmaxub */
7747 case 0x660fdf: /* pandn */
7748 case 0x660fe0: /* pavgb */
7749 case 0x660fe1: /* psraw */
7750 case 0x660fe2: /* psrad */
7751 case 0x660fe3: /* pavgw */
7752 case 0x660fe4: /* pmulhuw */
7753 case 0x660fe5: /* pmulhw */
7754 case 0x660fe6: /* cvttpd2dq */
7755 case 0xf20fe6: /* cvtpd2dq */
7756 case 0xf30fe6: /* cvtdq2pd */
7757 case 0x660fe8: /* psubsb */
7758 case 0x660fe9: /* psubsw */
7759 case 0x660fea: /* pminsw */
7760 case 0x660feb: /* por */
7761 case 0x660fec: /* paddsb */
7762 case 0x660fed: /* paddsw */
7763 case 0x660fee: /* pmaxsw */
7764 case 0x660fef: /* pxor */
7765 case 0xf20ff0: /* lddqu */
7766 case 0x660ff1: /* psllw */
7767 case 0x660ff2: /* pslld */
7768 case 0x660ff3: /* psllq */
7769 case 0x660ff4: /* pmuludq */
7770 case 0x660ff5: /* pmaddwd */
7771 case 0x660ff6: /* psadbw */
7772 case 0x660ff8: /* psubb */
7773 case 0x660ff9: /* psubw */
7774 case 0x660ffa: /* psubd */
7775 case 0x660ffb: /* psubq */
7776 case 0x660ffc: /* paddb */
7777 case 0x660ffd: /* paddw */
7778 case 0x660ffe: /* paddd */
7779 if (i386_record_modrm (&ir
))
7782 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.reg
))
7784 record_full_arch_list_add_reg (ir
.regcache
,
7785 I387_XMM0_REGNUM (tdep
) + ir
.reg
);
7786 if ((opcode
& 0xfffffffc) == 0x660f3a60)
7787 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7790 case 0x0f11: /* movups */
7791 case 0x660f11: /* movupd */
7792 case 0xf30f11: /* movss */
7793 case 0xf20f11: /* movsd */
7794 case 0x0f13: /* movlps */
7795 case 0x660f13: /* movlpd */
7796 case 0x0f17: /* movhps */
7797 case 0x660f17: /* movhpd */
7798 case 0x0f29: /* movaps */
7799 case 0x660f29: /* movapd */
7800 case 0x660f3a14: /* pextrb */
7801 case 0x660f3a15: /* pextrw */
7802 case 0x660f3a16: /* pextrd pextrq */
7803 case 0x660f3a17: /* extractps */
7804 case 0x660f7f: /* movdqa */
7805 case 0xf30f7f: /* movdqu */
7806 if (i386_record_modrm (&ir
))
7810 if (opcode
== 0x0f13 || opcode
== 0x660f13
7811 || opcode
== 0x0f17 || opcode
== 0x660f17)
7814 if (!i386_xmm_regnum_p (gdbarch
,
7815 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
7817 record_full_arch_list_add_reg (ir
.regcache
,
7818 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
7840 if (i386_record_lea_modrm (&ir
))
7845 case 0x0f2b: /* movntps */
7846 case 0x660f2b: /* movntpd */
7847 case 0x0fe7: /* movntq */
7848 case 0x660fe7: /* movntdq */
7851 if (opcode
== 0x0fe7)
7855 if (i386_record_lea_modrm (&ir
))
7859 case 0xf30f2c: /* cvttss2si */
7860 case 0xf20f2c: /* cvttsd2si */
7861 case 0xf30f2d: /* cvtss2si */
7862 case 0xf20f2d: /* cvtsd2si */
7863 case 0xf20f38f0: /* crc32 */
7864 case 0xf20f38f1: /* crc32 */
7865 case 0x0f50: /* movmskps */
7866 case 0x660f50: /* movmskpd */
7867 case 0x0fc5: /* pextrw */
7868 case 0x660fc5: /* pextrw */
7869 case 0x0fd7: /* pmovmskb */
7870 case 0x660fd7: /* pmovmskb */
7871 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7874 case 0x0f3800: /* pshufb */
7875 case 0x0f3801: /* phaddw */
7876 case 0x0f3802: /* phaddd */
7877 case 0x0f3803: /* phaddsw */
7878 case 0x0f3804: /* pmaddubsw */
7879 case 0x0f3805: /* phsubw */
7880 case 0x0f3806: /* phsubd */
7881 case 0x0f3807: /* phsubsw */
7882 case 0x0f3808: /* psignb */
7883 case 0x0f3809: /* psignw */
7884 case 0x0f380a: /* psignd */
7885 case 0x0f380b: /* pmulhrsw */
7886 case 0x0f381c: /* pabsb */
7887 case 0x0f381d: /* pabsw */
7888 case 0x0f381e: /* pabsd */
7889 case 0x0f382b: /* packusdw */
7890 case 0x0f3830: /* pmovzxbw */
7891 case 0x0f3831: /* pmovzxbd */
7892 case 0x0f3832: /* pmovzxbq */
7893 case 0x0f3833: /* pmovzxwd */
7894 case 0x0f3834: /* pmovzxwq */
7895 case 0x0f3835: /* pmovzxdq */
7896 case 0x0f3837: /* pcmpgtq */
7897 case 0x0f3838: /* pminsb */
7898 case 0x0f3839: /* pminsd */
7899 case 0x0f383a: /* pminuw */
7900 case 0x0f383b: /* pminud */
7901 case 0x0f383c: /* pmaxsb */
7902 case 0x0f383d: /* pmaxsd */
7903 case 0x0f383e: /* pmaxuw */
7904 case 0x0f383f: /* pmaxud */
7905 case 0x0f3840: /* pmulld */
7906 case 0x0f3841: /* phminposuw */
7907 case 0x0f3a0f: /* palignr */
7908 case 0x0f60: /* punpcklbw */
7909 case 0x0f61: /* punpcklwd */
7910 case 0x0f62: /* punpckldq */
7911 case 0x0f63: /* packsswb */
7912 case 0x0f64: /* pcmpgtb */
7913 case 0x0f65: /* pcmpgtw */
7914 case 0x0f66: /* pcmpgtd */
7915 case 0x0f67: /* packuswb */
7916 case 0x0f68: /* punpckhbw */
7917 case 0x0f69: /* punpckhwd */
7918 case 0x0f6a: /* punpckhdq */
7919 case 0x0f6b: /* packssdw */
7920 case 0x0f6e: /* movd */
7921 case 0x0f6f: /* movq */
7922 case 0x0f70: /* pshufw */
7923 case 0x0f74: /* pcmpeqb */
7924 case 0x0f75: /* pcmpeqw */
7925 case 0x0f76: /* pcmpeqd */
7926 case 0x0fc4: /* pinsrw */
7927 case 0x0fd1: /* psrlw */
7928 case 0x0fd2: /* psrld */
7929 case 0x0fd3: /* psrlq */
7930 case 0x0fd4: /* paddq */
7931 case 0x0fd5: /* pmullw */
7932 case 0xf20fd6: /* movdq2q */
7933 case 0x0fd8: /* psubusb */
7934 case 0x0fd9: /* psubusw */
7935 case 0x0fda: /* pminub */
7936 case 0x0fdb: /* pand */
7937 case 0x0fdc: /* paddusb */
7938 case 0x0fdd: /* paddusw */
7939 case 0x0fde: /* pmaxub */
7940 case 0x0fdf: /* pandn */
7941 case 0x0fe0: /* pavgb */
7942 case 0x0fe1: /* psraw */
7943 case 0x0fe2: /* psrad */
7944 case 0x0fe3: /* pavgw */
7945 case 0x0fe4: /* pmulhuw */
7946 case 0x0fe5: /* pmulhw */
7947 case 0x0fe8: /* psubsb */
7948 case 0x0fe9: /* psubsw */
7949 case 0x0fea: /* pminsw */
7950 case 0x0feb: /* por */
7951 case 0x0fec: /* paddsb */
7952 case 0x0fed: /* paddsw */
7953 case 0x0fee: /* pmaxsw */
7954 case 0x0fef: /* pxor */
7955 case 0x0ff1: /* psllw */
7956 case 0x0ff2: /* pslld */
7957 case 0x0ff3: /* psllq */
7958 case 0x0ff4: /* pmuludq */
7959 case 0x0ff5: /* pmaddwd */
7960 case 0x0ff6: /* psadbw */
7961 case 0x0ff8: /* psubb */
7962 case 0x0ff9: /* psubw */
7963 case 0x0ffa: /* psubd */
7964 case 0x0ffb: /* psubq */
7965 case 0x0ffc: /* paddb */
7966 case 0x0ffd: /* paddw */
7967 case 0x0ffe: /* paddd */
7968 if (i386_record_modrm (&ir
))
7970 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7972 record_full_arch_list_add_reg (ir
.regcache
,
7973 I387_MM0_REGNUM (tdep
) + ir
.reg
);
7976 case 0x0f71: /* psllw */
7977 case 0x0f72: /* pslld */
7978 case 0x0f73: /* psllq */
7979 if (i386_record_modrm (&ir
))
7981 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
7983 record_full_arch_list_add_reg (ir
.regcache
,
7984 I387_MM0_REGNUM (tdep
) + ir
.rm
);
7987 case 0x660f71: /* psllw */
7988 case 0x660f72: /* pslld */
7989 case 0x660f73: /* psllq */
7990 if (i386_record_modrm (&ir
))
7993 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.rm
))
7995 record_full_arch_list_add_reg (ir
.regcache
,
7996 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
7999 case 0x0f7e: /* movd */
8000 case 0x660f7e: /* movd */
8001 if (i386_record_modrm (&ir
))
8004 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
8011 if (i386_record_lea_modrm (&ir
))
8016 case 0x0f7f: /* movq */
8017 if (i386_record_modrm (&ir
))
8021 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
8023 record_full_arch_list_add_reg (ir
.regcache
,
8024 I387_MM0_REGNUM (tdep
) + ir
.rm
);
8029 if (i386_record_lea_modrm (&ir
))
8034 case 0xf30fb8: /* popcnt */
8035 if (i386_record_modrm (&ir
))
8037 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
8038 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8041 case 0x660fd6: /* movq */
8042 if (i386_record_modrm (&ir
))
8047 if (!i386_xmm_regnum_p (gdbarch
,
8048 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
8050 record_full_arch_list_add_reg (ir
.regcache
,
8051 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
8056 if (i386_record_lea_modrm (&ir
))
8061 case 0x660f3817: /* ptest */
8062 case 0x0f2e: /* ucomiss */
8063 case 0x660f2e: /* ucomisd */
8064 case 0x0f2f: /* comiss */
8065 case 0x660f2f: /* comisd */
8066 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8069 case 0x0ff7: /* maskmovq */
8070 regcache_raw_read_unsigned (ir
.regcache
,
8071 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8073 if (record_full_arch_list_add_mem (addr
, 64))
8077 case 0x660ff7: /* maskmovdqu */
8078 regcache_raw_read_unsigned (ir
.regcache
,
8079 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8081 if (record_full_arch_list_add_mem (addr
, 128))
8096 /* In the future, maybe still need to deal with need_dasm. */
8097 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REIP_REGNUM
);
8098 if (record_full_arch_list_add_end ())
8104 printf_unfiltered (_("Process record does not support instruction 0x%02x "
8105 "at address %s.\n"),
8106 (unsigned int) (opcode
),
8107 paddress (gdbarch
, ir
.orig_addr
));
8111 static const int i386_record_regmap
[] =
8113 I386_EAX_REGNUM
, I386_ECX_REGNUM
, I386_EDX_REGNUM
, I386_EBX_REGNUM
,
8114 I386_ESP_REGNUM
, I386_EBP_REGNUM
, I386_ESI_REGNUM
, I386_EDI_REGNUM
,
8115 0, 0, 0, 0, 0, 0, 0, 0,
8116 I386_EIP_REGNUM
, I386_EFLAGS_REGNUM
, I386_CS_REGNUM
, I386_SS_REGNUM
,
8117 I386_DS_REGNUM
, I386_ES_REGNUM
, I386_FS_REGNUM
, I386_GS_REGNUM
8120 /* Check that the given address appears suitable for a fast
8121 tracepoint, which on x86-64 means that we need an instruction of at
8122 least 5 bytes, so that we can overwrite it with a 4-byte-offset
8123 jump and not have to worry about program jumps to an address in the
8124 middle of the tracepoint jump. On x86, it may be possible to use
8125 4-byte jumps with a 2-byte offset to a trampoline located in the
8126 bottom 64 KiB of memory. Returns 1 if OK, and writes a size
8127 of instruction to replace, and 0 if not, plus an explanatory
8131 i386_fast_tracepoint_valid_at (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
8136 /* Ask the target for the minimum instruction length supported. */
8137 jumplen
= target_get_min_fast_tracepoint_insn_len ();
8141 /* If the target does not support the get_min_fast_tracepoint_insn_len
8142 operation, assume that fast tracepoints will always be implemented
8143 using 4-byte relative jumps on both x86 and x86-64. */
8146 else if (jumplen
== 0)
8148 /* If the target does support get_min_fast_tracepoint_insn_len but
8149 returns zero, then the IPA has not loaded yet. In this case,
8150 we optimistically assume that truncated 2-byte relative jumps
8151 will be available on x86, and compensate later if this assumption
8152 turns out to be incorrect. On x86-64 architectures, 4-byte relative
8153 jumps will always be used. */
8154 jumplen
= (register_size (gdbarch
, 0) == 8) ? 5 : 4;
8157 /* Check for fit. */
8158 len
= gdb_insn_length (gdbarch
, addr
);
8162 /* Return a bit of target-specific detail to add to the caller's
8163 generic failure message. */
8165 *msg
= string_printf (_("; instruction is only %d bytes long, "
8166 "need at least %d bytes for the jump"),
8178 /* Return a floating-point format for a floating-point variable of
8179 length LEN in bits. If non-NULL, NAME is the name of its type.
8180 If no suitable type is found, return NULL. */
8182 static const struct floatformat
**
8183 i386_floatformat_for_type (struct gdbarch
*gdbarch
,
8184 const char *name
, int len
)
8186 if (len
== 128 && name
)
8187 if (strcmp (name
, "__float128") == 0
8188 || strcmp (name
, "_Float128") == 0
8189 || strcmp (name
, "complex _Float128") == 0
8190 || strcmp (name
, "complex(kind=16)") == 0
8191 || strcmp (name
, "real(kind=16)") == 0)
8192 return floatformats_ia64_quad
;
8194 return default_floatformat_for_type (gdbarch
, name
, len
);
8198 i386_validate_tdesc_p (struct gdbarch_tdep
*tdep
,
8199 struct tdesc_arch_data
*tdesc_data
)
8201 const struct target_desc
*tdesc
= tdep
->tdesc
;
8202 const struct tdesc_feature
*feature_core
;
8204 const struct tdesc_feature
*feature_sse
, *feature_avx
, *feature_mpx
,
8205 *feature_avx512
, *feature_pkeys
, *feature_segments
;
8206 int i
, num_regs
, valid_p
;
8208 if (! tdesc_has_registers (tdesc
))
8211 /* Get core registers. */
8212 feature_core
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.core");
8213 if (feature_core
== NULL
)
8216 /* Get SSE registers. */
8217 feature_sse
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.sse");
8219 /* Try AVX registers. */
8220 feature_avx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx");
8222 /* Try MPX registers. */
8223 feature_mpx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx");
8225 /* Try AVX512 registers. */
8226 feature_avx512
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx512");
8228 /* Try segment base registers. */
8229 feature_segments
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.segments");
8232 feature_pkeys
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.pkeys");
8236 /* The XCR0 bits. */
8239 /* AVX512 register description requires AVX register description. */
8243 tdep
->xcr0
= X86_XSTATE_AVX_AVX512_MASK
;
8245 /* It may have been set by OSABI initialization function. */
8246 if (tdep
->k0_regnum
< 0)
8248 tdep
->k_register_names
= i386_k_names
;
8249 tdep
->k0_regnum
= I386_K0_REGNUM
;
8252 for (i
= 0; i
< I387_NUM_K_REGS
; i
++)
8253 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8254 tdep
->k0_regnum
+ i
,
8257 if (tdep
->num_zmm_regs
== 0)
8259 tdep
->zmmh_register_names
= i386_zmmh_names
;
8260 tdep
->num_zmm_regs
= 8;
8261 tdep
->zmm0h_regnum
= I386_ZMM0H_REGNUM
;
8264 for (i
= 0; i
< tdep
->num_zmm_regs
; i
++)
8265 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8266 tdep
->zmm0h_regnum
+ i
,
8267 tdep
->zmmh_register_names
[i
]);
8269 for (i
= 0; i
< tdep
->num_xmm_avx512_regs
; i
++)
8270 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8271 tdep
->xmm16_regnum
+ i
,
8272 tdep
->xmm_avx512_register_names
[i
]);
8274 for (i
= 0; i
< tdep
->num_ymm_avx512_regs
; i
++)
8275 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8276 tdep
->ymm16h_regnum
+ i
,
8277 tdep
->ymm16h_register_names
[i
]);
8281 /* AVX register description requires SSE register description. */
8285 if (!feature_avx512
)
8286 tdep
->xcr0
= X86_XSTATE_AVX_MASK
;
8288 /* It may have been set by OSABI initialization function. */
8289 if (tdep
->num_ymm_regs
== 0)
8291 tdep
->ymmh_register_names
= i386_ymmh_names
;
8292 tdep
->num_ymm_regs
= 8;
8293 tdep
->ymm0h_regnum
= I386_YMM0H_REGNUM
;
8296 for (i
= 0; i
< tdep
->num_ymm_regs
; i
++)
8297 valid_p
&= tdesc_numbered_register (feature_avx
, tdesc_data
,
8298 tdep
->ymm0h_regnum
+ i
,
8299 tdep
->ymmh_register_names
[i
]);
8301 else if (feature_sse
)
8302 tdep
->xcr0
= X86_XSTATE_SSE_MASK
;
8305 tdep
->xcr0
= X86_XSTATE_X87_MASK
;
8306 tdep
->num_xmm_regs
= 0;
8309 num_regs
= tdep
->num_core_regs
;
8310 for (i
= 0; i
< num_regs
; i
++)
8311 valid_p
&= tdesc_numbered_register (feature_core
, tdesc_data
, i
,
8312 tdep
->register_names
[i
]);
8316 /* Need to include %mxcsr, so add one. */
8317 num_regs
+= tdep
->num_xmm_regs
+ 1;
8318 for (; i
< num_regs
; i
++)
8319 valid_p
&= tdesc_numbered_register (feature_sse
, tdesc_data
, i
,
8320 tdep
->register_names
[i
]);
8325 tdep
->xcr0
|= X86_XSTATE_MPX_MASK
;
8327 if (tdep
->bnd0r_regnum
< 0)
8329 tdep
->mpx_register_names
= i386_mpx_names
;
8330 tdep
->bnd0r_regnum
= I386_BND0R_REGNUM
;
8331 tdep
->bndcfgu_regnum
= I386_BNDCFGU_REGNUM
;
8334 for (i
= 0; i
< I387_NUM_MPX_REGS
; i
++)
8335 valid_p
&= tdesc_numbered_register (feature_mpx
, tdesc_data
,
8336 I387_BND0R_REGNUM (tdep
) + i
,
8337 tdep
->mpx_register_names
[i
]);
8340 if (feature_segments
)
8342 if (tdep
->fsbase_regnum
< 0)
8343 tdep
->fsbase_regnum
= I386_FSBASE_REGNUM
;
8344 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8345 tdep
->fsbase_regnum
, "fs_base");
8346 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8347 tdep
->fsbase_regnum
+ 1, "gs_base");
8352 tdep
->xcr0
|= X86_XSTATE_PKRU
;
8353 if (tdep
->pkru_regnum
< 0)
8355 tdep
->pkeys_register_names
= i386_pkeys_names
;
8356 tdep
->pkru_regnum
= I386_PKRU_REGNUM
;
8357 tdep
->num_pkeys_regs
= 1;
8360 for (i
= 0; i
< I387_NUM_PKEYS_REGS
; i
++)
8361 valid_p
&= tdesc_numbered_register (feature_pkeys
, tdesc_data
,
8362 I387_PKRU_REGNUM (tdep
) + i
,
8363 tdep
->pkeys_register_names
[i
]);
8371 /* Implement the type_align gdbarch function. */
8374 i386_type_align (struct gdbarch
*gdbarch
, struct type
*type
)
8376 type
= check_typedef (type
);
8378 if (gdbarch_ptr_bit (gdbarch
) == 32)
8380 if ((TYPE_CODE (type
) == TYPE_CODE_INT
8381 || TYPE_CODE (type
) == TYPE_CODE_FLT
)
8382 && TYPE_LENGTH (type
) > 4)
8385 /* Handle x86's funny long double. */
8386 if (TYPE_CODE (type
) == TYPE_CODE_FLT
8387 && gdbarch_long_double_bit (gdbarch
) == TYPE_LENGTH (type
) * 8)
8395 /* Note: This is called for both i386 and amd64. */
8397 static struct gdbarch
*
8398 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
8400 struct gdbarch_tdep
*tdep
;
8401 struct gdbarch
*gdbarch
;
8402 struct tdesc_arch_data
*tdesc_data
;
8403 const struct target_desc
*tdesc
;
8409 /* If there is already a candidate, use it. */
8410 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
8412 return arches
->gdbarch
;
8414 /* Allocate space for the new architecture. Assume i386 for now. */
8415 tdep
= XCNEW (struct gdbarch_tdep
);
8416 gdbarch
= gdbarch_alloc (&info
, tdep
);
8418 /* General-purpose registers. */
8419 tdep
->gregset_reg_offset
= NULL
;
8420 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
8421 tdep
->sizeof_gregset
= 0;
8423 /* Floating-point registers. */
8424 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
8425 tdep
->fpregset
= &i386_fpregset
;
8427 /* The default settings include the FPU registers, the MMX registers
8428 and the SSE registers. This can be overridden for a specific ABI
8429 by adjusting the members `st0_regnum', `mm0_regnum' and
8430 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
8431 will show up in the output of "info all-registers". */
8433 tdep
->st0_regnum
= I386_ST0_REGNUM
;
8435 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
8436 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
8438 tdep
->jb_pc_offset
= -1;
8439 tdep
->struct_return
= pcc_struct_return
;
8440 tdep
->sigtramp_start
= 0;
8441 tdep
->sigtramp_end
= 0;
8442 tdep
->sigtramp_p
= i386_sigtramp_p
;
8443 tdep
->sigcontext_addr
= NULL
;
8444 tdep
->sc_reg_offset
= NULL
;
8445 tdep
->sc_pc_offset
= -1;
8446 tdep
->sc_sp_offset
= -1;
8448 tdep
->xsave_xcr0_offset
= -1;
8450 tdep
->record_regmap
= i386_record_regmap
;
8452 set_gdbarch_type_align (gdbarch
, i386_type_align
);
8454 /* The format used for `long double' on almost all i386 targets is
8455 the i387 extended floating-point format. In fact, of all targets
8456 in the GCC 2.95 tree, only OSF/1 does it different, and insists
8457 on having a `long double' that's not `long' at all. */
8458 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
8460 /* Although the i387 extended floating-point has only 80 significant
8461 bits, a `long double' actually takes up 96, probably to enforce
8463 set_gdbarch_long_double_bit (gdbarch
, 96);
8465 /* Support for floating-point data type variants. */
8466 set_gdbarch_floatformat_for_type (gdbarch
, i386_floatformat_for_type
);
8468 /* Register numbers of various important registers. */
8469 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
8470 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
8471 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
8472 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
8474 /* NOTE: kettenis/20040418: GCC does have two possible register
8475 numbering schemes on the i386: dbx and SVR4. These schemes
8476 differ in how they number %ebp, %esp, %eflags, and the
8477 floating-point registers, and are implemented by the arrays
8478 dbx_register_map[] and svr4_dbx_register_map in
8479 gcc/config/i386.c. GCC also defines a third numbering scheme in
8480 gcc/config/i386.c, which it designates as the "default" register
8481 map used in 64bit mode. This last register numbering scheme is
8482 implemented in dbx64_register_map, and is used for AMD64; see
8485 Currently, each GCC i386 target always uses the same register
8486 numbering scheme across all its supported debugging formats
8487 i.e. SDB (COFF), stabs and DWARF 2. This is because
8488 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
8489 DBX_REGISTER_NUMBER macro which is defined by each target's
8490 respective config header in a manner independent of the requested
8491 output debugging format.
8493 This does not match the arrangement below, which presumes that
8494 the SDB and stabs numbering schemes differ from the DWARF and
8495 DWARF 2 ones. The reason for this arrangement is that it is
8496 likely to get the numbering scheme for the target's
8497 default/native debug format right. For targets where GCC is the
8498 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
8499 targets where the native toolchain uses a different numbering
8500 scheme for a particular debug format (stabs-in-ELF on Solaris)
8501 the defaults below will have to be overridden, like
8502 i386_elf_init_abi() does. */
8504 /* Use the dbx register numbering scheme for stabs and COFF. */
8505 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8506 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8508 /* Use the SVR4 register numbering scheme for DWARF 2. */
8509 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_dwarf_reg_to_regnum
);
8511 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
8512 be in use on any of the supported i386 targets. */
8514 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
8516 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
8518 /* Call dummy code. */
8519 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
8520 set_gdbarch_push_dummy_code (gdbarch
, i386_push_dummy_code
);
8521 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
8522 set_gdbarch_frame_align (gdbarch
, i386_frame_align
);
8524 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
8525 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
8526 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
8528 set_gdbarch_return_value (gdbarch
, i386_return_value
);
8530 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
8532 /* Stack grows downward. */
8533 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
8535 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, i386_breakpoint::kind_from_pc
);
8536 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, i386_breakpoint::bp_from_kind
);
8538 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
8539 set_gdbarch_max_insn_length (gdbarch
, I386_MAX_INSN_LEN
);
8541 set_gdbarch_frame_args_skip (gdbarch
, 8);
8543 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
8545 set_gdbarch_dummy_id (gdbarch
, i386_dummy_id
);
8547 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
8549 /* Add the i386 register groups. */
8550 i386_add_reggroups (gdbarch
);
8551 tdep
->register_reggroup_p
= i386_register_reggroup_p
;
8553 /* Helper for function argument information. */
8554 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
8556 /* Hook the function epilogue frame unwinder. This unwinder is
8557 appended to the list first, so that it supercedes the DWARF
8558 unwinder in function epilogues (where the DWARF unwinder
8559 currently fails). */
8560 frame_unwind_append_unwinder (gdbarch
, &i386_epilogue_frame_unwind
);
8562 /* Hook in the DWARF CFI frame unwinder. This unwinder is appended
8563 to the list before the prologue-based unwinders, so that DWARF
8564 CFI info will be used if it is available. */
8565 dwarf2_append_unwinders (gdbarch
);
8567 frame_base_set_default (gdbarch
, &i386_frame_base
);
8569 /* Pseudo registers may be changed by amd64_init_abi. */
8570 set_gdbarch_pseudo_register_read_value (gdbarch
,
8571 i386_pseudo_register_read_value
);
8572 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
8573 set_gdbarch_ax_pseudo_register_collect (gdbarch
,
8574 i386_ax_pseudo_register_collect
);
8576 set_tdesc_pseudo_register_type (gdbarch
, i386_pseudo_register_type
);
8577 set_tdesc_pseudo_register_name (gdbarch
, i386_pseudo_register_name
);
8579 /* Override the normal target description method to make the AVX
8580 upper halves anonymous. */
8581 set_gdbarch_register_name (gdbarch
, i386_register_name
);
8583 /* Even though the default ABI only includes general-purpose registers,
8584 floating-point registers and the SSE registers, we have to leave a
8585 gap for the upper AVX, MPX and AVX512 registers. */
8586 set_gdbarch_num_regs (gdbarch
, I386_NUM_REGS
);
8588 set_gdbarch_gnu_triplet_regexp (gdbarch
, i386_gnu_triplet_regexp
);
8590 /* Get the x86 target description from INFO. */
8591 tdesc
= info
.target_desc
;
8592 if (! tdesc_has_registers (tdesc
))
8593 tdesc
= i386_target_description (X86_XSTATE_SSE_MASK
, false);
8594 tdep
->tdesc
= tdesc
;
8596 tdep
->num_core_regs
= I386_NUM_GREGS
+ I387_NUM_REGS
;
8597 tdep
->register_names
= i386_register_names
;
8599 /* No upper YMM registers. */
8600 tdep
->ymmh_register_names
= NULL
;
8601 tdep
->ymm0h_regnum
= -1;
8603 /* No upper ZMM registers. */
8604 tdep
->zmmh_register_names
= NULL
;
8605 tdep
->zmm0h_regnum
= -1;
8607 /* No high XMM registers. */
8608 tdep
->xmm_avx512_register_names
= NULL
;
8609 tdep
->xmm16_regnum
= -1;
8611 /* No upper YMM16-31 registers. */
8612 tdep
->ymm16h_register_names
= NULL
;
8613 tdep
->ymm16h_regnum
= -1;
8615 tdep
->num_byte_regs
= 8;
8616 tdep
->num_word_regs
= 8;
8617 tdep
->num_dword_regs
= 0;
8618 tdep
->num_mmx_regs
= 8;
8619 tdep
->num_ymm_regs
= 0;
8621 /* No MPX registers. */
8622 tdep
->bnd0r_regnum
= -1;
8623 tdep
->bndcfgu_regnum
= -1;
8625 /* No AVX512 registers. */
8626 tdep
->k0_regnum
= -1;
8627 tdep
->num_zmm_regs
= 0;
8628 tdep
->num_ymm_avx512_regs
= 0;
8629 tdep
->num_xmm_avx512_regs
= 0;
8631 /* No PKEYS registers */
8632 tdep
->pkru_regnum
= -1;
8633 tdep
->num_pkeys_regs
= 0;
8635 /* No segment base registers. */
8636 tdep
->fsbase_regnum
= -1;
8638 tdesc_data
= tdesc_data_alloc ();
8640 set_gdbarch_relocate_instruction (gdbarch
, i386_relocate_instruction
);
8642 set_gdbarch_gen_return_address (gdbarch
, i386_gen_return_address
);
8644 set_gdbarch_insn_is_call (gdbarch
, i386_insn_is_call
);
8645 set_gdbarch_insn_is_ret (gdbarch
, i386_insn_is_ret
);
8646 set_gdbarch_insn_is_jump (gdbarch
, i386_insn_is_jump
);
8648 /* Hook in ABI-specific overrides, if they have been registered.
8649 Note: If INFO specifies a 64 bit arch, this is where we turn
8650 a 32-bit i386 into a 64-bit amd64. */
8651 info
.tdesc_data
= tdesc_data
;
8652 gdbarch_init_osabi (info
, gdbarch
);
8654 if (!i386_validate_tdesc_p (tdep
, tdesc_data
))
8656 tdesc_data_cleanup (tdesc_data
);
8658 gdbarch_free (gdbarch
);
8662 num_bnd_cooked
= (tdep
->bnd0r_regnum
> 0 ? I387_NUM_BND_REGS
: 0);
8664 /* Wire in pseudo registers. Number of pseudo registers may be
8666 set_gdbarch_num_pseudo_regs (gdbarch
, (tdep
->num_byte_regs
8667 + tdep
->num_word_regs
8668 + tdep
->num_dword_regs
8669 + tdep
->num_mmx_regs
8670 + tdep
->num_ymm_regs
8672 + tdep
->num_ymm_avx512_regs
8673 + tdep
->num_zmm_regs
));
8675 /* Target description may be changed. */
8676 tdesc
= tdep
->tdesc
;
8678 tdesc_use_registers (gdbarch
, tdesc
, tdesc_data
);
8680 /* Override gdbarch_register_reggroup_p set in tdesc_use_registers. */
8681 set_gdbarch_register_reggroup_p (gdbarch
, tdep
->register_reggroup_p
);
8683 /* Make %al the first pseudo-register. */
8684 tdep
->al_regnum
= gdbarch_num_regs (gdbarch
);
8685 tdep
->ax_regnum
= tdep
->al_regnum
+ tdep
->num_byte_regs
;
8687 ymm0_regnum
= tdep
->ax_regnum
+ tdep
->num_word_regs
;
8688 if (tdep
->num_dword_regs
)
8690 /* Support dword pseudo-register if it hasn't been disabled. */
8691 tdep
->eax_regnum
= ymm0_regnum
;
8692 ymm0_regnum
+= tdep
->num_dword_regs
;
8695 tdep
->eax_regnum
= -1;
8697 mm0_regnum
= ymm0_regnum
;
8698 if (tdep
->num_ymm_regs
)
8700 /* Support YMM pseudo-register if it is available. */
8701 tdep
->ymm0_regnum
= ymm0_regnum
;
8702 mm0_regnum
+= tdep
->num_ymm_regs
;
8705 tdep
->ymm0_regnum
= -1;
8707 if (tdep
->num_ymm_avx512_regs
)
8709 /* Support YMM16-31 pseudo registers if available. */
8710 tdep
->ymm16_regnum
= mm0_regnum
;
8711 mm0_regnum
+= tdep
->num_ymm_avx512_regs
;
8714 tdep
->ymm16_regnum
= -1;
8716 if (tdep
->num_zmm_regs
)
8718 /* Support ZMM pseudo-register if it is available. */
8719 tdep
->zmm0_regnum
= mm0_regnum
;
8720 mm0_regnum
+= tdep
->num_zmm_regs
;
8723 tdep
->zmm0_regnum
= -1;
8725 bnd0_regnum
= mm0_regnum
;
8726 if (tdep
->num_mmx_regs
!= 0)
8728 /* Support MMX pseudo-register if MMX hasn't been disabled. */
8729 tdep
->mm0_regnum
= mm0_regnum
;
8730 bnd0_regnum
+= tdep
->num_mmx_regs
;
8733 tdep
->mm0_regnum
= -1;
8735 if (tdep
->bnd0r_regnum
> 0)
8736 tdep
->bnd0_regnum
= bnd0_regnum
;
8738 tdep
-> bnd0_regnum
= -1;
8740 /* Hook in the legacy prologue-based unwinders last (fallback). */
8741 frame_unwind_append_unwinder (gdbarch
, &i386_stack_tramp_frame_unwind
);
8742 frame_unwind_append_unwinder (gdbarch
, &i386_sigtramp_frame_unwind
);
8743 frame_unwind_append_unwinder (gdbarch
, &i386_frame_unwind
);
8745 /* If we have a register mapping, enable the generic core file
8746 support, unless it has already been enabled. */
8747 if (tdep
->gregset_reg_offset
8748 && !gdbarch_iterate_over_regset_sections_p (gdbarch
))
8749 set_gdbarch_iterate_over_regset_sections
8750 (gdbarch
, i386_iterate_over_regset_sections
);
8752 set_gdbarch_fast_tracepoint_valid_at (gdbarch
,
8753 i386_fast_tracepoint_valid_at
);
8760 /* Return the target description for a specified XSAVE feature mask. */
8762 const struct target_desc
*
8763 i386_target_description (uint64_t xcr0
, bool segments
)
8765 static target_desc
*i386_tdescs \
8766 [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
8767 target_desc
**tdesc
;
8769 tdesc
= &i386_tdescs
[(xcr0
& X86_XSTATE_SSE
) ? 1 : 0]
8770 [(xcr0
& X86_XSTATE_AVX
) ? 1 : 0]
8771 [(xcr0
& X86_XSTATE_MPX
) ? 1 : 0]
8772 [(xcr0
& X86_XSTATE_AVX512
) ? 1 : 0]
8773 [(xcr0
& X86_XSTATE_PKRU
) ? 1 : 0]
8777 *tdesc
= i386_create_target_description (xcr0
, false, segments
);
8782 #define MPX_BASE_MASK (~(ULONGEST) 0xfff)
8784 /* Find the bound directory base address. */
8786 static unsigned long
8787 i386_mpx_bd_base (void)
8789 struct regcache
*rcache
;
8790 struct gdbarch_tdep
*tdep
;
8792 enum register_status regstatus
;
8794 rcache
= get_current_regcache ();
8795 tdep
= gdbarch_tdep (rcache
->arch ());
8797 regstatus
= regcache_raw_read_unsigned (rcache
, tdep
->bndcfgu_regnum
, &ret
);
8799 if (regstatus
!= REG_VALID
)
8800 error (_("BNDCFGU register invalid, read status %d."), regstatus
);
8802 return ret
& MPX_BASE_MASK
;
8806 i386_mpx_enabled (void)
8808 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_current_arch ());
8809 const struct target_desc
*tdesc
= tdep
->tdesc
;
8811 return (tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx") != NULL
);
8814 #define MPX_BD_MASK 0xfffffff00000ULL /* select bits [47:20] */
8815 #define MPX_BT_MASK 0x0000000ffff8 /* select bits [19:3] */
8816 #define MPX_BD_MASK_32 0xfffff000 /* select bits [31:12] */
8817 #define MPX_BT_MASK_32 0x00000ffc /* select bits [11:2] */
8819 /* Find the bound table entry given the pointer location and the base
8820 address of the table. */
8823 i386_mpx_get_bt_entry (CORE_ADDR ptr
, CORE_ADDR bd_base
)
8827 CORE_ADDR mpx_bd_mask
, bd_ptr_r_shift
, bd_ptr_l_shift
;
8828 CORE_ADDR bt_mask
, bt_select_r_shift
, bt_select_l_shift
;
8829 CORE_ADDR bd_entry_addr
;
8832 struct gdbarch
*gdbarch
= get_current_arch ();
8833 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8836 if (gdbarch_ptr_bit (gdbarch
) == 64)
8838 mpx_bd_mask
= (CORE_ADDR
) MPX_BD_MASK
;
8839 bd_ptr_r_shift
= 20;
8841 bt_select_r_shift
= 3;
8842 bt_select_l_shift
= 5;
8843 bt_mask
= (CORE_ADDR
) MPX_BT_MASK
;
8845 if ( sizeof (CORE_ADDR
) == 4)
8846 error (_("bound table examination not supported\
8847 for 64-bit process with 32-bit GDB"));
8851 mpx_bd_mask
= MPX_BD_MASK_32
;
8852 bd_ptr_r_shift
= 12;
8854 bt_select_r_shift
= 2;
8855 bt_select_l_shift
= 4;
8856 bt_mask
= MPX_BT_MASK_32
;
8859 offset1
= ((ptr
& mpx_bd_mask
) >> bd_ptr_r_shift
) << bd_ptr_l_shift
;
8860 bd_entry_addr
= bd_base
+ offset1
;
8861 bd_entry
= read_memory_typed_address (bd_entry_addr
, data_ptr_type
);
8863 if ((bd_entry
& 0x1) == 0)
8864 error (_("Invalid bounds directory entry at %s."),
8865 paddress (get_current_arch (), bd_entry_addr
));
8867 /* Clearing status bit. */
8869 bt_addr
= bd_entry
& ~bt_select_r_shift
;
8870 offset2
= ((ptr
& bt_mask
) >> bt_select_r_shift
) << bt_select_l_shift
;
8872 return bt_addr
+ offset2
;
8875 /* Print routine for the mpx bounds. */
8878 i386_mpx_print_bounds (const CORE_ADDR bt_entry
[4])
8880 struct ui_out
*uiout
= current_uiout
;
8882 struct gdbarch
*gdbarch
= get_current_arch ();
8883 CORE_ADDR onecompl
= ~((CORE_ADDR
) 0);
8884 int bounds_in_map
= ((~bt_entry
[1] == 0 && bt_entry
[0] == onecompl
) ? 1 : 0);
8886 if (bounds_in_map
== 1)
8888 uiout
->text ("Null bounds on map:");
8889 uiout
->text (" pointer value = ");
8890 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8896 uiout
->text ("{lbound = ");
8897 uiout
->field_core_addr ("lower-bound", gdbarch
, bt_entry
[0]);
8898 uiout
->text (", ubound = ");
8900 /* The upper bound is stored in 1's complement. */
8901 uiout
->field_core_addr ("upper-bound", gdbarch
, ~bt_entry
[1]);
8902 uiout
->text ("}: pointer value = ");
8903 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8905 if (gdbarch_ptr_bit (gdbarch
) == 64)
8906 size
= ( (~(int64_t) bt_entry
[1]) - (int64_t) bt_entry
[0]);
8908 size
= ( ~((int32_t) bt_entry
[1]) - (int32_t) bt_entry
[0]);
8910 /* In case the bounds are 0x0 and 0xffff... the difference will be -1.
8911 -1 represents in this sense full memory access, and there is no need
8914 size
= (size
> -1 ? size
+ 1 : size
);
8915 uiout
->text (", size = ");
8916 uiout
->field_string ("size", plongest (size
));
8918 uiout
->text (", metadata = ");
8919 uiout
->field_core_addr ("metadata", gdbarch
, bt_entry
[3]);
8924 /* Implement the command "show mpx bound". */
8927 i386_mpx_info_bounds (const char *args
, int from_tty
)
8929 CORE_ADDR bd_base
= 0;
8931 CORE_ADDR bt_entry_addr
= 0;
8932 CORE_ADDR bt_entry
[4];
8934 struct gdbarch
*gdbarch
= get_current_arch ();
8935 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8937 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
8938 || !i386_mpx_enabled ())
8940 printf_unfiltered (_("Intel Memory Protection Extensions not "
8941 "supported on this target.\n"));
8947 printf_unfiltered (_("Address of pointer variable expected.\n"));
8951 addr
= parse_and_eval_address (args
);
8953 bd_base
= i386_mpx_bd_base ();
8954 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
8956 memset (bt_entry
, 0, sizeof (bt_entry
));
8958 for (i
= 0; i
< 4; i
++)
8959 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
8960 + i
* TYPE_LENGTH (data_ptr_type
),
8963 i386_mpx_print_bounds (bt_entry
);
8966 /* Implement the command "set mpx bound". */
8969 i386_mpx_set_bounds (const char *args
, int from_tty
)
8971 CORE_ADDR bd_base
= 0;
8972 CORE_ADDR addr
, lower
, upper
;
8973 CORE_ADDR bt_entry_addr
= 0;
8974 CORE_ADDR bt_entry
[2];
8975 const char *input
= args
;
8977 struct gdbarch
*gdbarch
= get_current_arch ();
8978 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
8979 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8981 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
8982 || !i386_mpx_enabled ())
8983 error (_("Intel Memory Protection Extensions not supported\
8987 error (_("Pointer value expected."));
8989 addr
= value_as_address (parse_to_comma_and_eval (&input
));
8991 if (input
[0] == ',')
8993 if (input
[0] == '\0')
8994 error (_("wrong number of arguments: missing lower and upper bound."));
8995 lower
= value_as_address (parse_to_comma_and_eval (&input
));
8997 if (input
[0] == ',')
8999 if (input
[0] == '\0')
9000 error (_("Wrong number of arguments; Missing upper bound."));
9001 upper
= value_as_address (parse_to_comma_and_eval (&input
));
9003 bd_base
= i386_mpx_bd_base ();
9004 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
9005 for (i
= 0; i
< 2; i
++)
9006 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
9007 + i
* TYPE_LENGTH (data_ptr_type
),
9009 bt_entry
[0] = (uint64_t) lower
;
9010 bt_entry
[1] = ~(uint64_t) upper
;
9012 for (i
= 0; i
< 2; i
++)
9013 write_memory_unsigned_integer (bt_entry_addr
9014 + i
* TYPE_LENGTH (data_ptr_type
),
9015 TYPE_LENGTH (data_ptr_type
), byte_order
,
9019 static struct cmd_list_element
*mpx_set_cmdlist
, *mpx_show_cmdlist
;
9021 /* Helper function for the CLI commands. */
9024 set_mpx_cmd (const char *args
, int from_tty
)
9026 help_list (mpx_set_cmdlist
, "set mpx ", all_commands
, gdb_stdout
);
9029 /* Helper function for the CLI commands. */
9032 show_mpx_cmd (const char *args
, int from_tty
)
9034 cmd_show_list (mpx_show_cmdlist
, from_tty
, "");
9037 void _initialize_i386_tdep ();
9039 _initialize_i386_tdep ()
9041 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
9043 /* Add the variable that controls the disassembly flavor. */
9044 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
9045 &disassembly_flavor
, _("\
9046 Set the disassembly flavor."), _("\
9047 Show the disassembly flavor."), _("\
9048 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
9050 NULL
, /* FIXME: i18n: */
9051 &setlist
, &showlist
);
9053 /* Add the variable that controls the convention for returning
9055 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
9056 &struct_convention
, _("\
9057 Set the convention for returning small structs."), _("\
9058 Show the convention for returning small structs."), _("\
9059 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
9062 NULL
, /* FIXME: i18n: */
9063 &setlist
, &showlist
);
9065 /* Add "mpx" prefix for the set commands. */
9067 add_prefix_cmd ("mpx", class_support
, set_mpx_cmd
, _("\
9068 Set Intel Memory Protection Extensions specific variables."),
9069 &mpx_set_cmdlist
, "set mpx ",
9070 0 /* allow-unknown */, &setlist
);
9072 /* Add "mpx" prefix for the show commands. */
9074 add_prefix_cmd ("mpx", class_support
, show_mpx_cmd
, _("\
9075 Show Intel Memory Protection Extensions specific variables."),
9076 &mpx_show_cmdlist
, "show mpx ",
9077 0 /* allow-unknown */, &showlist
);
9079 /* Add "bound" command for the show mpx commands list. */
9081 add_cmd ("bound", no_class
, i386_mpx_info_bounds
,
9082 "Show the memory bounds for a given array/pointer storage\
9083 in the bound table.",
9086 /* Add "bound" command for the set mpx commands list. */
9088 add_cmd ("bound", no_class
, i386_mpx_set_bounds
,
9089 "Set the memory bounds for a given array/pointer storage\
9090 in the bound table.",
9093 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
9094 i386_svr4_init_abi
);
9096 /* Initialize the i386-specific register groups. */
9097 i386_init_reggroups ();
9099 /* Tell remote stub that we support XML target description. */
9100 register_remote_support_xml ("i386");