1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
25 #include "arch-utils.h"
27 #include "dummy-frame.h"
28 #include "dwarf2-frame.h"
30 #include "floatformat.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
40 #include "reggroups.h"
48 #include "gdb_assert.h"
49 #include "gdb_string.h"
51 #include "i386-tdep.h"
52 #include "i387-tdep.h"
56 static char *i386_register_names
[] =
58 "eax", "ecx", "edx", "ebx",
59 "esp", "ebp", "esi", "edi",
60 "eip", "eflags", "cs", "ss",
61 "ds", "es", "fs", "gs",
62 "st0", "st1", "st2", "st3",
63 "st4", "st5", "st6", "st7",
64 "fctrl", "fstat", "ftag", "fiseg",
65 "fioff", "foseg", "fooff", "fop",
66 "xmm0", "xmm1", "xmm2", "xmm3",
67 "xmm4", "xmm5", "xmm6", "xmm7",
71 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
73 /* Register names for MMX pseudo-registers. */
75 static char *i386_mmx_names
[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
84 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
86 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
91 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
97 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
99 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
101 #define I387_ST0_REGNUM tdep->st0_regnum
102 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
104 if (I387_NUM_XMM_REGS
== 0)
107 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
109 #undef I387_ST0_REGNUM
110 #undef I387_NUM_XMM_REGS
114 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
116 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
118 #define I387_ST0_REGNUM tdep->st0_regnum
119 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
121 if (I387_NUM_XMM_REGS
== 0)
124 return (regnum
== I387_MXCSR_REGNUM
);
126 #undef I387_ST0_REGNUM
127 #undef I387_NUM_XMM_REGS
130 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
131 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
132 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
137 i386_fp_regnum_p (int regnum
)
139 if (I387_ST0_REGNUM
< 0)
142 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
146 i386_fpc_regnum_p (int regnum
)
148 if (I387_ST0_REGNUM
< 0)
151 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
154 /* Return the name of register REG. */
157 i386_register_name (int reg
)
159 if (i386_mmx_regnum_p (current_gdbarch
, reg
))
160 return i386_mmx_names
[reg
- I387_MM0_REGNUM
];
162 if (reg
>= 0 && reg
< i386_num_register_names
)
163 return i386_register_names
[reg
];
168 /* Convert a dbx register number REG to the appropriate register
169 number used by GDB. */
172 i386_dbx_reg_to_regnum (int reg
)
174 /* This implements what GCC calls the "default" register map
175 (dbx_register_map[]). */
177 if (reg
>= 0 && reg
<= 7)
179 /* General-purpose registers. The debug info calls %ebp
180 register 4, and %esp register 5. */
187 else if (reg
>= 12 && reg
<= 19)
189 /* Floating-point registers. */
190 return reg
- 12 + I387_ST0_REGNUM
;
192 else if (reg
>= 21 && reg
<= 28)
195 return reg
- 21 + I387_XMM0_REGNUM
;
197 else if (reg
>= 29 && reg
<= 36)
200 return reg
- 29 + I387_MM0_REGNUM
;
203 /* This will hopefully provoke a warning. */
204 return NUM_REGS
+ NUM_PSEUDO_REGS
;
207 /* Convert SVR4 register number REG to the appropriate register number
211 i386_svr4_reg_to_regnum (int reg
)
213 /* This implements the GCC register map that tries to be compatible
214 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
216 /* The SVR4 register numbering includes %eip and %eflags, and
217 numbers the floating point registers differently. */
218 if (reg
>= 0 && reg
<= 9)
220 /* General-purpose registers. */
223 else if (reg
>= 11 && reg
<= 18)
225 /* Floating-point registers. */
226 return reg
- 11 + I387_ST0_REGNUM
;
230 /* The SSE and MMX registers have the same numbers as with dbx. */
231 return i386_dbx_reg_to_regnum (reg
);
234 /* This will hopefully provoke a warning. */
235 return NUM_REGS
+ NUM_PSEUDO_REGS
;
238 #undef I387_ST0_REGNUM
239 #undef I387_MM0_REGNUM
240 #undef I387_NUM_XMM_REGS
243 /* This is the variable that is set with "set disassembly-flavor", and
244 its legitimate values. */
245 static const char att_flavor
[] = "att";
246 static const char intel_flavor
[] = "intel";
247 static const char *valid_flavors
[] =
253 static const char *disassembly_flavor
= att_flavor
;
256 /* Use the program counter to determine the contents and size of a
257 breakpoint instruction. Return a pointer to a string of bytes that
258 encode a breakpoint instruction, store the length of the string in
259 *LEN and optionally adjust *PC to point to the correct memory
260 location for inserting the breakpoint.
262 On the i386 we have a single breakpoint that fits in a single byte
263 and can be inserted anywhere.
265 This function is 64-bit safe. */
267 static const unsigned char *
268 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
270 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
272 *len
= sizeof (break_insn
);
276 #ifdef I386_REGNO_TO_SYMMETRY
277 #error "The Sequent Symmetry is no longer supported."
280 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
281 and %esp "belong" to the calling function. Therefore these
282 registers should be saved if they're going to be modified. */
284 /* The maximum number of saved registers. This should include all
285 registers mentioned above, and %eip. */
286 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
288 struct i386_frame_cache
295 /* Saved registers. */
296 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
300 /* Stack space reserved for local variables. */
304 /* Allocate and initialize a frame cache. */
306 static struct i386_frame_cache
*
307 i386_alloc_frame_cache (void)
309 struct i386_frame_cache
*cache
;
312 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
316 cache
->sp_offset
= -4;
319 /* Saved registers. We initialize these to -1 since zero is a valid
320 offset (that's where %ebp is supposed to be stored). */
321 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
322 cache
->saved_regs
[i
] = -1;
324 cache
->pc_in_eax
= 0;
326 /* Frameless until proven otherwise. */
332 /* If the instruction at PC is a jump, return the address of its
333 target. Otherwise, return PC. */
336 i386_follow_jump (CORE_ADDR pc
)
342 op
= read_memory_unsigned_integer (pc
, 1);
346 op
= read_memory_unsigned_integer (pc
+ 1, 1);
352 /* Relative jump: if data16 == 0, disp32, else disp16. */
355 delta
= read_memory_integer (pc
+ 2, 2);
357 /* Include the size of the jmp instruction (including the
363 delta
= read_memory_integer (pc
+ 1, 4);
365 /* Include the size of the jmp instruction. */
370 /* Relative jump, disp8 (ignore data16). */
371 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
380 /* Check whether PC points at a prologue for a function returning a
381 structure or union. If so, it updates CACHE and returns the
382 address of the first instruction after the code sequence that
383 removes the "hidden" argument from the stack or CURRENT_PC,
384 whichever is smaller. Otherwise, return PC. */
387 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
388 struct i386_frame_cache
*cache
)
390 /* Functions that return a structure or union start with:
393 xchgl %eax, (%esp) 0x87 0x04 0x24
394 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
396 (the System V compiler puts out the second `xchg' instruction,
397 and the assembler doesn't try to optimize it, so the 'sib' form
398 gets generated). This sequence is used to get the address of the
399 return buffer for a function that returns a structure. */
400 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
401 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
402 unsigned char buf
[4];
405 if (current_pc
<= pc
)
408 op
= read_memory_unsigned_integer (pc
, 1);
410 if (op
!= 0x58) /* popl %eax */
413 read_memory (pc
+ 1, buf
, 4);
414 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
417 if (current_pc
== pc
)
419 cache
->sp_offset
+= 4;
423 if (current_pc
== pc
+ 1)
425 cache
->pc_in_eax
= 1;
429 if (buf
[1] == proto1
[1])
436 i386_skip_probe (CORE_ADDR pc
)
438 /* A function may start with
449 unsigned char buf
[8];
452 op
= read_memory_unsigned_integer (pc
, 1);
454 if (op
== 0x68 || op
== 0x6a)
458 /* Skip past the `pushl' instruction; it has either a one-byte or a
459 four-byte operand, depending on the opcode. */
465 /* Read the following 8 bytes, which should be `call _probe' (6
466 bytes) followed by `addl $4,%esp' (2 bytes). */
467 read_memory (pc
+ delta
, buf
, sizeof (buf
));
468 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
469 pc
+= delta
+ sizeof (buf
);
475 /* Check whether PC points at a code that sets up a new stack frame.
476 If so, it updates CACHE and returns the address of the first
477 instruction after the sequence that sets removes the "hidden"
478 argument from the stack or CURRENT_PC, whichever is smaller.
479 Otherwise, return PC. */
482 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
483 struct i386_frame_cache
*cache
)
488 if (current_pc
<= pc
)
491 op
= read_memory_unsigned_integer (pc
, 1);
493 if (op
== 0x55) /* pushl %ebp */
495 /* Take into account that we've executed the `pushl %ebp' that
496 starts this instruction sequence. */
497 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
498 cache
->sp_offset
+= 4;
500 /* If that's all, return now. */
501 if (current_pc
<= pc
+ 1)
504 op
= read_memory_unsigned_integer (pc
+ 1, 1);
506 /* Check for some special instructions that might be migrated by
507 GCC into the prologue. At this point in the prologue, code
508 should only touch the scratch registers %eax, %ecx and %edx,
515 These instructions have opcodes 0xb8, 0xb9 and 0xba.
529 Because of the symmetry, there are actually two ways to
530 encode these instructions; with opcode bytes 0x29 and 0x2b
531 for `subl' and opcode bytes 0x31 and 0x33 for `xorl'.
533 Make sure we only skip these instructions if we later see the
534 `movl %esp, %ebp' that actually sets up the frame. */
535 while ((op
>= 0xb8 && op
<= 0xba)
536 || op
== 0x29 || op
== 0x2b
537 || op
== 0x31 || op
== 0x33)
539 if (op
>= 0xb8 && op
<= 0xba)
541 /* Skip the `movl' instructions cited above. */
546 /* Skip the `subl' and `xorl' instructions cited above. */
547 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
550 case 0xc0: /* %eax */
551 case 0xc9: /* %ecx */
552 case 0xd2: /* %edx */
560 /* If that's all, return now. */
561 if (current_pc
<= pc
+ skip
+ 1)
564 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
567 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
571 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
575 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
582 /* OK, we actually have a frame. We just don't know how large
583 it is yet. Set its size to zero. We'll adjust it if
584 necessary. We also now commit to skipping the special
585 instructions mentioned before. */
589 /* If that's all, return now. */
590 if (current_pc
<= pc
+ 3)
593 /* Check for stack adjustment
597 NOTE: You can't subtract a 16-bit immediate from a 32-bit
598 reg, so we don't have to worry about a data16 prefix. */
599 op
= read_memory_unsigned_integer (pc
+ 3, 1);
602 /* `subl' with 8-bit immediate. */
603 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
604 /* Some instruction starting with 0x83 other than `subl'. */
607 /* `subl' with signed byte immediate (though it wouldn't make
608 sense to be negative). */
609 cache
->locals
= read_memory_integer (pc
+ 5, 1);
614 /* Maybe it is `subl' with a 32-bit immediate. */
615 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
616 /* Some instruction starting with 0x81 other than `subl'. */
619 /* It is `subl' with a 32-bit immediate. */
620 cache
->locals
= read_memory_integer (pc
+ 5, 4);
625 /* Some instruction other than `subl'. */
629 else if (op
== 0xc8) /* enter $XXX */
631 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
638 /* Check whether PC points at code that saves registers on the stack.
639 If so, it updates CACHE and returns the address of the first
640 instruction after the register saves or CURRENT_PC, whichever is
641 smaller. Otherwise, return PC. */
644 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
645 struct i386_frame_cache
*cache
)
647 CORE_ADDR offset
= 0;
651 if (cache
->locals
> 0)
652 offset
-= cache
->locals
;
653 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
655 op
= read_memory_unsigned_integer (pc
, 1);
656 if (op
< 0x50 || op
> 0x57)
660 cache
->saved_regs
[op
- 0x50] = offset
;
661 cache
->sp_offset
+= 4;
668 /* Do a full analysis of the prologue at PC and update CACHE
669 accordingly. Bail out early if CURRENT_PC is reached. Return the
670 address where the analysis stopped.
672 We handle these cases:
674 The startup sequence can be at the start of the function, or the
675 function can start with a branch to startup code at the end.
677 %ebp can be set up with either the 'enter' instruction, or "pushl
678 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
679 once used in the System V compiler).
681 Local space is allocated just below the saved %ebp by either the
682 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
683 16-bit unsigned argument for space to allocate, and the 'addl'
684 instruction could have either a signed byte, or 32-bit immediate.
686 Next, the registers used by this function are pushed. With the
687 System V compiler they will always be in the order: %edi, %esi,
688 %ebx (and sometimes a harmless bug causes it to also save but not
689 restore %eax); however, the code below is willing to see the pushes
690 in any order, and will handle up to 8 of them.
692 If the setup sequence is at the end of the function, then the next
693 instruction will be a branch back to the start. */
696 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
697 struct i386_frame_cache
*cache
)
699 pc
= i386_follow_jump (pc
);
700 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
701 pc
= i386_skip_probe (pc
);
702 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
703 return i386_analyze_register_saves (pc
, current_pc
, cache
);
706 /* Return PC of first real instruction. */
709 i386_skip_prologue (CORE_ADDR start_pc
)
711 static unsigned char pic_pat
[6] =
713 0xe8, 0, 0, 0, 0, /* call 0x0 */
714 0x5b, /* popl %ebx */
716 struct i386_frame_cache cache
;
722 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
723 if (cache
.locals
< 0)
726 /* Found valid frame setup. */
728 /* The native cc on SVR4 in -K PIC mode inserts the following code
729 to get the address of the global offset table (GOT) into register
734 movl %ebx,x(%ebp) (optional)
737 This code is with the rest of the prologue (at the end of the
738 function), so we have to skip it to get to the first real
739 instruction at the start of the function. */
741 for (i
= 0; i
< 6; i
++)
743 op
= read_memory_unsigned_integer (pc
+ i
, 1);
744 if (pic_pat
[i
] != op
)
751 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
753 if (op
== 0x89) /* movl %ebx, x(%ebp) */
755 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
757 if (op
== 0x5d) /* One byte offset from %ebp. */
759 else if (op
== 0x9d) /* Four byte offset from %ebp. */
761 else /* Unexpected instruction. */
764 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
768 if (delta
> 0 && op
== 0x81
769 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
775 /* If the function starts with a branch (to startup code at the end)
776 the last instruction should bring us back to the first
777 instruction of the real code. */
778 if (i386_follow_jump (start_pc
) != start_pc
)
779 pc
= i386_follow_jump (pc
);
784 /* This function is 64-bit safe. */
787 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
791 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
792 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
798 static struct i386_frame_cache
*
799 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
801 struct i386_frame_cache
*cache
;
808 cache
= i386_alloc_frame_cache ();
811 /* In principle, for normal frames, %ebp holds the frame pointer,
812 which holds the base address for the current stack frame.
813 However, for functions that don't need it, the frame pointer is
814 optional. For these "frameless" functions the frame pointer is
815 actually the frame pointer of the calling frame. Signal
816 trampolines are just a special case of a "frameless" function.
817 They (usually) share their frame pointer with the frame that was
818 in progress when the signal occurred. */
820 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
821 cache
->base
= extract_unsigned_integer (buf
, 4);
822 if (cache
->base
== 0)
825 /* For normal frames, %eip is stored at 4(%ebp). */
826 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
828 cache
->pc
= frame_func_unwind (next_frame
);
830 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
832 if (cache
->locals
< 0)
834 /* We didn't find a valid frame, which means that CACHE->base
835 currently holds the frame pointer for our calling frame. If
836 we're at the start of a function, or somewhere half-way its
837 prologue, the function's frame probably hasn't been fully
838 setup yet. Try to reconstruct the base address for the stack
839 frame by looking at the stack pointer. For truly "frameless"
840 functions this might work too. */
842 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
843 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
846 /* Now that we have the base address for the stack frame we can
847 calculate the value of %esp in the calling frame. */
848 cache
->saved_sp
= cache
->base
+ 8;
850 /* Adjust all the saved registers such that they contain addresses
851 instead of offsets. */
852 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
853 if (cache
->saved_regs
[i
] != -1)
854 cache
->saved_regs
[i
] += cache
->base
;
860 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
861 struct frame_id
*this_id
)
863 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
865 /* This marks the outermost frame. */
866 if (cache
->base
== 0)
869 /* See the end of i386_push_dummy_call. */
870 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
874 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
875 int regnum
, int *optimizedp
,
876 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
877 int *realnump
, void *valuep
)
879 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
881 gdb_assert (regnum
>= 0);
883 /* The System V ABI says that:
885 "The flags register contains the system flags, such as the
886 direction flag and the carry flag. The direction flag must be
887 set to the forward (that is, zero) direction before entry and
888 upon exit from a function. Other user flags have no specified
889 role in the standard calling sequence and are not preserved."
891 To guarantee the "upon exit" part of that statement we fake a
892 saved flags register that has its direction flag cleared.
894 Note that GCC doesn't seem to rely on the fact that the direction
895 flag is cleared after a function return; it always explicitly
896 clears the flag before operations where it matters.
898 FIXME: kettenis/20030316: I'm not quite sure whether this is the
899 right thing to do. The way we fake the flags register here makes
900 it impossible to change it. */
902 if (regnum
== I386_EFLAGS_REGNUM
)
912 /* Clear the direction flag. */
913 val
= frame_unwind_register_unsigned (next_frame
,
916 store_unsigned_integer (valuep
, 4, val
);
922 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
924 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
925 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
929 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
937 /* Store the value. */
938 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
943 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
946 *lvalp
= lval_memory
;
947 *addrp
= cache
->saved_regs
[regnum
];
951 /* Read the value in from memory. */
952 read_memory (*addrp
, valuep
,
953 register_size (current_gdbarch
, regnum
));
958 frame_register_unwind (next_frame
, regnum
,
959 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
962 static const struct frame_unwind i386_frame_unwind
=
966 i386_frame_prev_register
969 static const struct frame_unwind
*
970 i386_frame_sniffer (struct frame_info
*next_frame
)
972 return &i386_frame_unwind
;
976 /* Signal trampolines. */
978 static struct i386_frame_cache
*
979 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
981 struct i386_frame_cache
*cache
;
982 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
989 cache
= i386_alloc_frame_cache ();
991 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
992 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
994 addr
= tdep
->sigcontext_addr (next_frame
);
995 if (tdep
->sc_reg_offset
)
999 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
1001 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1002 if (tdep
->sc_reg_offset
[i
] != -1)
1003 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1007 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
1008 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
1011 *this_cache
= cache
;
1016 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1017 struct frame_id
*this_id
)
1019 struct i386_frame_cache
*cache
=
1020 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1022 /* See the end of i386_push_dummy_call. */
1023 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
1027 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1029 int regnum
, int *optimizedp
,
1030 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1031 int *realnump
, void *valuep
)
1033 /* Make sure we've initialized the cache. */
1034 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1036 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
1037 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1040 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1043 i386_sigtramp_frame_this_id
,
1044 i386_sigtramp_frame_prev_register
1047 static const struct frame_unwind
*
1048 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1050 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1052 /* We shouldn't even bother if we don't have a sigcontext_addr
1054 if (tdep
->sigcontext_addr
== NULL
)
1057 if (tdep
->sigtramp_p
!= NULL
)
1059 if (tdep
->sigtramp_p (next_frame
))
1060 return &i386_sigtramp_frame_unwind
;
1063 if (tdep
->sigtramp_start
!= 0)
1065 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1067 gdb_assert (tdep
->sigtramp_end
!= 0);
1068 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
1069 return &i386_sigtramp_frame_unwind
;
1077 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1079 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1084 static const struct frame_base i386_frame_base
=
1087 i386_frame_base_address
,
1088 i386_frame_base_address
,
1089 i386_frame_base_address
1092 static struct frame_id
1093 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1098 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1099 fp
= extract_unsigned_integer (buf
, 4);
1101 /* See the end of i386_push_dummy_call. */
1102 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1106 /* Figure out where the longjmp will land. Slurp the args out of the
1107 stack. We expect the first arg to be a pointer to the jmp_buf
1108 structure from which we extract the address that we will land at.
1109 This address is copied into PC. This routine returns non-zero on
1112 This function is 64-bit safe. */
1115 i386_get_longjmp_target (CORE_ADDR
*pc
)
1118 CORE_ADDR sp
, jb_addr
;
1119 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1120 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1122 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1123 longjmp will land. */
1124 if (jb_pc_offset
== -1)
1127 /* Don't use I386_ESP_REGNUM here, since this function is also used
1129 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1130 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1131 if (target_read_memory (sp
+ len
, buf
, len
))
1134 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1135 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1138 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1144 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1145 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1146 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1147 CORE_ADDR struct_addr
)
1152 /* Push arguments in reverse order. */
1153 for (i
= nargs
- 1; i
>= 0; i
--)
1155 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1157 /* The System V ABI says that:
1159 "An argument's size is increased, if necessary, to make it a
1160 multiple of [32-bit] words. This may require tail padding,
1161 depending on the size of the argument."
1163 This makes sure the stack says word-aligned. */
1164 sp
-= (len
+ 3) & ~3;
1165 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1168 /* Push value address. */
1172 store_unsigned_integer (buf
, 4, struct_addr
);
1173 write_memory (sp
, buf
, 4);
1176 /* Store return address. */
1178 store_unsigned_integer (buf
, 4, bp_addr
);
1179 write_memory (sp
, buf
, 4);
1181 /* Finally, update the stack pointer... */
1182 store_unsigned_integer (buf
, 4, sp
);
1183 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1185 /* ...and fake a frame pointer. */
1186 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1188 /* MarkK wrote: This "+ 8" is all over the place:
1189 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1190 i386_unwind_dummy_id). It's there, since all frame unwinders for
1191 a given target have to agree (within a certain margin) on the
1192 definition of the stack address of a frame. Otherwise
1193 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1194 stack address *before* the function call as a frame's CFA. On
1195 the i386, when %ebp is used as a frame pointer, the offset
1196 between the contents %ebp and the CFA as defined by GCC. */
1200 /* These registers are used for returning integers (and on some
1201 targets also for returning `struct' and `union' values when their
1202 size and alignment match an integer type). */
1203 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1204 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1206 /* Read, for architecture GDBARCH, a function return value of TYPE
1207 from REGCACHE, and copy that into VALBUF. */
1210 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1211 struct regcache
*regcache
, void *valbuf
)
1213 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1214 int len
= TYPE_LENGTH (type
);
1215 char buf
[I386_MAX_REGISTER_SIZE
];
1217 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1219 if (tdep
->st0_regnum
< 0)
1221 warning ("Cannot find floating-point return value.");
1222 memset (valbuf
, 0, len
);
1226 /* Floating-point return values can be found in %st(0). Convert
1227 its contents to the desired type. This is probably not
1228 exactly how it would happen on the target itself, but it is
1229 the best we can do. */
1230 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1231 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1235 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1236 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1238 if (len
<= low_size
)
1240 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1241 memcpy (valbuf
, buf
, len
);
1243 else if (len
<= (low_size
+ high_size
))
1245 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1246 memcpy (valbuf
, buf
, low_size
);
1247 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1248 memcpy ((char *) valbuf
+ low_size
, buf
, len
- low_size
);
1251 internal_error (__FILE__
, __LINE__
,
1252 "Cannot extract return value of %d bytes long.", len
);
1256 /* Write, for architecture GDBARCH, a function return value of TYPE
1257 from VALBUF into REGCACHE. */
1260 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1261 struct regcache
*regcache
, const void *valbuf
)
1263 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1264 int len
= TYPE_LENGTH (type
);
1266 /* Define I387_ST0_REGNUM such that we use the proper definitions
1267 for the architecture. */
1268 #define I387_ST0_REGNUM I386_ST0_REGNUM
1270 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1273 char buf
[I386_MAX_REGISTER_SIZE
];
1275 if (tdep
->st0_regnum
< 0)
1277 warning ("Cannot set floating-point return value.");
1281 /* Returning floating-point values is a bit tricky. Apart from
1282 storing the return value in %st(0), we have to simulate the
1283 state of the FPU at function return point. */
1285 /* Convert the value found in VALBUF to the extended
1286 floating-point format used by the FPU. This is probably
1287 not exactly how it would happen on the target itself, but
1288 it is the best we can do. */
1289 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1290 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1292 /* Set the top of the floating-point register stack to 7. The
1293 actual value doesn't really matter, but 7 is what a normal
1294 function return would end up with if the program started out
1295 with a freshly initialized FPU. */
1296 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1298 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1300 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1301 the floating-point register stack to 7, the appropriate value
1302 for the tag word is 0x3fff. */
1303 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1307 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1308 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1310 if (len
<= low_size
)
1311 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1312 else if (len
<= (low_size
+ high_size
))
1314 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1315 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1316 len
- low_size
, (char *) valbuf
+ low_size
);
1319 internal_error (__FILE__
, __LINE__
,
1320 "Cannot store return value of %d bytes long.", len
);
1323 #undef I387_ST0_REGNUM
1327 /* This is the variable that is set with "set struct-convention", and
1328 its legitimate values. */
1329 static const char default_struct_convention
[] = "default";
1330 static const char pcc_struct_convention
[] = "pcc";
1331 static const char reg_struct_convention
[] = "reg";
1332 static const char *valid_conventions
[] =
1334 default_struct_convention
,
1335 pcc_struct_convention
,
1336 reg_struct_convention
,
1339 static const char *struct_convention
= default_struct_convention
;
1341 /* Return non-zero if TYPE, which is assumed to be a structure or
1342 union type, should be returned in registers for architecture
1346 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1348 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1349 enum type_code code
= TYPE_CODE (type
);
1350 int len
= TYPE_LENGTH (type
);
1352 gdb_assert (code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
);
1354 if (struct_convention
== pcc_struct_convention
1355 || (struct_convention
== default_struct_convention
1356 && tdep
->struct_return
== pcc_struct_return
))
1359 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1362 /* Determine, for architecture GDBARCH, how a return value of TYPE
1363 should be returned. If it is supposed to be returned in registers,
1364 and READBUF is non-zero, read the appropriate value from REGCACHE,
1365 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1366 from WRITEBUF into REGCACHE. */
1368 static enum return_value_convention
1369 i386_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1370 struct regcache
*regcache
, void *readbuf
,
1371 const void *writebuf
)
1373 enum type_code code
= TYPE_CODE (type
);
1375 if ((code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
)
1376 && !i386_reg_struct_return_p (gdbarch
, type
))
1378 /* The System V ABI says that:
1380 "A function that returns a structure or union also sets %eax
1381 to the value of the original address of the caller's area
1382 before it returns. Thus when the caller receives control
1383 again, the address of the returned object resides in register
1384 %eax and can be used to access the object."
1386 So the ABI guarantees that we can always find the return
1387 value just after the function has returned. */
1393 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
1394 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
1397 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
1400 /* This special case is for structures consisting of a single
1401 `float' or `double' member. These structures are returned in
1402 %st(0). For these structures, we call ourselves recursively,
1403 changing TYPE into the type of the first member of the structure.
1404 Since that should work for all structures that have only one
1405 member, we don't bother to check the member's type here. */
1406 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1408 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1409 return i386_return_value (gdbarch
, type
, regcache
, readbuf
, writebuf
);
1413 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1415 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1417 return RETURN_VALUE_REGISTER_CONVENTION
;
1421 /* Return the GDB type object for the "standard" data type of data in
1422 register REGNUM. Perhaps %esi and %edi should go here, but
1423 potentially they could be used for things other than address. */
1425 static struct type
*
1426 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1428 if (regnum
== I386_EIP_REGNUM
1429 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1430 return lookup_pointer_type (builtin_type_void
);
1432 if (i386_fp_regnum_p (regnum
))
1433 return builtin_type_i387_ext
;
1435 if (i386_sse_regnum_p (gdbarch
, regnum
))
1436 return builtin_type_vec128i
;
1438 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1439 return builtin_type_vec64i
;
1441 return builtin_type_int
;
1444 /* Map a cooked register onto a raw register or memory. For the i386,
1445 the MMX registers need to be mapped onto floating point registers. */
1448 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1450 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1455 /* Define I387_ST0_REGNUM such that we use the proper definitions
1456 for REGCACHE's architecture. */
1457 #define I387_ST0_REGNUM tdep->st0_regnum
1459 mmxreg
= regnum
- tdep
->mm0_regnum
;
1460 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1461 tos
= (fstat
>> 11) & 0x7;
1462 fpreg
= (mmxreg
+ tos
) % 8;
1464 return (I387_ST0_REGNUM
+ fpreg
);
1466 #undef I387_ST0_REGNUM
1470 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1471 int regnum
, void *buf
)
1473 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1475 char mmx_buf
[MAX_REGISTER_SIZE
];
1476 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1478 /* Extract (always little endian). */
1479 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1480 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1483 regcache_raw_read (regcache
, regnum
, buf
);
1487 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1488 int regnum
, const void *buf
)
1490 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1492 char mmx_buf
[MAX_REGISTER_SIZE
];
1493 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1496 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1497 /* ... Modify ... (always little endian). */
1498 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1500 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1503 regcache_raw_write (regcache
, regnum
, buf
);
1507 /* Return the register number of the register allocated by GCC after
1508 REGNUM, or -1 if there is no such register. */
1511 i386_next_regnum (int regnum
)
1513 /* GCC allocates the registers in the order:
1515 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1517 Since storing a variable in %esp doesn't make any sense we return
1518 -1 for %ebp and for %esp itself. */
1519 static int next_regnum
[] =
1521 I386_EDX_REGNUM
, /* Slot for %eax. */
1522 I386_EBX_REGNUM
, /* Slot for %ecx. */
1523 I386_ECX_REGNUM
, /* Slot for %edx. */
1524 I386_ESI_REGNUM
, /* Slot for %ebx. */
1525 -1, -1, /* Slots for %esp and %ebp. */
1526 I386_EDI_REGNUM
, /* Slot for %esi. */
1527 I386_EBP_REGNUM
/* Slot for %edi. */
1530 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1531 return next_regnum
[regnum
];
1536 /* Return nonzero if a value of type TYPE stored in register REGNUM
1537 needs any special handling. */
1540 i386_convert_register_p (int regnum
, struct type
*type
)
1542 int len
= TYPE_LENGTH (type
);
1544 /* Values may be spread across multiple registers. Most debugging
1545 formats aren't expressive enough to specify the locations, so
1546 some heuristics is involved. Right now we only handle types that
1547 have a length that is a multiple of the word size, since GCC
1548 doesn't seem to put any other types into registers. */
1549 if (len
> 4 && len
% 4 == 0)
1551 int last_regnum
= regnum
;
1555 last_regnum
= i386_next_regnum (last_regnum
);
1559 if (last_regnum
!= -1)
1563 return i386_fp_regnum_p (regnum
);
1566 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1567 return its contents in TO. */
1570 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1571 struct type
*type
, void *to
)
1573 int len
= TYPE_LENGTH (type
);
1576 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1577 available in FRAME (i.e. if it wasn't saved)? */
1579 if (i386_fp_regnum_p (regnum
))
1581 i387_register_to_value (frame
, regnum
, type
, to
);
1585 /* Read a value spread across multiple registers. */
1587 gdb_assert (len
> 4 && len
% 4 == 0);
1591 gdb_assert (regnum
!= -1);
1592 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1594 get_frame_register (frame
, regnum
, buf
);
1595 regnum
= i386_next_regnum (regnum
);
1601 /* Write the contents FROM of a value of type TYPE into register
1602 REGNUM in frame FRAME. */
1605 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1606 struct type
*type
, const void *from
)
1608 int len
= TYPE_LENGTH (type
);
1609 const char *buf
= from
;
1611 if (i386_fp_regnum_p (regnum
))
1613 i387_value_to_register (frame
, regnum
, type
, from
);
1617 /* Write a value spread across multiple registers. */
1619 gdb_assert (len
> 4 && len
% 4 == 0);
1623 gdb_assert (regnum
!= -1);
1624 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1626 put_frame_register (frame
, regnum
, buf
);
1627 regnum
= i386_next_regnum (regnum
);
1633 /* Supply register REGNUM from the buffer specified by GREGS and LEN
1634 in the general-purpose register set REGSET to register cache
1635 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1638 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1639 int regnum
, const void *gregs
, size_t len
)
1641 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1642 const char *regs
= gregs
;
1645 gdb_assert (len
== tdep
->sizeof_gregset
);
1647 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1649 if ((regnum
== i
|| regnum
== -1)
1650 && tdep
->gregset_reg_offset
[i
] != -1)
1651 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1655 /* Collect register REGNUM from the register cache REGCACHE and store
1656 it in the buffer specified by GREGS and LEN as described by the
1657 general-purpose register set REGSET. If REGNUM is -1, do this for
1658 all registers in REGSET. */
1661 i386_collect_gregset (const struct regset
*regset
,
1662 const struct regcache
*regcache
,
1663 int regnum
, void *gregs
, size_t len
)
1665 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1669 gdb_assert (len
== tdep
->sizeof_gregset
);
1671 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1673 if ((regnum
== i
|| regnum
== -1)
1674 && tdep
->gregset_reg_offset
[i
] != -1)
1675 regcache_raw_collect (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1679 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
1680 in the floating-point register set REGSET to register cache
1681 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1684 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
1685 int regnum
, const void *fpregs
, size_t len
)
1687 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1689 if (len
== I387_SIZEOF_FXSAVE
)
1691 i387_supply_fxsave (regcache
, regnum
, fpregs
);
1695 gdb_assert (len
== tdep
->sizeof_fpregset
);
1696 i387_supply_fsave (regcache
, regnum
, fpregs
);
1699 /* Collect register REGNUM from the register cache REGCACHE and store
1700 it in the buffer specified by FPREGS and LEN as described by the
1701 floating-point register set REGSET. If REGNUM is -1, do this for
1702 all registers in REGSET. */
1705 i386_collect_fpregset (const struct regset
*regset
,
1706 const struct regcache
*regcache
,
1707 int regnum
, void *fpregs
, size_t len
)
1709 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1711 if (len
== I387_SIZEOF_FXSAVE
)
1713 i387_collect_fxsave (regcache
, regnum
, fpregs
);
1717 gdb_assert (len
== tdep
->sizeof_fpregset
);
1718 i387_collect_fsave (regcache
, regnum
, fpregs
);
1721 /* Return the appropriate register set for the core section identified
1722 by SECT_NAME and SECT_SIZE. */
1724 const struct regset
*
1725 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
1726 const char *sect_name
, size_t sect_size
)
1728 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1730 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
1732 if (tdep
->gregset
== NULL
)
1733 tdep
->gregset
= regset_alloc (gdbarch
, i386_supply_gregset
,
1734 i386_collect_gregset
);
1735 return tdep
->gregset
;
1738 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
1739 || (strcmp (sect_name
, ".reg-xfp") == 0
1740 && sect_size
== I387_SIZEOF_FXSAVE
))
1742 if (tdep
->fpregset
== NULL
)
1743 tdep
->fpregset
= regset_alloc (gdbarch
, i386_supply_fpregset
,
1744 i386_collect_fpregset
);
1745 return tdep
->fpregset
;
1752 #ifdef STATIC_TRANSFORM_NAME
1753 /* SunPRO encodes the static variables. This is not related to C++
1754 mangling, it is done for C too. */
1757 sunpro_static_transform_name (char *name
)
1760 if (IS_STATIC_TRANSFORM_NAME (name
))
1762 /* For file-local statics there will be a period, a bunch of
1763 junk (the contents of which match a string given in the
1764 N_OPT), a period and the name. For function-local statics
1765 there will be a bunch of junk (which seems to change the
1766 second character from 'A' to 'B'), a period, the name of the
1767 function, and the name. So just skip everything before the
1769 p
= strrchr (name
, '.');
1775 #endif /* STATIC_TRANSFORM_NAME */
1778 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1781 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1783 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1785 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1786 struct minimal_symbol
*indsym
=
1787 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1788 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1792 if (strncmp (symname
, "__imp_", 6) == 0
1793 || strncmp (symname
, "_imp_", 5) == 0)
1794 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1797 return 0; /* Not a trampoline. */
1801 /* Return whether the frame preceding NEXT_FRAME corresponds to a
1802 sigtramp routine. */
1805 i386_sigtramp_p (struct frame_info
*next_frame
)
1807 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1810 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1811 return (name
&& strcmp ("_sigtramp", name
) == 0);
1815 /* We have two flavours of disassembly. The machinery on this page
1816 deals with switching between those. */
1819 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1821 gdb_assert (disassembly_flavor
== att_flavor
1822 || disassembly_flavor
== intel_flavor
);
1824 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1825 constified, cast to prevent a compiler warning. */
1826 info
->disassembler_options
= (char *) disassembly_flavor
;
1827 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1829 return print_insn_i386 (pc
, info
);
1833 /* There are a few i386 architecture variants that differ only
1834 slightly from the generic i386 target. For now, we don't give them
1835 their own source file, but include them here. As a consequence,
1836 they'll always be included. */
1838 /* System V Release 4 (SVR4). */
1840 /* Return whether the frame preceding NEXT_FRAME corresponds to a SVR4
1841 sigtramp routine. */
1844 i386_svr4_sigtramp_p (struct frame_info
*next_frame
)
1846 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1849 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1850 currently unknown. */
1851 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1852 return (name
&& (strcmp ("_sigreturn", name
) == 0
1853 || strcmp ("_sigacthandler", name
) == 0
1854 || strcmp ("sigvechandler", name
) == 0));
1857 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1858 routine, return the address of the associated sigcontext (ucontext)
1862 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1867 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1868 sp
= extract_unsigned_integer (buf
, 4);
1870 return read_memory_unsigned_integer (sp
+ 8, 4);
1877 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1879 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
1880 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
1883 /* System V Release 4 (SVR4). */
1886 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1888 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1890 /* System V Release 4 uses ELF. */
1891 i386_elf_init_abi (info
, gdbarch
);
1893 /* System V Release 4 has shared libraries. */
1894 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1895 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1897 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
1898 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1899 tdep
->sc_pc_offset
= 36 + 14 * 4;
1900 tdep
->sc_sp_offset
= 36 + 17 * 4;
1902 tdep
->jb_pc_offset
= 20;
1908 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1910 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1912 /* DJGPP doesn't have any special frames for signal handlers. */
1913 tdep
->sigtramp_p
= NULL
;
1915 tdep
->jb_pc_offset
= 36;
1921 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1923 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1925 tdep
->jb_pc_offset
= 24;
1929 /* i386 register groups. In addition to the normal groups, add "mmx"
1932 static struct reggroup
*i386_sse_reggroup
;
1933 static struct reggroup
*i386_mmx_reggroup
;
1936 i386_init_reggroups (void)
1938 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1939 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1943 i386_add_reggroups (struct gdbarch
*gdbarch
)
1945 reggroup_add (gdbarch
, i386_sse_reggroup
);
1946 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1947 reggroup_add (gdbarch
, general_reggroup
);
1948 reggroup_add (gdbarch
, float_reggroup
);
1949 reggroup_add (gdbarch
, all_reggroup
);
1950 reggroup_add (gdbarch
, save_reggroup
);
1951 reggroup_add (gdbarch
, restore_reggroup
);
1952 reggroup_add (gdbarch
, vector_reggroup
);
1953 reggroup_add (gdbarch
, system_reggroup
);
1957 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1958 struct reggroup
*group
)
1960 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
1961 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
1962 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1963 || i386_fpc_regnum_p (regnum
));
1964 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
1966 if (group
== i386_mmx_reggroup
)
1967 return mmx_regnum_p
;
1968 if (group
== i386_sse_reggroup
)
1969 return sse_regnum_p
;
1970 if (group
== vector_reggroup
)
1971 return (mmx_regnum_p
|| sse_regnum_p
);
1972 if (group
== float_reggroup
)
1974 if (group
== general_reggroup
)
1975 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1977 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1981 /* Get the ARGIth function argument for the current function. */
1984 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1987 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1988 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1992 static struct gdbarch
*
1993 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1995 struct gdbarch_tdep
*tdep
;
1996 struct gdbarch
*gdbarch
;
1998 /* If there is already a candidate, use it. */
1999 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2001 return arches
->gdbarch
;
2003 /* Allocate space for the new architecture. */
2004 tdep
= XMALLOC (struct gdbarch_tdep
);
2005 gdbarch
= gdbarch_alloc (&info
, tdep
);
2007 /* General-purpose registers. */
2008 tdep
->gregset
= NULL
;
2009 tdep
->gregset_reg_offset
= NULL
;
2010 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
2011 tdep
->sizeof_gregset
= 0;
2013 /* Floating-point registers. */
2014 tdep
->fpregset
= NULL
;
2015 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
2017 /* The default settings include the FPU registers, the MMX registers
2018 and the SSE registers. This can be overridden for a specific ABI
2019 by adjusting the members `st0_regnum', `mm0_regnum' and
2020 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
2021 will show up in the output of "info all-registers". Ideally we
2022 should try to autodetect whether they are available, such that we
2023 can prevent "info all-registers" from displaying registers that
2026 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
2027 [the SSE registers] always (even when they don't exist) or never
2028 showing them to the user (even when they do exist), I prefer the
2029 former over the latter. */
2031 tdep
->st0_regnum
= I386_ST0_REGNUM
;
2033 /* The MMX registers are implemented as pseudo-registers. Put off
2034 calculating the register number for %mm0 until we know the number
2035 of raw registers. */
2036 tdep
->mm0_regnum
= 0;
2038 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
2039 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
2041 tdep
->jb_pc_offset
= -1;
2042 tdep
->struct_return
= pcc_struct_return
;
2043 tdep
->sigtramp_start
= 0;
2044 tdep
->sigtramp_end
= 0;
2045 tdep
->sigtramp_p
= i386_sigtramp_p
;
2046 tdep
->sigcontext_addr
= NULL
;
2047 tdep
->sc_reg_offset
= NULL
;
2048 tdep
->sc_pc_offset
= -1;
2049 tdep
->sc_sp_offset
= -1;
2051 /* The format used for `long double' on almost all i386 targets is
2052 the i387 extended floating-point format. In fact, of all targets
2053 in the GCC 2.95 tree, only OSF/1 does it different, and insists
2054 on having a `long double' that's not `long' at all. */
2055 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
2057 /* Although the i387 extended floating-point has only 80 significant
2058 bits, a `long double' actually takes up 96, probably to enforce
2060 set_gdbarch_long_double_bit (gdbarch
, 96);
2062 /* The default ABI includes general-purpose registers,
2063 floating-point registers, and the SSE registers. */
2064 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
2065 set_gdbarch_register_name (gdbarch
, i386_register_name
);
2066 set_gdbarch_register_type (gdbarch
, i386_register_type
);
2068 /* Register numbers of various important registers. */
2069 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
2070 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
2071 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
2072 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
2074 /* NOTE: kettenis/20040418: GCC does have two possible register
2075 numbering schemes on the i386: dbx and SVR4. These schemes
2076 differ in how they number %ebp, %esp, %eflags, and the
2077 floating-point registers, and are implemented by the arrays
2078 dbx_register_map[] and svr4_dbx_register_map in
2079 gcc/config/i386.c. GCC also defines a third numbering scheme in
2080 gcc/config/i386.c, which it designates as the "default" register
2081 map used in 64bit mode. This last register numbering scheme is
2082 implemented in dbx64_register_map, and is used for AMD64; see
2085 Currently, each GCC i386 target always uses the same register
2086 numbering scheme across all its supported debugging formats
2087 i.e. SDB (COFF), stabs and DWARF 2. This is because
2088 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2089 DBX_REGISTER_NUMBER macro which is defined by each target's
2090 respective config header in a manner independent of the requested
2091 output debugging format.
2093 This does not match the arrangement below, which presumes that
2094 the SDB and stabs numbering schemes differ from the DWARF and
2095 DWARF 2 ones. The reason for this arrangement is that it is
2096 likely to get the numbering scheme for the target's
2097 default/native debug format right. For targets where GCC is the
2098 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2099 targets where the native toolchain uses a different numbering
2100 scheme for a particular debug format (stabs-in-ELF on Solaris)
2101 the defaults below will have to be overridden, like
2102 i386_elf_init_abi() does. */
2104 /* Use the dbx register numbering scheme for stabs and COFF. */
2105 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2106 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2108 /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */
2109 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2110 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2112 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
2113 be in use on any of the supported i386 targets. */
2115 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
2117 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
2119 /* Call dummy code. */
2120 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
2122 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
2123 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
2124 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
2126 set_gdbarch_return_value (gdbarch
, i386_return_value
);
2128 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
2130 /* Stack grows downward. */
2131 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2133 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
2134 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
2136 set_gdbarch_frame_args_skip (gdbarch
, 8);
2138 /* Wire in the MMX registers. */
2139 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2140 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2141 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2143 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2145 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
2147 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2149 /* Add the i386 register groups. */
2150 i386_add_reggroups (gdbarch
);
2151 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2153 /* Helper for function argument information. */
2154 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2156 /* Hook in the DWARF CFI frame unwinder. */
2157 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
2159 frame_base_set_default (gdbarch
, &i386_frame_base
);
2161 /* Hook in ABI-specific overrides, if they have been registered. */
2162 gdbarch_init_osabi (info
, gdbarch
);
2164 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
2165 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
2167 /* If we have a register mapping, enable the generic core file
2168 support, unless it has already been enabled. */
2169 if (tdep
->gregset_reg_offset
2170 && !gdbarch_regset_from_core_section_p (gdbarch
))
2171 set_gdbarch_regset_from_core_section (gdbarch
,
2172 i386_regset_from_core_section
);
2174 /* Unless support for MMX has been disabled, make %mm0 the first
2176 if (tdep
->mm0_regnum
== 0)
2177 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2182 static enum gdb_osabi
2183 i386_coff_osabi_sniffer (bfd
*abfd
)
2185 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2186 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2187 return GDB_OSABI_GO32
;
2189 return GDB_OSABI_UNKNOWN
;
2192 static enum gdb_osabi
2193 i386_nlm_osabi_sniffer (bfd
*abfd
)
2195 return GDB_OSABI_NETWARE
;
2199 /* Provide a prototype to silence -Wmissing-prototypes. */
2200 void _initialize_i386_tdep (void);
2203 _initialize_i386_tdep (void)
2205 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2207 /* Add the variable that controls the disassembly flavor. */
2209 struct cmd_list_element
*new_cmd
;
2211 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
2213 &disassembly_flavor
,
2215 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
2216 and the default value is \"att\".",
2218 deprecated_add_show_from_set (new_cmd
, &showlist
);
2221 /* Add the variable that controls the convention for returning
2224 struct cmd_list_element
*new_cmd
;
2226 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
2228 &struct_convention
, "\
2229 Set the convention for returning small structs, valid values \
2230 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
2232 deprecated_add_show_from_set (new_cmd
, &showlist
);
2235 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2236 i386_coff_osabi_sniffer
);
2237 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
2238 i386_nlm_osabi_sniffer
);
2240 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2241 i386_svr4_init_abi
);
2242 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2243 i386_go32_init_abi
);
2244 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
2247 /* Initialize the i386 specific register groups. */
2248 i386_init_reggroups ();