1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
25 #include "arch-utils.h"
27 #include "dummy-frame.h"
28 #include "dwarf2-frame.h"
30 #include "floatformat.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
40 #include "reggroups.h"
48 #include "gdb_assert.h"
49 #include "gdb_string.h"
51 #include "i386-tdep.h"
52 #include "i387-tdep.h"
56 static char *i386_register_names
[] =
58 "eax", "ecx", "edx", "ebx",
59 "esp", "ebp", "esi", "edi",
60 "eip", "eflags", "cs", "ss",
61 "ds", "es", "fs", "gs",
62 "st0", "st1", "st2", "st3",
63 "st4", "st5", "st6", "st7",
64 "fctrl", "fstat", "ftag", "fiseg",
65 "fioff", "foseg", "fooff", "fop",
66 "xmm0", "xmm1", "xmm2", "xmm3",
67 "xmm4", "xmm5", "xmm6", "xmm7",
71 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
73 /* Register names for MMX pseudo-registers. */
75 static char *i386_mmx_names
[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
84 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
86 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
91 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
97 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
99 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
101 #define I387_ST0_REGNUM tdep->st0_regnum
102 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
104 if (I387_NUM_XMM_REGS
== 0)
107 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
109 #undef I387_ST0_REGNUM
110 #undef I387_NUM_XMM_REGS
114 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
116 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
118 #define I387_ST0_REGNUM tdep->st0_regnum
119 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
121 if (I387_NUM_XMM_REGS
== 0)
124 return (regnum
== I387_MXCSR_REGNUM
);
126 #undef I387_ST0_REGNUM
127 #undef I387_NUM_XMM_REGS
130 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
131 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
132 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
137 i386_fp_regnum_p (int regnum
)
139 if (I387_ST0_REGNUM
< 0)
142 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
146 i386_fpc_regnum_p (int regnum
)
148 if (I387_ST0_REGNUM
< 0)
151 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
154 /* Return the name of register REGNUM. */
157 i386_register_name (int regnum
)
159 if (i386_mmx_regnum_p (current_gdbarch
, regnum
))
160 return i386_mmx_names
[regnum
- I387_MM0_REGNUM
];
162 if (regnum
>= 0 && regnum
< i386_num_register_names
)
163 return i386_register_names
[regnum
];
168 /* Convert a dbx register number REG to the appropriate register
169 number used by GDB. */
172 i386_dbx_reg_to_regnum (int reg
)
174 /* This implements what GCC calls the "default" register map
175 (dbx_register_map[]). */
177 if (reg
>= 0 && reg
<= 7)
179 /* General-purpose registers. The debug info calls %ebp
180 register 4, and %esp register 5. */
187 else if (reg
>= 12 && reg
<= 19)
189 /* Floating-point registers. */
190 return reg
- 12 + I387_ST0_REGNUM
;
192 else if (reg
>= 21 && reg
<= 28)
195 return reg
- 21 + I387_XMM0_REGNUM
;
197 else if (reg
>= 29 && reg
<= 36)
200 return reg
- 29 + I387_MM0_REGNUM
;
203 /* This will hopefully provoke a warning. */
204 return NUM_REGS
+ NUM_PSEUDO_REGS
;
207 /* Convert SVR4 register number REG to the appropriate register number
211 i386_svr4_reg_to_regnum (int reg
)
213 /* This implements the GCC register map that tries to be compatible
214 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
216 /* The SVR4 register numbering includes %eip and %eflags, and
217 numbers the floating point registers differently. */
218 if (reg
>= 0 && reg
<= 9)
220 /* General-purpose registers. */
223 else if (reg
>= 11 && reg
<= 18)
225 /* Floating-point registers. */
226 return reg
- 11 + I387_ST0_REGNUM
;
230 /* The SSE and MMX registers have the same numbers as with dbx. */
231 return i386_dbx_reg_to_regnum (reg
);
234 /* This will hopefully provoke a warning. */
235 return NUM_REGS
+ NUM_PSEUDO_REGS
;
238 #undef I387_ST0_REGNUM
239 #undef I387_MM0_REGNUM
240 #undef I387_NUM_XMM_REGS
243 /* This is the variable that is set with "set disassembly-flavor", and
244 its legitimate values. */
245 static const char att_flavor
[] = "att";
246 static const char intel_flavor
[] = "intel";
247 static const char *valid_flavors
[] =
253 static const char *disassembly_flavor
= att_flavor
;
256 /* Use the program counter to determine the contents and size of a
257 breakpoint instruction. Return a pointer to a string of bytes that
258 encode a breakpoint instruction, store the length of the string in
259 *LEN and optionally adjust *PC to point to the correct memory
260 location for inserting the breakpoint.
262 On the i386 we have a single breakpoint that fits in a single byte
263 and can be inserted anywhere.
265 This function is 64-bit safe. */
267 static const gdb_byte
*
268 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
270 static gdb_byte break_insn
[] = { 0xcc }; /* int 3 */
272 *len
= sizeof (break_insn
);
276 #ifdef I386_REGNO_TO_SYMMETRY
277 #error "The Sequent Symmetry is no longer supported."
280 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
281 and %esp "belong" to the calling function. Therefore these
282 registers should be saved if they're going to be modified. */
284 /* The maximum number of saved registers. This should include all
285 registers mentioned above, and %eip. */
286 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
288 struct i386_frame_cache
295 /* Saved registers. */
296 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
300 /* Stack space reserved for local variables. */
304 /* Allocate and initialize a frame cache. */
306 static struct i386_frame_cache
*
307 i386_alloc_frame_cache (void)
309 struct i386_frame_cache
*cache
;
312 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
316 cache
->sp_offset
= -4;
319 /* Saved registers. We initialize these to -1 since zero is a valid
320 offset (that's where %ebp is supposed to be stored). */
321 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
322 cache
->saved_regs
[i
] = -1;
324 cache
->pc_in_eax
= 0;
326 /* Frameless until proven otherwise. */
332 /* If the instruction at PC is a jump, return the address of its
333 target. Otherwise, return PC. */
336 i386_follow_jump (CORE_ADDR pc
)
342 op
= read_memory_unsigned_integer (pc
, 1);
346 op
= read_memory_unsigned_integer (pc
+ 1, 1);
352 /* Relative jump: if data16 == 0, disp32, else disp16. */
355 delta
= read_memory_integer (pc
+ 2, 2);
357 /* Include the size of the jmp instruction (including the
363 delta
= read_memory_integer (pc
+ 1, 4);
365 /* Include the size of the jmp instruction. */
370 /* Relative jump, disp8 (ignore data16). */
371 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
380 /* Check whether PC points at a prologue for a function returning a
381 structure or union. If so, it updates CACHE and returns the
382 address of the first instruction after the code sequence that
383 removes the "hidden" argument from the stack or CURRENT_PC,
384 whichever is smaller. Otherwise, return PC. */
387 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
388 struct i386_frame_cache
*cache
)
390 /* Functions that return a structure or union start with:
393 xchgl %eax, (%esp) 0x87 0x04 0x24
394 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
396 (the System V compiler puts out the second `xchg' instruction,
397 and the assembler doesn't try to optimize it, so the 'sib' form
398 gets generated). This sequence is used to get the address of the
399 return buffer for a function that returns a structure. */
400 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
401 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
405 if (current_pc
<= pc
)
408 op
= read_memory_unsigned_integer (pc
, 1);
410 if (op
!= 0x58) /* popl %eax */
413 read_memory (pc
+ 1, buf
, 4);
414 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
417 if (current_pc
== pc
)
419 cache
->sp_offset
+= 4;
423 if (current_pc
== pc
+ 1)
425 cache
->pc_in_eax
= 1;
429 if (buf
[1] == proto1
[1])
436 i386_skip_probe (CORE_ADDR pc
)
438 /* A function may start with
452 op
= read_memory_unsigned_integer (pc
, 1);
454 if (op
== 0x68 || op
== 0x6a)
458 /* Skip past the `pushl' instruction; it has either a one-byte or a
459 four-byte operand, depending on the opcode. */
465 /* Read the following 8 bytes, which should be `call _probe' (6
466 bytes) followed by `addl $4,%esp' (2 bytes). */
467 read_memory (pc
+ delta
, buf
, sizeof (buf
));
468 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
469 pc
+= delta
+ sizeof (buf
);
475 /* Maximum instruction length we need to handle. */
476 #define I386_MAX_INSN_LEN 6
478 /* Instruction description. */
482 gdb_byte insn
[I386_MAX_INSN_LEN
];
483 gdb_byte mask
[I386_MAX_INSN_LEN
];
486 /* Search for the instruction at PC in the list SKIP_INSNS. Return
487 the first instruction description that matches. Otherwise, return
490 static struct i386_insn
*
491 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*skip_insns
)
493 struct i386_insn
*insn
;
496 op
= read_memory_unsigned_integer (pc
, 1);
498 for (insn
= skip_insns
; insn
->len
> 0; insn
++)
500 if ((op
& insn
->mask
[0]) == insn
->insn
[0])
502 gdb_byte buf
[I386_MAX_INSN_LEN
- 1];
503 int insn_matched
= 1;
506 gdb_assert (insn
->len
> 1);
507 gdb_assert (insn
->len
<= I386_MAX_INSN_LEN
);
509 read_memory (pc
+ 1, buf
, insn
->len
- 1);
510 for (i
= 1; i
< insn
->len
; i
++)
512 if ((buf
[i
- 1] & insn
->mask
[i
]) != insn
->insn
[i
])
524 /* Some special instructions that might be migrated by GCC into the
525 part of the prologue that sets up the new stack frame. Because the
526 stack frame hasn't been setup yet, no registers have been saved
527 yet, and only the scratch registers %eax, %ecx and %edx can be
530 struct i386_insn i386_frame_setup_skip_insns
[] =
532 /* Check for `movb imm8, r' and `movl imm32, r'.
534 ??? Should we handle 16-bit operand-sizes here? */
536 /* `movb imm8, %al' and `movb imm8, %ah' */
537 /* `movb imm8, %cl' and `movb imm8, %ch' */
538 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
539 /* `movb imm8, %dl' and `movb imm8, %dh' */
540 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
541 /* `movl imm32, %eax' and `movl imm32, %ecx' */
542 { 5, { 0xb8 }, { 0xfe } },
543 /* `movl imm32, %edx' */
544 { 5, { 0xba }, { 0xff } },
546 /* Check for `mov imm32, r32'. Note that there is an alternative
547 encoding for `mov m32, %eax'.
549 ??? Should we handle SIB adressing here?
550 ??? Should we handle 16-bit operand-sizes here? */
552 /* `movl m32, %eax' */
553 { 5, { 0xa1 }, { 0xff } },
554 /* `movl m32, %eax' and `mov; m32, %ecx' */
555 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
556 /* `movl m32, %edx' */
557 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
559 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
560 Because of the symmetry, there are actually two ways to encode
561 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
562 opcode bytes 0x31 and 0x33 for `xorl'. */
564 /* `subl %eax, %eax' */
565 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
566 /* `subl %ecx, %ecx' */
567 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
568 /* `subl %edx, %edx' */
569 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
570 /* `xorl %eax, %eax' */
571 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
572 /* `xorl %ecx, %ecx' */
573 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
574 /* `xorl %edx, %edx' */
575 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
579 /* Check whether PC points at a code that sets up a new stack frame.
580 If so, it updates CACHE and returns the address of the first
581 instruction after the sequence that sets up the frame or LIMIT,
582 whichever is smaller. If we don't recognize the code, return PC. */
585 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR limit
,
586 struct i386_frame_cache
*cache
)
588 struct i386_insn
*insn
;
595 op
= read_memory_unsigned_integer (pc
, 1);
597 if (op
== 0x55) /* pushl %ebp */
599 /* Take into account that we've executed the `pushl %ebp' that
600 starts this instruction sequence. */
601 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
602 cache
->sp_offset
+= 4;
605 /* If that's all, return now. */
609 /* Check for some special instructions that might be migrated by
610 GCC into the prologue and skip them. At this point in the
611 prologue, code should only touch the scratch registers %eax,
612 %ecx and %edx, so while the number of posibilities is sheer,
615 Make sure we only skip these instructions if we later see the
616 `movl %esp, %ebp' that actually sets up the frame. */
617 while (pc
+ skip
< limit
)
619 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
626 /* If that's all, return now. */
627 if (limit
<= pc
+ skip
)
630 op
= read_memory_unsigned_integer (pc
+ skip
, 1);
632 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
636 if (read_memory_unsigned_integer (pc
+ skip
+ 1, 1) != 0xec)
640 if (read_memory_unsigned_integer (pc
+ skip
+ 1, 1) != 0xe5)
647 /* OK, we actually have a frame. We just don't know how large
648 it is yet. Set its size to zero. We'll adjust it if
649 necessary. We also now commit to skipping the special
650 instructions mentioned before. */
654 /* If that's all, return now. */
658 /* Check for stack adjustment
662 NOTE: You can't subtract a 16-bit immediate from a 32-bit
663 reg, so we don't have to worry about a data16 prefix. */
664 op
= read_memory_unsigned_integer (pc
, 1);
667 /* `subl' with 8-bit immediate. */
668 if (read_memory_unsigned_integer (pc
+ 1, 1) != 0xec)
669 /* Some instruction starting with 0x83 other than `subl'. */
672 /* `subl' with signed 8-bit immediate (though it wouldn't
673 make sense to be negative). */
674 cache
->locals
= read_memory_integer (pc
+ 2, 1);
679 /* Maybe it is `subl' with a 32-bit immediate. */
680 if (read_memory_unsigned_integer (pc
+ 1, 1) != 0xec)
681 /* Some instruction starting with 0x81 other than `subl'. */
684 /* It is `subl' with a 32-bit immediate. */
685 cache
->locals
= read_memory_integer (pc
+ 2, 4);
690 /* Some instruction other than `subl'. */
694 else if (op
== 0xc8) /* enter */
696 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
703 /* Check whether PC points at code that saves registers on the stack.
704 If so, it updates CACHE and returns the address of the first
705 instruction after the register saves or CURRENT_PC, whichever is
706 smaller. Otherwise, return PC. */
709 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
710 struct i386_frame_cache
*cache
)
712 CORE_ADDR offset
= 0;
716 if (cache
->locals
> 0)
717 offset
-= cache
->locals
;
718 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
720 op
= read_memory_unsigned_integer (pc
, 1);
721 if (op
< 0x50 || op
> 0x57)
725 cache
->saved_regs
[op
- 0x50] = offset
;
726 cache
->sp_offset
+= 4;
733 /* Do a full analysis of the prologue at PC and update CACHE
734 accordingly. Bail out early if CURRENT_PC is reached. Return the
735 address where the analysis stopped.
737 We handle these cases:
739 The startup sequence can be at the start of the function, or the
740 function can start with a branch to startup code at the end.
742 %ebp can be set up with either the 'enter' instruction, or "pushl
743 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
744 once used in the System V compiler).
746 Local space is allocated just below the saved %ebp by either the
747 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
748 16-bit unsigned argument for space to allocate, and the 'addl'
749 instruction could have either a signed byte, or 32-bit immediate.
751 Next, the registers used by this function are pushed. With the
752 System V compiler they will always be in the order: %edi, %esi,
753 %ebx (and sometimes a harmless bug causes it to also save but not
754 restore %eax); however, the code below is willing to see the pushes
755 in any order, and will handle up to 8 of them.
757 If the setup sequence is at the end of the function, then the next
758 instruction will be a branch back to the start. */
761 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
762 struct i386_frame_cache
*cache
)
764 pc
= i386_follow_jump (pc
);
765 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
766 pc
= i386_skip_probe (pc
);
767 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
768 return i386_analyze_register_saves (pc
, current_pc
, cache
);
771 /* Return PC of first real instruction. */
774 i386_skip_prologue (CORE_ADDR start_pc
)
776 static gdb_byte pic_pat
[6] =
778 0xe8, 0, 0, 0, 0, /* call 0x0 */
779 0x5b, /* popl %ebx */
781 struct i386_frame_cache cache
;
787 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
788 if (cache
.locals
< 0)
791 /* Found valid frame setup. */
793 /* The native cc on SVR4 in -K PIC mode inserts the following code
794 to get the address of the global offset table (GOT) into register
799 movl %ebx,x(%ebp) (optional)
802 This code is with the rest of the prologue (at the end of the
803 function), so we have to skip it to get to the first real
804 instruction at the start of the function. */
806 for (i
= 0; i
< 6; i
++)
808 op
= read_memory_unsigned_integer (pc
+ i
, 1);
809 if (pic_pat
[i
] != op
)
816 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
818 if (op
== 0x89) /* movl %ebx, x(%ebp) */
820 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
822 if (op
== 0x5d) /* One byte offset from %ebp. */
824 else if (op
== 0x9d) /* Four byte offset from %ebp. */
826 else /* Unexpected instruction. */
829 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
833 if (delta
> 0 && op
== 0x81
834 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
840 /* If the function starts with a branch (to startup code at the end)
841 the last instruction should bring us back to the first
842 instruction of the real code. */
843 if (i386_follow_jump (start_pc
) != start_pc
)
844 pc
= i386_follow_jump (pc
);
849 /* This function is 64-bit safe. */
852 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
856 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
857 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
863 static struct i386_frame_cache
*
864 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
866 struct i386_frame_cache
*cache
;
873 cache
= i386_alloc_frame_cache ();
876 /* In principle, for normal frames, %ebp holds the frame pointer,
877 which holds the base address for the current stack frame.
878 However, for functions that don't need it, the frame pointer is
879 optional. For these "frameless" functions the frame pointer is
880 actually the frame pointer of the calling frame. Signal
881 trampolines are just a special case of a "frameless" function.
882 They (usually) share their frame pointer with the frame that was
883 in progress when the signal occurred. */
885 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
886 cache
->base
= extract_unsigned_integer (buf
, 4);
887 if (cache
->base
== 0)
890 /* For normal frames, %eip is stored at 4(%ebp). */
891 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
893 cache
->pc
= frame_func_unwind (next_frame
);
895 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
897 if (cache
->locals
< 0)
899 /* We didn't find a valid frame, which means that CACHE->base
900 currently holds the frame pointer for our calling frame. If
901 we're at the start of a function, or somewhere half-way its
902 prologue, the function's frame probably hasn't been fully
903 setup yet. Try to reconstruct the base address for the stack
904 frame by looking at the stack pointer. For truly "frameless"
905 functions this might work too. */
907 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
908 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
911 /* Now that we have the base address for the stack frame we can
912 calculate the value of %esp in the calling frame. */
913 cache
->saved_sp
= cache
->base
+ 8;
915 /* Adjust all the saved registers such that they contain addresses
916 instead of offsets. */
917 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
918 if (cache
->saved_regs
[i
] != -1)
919 cache
->saved_regs
[i
] += cache
->base
;
925 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
926 struct frame_id
*this_id
)
928 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
930 /* This marks the outermost frame. */
931 if (cache
->base
== 0)
934 /* See the end of i386_push_dummy_call. */
935 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
939 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
940 int regnum
, int *optimizedp
,
941 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
942 int *realnump
, gdb_byte
*valuep
)
944 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
946 gdb_assert (regnum
>= 0);
948 /* The System V ABI says that:
950 "The flags register contains the system flags, such as the
951 direction flag and the carry flag. The direction flag must be
952 set to the forward (that is, zero) direction before entry and
953 upon exit from a function. Other user flags have no specified
954 role in the standard calling sequence and are not preserved."
956 To guarantee the "upon exit" part of that statement we fake a
957 saved flags register that has its direction flag cleared.
959 Note that GCC doesn't seem to rely on the fact that the direction
960 flag is cleared after a function return; it always explicitly
961 clears the flag before operations where it matters.
963 FIXME: kettenis/20030316: I'm not quite sure whether this is the
964 right thing to do. The way we fake the flags register here makes
965 it impossible to change it. */
967 if (regnum
== I386_EFLAGS_REGNUM
)
977 /* Clear the direction flag. */
978 val
= frame_unwind_register_unsigned (next_frame
,
981 store_unsigned_integer (valuep
, 4, val
);
987 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
990 *lvalp
= lval_register
;
992 *realnump
= I386_EAX_REGNUM
;
994 frame_unwind_register (next_frame
, (*realnump
), valuep
);
998 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
1006 /* Store the value. */
1007 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
1012 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
1015 *lvalp
= lval_memory
;
1016 *addrp
= cache
->saved_regs
[regnum
];
1020 /* Read the value in from memory. */
1021 read_memory (*addrp
, valuep
,
1022 register_size (current_gdbarch
, regnum
));
1028 *lvalp
= lval_register
;
1032 frame_unwind_register (next_frame
, (*realnump
), valuep
);
1035 static const struct frame_unwind i386_frame_unwind
=
1039 i386_frame_prev_register
1042 static const struct frame_unwind
*
1043 i386_frame_sniffer (struct frame_info
*next_frame
)
1045 return &i386_frame_unwind
;
1049 /* Signal trampolines. */
1051 static struct i386_frame_cache
*
1052 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1054 struct i386_frame_cache
*cache
;
1055 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1062 cache
= i386_alloc_frame_cache ();
1064 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1065 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
1067 addr
= tdep
->sigcontext_addr (next_frame
);
1068 if (tdep
->sc_reg_offset
)
1072 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
1074 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1075 if (tdep
->sc_reg_offset
[i
] != -1)
1076 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1080 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
1081 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
1084 *this_cache
= cache
;
1089 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1090 struct frame_id
*this_id
)
1092 struct i386_frame_cache
*cache
=
1093 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1095 /* See the end of i386_push_dummy_call. */
1096 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
1100 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1102 int regnum
, int *optimizedp
,
1103 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1104 int *realnump
, gdb_byte
*valuep
)
1106 /* Make sure we've initialized the cache. */
1107 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1109 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
1110 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1113 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1116 i386_sigtramp_frame_this_id
,
1117 i386_sigtramp_frame_prev_register
1120 static const struct frame_unwind
*
1121 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1123 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1125 /* We shouldn't even bother if we don't have a sigcontext_addr
1127 if (tdep
->sigcontext_addr
== NULL
)
1130 if (tdep
->sigtramp_p
!= NULL
)
1132 if (tdep
->sigtramp_p (next_frame
))
1133 return &i386_sigtramp_frame_unwind
;
1136 if (tdep
->sigtramp_start
!= 0)
1138 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1140 gdb_assert (tdep
->sigtramp_end
!= 0);
1141 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
1142 return &i386_sigtramp_frame_unwind
;
1150 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1152 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1157 static const struct frame_base i386_frame_base
=
1160 i386_frame_base_address
,
1161 i386_frame_base_address
,
1162 i386_frame_base_address
1165 static struct frame_id
1166 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1171 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1172 fp
= extract_unsigned_integer (buf
, 4);
1174 /* See the end of i386_push_dummy_call. */
1175 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1179 /* Figure out where the longjmp will land. Slurp the args out of the
1180 stack. We expect the first arg to be a pointer to the jmp_buf
1181 structure from which we extract the address that we will land at.
1182 This address is copied into PC. This routine returns non-zero on
1185 This function is 64-bit safe. */
1188 i386_get_longjmp_target (CORE_ADDR
*pc
)
1191 CORE_ADDR sp
, jb_addr
;
1192 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1193 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1195 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1196 longjmp will land. */
1197 if (jb_pc_offset
== -1)
1200 /* Don't use I386_ESP_REGNUM here, since this function is also used
1202 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1203 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1204 if (target_read_memory (sp
+ len
, buf
, len
))
1207 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1208 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1211 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1217 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1218 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1219 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1220 CORE_ADDR struct_addr
)
1225 /* Push arguments in reverse order. */
1226 for (i
= nargs
- 1; i
>= 0; i
--)
1228 int len
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
1230 /* The System V ABI says that:
1232 "An argument's size is increased, if necessary, to make it a
1233 multiple of [32-bit] words. This may require tail padding,
1234 depending on the size of the argument."
1236 This makes sure the stack says word-aligned. */
1237 sp
-= (len
+ 3) & ~3;
1238 write_memory (sp
, value_contents_all (args
[i
]), len
);
1241 /* Push value address. */
1245 store_unsigned_integer (buf
, 4, struct_addr
);
1246 write_memory (sp
, buf
, 4);
1249 /* Store return address. */
1251 store_unsigned_integer (buf
, 4, bp_addr
);
1252 write_memory (sp
, buf
, 4);
1254 /* Finally, update the stack pointer... */
1255 store_unsigned_integer (buf
, 4, sp
);
1256 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1258 /* ...and fake a frame pointer. */
1259 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1261 /* MarkK wrote: This "+ 8" is all over the place:
1262 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1263 i386_unwind_dummy_id). It's there, since all frame unwinders for
1264 a given target have to agree (within a certain margin) on the
1265 definition of the stack address of a frame. Otherwise
1266 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1267 stack address *before* the function call as a frame's CFA. On
1268 the i386, when %ebp is used as a frame pointer, the offset
1269 between the contents %ebp and the CFA as defined by GCC. */
1273 /* These registers are used for returning integers (and on some
1274 targets also for returning `struct' and `union' values when their
1275 size and alignment match an integer type). */
1276 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1277 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1279 /* Read, for architecture GDBARCH, a function return value of TYPE
1280 from REGCACHE, and copy that into VALBUF. */
1283 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1284 struct regcache
*regcache
, gdb_byte
*valbuf
)
1286 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1287 int len
= TYPE_LENGTH (type
);
1288 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
1290 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1292 if (tdep
->st0_regnum
< 0)
1294 warning (_("Cannot find floating-point return value."));
1295 memset (valbuf
, 0, len
);
1299 /* Floating-point return values can be found in %st(0). Convert
1300 its contents to the desired type. This is probably not
1301 exactly how it would happen on the target itself, but it is
1302 the best we can do. */
1303 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1304 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1308 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1309 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1311 if (len
<= low_size
)
1313 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1314 memcpy (valbuf
, buf
, len
);
1316 else if (len
<= (low_size
+ high_size
))
1318 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1319 memcpy (valbuf
, buf
, low_size
);
1320 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1321 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1324 internal_error (__FILE__
, __LINE__
,
1325 _("Cannot extract return value of %d bytes long."), len
);
1329 /* Write, for architecture GDBARCH, a function return value of TYPE
1330 from VALBUF into REGCACHE. */
1333 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1334 struct regcache
*regcache
, const gdb_byte
*valbuf
)
1336 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1337 int len
= TYPE_LENGTH (type
);
1339 /* Define I387_ST0_REGNUM such that we use the proper definitions
1340 for the architecture. */
1341 #define I387_ST0_REGNUM I386_ST0_REGNUM
1343 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1346 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
1348 if (tdep
->st0_regnum
< 0)
1350 warning (_("Cannot set floating-point return value."));
1354 /* Returning floating-point values is a bit tricky. Apart from
1355 storing the return value in %st(0), we have to simulate the
1356 state of the FPU at function return point. */
1358 /* Convert the value found in VALBUF to the extended
1359 floating-point format used by the FPU. This is probably
1360 not exactly how it would happen on the target itself, but
1361 it is the best we can do. */
1362 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1363 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1365 /* Set the top of the floating-point register stack to 7. The
1366 actual value doesn't really matter, but 7 is what a normal
1367 function return would end up with if the program started out
1368 with a freshly initialized FPU. */
1369 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1371 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1373 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1374 the floating-point register stack to 7, the appropriate value
1375 for the tag word is 0x3fff. */
1376 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1380 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1381 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1383 if (len
<= low_size
)
1384 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1385 else if (len
<= (low_size
+ high_size
))
1387 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1388 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1389 len
- low_size
, valbuf
+ low_size
);
1392 internal_error (__FILE__
, __LINE__
,
1393 _("Cannot store return value of %d bytes long."), len
);
1396 #undef I387_ST0_REGNUM
1400 /* This is the variable that is set with "set struct-convention", and
1401 its legitimate values. */
1402 static const char default_struct_convention
[] = "default";
1403 static const char pcc_struct_convention
[] = "pcc";
1404 static const char reg_struct_convention
[] = "reg";
1405 static const char *valid_conventions
[] =
1407 default_struct_convention
,
1408 pcc_struct_convention
,
1409 reg_struct_convention
,
1412 static const char *struct_convention
= default_struct_convention
;
1414 /* Return non-zero if TYPE, which is assumed to be a structure or
1415 union type, should be returned in registers for architecture
1419 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1421 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1422 enum type_code code
= TYPE_CODE (type
);
1423 int len
= TYPE_LENGTH (type
);
1425 gdb_assert (code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
);
1427 if (struct_convention
== pcc_struct_convention
1428 || (struct_convention
== default_struct_convention
1429 && tdep
->struct_return
== pcc_struct_return
))
1432 /* Structures consisting of a single `float', `double' or 'long
1433 double' member are returned in %st(0). */
1434 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1436 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1437 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1438 return (len
== 4 || len
== 8 || len
== 12);
1441 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1444 /* Determine, for architecture GDBARCH, how a return value of TYPE
1445 should be returned. If it is supposed to be returned in registers,
1446 and READBUF is non-zero, read the appropriate value from REGCACHE,
1447 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1448 from WRITEBUF into REGCACHE. */
1450 static enum return_value_convention
1451 i386_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1452 struct regcache
*regcache
, gdb_byte
*readbuf
,
1453 const gdb_byte
*writebuf
)
1455 enum type_code code
= TYPE_CODE (type
);
1457 if ((code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
)
1458 && !i386_reg_struct_return_p (gdbarch
, type
))
1460 /* The System V ABI says that:
1462 "A function that returns a structure or union also sets %eax
1463 to the value of the original address of the caller's area
1464 before it returns. Thus when the caller receives control
1465 again, the address of the returned object resides in register
1466 %eax and can be used to access the object."
1468 So the ABI guarantees that we can always find the return
1469 value just after the function has returned. */
1475 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
1476 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
1479 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
1482 /* This special case is for structures consisting of a single
1483 `float', `double' or 'long double' member. These structures are
1484 returned in %st(0). For these structures, we call ourselves
1485 recursively, changing TYPE into the type of the first member of
1486 the structure. Since that should work for all structures that
1487 have only one member, we don't bother to check the member's type
1489 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1491 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1492 return i386_return_value (gdbarch
, type
, regcache
, readbuf
, writebuf
);
1496 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1498 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1500 return RETURN_VALUE_REGISTER_CONVENTION
;
1504 /* Types for the MMX and SSE registers. */
1505 static struct type
*i386_mmx_type
;
1506 static struct type
*i386_sse_type
;
1508 /* Construct the type for MMX registers. */
1509 static struct type
*
1510 i386_build_mmx_type (void)
1512 /* The type we're building is this: */
1514 union __gdb_builtin_type_vec64i
1517 int32_t v2_int32
[2];
1518 int16_t v4_int16
[4];
1523 if (! i386_mmx_type
)
1527 t
= init_composite_type ("__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
1528 append_composite_type_field (t
, "uint64", builtin_type_int64
);
1529 append_composite_type_field (t
, "v2_int32", builtin_type_v2_int32
);
1530 append_composite_type_field (t
, "v4_int16", builtin_type_v4_int16
);
1531 append_composite_type_field (t
, "v8_int8", builtin_type_v8_int8
);
1533 TYPE_FLAGS (t
) |= TYPE_FLAG_VECTOR
;
1534 TYPE_NAME (t
) = "builtin_type_vec64i";
1539 return i386_mmx_type
;
1542 /* Construct the type for SSE registers. */
1543 static struct type
*
1544 i386_build_sse_type (void)
1546 if (! i386_sse_type
)
1550 t
= init_composite_type ("__gdb_builtin_type_vec128i", TYPE_CODE_UNION
);
1551 append_composite_type_field (t
, "v4_float", builtin_type_v4_float
);
1552 append_composite_type_field (t
, "v2_double", builtin_type_v2_double
);
1553 append_composite_type_field (t
, "v16_int8", builtin_type_v16_int8
);
1554 append_composite_type_field (t
, "v8_int16", builtin_type_v8_int16
);
1555 append_composite_type_field (t
, "v4_int32", builtin_type_v4_int32
);
1556 append_composite_type_field (t
, "v2_int64", builtin_type_v2_int64
);
1557 append_composite_type_field (t
, "uint128", builtin_type_int128
);
1559 TYPE_FLAGS (t
) |= TYPE_FLAG_VECTOR
;
1560 TYPE_NAME (t
) = "builtin_type_vec128i";
1565 return i386_sse_type
;
1568 /* Return the GDB type object for the "standard" data type of data in
1569 register REGNUM. Perhaps %esi and %edi should go here, but
1570 potentially they could be used for things other than address. */
1572 static struct type
*
1573 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1575 if (regnum
== I386_EIP_REGNUM
)
1576 return builtin_type_void_func_ptr
;
1578 if (regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1579 return builtin_type_void_data_ptr
;
1581 if (i386_fp_regnum_p (regnum
))
1582 return builtin_type_i387_ext
;
1584 if (i386_sse_regnum_p (gdbarch
, regnum
))
1585 return i386_build_sse_type ();
1587 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1588 return i386_build_mmx_type ();
1590 return builtin_type_int
;
1593 /* Map a cooked register onto a raw register or memory. For the i386,
1594 the MMX registers need to be mapped onto floating point registers. */
1597 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1599 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1604 /* Define I387_ST0_REGNUM such that we use the proper definitions
1605 for REGCACHE's architecture. */
1606 #define I387_ST0_REGNUM tdep->st0_regnum
1608 mmxreg
= regnum
- tdep
->mm0_regnum
;
1609 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1610 tos
= (fstat
>> 11) & 0x7;
1611 fpreg
= (mmxreg
+ tos
) % 8;
1613 return (I387_ST0_REGNUM
+ fpreg
);
1615 #undef I387_ST0_REGNUM
1619 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1620 int regnum
, gdb_byte
*buf
)
1622 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1624 gdb_byte mmx_buf
[MAX_REGISTER_SIZE
];
1625 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1627 /* Extract (always little endian). */
1628 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1629 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1632 regcache_raw_read (regcache
, regnum
, buf
);
1636 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1637 int regnum
, const gdb_byte
*buf
)
1639 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1641 gdb_byte mmx_buf
[MAX_REGISTER_SIZE
];
1642 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1645 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1646 /* ... Modify ... (always little endian). */
1647 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1649 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1652 regcache_raw_write (regcache
, regnum
, buf
);
1656 /* Return the register number of the register allocated by GCC after
1657 REGNUM, or -1 if there is no such register. */
1660 i386_next_regnum (int regnum
)
1662 /* GCC allocates the registers in the order:
1664 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1666 Since storing a variable in %esp doesn't make any sense we return
1667 -1 for %ebp and for %esp itself. */
1668 static int next_regnum
[] =
1670 I386_EDX_REGNUM
, /* Slot for %eax. */
1671 I386_EBX_REGNUM
, /* Slot for %ecx. */
1672 I386_ECX_REGNUM
, /* Slot for %edx. */
1673 I386_ESI_REGNUM
, /* Slot for %ebx. */
1674 -1, -1, /* Slots for %esp and %ebp. */
1675 I386_EDI_REGNUM
, /* Slot for %esi. */
1676 I386_EBP_REGNUM
/* Slot for %edi. */
1679 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1680 return next_regnum
[regnum
];
1685 /* Return nonzero if a value of type TYPE stored in register REGNUM
1686 needs any special handling. */
1689 i386_convert_register_p (int regnum
, struct type
*type
)
1691 int len
= TYPE_LENGTH (type
);
1693 /* Values may be spread across multiple registers. Most debugging
1694 formats aren't expressive enough to specify the locations, so
1695 some heuristics is involved. Right now we only handle types that
1696 have a length that is a multiple of the word size, since GCC
1697 doesn't seem to put any other types into registers. */
1698 if (len
> 4 && len
% 4 == 0)
1700 int last_regnum
= regnum
;
1704 last_regnum
= i386_next_regnum (last_regnum
);
1708 if (last_regnum
!= -1)
1712 return i386_fp_regnum_p (regnum
);
1715 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1716 return its contents in TO. */
1719 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1720 struct type
*type
, gdb_byte
*to
)
1722 int len
= TYPE_LENGTH (type
);
1724 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1725 available in FRAME (i.e. if it wasn't saved)? */
1727 if (i386_fp_regnum_p (regnum
))
1729 i387_register_to_value (frame
, regnum
, type
, to
);
1733 /* Read a value spread across multiple registers. */
1735 gdb_assert (len
> 4 && len
% 4 == 0);
1739 gdb_assert (regnum
!= -1);
1740 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1742 get_frame_register (frame
, regnum
, to
);
1743 regnum
= i386_next_regnum (regnum
);
1749 /* Write the contents FROM of a value of type TYPE into register
1750 REGNUM in frame FRAME. */
1753 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1754 struct type
*type
, const gdb_byte
*from
)
1756 int len
= TYPE_LENGTH (type
);
1758 if (i386_fp_regnum_p (regnum
))
1760 i387_value_to_register (frame
, regnum
, type
, from
);
1764 /* Write a value spread across multiple registers. */
1766 gdb_assert (len
> 4 && len
% 4 == 0);
1770 gdb_assert (regnum
!= -1);
1771 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1773 put_frame_register (frame
, regnum
, from
);
1774 regnum
= i386_next_regnum (regnum
);
1780 /* Supply register REGNUM from the buffer specified by GREGS and LEN
1781 in the general-purpose register set REGSET to register cache
1782 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1785 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1786 int regnum
, const void *gregs
, size_t len
)
1788 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1789 const gdb_byte
*regs
= gregs
;
1792 gdb_assert (len
== tdep
->sizeof_gregset
);
1794 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1796 if ((regnum
== i
|| regnum
== -1)
1797 && tdep
->gregset_reg_offset
[i
] != -1)
1798 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1802 /* Collect register REGNUM from the register cache REGCACHE and store
1803 it in the buffer specified by GREGS and LEN as described by the
1804 general-purpose register set REGSET. If REGNUM is -1, do this for
1805 all registers in REGSET. */
1808 i386_collect_gregset (const struct regset
*regset
,
1809 const struct regcache
*regcache
,
1810 int regnum
, void *gregs
, size_t len
)
1812 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1813 gdb_byte
*regs
= gregs
;
1816 gdb_assert (len
== tdep
->sizeof_gregset
);
1818 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1820 if ((regnum
== i
|| regnum
== -1)
1821 && tdep
->gregset_reg_offset
[i
] != -1)
1822 regcache_raw_collect (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1826 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
1827 in the floating-point register set REGSET to register cache
1828 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1831 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
1832 int regnum
, const void *fpregs
, size_t len
)
1834 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1836 if (len
== I387_SIZEOF_FXSAVE
)
1838 i387_supply_fxsave (regcache
, regnum
, fpregs
);
1842 gdb_assert (len
== tdep
->sizeof_fpregset
);
1843 i387_supply_fsave (regcache
, regnum
, fpregs
);
1846 /* Collect register REGNUM from the register cache REGCACHE and store
1847 it in the buffer specified by FPREGS and LEN as described by the
1848 floating-point register set REGSET. If REGNUM is -1, do this for
1849 all registers in REGSET. */
1852 i386_collect_fpregset (const struct regset
*regset
,
1853 const struct regcache
*regcache
,
1854 int regnum
, void *fpregs
, size_t len
)
1856 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1858 if (len
== I387_SIZEOF_FXSAVE
)
1860 i387_collect_fxsave (regcache
, regnum
, fpregs
);
1864 gdb_assert (len
== tdep
->sizeof_fpregset
);
1865 i387_collect_fsave (regcache
, regnum
, fpregs
);
1868 /* Return the appropriate register set for the core section identified
1869 by SECT_NAME and SECT_SIZE. */
1871 const struct regset
*
1872 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
1873 const char *sect_name
, size_t sect_size
)
1875 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1877 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
1879 if (tdep
->gregset
== NULL
)
1880 tdep
->gregset
= regset_alloc (gdbarch
, i386_supply_gregset
,
1881 i386_collect_gregset
);
1882 return tdep
->gregset
;
1885 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
1886 || (strcmp (sect_name
, ".reg-xfp") == 0
1887 && sect_size
== I387_SIZEOF_FXSAVE
))
1889 if (tdep
->fpregset
== NULL
)
1890 tdep
->fpregset
= regset_alloc (gdbarch
, i386_supply_fpregset
,
1891 i386_collect_fpregset
);
1892 return tdep
->fpregset
;
1899 #ifdef STATIC_TRANSFORM_NAME
1900 /* SunPRO encodes the static variables. This is not related to C++
1901 mangling, it is done for C too. */
1904 sunpro_static_transform_name (char *name
)
1907 if (IS_STATIC_TRANSFORM_NAME (name
))
1909 /* For file-local statics there will be a period, a bunch of
1910 junk (the contents of which match a string given in the
1911 N_OPT), a period and the name. For function-local statics
1912 there will be a bunch of junk (which seems to change the
1913 second character from 'A' to 'B'), a period, the name of the
1914 function, and the name. So just skip everything before the
1916 p
= strrchr (name
, '.');
1922 #endif /* STATIC_TRANSFORM_NAME */
1925 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1928 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1930 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1932 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1933 struct minimal_symbol
*indsym
=
1934 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1935 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1939 if (strncmp (symname
, "__imp_", 6) == 0
1940 || strncmp (symname
, "_imp_", 5) == 0)
1941 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1944 return 0; /* Not a trampoline. */
1948 /* Return whether the frame preceding NEXT_FRAME corresponds to a
1949 sigtramp routine. */
1952 i386_sigtramp_p (struct frame_info
*next_frame
)
1954 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1957 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1958 return (name
&& strcmp ("_sigtramp", name
) == 0);
1962 /* We have two flavours of disassembly. The machinery on this page
1963 deals with switching between those. */
1966 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1968 gdb_assert (disassembly_flavor
== att_flavor
1969 || disassembly_flavor
== intel_flavor
);
1971 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1972 constified, cast to prevent a compiler warning. */
1973 info
->disassembler_options
= (char *) disassembly_flavor
;
1974 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1976 return print_insn_i386 (pc
, info
);
1980 /* There are a few i386 architecture variants that differ only
1981 slightly from the generic i386 target. For now, we don't give them
1982 their own source file, but include them here. As a consequence,
1983 they'll always be included. */
1985 /* System V Release 4 (SVR4). */
1987 /* Return whether the frame preceding NEXT_FRAME corresponds to a SVR4
1988 sigtramp routine. */
1991 i386_svr4_sigtramp_p (struct frame_info
*next_frame
)
1993 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1996 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1997 currently unknown. */
1998 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1999 return (name
&& (strcmp ("_sigreturn", name
) == 0
2000 || strcmp ("_sigacthandler", name
) == 0
2001 || strcmp ("sigvechandler", name
) == 0));
2004 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
2005 routine, return the address of the associated sigcontext (ucontext)
2009 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
2014 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
2015 sp
= extract_unsigned_integer (buf
, 4);
2017 return read_memory_unsigned_integer (sp
+ 8, 4);
2024 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2026 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
2027 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2030 /* System V Release 4 (SVR4). */
2033 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2035 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2037 /* System V Release 4 uses ELF. */
2038 i386_elf_init_abi (info
, gdbarch
);
2040 /* System V Release 4 has shared libraries. */
2041 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
2043 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
2044 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
2045 tdep
->sc_pc_offset
= 36 + 14 * 4;
2046 tdep
->sc_sp_offset
= 36 + 17 * 4;
2048 tdep
->jb_pc_offset
= 20;
2054 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2056 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2058 /* DJGPP doesn't have any special frames for signal handlers. */
2059 tdep
->sigtramp_p
= NULL
;
2061 tdep
->jb_pc_offset
= 36;
2067 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2069 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2071 tdep
->jb_pc_offset
= 24;
2075 /* i386 register groups. In addition to the normal groups, add "mmx"
2078 static struct reggroup
*i386_sse_reggroup
;
2079 static struct reggroup
*i386_mmx_reggroup
;
2082 i386_init_reggroups (void)
2084 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
2085 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
2089 i386_add_reggroups (struct gdbarch
*gdbarch
)
2091 reggroup_add (gdbarch
, i386_sse_reggroup
);
2092 reggroup_add (gdbarch
, i386_mmx_reggroup
);
2093 reggroup_add (gdbarch
, general_reggroup
);
2094 reggroup_add (gdbarch
, float_reggroup
);
2095 reggroup_add (gdbarch
, all_reggroup
);
2096 reggroup_add (gdbarch
, save_reggroup
);
2097 reggroup_add (gdbarch
, restore_reggroup
);
2098 reggroup_add (gdbarch
, vector_reggroup
);
2099 reggroup_add (gdbarch
, system_reggroup
);
2103 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
2104 struct reggroup
*group
)
2106 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
2107 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
2108 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
2109 || i386_fpc_regnum_p (regnum
));
2110 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
2112 if (group
== i386_mmx_reggroup
)
2113 return mmx_regnum_p
;
2114 if (group
== i386_sse_reggroup
)
2115 return sse_regnum_p
;
2116 if (group
== vector_reggroup
)
2117 return (mmx_regnum_p
|| sse_regnum_p
);
2118 if (group
== float_reggroup
)
2120 if (group
== general_reggroup
)
2121 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
2123 return default_register_reggroup_p (gdbarch
, regnum
, group
);
2127 /* Get the ARGIth function argument for the current function. */
2130 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
2133 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
2134 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
2138 static struct gdbarch
*
2139 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2141 struct gdbarch_tdep
*tdep
;
2142 struct gdbarch
*gdbarch
;
2144 /* If there is already a candidate, use it. */
2145 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2147 return arches
->gdbarch
;
2149 /* Allocate space for the new architecture. */
2150 tdep
= XMALLOC (struct gdbarch_tdep
);
2151 gdbarch
= gdbarch_alloc (&info
, tdep
);
2153 /* General-purpose registers. */
2154 tdep
->gregset
= NULL
;
2155 tdep
->gregset_reg_offset
= NULL
;
2156 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
2157 tdep
->sizeof_gregset
= 0;
2159 /* Floating-point registers. */
2160 tdep
->fpregset
= NULL
;
2161 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
2163 /* The default settings include the FPU registers, the MMX registers
2164 and the SSE registers. This can be overridden for a specific ABI
2165 by adjusting the members `st0_regnum', `mm0_regnum' and
2166 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
2167 will show up in the output of "info all-registers". Ideally we
2168 should try to autodetect whether they are available, such that we
2169 can prevent "info all-registers" from displaying registers that
2172 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
2173 [the SSE registers] always (even when they don't exist) or never
2174 showing them to the user (even when they do exist), I prefer the
2175 former over the latter. */
2177 tdep
->st0_regnum
= I386_ST0_REGNUM
;
2179 /* The MMX registers are implemented as pseudo-registers. Put off
2180 calculating the register number for %mm0 until we know the number
2181 of raw registers. */
2182 tdep
->mm0_regnum
= 0;
2184 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
2185 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
2187 tdep
->jb_pc_offset
= -1;
2188 tdep
->struct_return
= pcc_struct_return
;
2189 tdep
->sigtramp_start
= 0;
2190 tdep
->sigtramp_end
= 0;
2191 tdep
->sigtramp_p
= i386_sigtramp_p
;
2192 tdep
->sigcontext_addr
= NULL
;
2193 tdep
->sc_reg_offset
= NULL
;
2194 tdep
->sc_pc_offset
= -1;
2195 tdep
->sc_sp_offset
= -1;
2197 /* The format used for `long double' on almost all i386 targets is
2198 the i387 extended floating-point format. In fact, of all targets
2199 in the GCC 2.95 tree, only OSF/1 does it different, and insists
2200 on having a `long double' that's not `long' at all. */
2201 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
2203 /* Although the i387 extended floating-point has only 80 significant
2204 bits, a `long double' actually takes up 96, probably to enforce
2206 set_gdbarch_long_double_bit (gdbarch
, 96);
2208 /* The default ABI includes general-purpose registers,
2209 floating-point registers, and the SSE registers. */
2210 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
2211 set_gdbarch_register_name (gdbarch
, i386_register_name
);
2212 set_gdbarch_register_type (gdbarch
, i386_register_type
);
2214 /* Register numbers of various important registers. */
2215 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
2216 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
2217 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
2218 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
2220 /* NOTE: kettenis/20040418: GCC does have two possible register
2221 numbering schemes on the i386: dbx and SVR4. These schemes
2222 differ in how they number %ebp, %esp, %eflags, and the
2223 floating-point registers, and are implemented by the arrays
2224 dbx_register_map[] and svr4_dbx_register_map in
2225 gcc/config/i386.c. GCC also defines a third numbering scheme in
2226 gcc/config/i386.c, which it designates as the "default" register
2227 map used in 64bit mode. This last register numbering scheme is
2228 implemented in dbx64_register_map, and is used for AMD64; see
2231 Currently, each GCC i386 target always uses the same register
2232 numbering scheme across all its supported debugging formats
2233 i.e. SDB (COFF), stabs and DWARF 2. This is because
2234 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2235 DBX_REGISTER_NUMBER macro which is defined by each target's
2236 respective config header in a manner independent of the requested
2237 output debugging format.
2239 This does not match the arrangement below, which presumes that
2240 the SDB and stabs numbering schemes differ from the DWARF and
2241 DWARF 2 ones. The reason for this arrangement is that it is
2242 likely to get the numbering scheme for the target's
2243 default/native debug format right. For targets where GCC is the
2244 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2245 targets where the native toolchain uses a different numbering
2246 scheme for a particular debug format (stabs-in-ELF on Solaris)
2247 the defaults below will have to be overridden, like
2248 i386_elf_init_abi() does. */
2250 /* Use the dbx register numbering scheme for stabs and COFF. */
2251 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2252 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2254 /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */
2255 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2256 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2258 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
2259 be in use on any of the supported i386 targets. */
2261 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
2263 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
2265 /* Call dummy code. */
2266 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
2268 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
2269 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
2270 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
2272 set_gdbarch_return_value (gdbarch
, i386_return_value
);
2274 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
2276 /* Stack grows downward. */
2277 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2279 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
2280 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
2282 set_gdbarch_frame_args_skip (gdbarch
, 8);
2284 /* Wire in the MMX registers. */
2285 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2286 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2287 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2289 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2291 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
2293 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2295 /* Add the i386 register groups. */
2296 i386_add_reggroups (gdbarch
);
2297 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2299 /* Helper for function argument information. */
2300 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2302 /* Hook in the DWARF CFI frame unwinder. */
2303 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
2305 frame_base_set_default (gdbarch
, &i386_frame_base
);
2307 /* Hook in ABI-specific overrides, if they have been registered. */
2308 gdbarch_init_osabi (info
, gdbarch
);
2310 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
2311 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
2313 /* If we have a register mapping, enable the generic core file
2314 support, unless it has already been enabled. */
2315 if (tdep
->gregset_reg_offset
2316 && !gdbarch_regset_from_core_section_p (gdbarch
))
2317 set_gdbarch_regset_from_core_section (gdbarch
,
2318 i386_regset_from_core_section
);
2320 /* Unless support for MMX has been disabled, make %mm0 the first
2322 if (tdep
->mm0_regnum
== 0)
2323 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2328 static enum gdb_osabi
2329 i386_coff_osabi_sniffer (bfd
*abfd
)
2331 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2332 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2333 return GDB_OSABI_GO32
;
2335 return GDB_OSABI_UNKNOWN
;
2338 static enum gdb_osabi
2339 i386_nlm_osabi_sniffer (bfd
*abfd
)
2341 return GDB_OSABI_NETWARE
;
2345 /* Provide a prototype to silence -Wmissing-prototypes. */
2346 void _initialize_i386_tdep (void);
2349 _initialize_i386_tdep (void)
2351 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2353 /* Add the variable that controls the disassembly flavor. */
2354 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
2355 &disassembly_flavor
, _("\
2356 Set the disassembly flavor."), _("\
2357 Show the disassembly flavor."), _("\
2358 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
2360 NULL
, /* FIXME: i18n: */
2361 &setlist
, &showlist
);
2363 /* Add the variable that controls the convention for returning
2365 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
2366 &struct_convention
, _("\
2367 Set the convention for returning small structs."), _("\
2368 Show the convention for returning small structs."), _("\
2369 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
2372 NULL
, /* FIXME: i18n: */
2373 &setlist
, &showlist
);
2375 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2376 i386_coff_osabi_sniffer
);
2377 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
2378 i386_nlm_osabi_sniffer
);
2380 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2381 i386_svr4_init_abi
);
2382 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2383 i386_go32_init_abi
);
2384 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
2387 /* Initialize the i386 specific register groups. */
2388 i386_init_reggroups ();