1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
27 #include "dwarf2-frame.h"
29 #include "floatformat.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
39 #include "reggroups.h"
45 #include "gdb_assert.h"
46 #include "gdb_string.h"
48 #include "i386-tdep.h"
49 #include "i387-tdep.h"
51 /* Names of the registers. The first 10 registers match the register
52 numbering scheme used by GCC for stabs and DWARF. */
54 static char *i386_register_names
[] =
56 "eax", "ecx", "edx", "ebx",
57 "esp", "ebp", "esi", "edi",
58 "eip", "eflags", "cs", "ss",
59 "ds", "es", "fs", "gs",
60 "st0", "st1", "st2", "st3",
61 "st4", "st5", "st6", "st7",
62 "fctrl", "fstat", "ftag", "fiseg",
63 "fioff", "foseg", "fooff", "fop",
64 "xmm0", "xmm1", "xmm2", "xmm3",
65 "xmm4", "xmm5", "xmm6", "xmm7",
69 static const int i386_num_register_names
=
70 (sizeof (i386_register_names
) / sizeof (*i386_register_names
));
74 static char *i386_mmx_names
[] =
76 "mm0", "mm1", "mm2", "mm3",
77 "mm4", "mm5", "mm6", "mm7"
80 static const int i386_num_mmx_regs
=
81 (sizeof (i386_mmx_names
) / sizeof (i386_mmx_names
[0]));
83 #define MM0_REGNUM NUM_REGS
86 i386_mmx_regnum_p (int regnum
)
88 return (regnum
>= MM0_REGNUM
89 && regnum
< MM0_REGNUM
+ i386_num_mmx_regs
);
95 i386_fp_regnum_p (int regnum
)
97 return (regnum
< NUM_REGS
98 && (FP0_REGNUM
&& FP0_REGNUM
<= regnum
&& regnum
< FPC_REGNUM
));
102 i386_fpc_regnum_p (int regnum
)
104 return (regnum
< NUM_REGS
105 && (FPC_REGNUM
<= regnum
&& regnum
< XMM0_REGNUM
));
111 i386_sse_regnum_p (int regnum
)
113 return (regnum
< NUM_REGS
114 && (XMM0_REGNUM
<= regnum
&& regnum
< MXCSR_REGNUM
));
118 i386_mxcsr_regnum_p (int regnum
)
120 return (regnum
< NUM_REGS
121 && regnum
== MXCSR_REGNUM
);
124 /* Return the name of register REG. */
127 i386_register_name (int reg
)
129 if (i386_mmx_regnum_p (reg
))
130 return i386_mmx_names
[reg
- MM0_REGNUM
];
132 if (reg
>= 0 && reg
< i386_num_register_names
)
133 return i386_register_names
[reg
];
138 /* Convert stabs register number REG to the appropriate register
139 number used by GDB. */
142 i386_stab_reg_to_regnum (int reg
)
144 /* This implements what GCC calls the "default" register map. */
145 if (reg
>= 0 && reg
<= 7)
147 /* General-purpose registers. */
150 else if (reg
>= 12 && reg
<= 19)
152 /* Floating-point registers. */
153 return reg
- 12 + FP0_REGNUM
;
155 else if (reg
>= 21 && reg
<= 28)
158 return reg
- 21 + XMM0_REGNUM
;
160 else if (reg
>= 29 && reg
<= 36)
163 return reg
- 29 + MM0_REGNUM
;
166 /* This will hopefully provoke a warning. */
167 return NUM_REGS
+ NUM_PSEUDO_REGS
;
170 /* Convert DWARF register number REG to the appropriate register
171 number used by GDB. */
174 i386_dwarf_reg_to_regnum (int reg
)
176 /* The DWARF register numbering includes %eip and %eflags, and
177 numbers the floating point registers differently. */
178 if (reg
>= 0 && reg
<= 9)
180 /* General-purpose registers. */
183 else if (reg
>= 11 && reg
<= 18)
185 /* Floating-point registers. */
186 return reg
- 11 + FP0_REGNUM
;
190 /* The SSE and MMX registers have identical numbers as in stabs. */
191 return i386_stab_reg_to_regnum (reg
);
194 /* This will hopefully provoke a warning. */
195 return NUM_REGS
+ NUM_PSEUDO_REGS
;
199 /* This is the variable that is set with "set disassembly-flavor", and
200 its legitimate values. */
201 static const char att_flavor
[] = "att";
202 static const char intel_flavor
[] = "intel";
203 static const char *valid_flavors
[] =
209 static const char *disassembly_flavor
= att_flavor
;
212 /* Use the program counter to determine the contents and size of a
213 breakpoint instruction. Return a pointer to a string of bytes that
214 encode a breakpoint instruction, store the length of the string in
215 *LEN and optionally adjust *PC to point to the correct memory
216 location for inserting the breakpoint.
218 On the i386 we have a single breakpoint that fits in a single byte
219 and can be inserted anywhere.
221 This function is 64-bit safe. */
223 static const unsigned char *
224 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
226 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
228 *len
= sizeof (break_insn
);
232 #ifdef I386_REGNO_TO_SYMMETRY
233 #error "The Sequent Symmetry is no longer supported."
236 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
237 and %esp "belong" to the calling function. Therefore these
238 registers should be saved if they're going to be modified. */
240 /* The maximum number of saved registers. This should include all
241 registers mentioned above, and %eip. */
242 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
244 struct i386_frame_cache
251 /* Saved registers. */
252 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
256 /* Stack space reserved for local variables. */
260 /* Allocate and initialize a frame cache. */
262 static struct i386_frame_cache
*
263 i386_alloc_frame_cache (void)
265 struct i386_frame_cache
*cache
;
268 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
272 cache
->sp_offset
= -4;
275 /* Saved registers. We initialize these to -1 since zero is a valid
276 offset (that's where %ebp is supposed to be stored). */
277 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
278 cache
->saved_regs
[i
] = -1;
280 cache
->pc_in_eax
= 0;
282 /* Frameless until proven otherwise. */
288 /* If the instruction at PC is a jump, return the address of its
289 target. Otherwise, return PC. */
292 i386_follow_jump (CORE_ADDR pc
)
298 op
= read_memory_unsigned_integer (pc
, 1);
302 op
= read_memory_unsigned_integer (pc
+ 1, 1);
308 /* Relative jump: if data16 == 0, disp32, else disp16. */
311 delta
= read_memory_integer (pc
+ 2, 2);
313 /* Include the size of the jmp instruction (including the
319 delta
= read_memory_integer (pc
+ 1, 4);
321 /* Include the size of the jmp instruction. */
326 /* Relative jump, disp8 (ignore data16). */
327 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
336 /* Check whether PC points at a prologue for a function returning a
337 structure or union. If so, it updates CACHE and returns the
338 address of the first instruction after the code sequence that
339 removes the "hidden" argument from the stack or CURRENT_PC,
340 whichever is smaller. Otherwise, return PC. */
343 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
344 struct i386_frame_cache
*cache
)
346 /* Functions that return a structure or union start with:
349 xchgl %eax, (%esp) 0x87 0x04 0x24
350 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
352 (the System V compiler puts out the second `xchg' instruction,
353 and the assembler doesn't try to optimize it, so the 'sib' form
354 gets generated). This sequence is used to get the address of the
355 return buffer for a function that returns a structure. */
356 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
357 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
358 unsigned char buf
[4];
361 if (current_pc
<= pc
)
364 op
= read_memory_unsigned_integer (pc
, 1);
366 if (op
!= 0x58) /* popl %eax */
369 read_memory (pc
+ 1, buf
, 4);
370 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
373 if (current_pc
== pc
)
375 cache
->sp_offset
+= 4;
379 if (current_pc
== pc
+ 1)
381 cache
->pc_in_eax
= 1;
385 if (buf
[1] == proto1
[1])
392 i386_skip_probe (CORE_ADDR pc
)
394 /* A function may start with
405 unsigned char buf
[8];
408 op
= read_memory_unsigned_integer (pc
, 1);
410 if (op
== 0x68 || op
== 0x6a)
414 /* Skip past the `pushl' instruction; it has either a one-byte or a
415 four-byte operand, depending on the opcode. */
421 /* Read the following 8 bytes, which should be `call _probe' (6
422 bytes) followed by `addl $4,%esp' (2 bytes). */
423 read_memory (pc
+ delta
, buf
, sizeof (buf
));
424 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
425 pc
+= delta
+ sizeof (buf
);
431 /* Check whether PC points at a code that sets up a new stack frame.
432 If so, it updates CACHE and returns the address of the first
433 instruction after the sequence that sets removes the "hidden"
434 argument from the stack or CURRENT_PC, whichever is smaller.
435 Otherwise, return PC. */
438 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
439 struct i386_frame_cache
*cache
)
444 if (current_pc
<= pc
)
447 op
= read_memory_unsigned_integer (pc
, 1);
449 if (op
== 0x55) /* pushl %ebp */
451 /* Take into account that we've executed the `pushl %ebp' that
452 starts this instruction sequence. */
453 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
454 cache
->sp_offset
+= 4;
456 /* If that's all, return now. */
457 if (current_pc
<= pc
+ 1)
460 op
= read_memory_unsigned_integer (pc
+ 1, 1);
462 /* Check for some special instructions that might be migrated
463 by GCC into the prologue. We check for
475 Make sure we only skip these instructions if we later see the
476 `movl %esp, %ebp' that actually sets up the frame. */
477 while (op
== 0x29 || op
== 0x31)
479 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
482 case 0xdb: /* %ebx */
483 case 0xc9: /* %ecx */
484 case 0xd2: /* %edx */
491 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
494 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
498 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
502 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
509 /* OK, we actually have a frame. We just don't know how large
510 it is yet. Set its size to zero. We'll adjust it if
511 necessary. We also now commit to skipping the special
512 instructions mentioned before. */
516 /* If that's all, return now. */
517 if (current_pc
<= pc
+ 3)
520 /* Check for stack adjustment
524 NOTE: You can't subtract a 16 bit immediate from a 32 bit
525 reg, so we don't have to worry about a data16 prefix. */
526 op
= read_memory_unsigned_integer (pc
+ 3, 1);
529 /* `subl' with 8 bit immediate. */
530 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
531 /* Some instruction starting with 0x83 other than `subl'. */
534 /* `subl' with signed byte immediate (though it wouldn't make
535 sense to be negative). */
536 cache
->locals
= read_memory_integer (pc
+ 5, 1);
541 /* Maybe it is `subl' with a 32 bit immedediate. */
542 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
543 /* Some instruction starting with 0x81 other than `subl'. */
546 /* It is `subl' with a 32 bit immediate. */
547 cache
->locals
= read_memory_integer (pc
+ 5, 4);
552 /* Some instruction other than `subl'. */
556 else if (op
== 0xc8) /* enter $XXX */
558 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
565 /* Check whether PC points at code that saves registers on the stack.
566 If so, it updates CACHE and returns the address of the first
567 instruction after the register saves or CURRENT_PC, whichever is
568 smaller. Otherwise, return PC. */
571 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
572 struct i386_frame_cache
*cache
)
574 CORE_ADDR offset
= 0;
578 if (cache
->locals
> 0)
579 offset
-= cache
->locals
;
580 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
582 op
= read_memory_unsigned_integer (pc
, 1);
583 if (op
< 0x50 || op
> 0x57)
587 cache
->saved_regs
[op
- 0x50] = offset
;
588 cache
->sp_offset
+= 4;
595 /* Do a full analysis of the prologue at PC and update CACHE
596 accordingly. Bail out early if CURRENT_PC is reached. Return the
597 address where the analysis stopped.
599 We handle these cases:
601 The startup sequence can be at the start of the function, or the
602 function can start with a branch to startup code at the end.
604 %ebp can be set up with either the 'enter' instruction, or "pushl
605 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
606 once used in the System V compiler).
608 Local space is allocated just below the saved %ebp by either the
609 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
610 bit unsigned argument for space to allocate, and the 'addl'
611 instruction could have either a signed byte, or 32 bit immediate.
613 Next, the registers used by this function are pushed. With the
614 System V compiler they will always be in the order: %edi, %esi,
615 %ebx (and sometimes a harmless bug causes it to also save but not
616 restore %eax); however, the code below is willing to see the pushes
617 in any order, and will handle up to 8 of them.
619 If the setup sequence is at the end of the function, then the next
620 instruction will be a branch back to the start. */
623 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
624 struct i386_frame_cache
*cache
)
626 pc
= i386_follow_jump (pc
);
627 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
628 pc
= i386_skip_probe (pc
);
629 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
630 return i386_analyze_register_saves (pc
, current_pc
, cache
);
633 /* Return PC of first real instruction. */
636 i386_skip_prologue (CORE_ADDR start_pc
)
638 static unsigned char pic_pat
[6] =
640 0xe8, 0, 0, 0, 0, /* call 0x0 */
641 0x5b, /* popl %ebx */
643 struct i386_frame_cache cache
;
649 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
650 if (cache
.locals
< 0)
653 /* Found valid frame setup. */
655 /* The native cc on SVR4 in -K PIC mode inserts the following code
656 to get the address of the global offset table (GOT) into register
661 movl %ebx,x(%ebp) (optional)
664 This code is with the rest of the prologue (at the end of the
665 function), so we have to skip it to get to the first real
666 instruction at the start of the function. */
668 for (i
= 0; i
< 6; i
++)
670 op
= read_memory_unsigned_integer (pc
+ i
, 1);
671 if (pic_pat
[i
] != op
)
678 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
680 if (op
== 0x89) /* movl %ebx, x(%ebp) */
682 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
684 if (op
== 0x5d) /* One byte offset from %ebp. */
686 else if (op
== 0x9d) /* Four byte offset from %ebp. */
688 else /* Unexpected instruction. */
691 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
695 if (delta
> 0 && op
== 0x81
696 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
702 return i386_follow_jump (pc
);
705 /* This function is 64-bit safe. */
708 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
712 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
713 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
719 static struct i386_frame_cache
*
720 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
722 struct i386_frame_cache
*cache
;
729 cache
= i386_alloc_frame_cache ();
732 /* In principle, for normal frames, %ebp holds the frame pointer,
733 which holds the base address for the current stack frame.
734 However, for functions that don't need it, the frame pointer is
735 optional. For these "frameless" functions the frame pointer is
736 actually the frame pointer of the calling frame. Signal
737 trampolines are just a special case of a "frameless" function.
738 They (usually) share their frame pointer with the frame that was
739 in progress when the signal occurred. */
741 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
742 cache
->base
= extract_unsigned_integer (buf
, 4);
743 if (cache
->base
== 0)
746 /* For normal frames, %eip is stored at 4(%ebp). */
747 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
749 cache
->pc
= frame_func_unwind (next_frame
);
751 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
753 if (cache
->locals
< 0)
755 /* We didn't find a valid frame, which means that CACHE->base
756 currently holds the frame pointer for our calling frame. If
757 we're at the start of a function, or somewhere half-way its
758 prologue, the function's frame probably hasn't been fully
759 setup yet. Try to reconstruct the base address for the stack
760 frame by looking at the stack pointer. For truly "frameless"
761 functions this might work too. */
763 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
764 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
767 /* Now that we have the base address for the stack frame we can
768 calculate the value of %esp in the calling frame. */
769 cache
->saved_sp
= cache
->base
+ 8;
771 /* Adjust all the saved registers such that they contain addresses
772 instead of offsets. */
773 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
774 if (cache
->saved_regs
[i
] != -1)
775 cache
->saved_regs
[i
] += cache
->base
;
781 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
782 struct frame_id
*this_id
)
784 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
786 /* This marks the outermost frame. */
787 if (cache
->base
== 0)
790 /* See the end of i386_push_dummy_call. */
791 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
795 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
796 int regnum
, int *optimizedp
,
797 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
798 int *realnump
, void *valuep
)
800 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
802 gdb_assert (regnum
>= 0);
804 /* The System V ABI says that:
806 "The flags register contains the system flags, such as the
807 direction flag and the carry flag. The direction flag must be
808 set to the forward (that is, zero) direction before entry and
809 upon exit from a function. Other user flags have no specified
810 role in the standard calling sequence and are not preserved."
812 To guarantee the "upon exit" part of that statement we fake a
813 saved flags register that has its direction flag cleared.
815 Note that GCC doesn't seem to rely on the fact that the direction
816 flag is cleared after a function return; it always explicitly
817 clears the flag before operations where it matters.
819 FIXME: kettenis/20030316: I'm not quite sure whether this is the
820 right thing to do. The way we fake the flags register here makes
821 it impossible to change it. */
823 if (regnum
== I386_EFLAGS_REGNUM
)
833 /* Clear the direction flag. */
834 val
= frame_unwind_register_unsigned (next_frame
,
837 store_unsigned_integer (valuep
, 4, val
);
843 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
845 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
846 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
850 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
858 /* Store the value. */
859 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
864 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
867 *lvalp
= lval_memory
;
868 *addrp
= cache
->saved_regs
[regnum
];
872 /* Read the value in from memory. */
873 read_memory (*addrp
, valuep
,
874 register_size (current_gdbarch
, regnum
));
879 frame_register_unwind (next_frame
, regnum
,
880 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
883 static const struct frame_unwind i386_frame_unwind
=
887 i386_frame_prev_register
890 static const struct frame_unwind
*
891 i386_frame_sniffer (struct frame_info
*next_frame
)
893 return &i386_frame_unwind
;
897 /* Signal trampolines. */
899 static struct i386_frame_cache
*
900 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
902 struct i386_frame_cache
*cache
;
903 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
910 cache
= i386_alloc_frame_cache ();
912 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
913 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
915 addr
= tdep
->sigcontext_addr (next_frame
);
916 if (tdep
->sc_reg_offset
)
920 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
922 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
923 if (tdep
->sc_reg_offset
[i
] != -1)
924 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
928 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
929 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
937 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
938 struct frame_id
*this_id
)
940 struct i386_frame_cache
*cache
=
941 i386_sigtramp_frame_cache (next_frame
, this_cache
);
943 /* See the end of i386_push_dummy_call. */
944 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
948 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
950 int regnum
, int *optimizedp
,
951 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
952 int *realnump
, void *valuep
)
954 /* Make sure we've initialized the cache. */
955 i386_sigtramp_frame_cache (next_frame
, this_cache
);
957 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
958 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
961 static const struct frame_unwind i386_sigtramp_frame_unwind
=
964 i386_sigtramp_frame_this_id
,
965 i386_sigtramp_frame_prev_register
968 static const struct frame_unwind
*
969 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
971 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
974 /* We shouldn't even bother to try if the OSABI didn't register
975 a sigcontext_addr handler. */
976 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
979 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
980 if (PC_IN_SIGTRAMP (pc
, name
))
981 return &i386_sigtramp_frame_unwind
;
988 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
990 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
995 static const struct frame_base i386_frame_base
=
998 i386_frame_base_address
,
999 i386_frame_base_address
,
1000 i386_frame_base_address
1003 static struct frame_id
1004 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1009 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1010 fp
= extract_unsigned_integer (buf
, 4);
1012 /* See the end of i386_push_dummy_call. */
1013 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1017 /* Figure out where the longjmp will land. Slurp the args out of the
1018 stack. We expect the first arg to be a pointer to the jmp_buf
1019 structure from which we extract the address that we will land at.
1020 This address is copied into PC. This routine returns non-zero on
1023 This function is 64-bit safe. */
1026 i386_get_longjmp_target (CORE_ADDR
*pc
)
1029 CORE_ADDR sp
, jb_addr
;
1030 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1031 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1033 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1034 longjmp will land. */
1035 if (jb_pc_offset
== -1)
1038 /* Don't use I386_ESP_REGNUM here, since this function is also used
1040 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1041 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1042 if (target_read_memory (sp
+ len
, buf
, len
))
1045 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1046 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1049 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1055 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1056 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1057 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1058 CORE_ADDR struct_addr
)
1063 /* Push arguments in reverse order. */
1064 for (i
= nargs
- 1; i
>= 0; i
--)
1066 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1068 /* The System V ABI says that:
1070 "An argument's size is increased, if necessary, to make it a
1071 multiple of [32-bit] words. This may require tail padding,
1072 depending on the size of the argument."
1074 This makes sure the stack says word-aligned. */
1075 sp
-= (len
+ 3) & ~3;
1076 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1079 /* Push value address. */
1083 store_unsigned_integer (buf
, 4, struct_addr
);
1084 write_memory (sp
, buf
, 4);
1087 /* Store return address. */
1089 store_unsigned_integer (buf
, 4, bp_addr
);
1090 write_memory (sp
, buf
, 4);
1092 /* Finally, update the stack pointer... */
1093 store_unsigned_integer (buf
, 4, sp
);
1094 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1096 /* ...and fake a frame pointer. */
1097 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1099 /* MarkK wrote: This "+ 8" is all over the place:
1100 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1101 i386_unwind_dummy_id). It's there, since all frame unwinders for
1102 a given target have to agree (within a certain margin) on the
1103 defenition of the stack address of a frame. Otherwise
1104 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1105 stack address *before* the function call as a frame's CFA. On
1106 the i386, when %ebp is used as a frame pointer, the offset
1107 between the contents %ebp and the CFA as defined by GCC. */
1111 /* These registers are used for returning integers (and on some
1112 targets also for returning `struct' and `union' values when their
1113 size and alignment match an integer type). */
1114 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1115 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1117 /* Extract from an array REGBUF containing the (raw) register state, a
1118 function return value of TYPE, and copy that, in virtual format,
1122 i386_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1125 bfd_byte
*valbuf
= dst
;
1126 int len
= TYPE_LENGTH (type
);
1127 char buf
[I386_MAX_REGISTER_SIZE
];
1129 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1130 && TYPE_NFIELDS (type
) == 1)
1132 i386_extract_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1136 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1140 warning ("Cannot find floating-point return value.");
1141 memset (valbuf
, 0, len
);
1145 /* Floating-point return values can be found in %st(0). Convert
1146 its contents to the desired type. This is probably not
1147 exactly how it would happen on the target itself, but it is
1148 the best we can do. */
1149 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1150 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1154 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1155 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1157 if (len
<= low_size
)
1159 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1160 memcpy (valbuf
, buf
, len
);
1162 else if (len
<= (low_size
+ high_size
))
1164 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1165 memcpy (valbuf
, buf
, low_size
);
1166 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1167 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1170 internal_error (__FILE__
, __LINE__
,
1171 "Cannot extract return value of %d bytes long.", len
);
1175 /* Write into the appropriate registers a function return value stored
1176 in VALBUF of type TYPE, given in virtual format. */
1179 i386_store_return_value (struct type
*type
, struct regcache
*regcache
,
1182 int len
= TYPE_LENGTH (type
);
1184 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1185 && TYPE_NFIELDS (type
) == 1)
1187 i386_store_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1191 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1194 char buf
[FPU_REG_RAW_SIZE
];
1198 warning ("Cannot set floating-point return value.");
1202 /* Returning floating-point values is a bit tricky. Apart from
1203 storing the return value in %st(0), we have to simulate the
1204 state of the FPU at function return point. */
1206 /* Convert the value found in VALBUF to the extended
1207 floating-point format used by the FPU. This is probably
1208 not exactly how it would happen on the target itself, but
1209 it is the best we can do. */
1210 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1211 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1213 /* Set the top of the floating-point register stack to 7. The
1214 actual value doesn't really matter, but 7 is what a normal
1215 function return would end up with if the program started out
1216 with a freshly initialized FPU. */
1217 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1219 regcache_raw_write_unsigned (regcache
, FSTAT_REGNUM
, fstat
);
1221 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1222 the floating-point register stack to 7, the appropriate value
1223 for the tag word is 0x3fff. */
1224 regcache_raw_write_unsigned (regcache
, FTAG_REGNUM
, 0x3fff);
1228 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1229 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1231 if (len
<= low_size
)
1232 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1233 else if (len
<= (low_size
+ high_size
))
1235 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1236 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1237 len
- low_size
, (char *) valbuf
+ low_size
);
1240 internal_error (__FILE__
, __LINE__
,
1241 "Cannot store return value of %d bytes long.", len
);
1245 /* Extract from REGCACHE, which contains the (raw) register state, the
1246 address in which a function should return its structure value, as a
1250 i386_extract_struct_value_address (struct regcache
*regcache
)
1254 regcache_cooked_read (regcache
, I386_EAX_REGNUM
, buf
);
1255 return extract_unsigned_integer (buf
, 4);
1259 /* This is the variable that is set with "set struct-convention", and
1260 its legitimate values. */
1261 static const char default_struct_convention
[] = "default";
1262 static const char pcc_struct_convention
[] = "pcc";
1263 static const char reg_struct_convention
[] = "reg";
1264 static const char *valid_conventions
[] =
1266 default_struct_convention
,
1267 pcc_struct_convention
,
1268 reg_struct_convention
,
1271 static const char *struct_convention
= default_struct_convention
;
1274 i386_use_struct_convention (int gcc_p
, struct type
*type
)
1276 enum struct_return struct_return
;
1278 if (struct_convention
== default_struct_convention
)
1279 struct_return
= gdbarch_tdep (current_gdbarch
)->struct_return
;
1280 else if (struct_convention
== pcc_struct_convention
)
1281 struct_return
= pcc_struct_return
;
1283 struct_return
= reg_struct_return
;
1285 return generic_use_struct_convention (struct_return
== reg_struct_return
,
1290 /* Return the GDB type object for the "standard" data type of data in
1291 register REGNUM. Perhaps %esi and %edi should go here, but
1292 potentially they could be used for things other than address. */
1294 static struct type
*
1295 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1297 if (regnum
== I386_EIP_REGNUM
1298 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1299 return lookup_pointer_type (builtin_type_void
);
1301 if (i386_fp_regnum_p (regnum
))
1302 return builtin_type_i387_ext
;
1304 if (i386_sse_regnum_p (regnum
))
1305 return builtin_type_vec128i
;
1307 if (i386_mmx_regnum_p (regnum
))
1308 return builtin_type_vec64i
;
1310 return builtin_type_int
;
1313 /* Map a cooked register onto a raw register or memory. For the i386,
1314 the MMX registers need to be mapped onto floating point registers. */
1317 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1324 mmxi
= regnum
- MM0_REGNUM
;
1325 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1326 tos
= (fstat
>> 11) & 0x7;
1327 fpi
= (mmxi
+ tos
) % 8;
1329 return (FP0_REGNUM
+ fpi
);
1333 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1334 int regnum
, void *buf
)
1336 if (i386_mmx_regnum_p (regnum
))
1338 char mmx_buf
[MAX_REGISTER_SIZE
];
1339 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1341 /* Extract (always little endian). */
1342 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1343 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1346 regcache_raw_read (regcache
, regnum
, buf
);
1350 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1351 int regnum
, const void *buf
)
1353 if (i386_mmx_regnum_p (regnum
))
1355 char mmx_buf
[MAX_REGISTER_SIZE
];
1356 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1359 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1360 /* ... Modify ... (always little endian). */
1361 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1363 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1366 regcache_raw_write (regcache
, regnum
, buf
);
1370 /* These registers don't have pervasive standard uses. Move them to
1371 i386-tdep.h if necessary. */
1373 #define I386_EBX_REGNUM 3 /* %ebx */
1374 #define I386_ECX_REGNUM 1 /* %ecx */
1375 #define I386_ESI_REGNUM 6 /* %esi */
1376 #define I386_EDI_REGNUM 7 /* %edi */
1378 /* Return the register number of the register allocated by GCC after
1379 REGNUM, or -1 if there is no such register. */
1382 i386_next_regnum (int regnum
)
1384 /* GCC allocates the registers in the order:
1386 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1388 Since storing a variable in %esp doesn't make any sense we return
1389 -1 for %ebp and for %esp itself. */
1390 static int next_regnum
[] =
1392 I386_EDX_REGNUM
, /* Slot for %eax. */
1393 I386_EBX_REGNUM
, /* Slot for %ecx. */
1394 I386_ECX_REGNUM
, /* Slot for %edx. */
1395 I386_ESI_REGNUM
, /* Slot for %ebx. */
1396 -1, -1, /* Slots for %esp and %ebp. */
1397 I386_EDI_REGNUM
, /* Slot for %esi. */
1398 I386_EBP_REGNUM
/* Slot for %edi. */
1401 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1402 return next_regnum
[regnum
];
1407 /* Return nonzero if a value of type TYPE stored in register REGNUM
1408 needs any special handling. */
1411 i386_convert_register_p (int regnum
, struct type
*type
)
1413 int len
= TYPE_LENGTH (type
);
1415 /* Values may be spread across multiple registers. Most debugging
1416 formats aren't expressive enough to specify the locations, so
1417 some heuristics is involved. Right now we only handle types that
1418 have a length that is a multiple of the word size, since GCC
1419 doesn't seem to put any other types into registers. */
1420 if (len
> 4 && len
% 4 == 0)
1422 int last_regnum
= regnum
;
1426 last_regnum
= i386_next_regnum (last_regnum
);
1430 if (last_regnum
!= -1)
1434 return i386_fp_regnum_p (regnum
);
1437 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1438 return its contents in TO. */
1441 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1442 struct type
*type
, void *to
)
1444 int len
= TYPE_LENGTH (type
);
1447 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1448 available in FRAME (i.e. if it wasn't saved)? */
1450 if (i386_fp_regnum_p (regnum
))
1452 i387_register_to_value (frame
, regnum
, type
, to
);
1456 /* Read a value spread accross multiple registers. */
1458 gdb_assert (len
> 4 && len
% 4 == 0);
1462 gdb_assert (regnum
!= -1);
1463 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1465 get_frame_register (frame
, regnum
, buf
);
1466 regnum
= i386_next_regnum (regnum
);
1472 /* Write the contents FROM of a value of type TYPE into register
1473 REGNUM in frame FRAME. */
1476 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1477 struct type
*type
, const void *from
)
1479 int len
= TYPE_LENGTH (type
);
1480 const char *buf
= from
;
1482 if (i386_fp_regnum_p (regnum
))
1484 i387_value_to_register (frame
, regnum
, type
, from
);
1488 /* Write a value spread accross multiple registers. */
1490 gdb_assert (len
> 4 && len
% 4 == 0);
1494 gdb_assert (regnum
!= -1);
1495 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1497 put_frame_register (frame
, regnum
, buf
);
1498 regnum
= i386_next_regnum (regnum
);
1506 #ifdef STATIC_TRANSFORM_NAME
1507 /* SunPRO encodes the static variables. This is not related to C++
1508 mangling, it is done for C too. */
1511 sunpro_static_transform_name (char *name
)
1514 if (IS_STATIC_TRANSFORM_NAME (name
))
1516 /* For file-local statics there will be a period, a bunch of
1517 junk (the contents of which match a string given in the
1518 N_OPT), a period and the name. For function-local statics
1519 there will be a bunch of junk (which seems to change the
1520 second character from 'A' to 'B'), a period, the name of the
1521 function, and the name. So just skip everything before the
1523 p
= strrchr (name
, '.');
1529 #endif /* STATIC_TRANSFORM_NAME */
1532 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1535 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1537 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1539 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1540 struct minimal_symbol
*indsym
=
1541 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1542 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1546 if (strncmp (symname
, "__imp_", 6) == 0
1547 || strncmp (symname
, "_imp_", 5) == 0)
1548 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1551 return 0; /* Not a trampoline. */
1555 /* Return non-zero if PC and NAME show that we are in a signal
1559 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1561 return (name
&& strcmp ("_sigtramp", name
) == 0);
1565 /* We have two flavours of disassembly. The machinery on this page
1566 deals with switching between those. */
1569 i386_print_insn (bfd_vma pc
, disassemble_info
*info
)
1571 gdb_assert (disassembly_flavor
== att_flavor
1572 || disassembly_flavor
== intel_flavor
);
1574 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1575 constified, cast to prevent a compiler warning. */
1576 info
->disassembler_options
= (char *) disassembly_flavor
;
1577 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1579 return print_insn_i386 (pc
, info
);
1583 /* There are a few i386 architecture variants that differ only
1584 slightly from the generic i386 target. For now, we don't give them
1585 their own source file, but include them here. As a consequence,
1586 they'll always be included. */
1588 /* System V Release 4 (SVR4). */
1591 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1593 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1594 currently unknown. */
1595 return (name
&& (strcmp ("_sigreturn", name
) == 0
1596 || strcmp ("_sigacthandler", name
) == 0
1597 || strcmp ("sigvechandler", name
) == 0));
1600 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1601 routine, return the address of the associated sigcontext (ucontext)
1605 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1610 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1611 sp
= extract_unsigned_integer (buf
, 4);
1613 return read_memory_unsigned_integer (sp
+ 8, 4);
1620 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1622 /* DJGPP doesn't have any special frames for signal handlers. */
1630 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1632 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1633 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1636 /* System V Release 4 (SVR4). */
1639 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1641 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1643 /* System V Release 4 uses ELF. */
1644 i386_elf_init_abi (info
, gdbarch
);
1646 /* System V Release 4 has shared libraries. */
1647 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1648 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1650 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1651 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1652 tdep
->sc_pc_offset
= 36 + 14 * 4;
1653 tdep
->sc_sp_offset
= 36 + 17 * 4;
1655 tdep
->jb_pc_offset
= 20;
1661 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1663 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1665 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1667 tdep
->jb_pc_offset
= 36;
1673 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1675 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1677 tdep
->jb_pc_offset
= 24;
1681 /* i386 register groups. In addition to the normal groups, add "mmx"
1684 static struct reggroup
*i386_sse_reggroup
;
1685 static struct reggroup
*i386_mmx_reggroup
;
1688 i386_init_reggroups (void)
1690 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1691 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1695 i386_add_reggroups (struct gdbarch
*gdbarch
)
1697 reggroup_add (gdbarch
, i386_sse_reggroup
);
1698 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1699 reggroup_add (gdbarch
, general_reggroup
);
1700 reggroup_add (gdbarch
, float_reggroup
);
1701 reggroup_add (gdbarch
, all_reggroup
);
1702 reggroup_add (gdbarch
, save_reggroup
);
1703 reggroup_add (gdbarch
, restore_reggroup
);
1704 reggroup_add (gdbarch
, vector_reggroup
);
1705 reggroup_add (gdbarch
, system_reggroup
);
1709 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1710 struct reggroup
*group
)
1712 int sse_regnum_p
= (i386_sse_regnum_p (regnum
)
1713 || i386_mxcsr_regnum_p (regnum
));
1714 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1715 || i386_fpc_regnum_p (regnum
));
1716 int mmx_regnum_p
= (i386_mmx_regnum_p (regnum
));
1718 if (group
== i386_mmx_reggroup
)
1719 return mmx_regnum_p
;
1720 if (group
== i386_sse_reggroup
)
1721 return sse_regnum_p
;
1722 if (group
== vector_reggroup
)
1723 return (mmx_regnum_p
|| sse_regnum_p
);
1724 if (group
== float_reggroup
)
1726 if (group
== general_reggroup
)
1727 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1729 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1733 /* Get the ARGIth function argument for the current function. */
1736 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1739 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1740 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1744 static struct gdbarch
*
1745 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1747 struct gdbarch_tdep
*tdep
;
1748 struct gdbarch
*gdbarch
;
1750 /* If there is already a candidate, use it. */
1751 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1753 return arches
->gdbarch
;
1755 /* Allocate space for the new architecture. */
1756 tdep
= XMALLOC (struct gdbarch_tdep
);
1757 gdbarch
= gdbarch_alloc (&info
, tdep
);
1759 /* The i386 default settings now include the SSE registers.
1760 I386_NUM_XREGS includes mxcsr, and we don't want to count
1761 this as one of the xmm regs -- which is why we subtract one.
1763 Note: kevinb/2003-07-14: Whatever Mark's concerns are about the
1764 FPU registers in the FIXME below apply to the SSE registers as well.
1765 The only problem that I see is that these registers will show up
1766 in "info all-registers" even on CPUs where they don't exist. IMO,
1767 however, if it's a choice between printing them always (even when
1768 they don't exist) or never showing them to the user (even when they
1769 do exist), I prefer the former over the latter. Ideally, of course,
1770 we'd somehow autodetect that we have them (or not) and display them
1771 when we have them and suppress them when we don't.
1773 FIXME: kettenis/20020614: They do include the FPU registers for
1774 now, which probably is not quite right. */
1775 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
1777 tdep
->jb_pc_offset
= -1;
1778 tdep
->struct_return
= pcc_struct_return
;
1779 tdep
->sigtramp_start
= 0;
1780 tdep
->sigtramp_end
= 0;
1781 tdep
->sigcontext_addr
= NULL
;
1782 tdep
->sc_reg_offset
= NULL
;
1783 tdep
->sc_pc_offset
= -1;
1784 tdep
->sc_sp_offset
= -1;
1786 /* The format used for `long double' on almost all i386 targets is
1787 the i387 extended floating-point format. In fact, of all targets
1788 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1789 on having a `long double' that's not `long' at all. */
1790 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1792 /* Although the i387 extended floating-point has only 80 significant
1793 bits, a `long double' actually takes up 96, probably to enforce
1795 set_gdbarch_long_double_bit (gdbarch
, 96);
1797 /* The default ABI includes general-purpose registers,
1798 floating-point registers, and the SSE registers. */
1799 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
1800 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1801 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1803 /* Register numbers of various important registers. */
1804 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1805 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1806 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1807 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1809 /* Use the "default" register numbering scheme for stabs and COFF. */
1810 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1811 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1813 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1814 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1815 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1817 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1818 be in use on any of the supported i386 targets. */
1820 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1822 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1824 /* Call dummy code. */
1825 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1827 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
1828 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
1829 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
1831 set_gdbarch_extract_return_value (gdbarch
, i386_extract_return_value
);
1832 set_gdbarch_store_return_value (gdbarch
, i386_store_return_value
);
1833 set_gdbarch_extract_struct_value_address (gdbarch
,
1834 i386_extract_struct_value_address
);
1835 set_gdbarch_use_struct_convention (gdbarch
, i386_use_struct_convention
);
1837 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
1839 /* Stack grows downward. */
1840 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1842 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
1843 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
1844 set_gdbarch_function_start_offset (gdbarch
, 0);
1846 set_gdbarch_frame_args_skip (gdbarch
, 8);
1847 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
1849 /* Wire in the MMX registers. */
1850 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
1851 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
1852 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
1854 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
1856 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
1858 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
1860 /* Add the i386 register groups. */
1861 i386_add_reggroups (gdbarch
);
1862 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
1864 /* Helper for function argument information. */
1865 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
1867 /* Hook in the DWARF CFI frame unwinder. */
1868 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
1870 frame_base_set_default (gdbarch
, &i386_frame_base
);
1872 /* Hook in ABI-specific overrides, if they have been registered. */
1873 gdbarch_init_osabi (info
, gdbarch
);
1875 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
1876 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
1881 static enum gdb_osabi
1882 i386_coff_osabi_sniffer (bfd
*abfd
)
1884 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
1885 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
1886 return GDB_OSABI_GO32
;
1888 return GDB_OSABI_UNKNOWN
;
1891 static enum gdb_osabi
1892 i386_nlm_osabi_sniffer (bfd
*abfd
)
1894 return GDB_OSABI_NETWARE
;
1898 /* Provide a prototype to silence -Wmissing-prototypes. */
1899 void _initialize_i386_tdep (void);
1902 _initialize_i386_tdep (void)
1904 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
1906 /* Add the variable that controls the disassembly flavor. */
1908 struct cmd_list_element
*new_cmd
;
1910 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
1912 &disassembly_flavor
,
1914 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
1915 and the default value is \"att\".",
1917 add_show_from_set (new_cmd
, &showlist
);
1920 /* Add the variable that controls the convention for returning
1923 struct cmd_list_element
*new_cmd
;
1925 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
1927 &struct_convention
, "\
1928 Set the convention for returning small structs, valid values \
1929 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
1931 add_show_from_set (new_cmd
, &showlist
);
1934 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
1935 i386_coff_osabi_sniffer
);
1936 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
1937 i386_nlm_osabi_sniffer
);
1939 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
1940 i386_svr4_init_abi
);
1941 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
1942 i386_go32_init_abi
);
1943 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
1946 /* Initialize the i386 specific register groups. */
1947 i386_init_reggroups ();