1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
27 #include "dwarf2-frame.h"
29 #include "floatformat.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
39 #include "reggroups.h"
44 #include "trad-frame.h"
46 #include "gdb_assert.h"
47 #include "gdb_string.h"
49 #include "i386-tdep.h"
50 #include "i387-tdep.h"
52 /* Names of the registers. The first 10 registers match the register
53 numbering scheme used by GCC for stabs and DWARF. */
55 static char *i386_register_names
[] =
57 "eax", "ecx", "edx", "ebx",
58 "esp", "ebp", "esi", "edi",
59 "eip", "eflags", "cs", "ss",
60 "ds", "es", "fs", "gs",
61 "st0", "st1", "st2", "st3",
62 "st4", "st5", "st6", "st7",
63 "fctrl", "fstat", "ftag", "fiseg",
64 "fioff", "foseg", "fooff", "fop",
65 "xmm0", "xmm1", "xmm2", "xmm3",
66 "xmm4", "xmm5", "xmm6", "xmm7",
70 static const int i386_num_register_names
=
71 (sizeof (i386_register_names
) / sizeof (*i386_register_names
));
75 static char *i386_mmx_names
[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs
=
82 (sizeof (i386_mmx_names
) / sizeof (i386_mmx_names
[0]));
84 #define MM0_REGNUM NUM_REGS
87 i386_mmx_regnum_p (int regnum
)
89 return (regnum
>= MM0_REGNUM
90 && regnum
< MM0_REGNUM
+ i386_num_mmx_regs
);
96 i386_fp_regnum_p (int regnum
)
98 return (regnum
< NUM_REGS
99 && (FP0_REGNUM
&& FP0_REGNUM
<= regnum
&& regnum
< FPC_REGNUM
));
103 i386_fpc_regnum_p (int regnum
)
105 return (regnum
< NUM_REGS
106 && (FPC_REGNUM
<= regnum
&& regnum
< XMM0_REGNUM
));
112 i386_sse_regnum_p (int regnum
)
114 return (regnum
< NUM_REGS
115 && (XMM0_REGNUM
<= regnum
&& regnum
< MXCSR_REGNUM
));
119 i386_mxcsr_regnum_p (int regnum
)
121 return (regnum
< NUM_REGS
122 && regnum
== MXCSR_REGNUM
);
125 /* Return the name of register REG. */
128 i386_register_name (int reg
)
130 if (i386_mmx_regnum_p (reg
))
131 return i386_mmx_names
[reg
- MM0_REGNUM
];
133 if (reg
>= 0 && reg
< i386_num_register_names
)
134 return i386_register_names
[reg
];
139 /* Convert stabs register number REG to the appropriate register
140 number used by GDB. */
143 i386_stab_reg_to_regnum (int reg
)
145 /* This implements what GCC calls the "default" register map. */
146 if (reg
>= 0 && reg
<= 7)
148 /* General-purpose registers. */
151 else if (reg
>= 12 && reg
<= 19)
153 /* Floating-point registers. */
154 return reg
- 12 + FP0_REGNUM
;
156 else if (reg
>= 21 && reg
<= 28)
159 return reg
- 21 + XMM0_REGNUM
;
161 else if (reg
>= 29 && reg
<= 36)
164 return reg
- 29 + MM0_REGNUM
;
167 /* This will hopefully provoke a warning. */
168 return NUM_REGS
+ NUM_PSEUDO_REGS
;
171 /* Convert DWARF register number REG to the appropriate register
172 number used by GDB. */
175 i386_dwarf_reg_to_regnum (int reg
)
177 /* The DWARF register numbering includes %eip and %eflags, and
178 numbers the floating point registers differently. */
179 if (reg
>= 0 && reg
<= 9)
181 /* General-purpose registers. */
184 else if (reg
>= 11 && reg
<= 18)
186 /* Floating-point registers. */
187 return reg
- 11 + FP0_REGNUM
;
191 /* The SSE and MMX registers have identical numbers as in stabs. */
192 return i386_stab_reg_to_regnum (reg
);
195 /* This will hopefully provoke a warning. */
196 return NUM_REGS
+ NUM_PSEUDO_REGS
;
200 /* This is the variable that is set with "set disassembly-flavor", and
201 its legitimate values. */
202 static const char att_flavor
[] = "att";
203 static const char intel_flavor
[] = "intel";
204 static const char *valid_flavors
[] =
210 static const char *disassembly_flavor
= att_flavor
;
213 /* Use the program counter to determine the contents and size of a
214 breakpoint instruction. Return a pointer to a string of bytes that
215 encode a breakpoint instruction, store the length of the string in
216 *LEN and optionally adjust *PC to point to the correct memory
217 location for inserting the breakpoint.
219 On the i386 we have a single breakpoint that fits in a single byte
220 and can be inserted anywhere.
222 This function is 64-bit safe. */
224 static const unsigned char *
225 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
227 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
229 *len
= sizeof (break_insn
);
233 #ifdef I386_REGNO_TO_SYMMETRY
234 #error "The Sequent Symmetry is no longer supported."
237 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
238 and %esp "belong" to the calling function. Therefore these
239 registers should be saved if they're going to be modified. */
241 /* The maximum number of saved registers. This should include all
242 registers mentioned above, and %eip. */
243 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
245 struct i386_frame_cache
252 /* Saved registers. While trad-frame allocates space for the full
253 NUM_REGS + NUM_PSEUDOREGS, some of the code below cheats and
254 allocates space for only I386_NUM_SAVED_REGS. */
255 struct trad_frame_saved_reg
*saved_regs
;
259 /* Stack space reserved for local variables. */
263 /* Allocate and initialize a frame cache. */
265 static struct i386_frame_cache
*
266 i386_alloc_frame_cache (struct frame_info
*next_frame
)
268 struct i386_frame_cache
*cache
;
271 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
275 cache
->sp_offset
= -4;
278 cache
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
280 cache
->pc_in_eax
= 0;
282 /* Frameless until proven otherwise. */
288 /* If the instruction at PC is a jump, return the address of its
289 target. Otherwise, return PC. */
292 i386_follow_jump (CORE_ADDR pc
)
298 op
= read_memory_unsigned_integer (pc
, 1);
302 op
= read_memory_unsigned_integer (pc
+ 1, 1);
308 /* Relative jump: if data16 == 0, disp32, else disp16. */
311 delta
= read_memory_integer (pc
+ 2, 2);
313 /* Include the size of the jmp instruction (including the
319 delta
= read_memory_integer (pc
+ 1, 4);
321 /* Include the size of the jmp instruction. */
326 /* Relative jump, disp8 (ignore data16). */
327 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
336 /* Check whether PC points at a prologue for a function returning a
337 structure or union. If so, it updates CACHE and returns the
338 address of the first instruction after the code sequence that
339 removes the "hidden" argument from the stack or CURRENT_PC,
340 whichever is smaller. Otherwise, return PC. */
343 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
344 struct i386_frame_cache
*cache
)
346 /* Functions that return a structure or union start with:
349 xchgl %eax, (%esp) 0x87 0x04 0x24
350 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
352 (the System V compiler puts out the second `xchg' instruction,
353 and the assembler doesn't try to optimize it, so the 'sib' form
354 gets generated). This sequence is used to get the address of the
355 return buffer for a function that returns a structure. */
356 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
357 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
358 unsigned char buf
[4];
361 if (current_pc
<= pc
)
364 op
= read_memory_unsigned_integer (pc
, 1);
366 if (op
!= 0x58) /* popl %eax */
369 read_memory (pc
+ 1, buf
, 4);
370 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
373 if (current_pc
== pc
)
375 cache
->sp_offset
+= 4;
379 if (current_pc
== pc
+ 1)
381 cache
->pc_in_eax
= 1;
385 if (buf
[1] == proto1
[1])
392 i386_skip_probe (CORE_ADDR pc
)
394 /* A function may start with
405 unsigned char buf
[8];
408 op
= read_memory_unsigned_integer (pc
, 1);
410 if (op
== 0x68 || op
== 0x6a)
414 /* Skip past the `pushl' instruction; it has either a one-byte or a
415 four-byte operand, depending on the opcode. */
421 /* Read the following 8 bytes, which should be `call _probe' (6
422 bytes) followed by `addl $4,%esp' (2 bytes). */
423 read_memory (pc
+ delta
, buf
, sizeof (buf
));
424 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
425 pc
+= delta
+ sizeof (buf
);
431 /* Check whether PC points at a code that sets up a new stack frame.
432 If so, it updates CACHE and returns the address of the first
433 instruction after the sequence that sets removes the "hidden"
434 argument from the stack or CURRENT_PC, whichever is smaller.
435 Otherwise, return PC. */
438 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
439 struct i386_frame_cache
*cache
)
443 if (current_pc
<= pc
)
446 op
= read_memory_unsigned_integer (pc
, 1);
448 if (op
== 0x55) /* pushl %ebp */
450 /* Take into account that we've executed the `pushl %ebp' that
451 starts this instruction sequence. */
452 cache
->saved_regs
[I386_EBP_REGNUM
].addr
= 0;
453 cache
->sp_offset
+= 4;
455 /* If that's all, return now. */
456 if (current_pc
<= pc
+ 1)
459 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
460 op
= read_memory_unsigned_integer (pc
+ 1, 1);
464 if (read_memory_unsigned_integer (pc
+ 2, 1) != 0xec)
468 if (read_memory_unsigned_integer (pc
+ 2, 1) != 0xe5)
475 /* OK, we actually have a frame. We just don't know how large it is
476 yet. Set its size to zero. We'll adjust it if necessary. */
479 /* If that's all, return now. */
480 if (current_pc
<= pc
+ 3)
483 /* Check for stack adjustment
487 NOTE: You can't subtract a 16 bit immediate from a 32 bit
488 reg, so we don't have to worry about a data16 prefix. */
489 op
= read_memory_unsigned_integer (pc
+ 3, 1);
492 /* `subl' with 8 bit immediate. */
493 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
494 /* Some instruction starting with 0x83 other than `subl'. */
497 /* `subl' with signed byte immediate (though it wouldn't make
498 sense to be negative). */
499 cache
->locals
= read_memory_integer (pc
+ 5, 1);
504 /* Maybe it is `subl' with a 32 bit immedediate. */
505 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
506 /* Some instruction starting with 0x81 other than `subl'. */
509 /* It is `subl' with a 32 bit immediate. */
510 cache
->locals
= read_memory_integer (pc
+ 5, 4);
515 /* Some instruction other than `subl'. */
519 else if (op
== 0xc8) /* enter $XXX */
521 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
528 /* Check whether PC points at code that saves registers on the stack.
529 If so, it updates CACHE and returns the address of the first
530 instruction after the register saves or CURRENT_PC, whichever is
531 smaller. Otherwise, return PC. */
534 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
535 struct i386_frame_cache
*cache
)
537 if (cache
->locals
>= 0)
543 offset
= - 4 - cache
->locals
;
544 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
546 op
= read_memory_unsigned_integer (pc
, 1);
547 if (op
< 0x50 || op
> 0x57)
550 cache
->saved_regs
[op
- 0x50].addr
= offset
;
559 /* Do a full analysis of the prologue at PC and update CACHE
560 accordingly. Bail out early if CURRENT_PC is reached. Return the
561 address where the analysis stopped.
563 We handle these cases:
565 The startup sequence can be at the start of the function, or the
566 function can start with a branch to startup code at the end.
568 %ebp can be set up with either the 'enter' instruction, or "pushl
569 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
570 once used in the System V compiler).
572 Local space is allocated just below the saved %ebp by either the
573 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
574 bit unsigned argument for space to allocate, and the 'addl'
575 instruction could have either a signed byte, or 32 bit immediate.
577 Next, the registers used by this function are pushed. With the
578 System V compiler they will always be in the order: %edi, %esi,
579 %ebx (and sometimes a harmless bug causes it to also save but not
580 restore %eax); however, the code below is willing to see the pushes
581 in any order, and will handle up to 8 of them.
583 If the setup sequence is at the end of the function, then the next
584 instruction will be a branch back to the start. */
587 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
588 struct i386_frame_cache
*cache
)
590 pc
= i386_follow_jump (pc
);
591 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
592 pc
= i386_skip_probe (pc
);
593 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
594 return i386_analyze_register_saves (pc
, current_pc
, cache
);
597 /* Return PC of first real instruction. */
600 i386_skip_prologue (CORE_ADDR start_pc
)
602 static unsigned char pic_pat
[6] =
604 0xe8, 0, 0, 0, 0, /* call 0x0 */
605 0x5b, /* popl %ebx */
607 struct i386_frame_cache cache
;
612 /* Allocate space for the maximum number of saved registers. This
613 should include all registers mentioned above, and %eip. */
614 cache
.saved_regs
= alloca (I386_NUM_SAVED_REGS
615 * sizeof (cache
.saved_regs
[0]));
618 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
619 if (cache
.locals
< 0)
622 /* Found valid frame setup. */
624 /* The native cc on SVR4 in -K PIC mode inserts the following code
625 to get the address of the global offset table (GOT) into register
630 movl %ebx,x(%ebp) (optional)
633 This code is with the rest of the prologue (at the end of the
634 function), so we have to skip it to get to the first real
635 instruction at the start of the function. */
637 for (i
= 0; i
< 6; i
++)
639 op
= read_memory_unsigned_integer (pc
+ i
, 1);
640 if (pic_pat
[i
] != op
)
647 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
649 if (op
== 0x89) /* movl %ebx, x(%ebp) */
651 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
653 if (op
== 0x5d) /* One byte offset from %ebp. */
655 else if (op
== 0x9d) /* Four byte offset from %ebp. */
657 else /* Unexpected instruction. */
660 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
664 if (delta
> 0 && op
== 0x81
665 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
671 return i386_follow_jump (pc
);
674 /* This function is 64-bit safe. */
677 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
681 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
682 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
688 static struct i386_frame_cache
*
689 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
691 struct i386_frame_cache
*cache
;
698 cache
= i386_alloc_frame_cache (next_frame
);
701 /* In principle, for normal frames, %ebp holds the frame pointer,
702 which holds the base address for the current stack frame.
703 However, for functions that don't need it, the frame pointer is
704 optional. For these "frameless" functions the frame pointer is
705 actually the frame pointer of the calling frame. Signal
706 trampolines are just a special case of a "frameless" function.
707 They (usually) share their frame pointer with the frame that was
708 in progress when the signal occurred. */
710 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
711 cache
->base
= extract_unsigned_integer (buf
, 4);
712 if (cache
->base
== 0)
715 /* For normal frames, %eip is stored at 4(%ebp). */
716 cache
->saved_regs
[I386_EIP_REGNUM
].addr
= 4;
718 cache
->pc
= frame_func_unwind (next_frame
);
720 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
722 if (cache
->locals
< 0)
724 /* We didn't find a valid frame, which means that CACHE->base
725 currently holds the frame pointer for our calling frame. If
726 we're at the start of a function, or somewhere half-way its
727 prologue, the function's frame probably hasn't been fully
728 setup yet. Try to reconstruct the base address for the stack
729 frame by looking at the stack pointer. For truly "frameless"
730 functions this might work too. */
732 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
733 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
736 /* Now that we have the base address for the stack frame we can
737 calculate the value of %esp in the calling frame. */
738 cache
->saved_sp
= cache
->base
+ 8;
740 /* Adjust all the saved registers such that they contain addresses
741 instead of offsets. */
742 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
743 if (cache
->saved_regs
[i
].realnum
>= 0
744 && cache
->saved_regs
[i
].addr
!= -1)
745 cache
->saved_regs
[i
].addr
+= cache
->base
;
751 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
752 struct frame_id
*this_id
)
754 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
756 /* This marks the outermost frame. */
757 if (cache
->base
== 0)
760 /* See the end of i386_push_dummy_call. */
761 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
765 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
766 int regnum
, int *optimizedp
,
767 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
768 int *realnump
, void *valuep
)
770 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
772 gdb_assert (regnum
>= 0);
774 /* The System V ABI says that:
776 "The flags register contains the system flags, such as the
777 direction flag and the carry flag. The direction flag must be
778 set to the forward (that is, zero) direction before entry and
779 upon exit from a function. Other user flags have no specified
780 role in the standard calling sequence and are not preserved."
782 To guarantee the "upon exit" part of that statement we fake a
783 saved flags register that has its direction flag cleared.
785 Note that GCC doesn't seem to rely on the fact that the direction
786 flag is cleared after a function return; it always explicitly
787 clears the flag before operations where it matters.
789 FIXME: kettenis/20030316: I'm not quite sure whether this is the
790 right thing to do. The way we fake the flags register here makes
791 it impossible to change it. */
793 if (regnum
== I386_EFLAGS_REGNUM
)
803 /* Clear the direction flag. */
804 frame_unwind_unsigned_register (next_frame
, PS_REGNUM
, &val
);
806 store_unsigned_integer (valuep
, 4, val
);
812 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
814 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
815 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
819 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
827 /* Store the value. */
828 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
833 trad_frame_prev_register (next_frame
, cache
->saved_regs
, regnum
,
834 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
837 static const struct frame_unwind i386_frame_unwind
=
841 i386_frame_prev_register
844 static const struct frame_unwind
*
845 i386_frame_p (CORE_ADDR pc
)
847 return &i386_frame_unwind
;
851 /* Signal trampolines. */
853 static struct i386_frame_cache
*
854 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
856 struct i386_frame_cache
*cache
;
857 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
864 cache
= i386_alloc_frame_cache (next_frame
);
866 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
867 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
869 addr
= tdep
->sigcontext_addr (next_frame
);
870 if (tdep
->sc_reg_offset
)
874 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
876 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
877 if (tdep
->sc_reg_offset
[i
] != -1)
878 cache
->saved_regs
[i
].addr
= addr
+ tdep
->sc_reg_offset
[i
];
882 cache
->saved_regs
[I386_EIP_REGNUM
].addr
= addr
+ tdep
->sc_pc_offset
;
883 cache
->saved_regs
[I386_ESP_REGNUM
].addr
= addr
+ tdep
->sc_sp_offset
;
891 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
892 struct frame_id
*this_id
)
894 struct i386_frame_cache
*cache
=
895 i386_sigtramp_frame_cache (next_frame
, this_cache
);
897 /* See the end of i386_push_dummy_call. */
898 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
902 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
904 int regnum
, int *optimizedp
,
905 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
906 int *realnump
, void *valuep
)
908 /* Make sure we've initialized the cache. */
909 i386_sigtramp_frame_cache (next_frame
, this_cache
);
911 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
912 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
915 static const struct frame_unwind i386_sigtramp_frame_unwind
=
918 i386_sigtramp_frame_this_id
,
919 i386_sigtramp_frame_prev_register
922 static const struct frame_unwind
*
923 i386_sigtramp_frame_p (CORE_ADDR pc
)
927 /* We shouldn't even bother to try if the OSABI didn't register
928 a sigcontext_addr handler. */
929 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
932 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
933 if (PC_IN_SIGTRAMP (pc
, name
))
934 return &i386_sigtramp_frame_unwind
;
941 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
943 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
948 static const struct frame_base i386_frame_base
=
951 i386_frame_base_address
,
952 i386_frame_base_address
,
953 i386_frame_base_address
956 static struct frame_id
957 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
962 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
963 fp
= extract_unsigned_integer (buf
, 4);
965 /* See the end of i386_push_dummy_call. */
966 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
970 /* Figure out where the longjmp will land. Slurp the args out of the
971 stack. We expect the first arg to be a pointer to the jmp_buf
972 structure from which we extract the address that we will land at.
973 This address is copied into PC. This routine returns non-zero on
976 This function is 64-bit safe. */
979 i386_get_longjmp_target (CORE_ADDR
*pc
)
982 CORE_ADDR sp
, jb_addr
;
983 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
984 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
986 /* If JB_PC_OFFSET is -1, we have no way to find out where the
987 longjmp will land. */
988 if (jb_pc_offset
== -1)
991 sp
= read_register (SP_REGNUM
);
992 if (target_read_memory (sp
+ len
, buf
, len
))
995 jb_addr
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
996 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
999 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1005 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1006 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1007 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1008 CORE_ADDR struct_addr
)
1013 /* Push arguments in reverse order. */
1014 for (i
= nargs
- 1; i
>= 0; i
--)
1016 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1018 /* The System V ABI says that:
1020 "An argument's size is increased, if necessary, to make it a
1021 multiple of [32-bit] words. This may require tail padding,
1022 depending on the size of the argument."
1024 This makes sure the stack says word-aligned. */
1025 sp
-= (len
+ 3) & ~3;
1026 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1029 /* Push value address. */
1033 store_unsigned_integer (buf
, 4, struct_addr
);
1034 write_memory (sp
, buf
, 4);
1037 /* Store return address. */
1039 store_unsigned_integer (buf
, 4, bp_addr
);
1040 write_memory (sp
, buf
, 4);
1042 /* Finally, update the stack pointer... */
1043 store_unsigned_integer (buf
, 4, sp
);
1044 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1046 /* ...and fake a frame pointer. */
1047 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1049 /* MarkK wrote: This "+ 8" is all over the place:
1050 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1051 i386_unwind_dummy_id). It's there, since all frame unwinders for
1052 a given target have to agree (within a certain margin) on the
1053 defenition of the stack address of a frame. Otherwise
1054 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1055 stack address *before* the function call as a frame's CFA. On
1056 the i386, when %ebp is used as a frame pointer, the offset
1057 between the contents %ebp and the CFA as defined by GCC. */
1061 /* These registers are used for returning integers (and on some
1062 targets also for returning `struct' and `union' values when their
1063 size and alignment match an integer type). */
1064 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1065 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1067 /* Extract from an array REGBUF containing the (raw) register state, a
1068 function return value of TYPE, and copy that, in virtual format,
1072 i386_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1075 bfd_byte
*valbuf
= dst
;
1076 int len
= TYPE_LENGTH (type
);
1077 char buf
[I386_MAX_REGISTER_SIZE
];
1079 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1080 && TYPE_NFIELDS (type
) == 1)
1082 i386_extract_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1086 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1090 warning ("Cannot find floating-point return value.");
1091 memset (valbuf
, 0, len
);
1095 /* Floating-point return values can be found in %st(0). Convert
1096 its contents to the desired type. This is probably not
1097 exactly how it would happen on the target itself, but it is
1098 the best we can do. */
1099 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1100 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1104 int low_size
= REGISTER_RAW_SIZE (LOW_RETURN_REGNUM
);
1105 int high_size
= REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM
);
1107 if (len
<= low_size
)
1109 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1110 memcpy (valbuf
, buf
, len
);
1112 else if (len
<= (low_size
+ high_size
))
1114 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1115 memcpy (valbuf
, buf
, low_size
);
1116 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1117 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1120 internal_error (__FILE__
, __LINE__
,
1121 "Cannot extract return value of %d bytes long.", len
);
1125 /* Write into the appropriate registers a function return value stored
1126 in VALBUF of type TYPE, given in virtual format. */
1129 i386_store_return_value (struct type
*type
, struct regcache
*regcache
,
1132 int len
= TYPE_LENGTH (type
);
1134 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1135 && TYPE_NFIELDS (type
) == 1)
1137 i386_store_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1141 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1144 char buf
[FPU_REG_RAW_SIZE
];
1148 warning ("Cannot set floating-point return value.");
1152 /* Returning floating-point values is a bit tricky. Apart from
1153 storing the return value in %st(0), we have to simulate the
1154 state of the FPU at function return point. */
1156 /* Convert the value found in VALBUF to the extended
1157 floating-point format used by the FPU. This is probably
1158 not exactly how it would happen on the target itself, but
1159 it is the best we can do. */
1160 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1161 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1163 /* Set the top of the floating-point register stack to 7. The
1164 actual value doesn't really matter, but 7 is what a normal
1165 function return would end up with if the program started out
1166 with a freshly initialized FPU. */
1167 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1169 regcache_raw_write_unsigned (regcache
, FSTAT_REGNUM
, fstat
);
1171 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1172 the floating-point register stack to 7, the appropriate value
1173 for the tag word is 0x3fff. */
1174 regcache_raw_write_unsigned (regcache
, FTAG_REGNUM
, 0x3fff);
1178 int low_size
= REGISTER_RAW_SIZE (LOW_RETURN_REGNUM
);
1179 int high_size
= REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM
);
1181 if (len
<= low_size
)
1182 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1183 else if (len
<= (low_size
+ high_size
))
1185 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1186 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1187 len
- low_size
, (char *) valbuf
+ low_size
);
1190 internal_error (__FILE__
, __LINE__
,
1191 "Cannot store return value of %d bytes long.", len
);
1195 /* Extract from REGCACHE, which contains the (raw) register state, the
1196 address in which a function should return its structure value, as a
1200 i386_extract_struct_value_address (struct regcache
*regcache
)
1204 regcache_cooked_read (regcache
, I386_EAX_REGNUM
, buf
);
1205 return extract_unsigned_integer (buf
, 4);
1209 /* This is the variable that is set with "set struct-convention", and
1210 its legitimate values. */
1211 static const char default_struct_convention
[] = "default";
1212 static const char pcc_struct_convention
[] = "pcc";
1213 static const char reg_struct_convention
[] = "reg";
1214 static const char *valid_conventions
[] =
1216 default_struct_convention
,
1217 pcc_struct_convention
,
1218 reg_struct_convention
,
1221 static const char *struct_convention
= default_struct_convention
;
1224 i386_use_struct_convention (int gcc_p
, struct type
*type
)
1226 enum struct_return struct_return
;
1228 if (struct_convention
== default_struct_convention
)
1229 struct_return
= gdbarch_tdep (current_gdbarch
)->struct_return
;
1230 else if (struct_convention
== pcc_struct_convention
)
1231 struct_return
= pcc_struct_return
;
1233 struct_return
= reg_struct_return
;
1235 return generic_use_struct_convention (struct_return
== reg_struct_return
,
1240 /* Return the GDB type object for the "standard" data type of data in
1241 register REGNUM. Perhaps %esi and %edi should go here, but
1242 potentially they could be used for things other than address. */
1244 static struct type
*
1245 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1247 if (regnum
== I386_EIP_REGNUM
1248 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1249 return lookup_pointer_type (builtin_type_void
);
1251 if (i386_fp_regnum_p (regnum
))
1252 return builtin_type_i387_ext
;
1254 if (i386_sse_regnum_p (regnum
))
1255 return builtin_type_vec128i
;
1257 if (i386_mmx_regnum_p (regnum
))
1258 return builtin_type_vec64i
;
1260 return builtin_type_int
;
1263 /* Map a cooked register onto a raw register or memory. For the i386,
1264 the MMX registers need to be mapped onto floating point registers. */
1267 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1274 mmxi
= regnum
- MM0_REGNUM
;
1275 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1276 tos
= (fstat
>> 11) & 0x7;
1277 fpi
= (mmxi
+ tos
) % 8;
1279 return (FP0_REGNUM
+ fpi
);
1283 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1284 int regnum
, void *buf
)
1286 if (i386_mmx_regnum_p (regnum
))
1288 char mmx_buf
[MAX_REGISTER_SIZE
];
1289 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1291 /* Extract (always little endian). */
1292 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1293 memcpy (buf
, mmx_buf
, REGISTER_RAW_SIZE (regnum
));
1296 regcache_raw_read (regcache
, regnum
, buf
);
1300 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1301 int regnum
, const void *buf
)
1303 if (i386_mmx_regnum_p (regnum
))
1305 char mmx_buf
[MAX_REGISTER_SIZE
];
1306 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1309 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1310 /* ... Modify ... (always little endian). */
1311 memcpy (mmx_buf
, buf
, REGISTER_RAW_SIZE (regnum
));
1313 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1316 regcache_raw_write (regcache
, regnum
, buf
);
1320 /* These registers don't have pervasive standard uses. Move them to
1321 i386-tdep.h if necessary. */
1323 #define I386_EBX_REGNUM 3 /* %ebx */
1324 #define I386_ECX_REGNUM 1 /* %ecx */
1325 #define I386_ESI_REGNUM 6 /* %esi */
1326 #define I386_EDI_REGNUM 7 /* %edi */
1328 /* Return the register number of the register allocated by GCC after
1329 REGNUM, or -1 if there is no such register. */
1332 i386_next_regnum (int regnum
)
1334 /* GCC allocates the registers in the order:
1336 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1338 Since storing a variable in %esp doesn't make any sense we return
1339 -1 for %ebp and for %esp itself. */
1340 static int next_regnum
[] =
1342 I386_EDX_REGNUM
, /* Slot for %eax. */
1343 I386_EBX_REGNUM
, /* Slot for %ecx. */
1344 I386_ECX_REGNUM
, /* Slot for %edx. */
1345 I386_ESI_REGNUM
, /* Slot for %ebx. */
1346 -1, -1, /* Slots for %esp and %ebp. */
1347 I386_EDI_REGNUM
, /* Slot for %esi. */
1348 I386_EBP_REGNUM
/* Slot for %edi. */
1351 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1352 return next_regnum
[regnum
];
1357 /* Return nonzero if a value of type TYPE stored in register REGNUM
1358 needs any special handling. */
1361 i386_convert_register_p (int regnum
, struct type
*type
)
1363 int len
= TYPE_LENGTH (type
);
1365 /* Values may be spread across multiple registers. Most debugging
1366 formats aren't expressive enough to specify the locations, so
1367 some heuristics is involved. Right now we only handle types that
1368 have a length that is a multiple of the word size, since GCC
1369 doesn't seem to put any other types into registers. */
1370 if (len
> 4 && len
% 4 == 0)
1372 int last_regnum
= regnum
;
1376 last_regnum
= i386_next_regnum (last_regnum
);
1380 if (last_regnum
!= -1)
1384 return i386_fp_regnum_p (regnum
);
1387 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1388 return its contents in TO. */
1391 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1392 struct type
*type
, void *to
)
1394 int len
= TYPE_LENGTH (type
);
1397 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1398 available in FRAME (i.e. if it wasn't saved)? */
1400 if (i386_fp_regnum_p (regnum
))
1402 i387_register_to_value (frame
, regnum
, type
, to
);
1406 /* Read a value spread accross multiple registers. */
1408 gdb_assert (len
> 4 && len
% 4 == 0);
1412 gdb_assert (regnum
!= -1);
1413 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1415 frame_read_register (frame
, regnum
, buf
);
1416 regnum
= i386_next_regnum (regnum
);
1422 /* Write the contents FROM of a value of type TYPE into register
1423 REGNUM in frame FRAME. */
1426 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1427 struct type
*type
, const void *from
)
1429 int len
= TYPE_LENGTH (type
);
1430 const char *buf
= from
;
1432 if (i386_fp_regnum_p (regnum
))
1434 i387_value_to_register (frame
, regnum
, type
, from
);
1438 /* Write a value spread accross multiple registers. */
1440 gdb_assert (len
> 4 && len
% 4 == 0);
1444 gdb_assert (regnum
!= -1);
1445 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1447 put_frame_register (frame
, regnum
, buf
);
1448 regnum
= i386_next_regnum (regnum
);
1456 #ifdef STATIC_TRANSFORM_NAME
1457 /* SunPRO encodes the static variables. This is not related to C++
1458 mangling, it is done for C too. */
1461 sunpro_static_transform_name (char *name
)
1464 if (IS_STATIC_TRANSFORM_NAME (name
))
1466 /* For file-local statics there will be a period, a bunch of
1467 junk (the contents of which match a string given in the
1468 N_OPT), a period and the name. For function-local statics
1469 there will be a bunch of junk (which seems to change the
1470 second character from 'A' to 'B'), a period, the name of the
1471 function, and the name. So just skip everything before the
1473 p
= strrchr (name
, '.');
1479 #endif /* STATIC_TRANSFORM_NAME */
1482 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1485 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1487 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1489 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1490 struct minimal_symbol
*indsym
=
1491 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1492 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1496 if (strncmp (symname
, "__imp_", 6) == 0
1497 || strncmp (symname
, "_imp_", 5) == 0)
1498 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1501 return 0; /* Not a trampoline. */
1505 /* Return non-zero if PC and NAME show that we are in a signal
1509 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1511 return (name
&& strcmp ("_sigtramp", name
) == 0);
1515 /* We have two flavours of disassembly. The machinery on this page
1516 deals with switching between those. */
1519 i386_print_insn (bfd_vma pc
, disassemble_info
*info
)
1521 gdb_assert (disassembly_flavor
== att_flavor
1522 || disassembly_flavor
== intel_flavor
);
1524 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1525 constified, cast to prevent a compiler warning. */
1526 info
->disassembler_options
= (char *) disassembly_flavor
;
1527 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1529 return print_insn_i386 (pc
, info
);
1533 /* There are a few i386 architecture variants that differ only
1534 slightly from the generic i386 target. For now, we don't give them
1535 their own source file, but include them here. As a consequence,
1536 they'll always be included. */
1538 /* System V Release 4 (SVR4). */
1541 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1543 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1544 currently unknown. */
1545 return (name
&& (strcmp ("_sigreturn", name
) == 0
1546 || strcmp ("_sigacthandler", name
) == 0
1547 || strcmp ("sigvechandler", name
) == 0));
1550 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1551 routine, return the address of the associated sigcontext (ucontext)
1555 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1560 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1561 sp
= extract_unsigned_integer (buf
, 4);
1563 return read_memory_unsigned_integer (sp
+ 8, 4);
1570 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1572 /* DJGPP doesn't have any special frames for signal handlers. */
1580 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1582 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1583 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1586 /* System V Release 4 (SVR4). */
1589 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1591 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1593 /* System V Release 4 uses ELF. */
1594 i386_elf_init_abi (info
, gdbarch
);
1596 /* System V Release 4 has shared libraries. */
1597 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1598 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1600 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1601 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1602 tdep
->sc_pc_offset
= 36 + 14 * 4;
1603 tdep
->sc_sp_offset
= 36 + 17 * 4;
1605 tdep
->jb_pc_offset
= 20;
1611 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1613 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1615 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1617 tdep
->jb_pc_offset
= 36;
1623 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1625 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1627 tdep
->jb_pc_offset
= 24;
1631 /* i386 register groups. In addition to the normal groups, add "mmx"
1634 static struct reggroup
*i386_sse_reggroup
;
1635 static struct reggroup
*i386_mmx_reggroup
;
1638 i386_init_reggroups (void)
1640 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1641 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1645 i386_add_reggroups (struct gdbarch
*gdbarch
)
1647 reggroup_add (gdbarch
, i386_sse_reggroup
);
1648 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1649 reggroup_add (gdbarch
, general_reggroup
);
1650 reggroup_add (gdbarch
, float_reggroup
);
1651 reggroup_add (gdbarch
, all_reggroup
);
1652 reggroup_add (gdbarch
, save_reggroup
);
1653 reggroup_add (gdbarch
, restore_reggroup
);
1654 reggroup_add (gdbarch
, vector_reggroup
);
1655 reggroup_add (gdbarch
, system_reggroup
);
1659 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1660 struct reggroup
*group
)
1662 int sse_regnum_p
= (i386_sse_regnum_p (regnum
)
1663 || i386_mxcsr_regnum_p (regnum
));
1664 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1665 || i386_fpc_regnum_p (regnum
));
1666 int mmx_regnum_p
= (i386_mmx_regnum_p (regnum
));
1668 if (group
== i386_mmx_reggroup
)
1669 return mmx_regnum_p
;
1670 if (group
== i386_sse_reggroup
)
1671 return sse_regnum_p
;
1672 if (group
== vector_reggroup
)
1673 return (mmx_regnum_p
|| sse_regnum_p
);
1674 if (group
== float_reggroup
)
1676 if (group
== general_reggroup
)
1677 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1679 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1683 /* Get the ith function argument for the current function. */
1685 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1689 frame_read_register (frame
, SP_REGNUM
, &stack
);
1690 return read_memory_unsigned_integer (stack
+ (4 * (argi
+ 1)), 4);
1694 static struct gdbarch
*
1695 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1697 struct gdbarch_tdep
*tdep
;
1698 struct gdbarch
*gdbarch
;
1700 /* If there is already a candidate, use it. */
1701 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1703 return arches
->gdbarch
;
1705 /* Allocate space for the new architecture. */
1706 tdep
= XMALLOC (struct gdbarch_tdep
);
1707 gdbarch
= gdbarch_alloc (&info
, tdep
);
1709 /* The i386 default settings don't include the SSE registers.
1710 FIXME: kettenis/20020614: They do include the FPU registers for
1711 now, which probably is not quite right. */
1712 tdep
->num_xmm_regs
= 0;
1714 tdep
->jb_pc_offset
= -1;
1715 tdep
->struct_return
= pcc_struct_return
;
1716 tdep
->sigtramp_start
= 0;
1717 tdep
->sigtramp_end
= 0;
1718 tdep
->sigcontext_addr
= NULL
;
1719 tdep
->sc_reg_offset
= NULL
;
1720 tdep
->sc_pc_offset
= -1;
1721 tdep
->sc_sp_offset
= -1;
1723 /* The format used for `long double' on almost all i386 targets is
1724 the i387 extended floating-point format. In fact, of all targets
1725 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1726 on having a `long double' that's not `long' at all. */
1727 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1729 /* Although the i387 extended floating-point has only 80 significant
1730 bits, a `long double' actually takes up 96, probably to enforce
1732 set_gdbarch_long_double_bit (gdbarch
, 96);
1734 /* The default ABI includes general-purpose registers and
1735 floating-point registers. */
1736 set_gdbarch_num_regs (gdbarch
, I386_NUM_GREGS
+ I386_NUM_FREGS
);
1737 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1738 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1740 /* Register numbers of various important registers. */
1741 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1742 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1743 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1744 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1746 /* Use the "default" register numbering scheme for stabs and COFF. */
1747 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1748 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1750 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1751 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1752 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1754 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1755 be in use on any of the supported i386 targets. */
1757 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1759 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1761 /* Call dummy code. */
1762 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1764 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
1765 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
1766 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
1768 set_gdbarch_extract_return_value (gdbarch
, i386_extract_return_value
);
1769 set_gdbarch_store_return_value (gdbarch
, i386_store_return_value
);
1770 set_gdbarch_extract_struct_value_address (gdbarch
,
1771 i386_extract_struct_value_address
);
1772 set_gdbarch_use_struct_convention (gdbarch
, i386_use_struct_convention
);
1774 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
1776 /* Stack grows downward. */
1777 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1779 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
1780 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
1781 set_gdbarch_function_start_offset (gdbarch
, 0);
1783 set_gdbarch_frame_args_skip (gdbarch
, 8);
1784 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
1786 /* Wire in the MMX registers. */
1787 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
1788 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
1789 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
1791 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
1793 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
1795 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
1797 /* Add the i386 register groups. */
1798 i386_add_reggroups (gdbarch
);
1799 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
1801 /* Helper for function argument information. */
1802 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
1804 /* Hook in the DWARF CFI frame unwinder. */
1805 frame_unwind_append_predicate (gdbarch
, dwarf2_frame_p
);
1806 set_gdbarch_dwarf2_build_frame_info (gdbarch
, dwarf2_build_frame_info
);
1808 frame_base_set_default (gdbarch
, &i386_frame_base
);
1810 /* Hook in ABI-specific overrides, if they have been registered. */
1811 gdbarch_init_osabi (info
, gdbarch
);
1813 frame_unwind_append_predicate (gdbarch
, i386_sigtramp_frame_p
);
1814 frame_unwind_append_predicate (gdbarch
, i386_frame_p
);
1819 static enum gdb_osabi
1820 i386_coff_osabi_sniffer (bfd
*abfd
)
1822 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
1823 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
1824 return GDB_OSABI_GO32
;
1826 return GDB_OSABI_UNKNOWN
;
1829 static enum gdb_osabi
1830 i386_nlm_osabi_sniffer (bfd
*abfd
)
1832 return GDB_OSABI_NETWARE
;
1836 /* Provide a prototype to silence -Wmissing-prototypes. */
1837 void _initialize_i386_tdep (void);
1840 _initialize_i386_tdep (void)
1842 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
1844 /* Add the variable that controls the disassembly flavor. */
1846 struct cmd_list_element
*new_cmd
;
1848 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
1850 &disassembly_flavor
,
1852 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
1853 and the default value is \"att\".",
1855 add_show_from_set (new_cmd
, &showlist
);
1858 /* Add the variable that controls the convention for returning
1861 struct cmd_list_element
*new_cmd
;
1863 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
1865 &struct_convention
, "\
1866 Set the convention for returning small structs, valid values \
1867 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
1869 add_show_from_set (new_cmd
, &showlist
);
1872 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
1873 i386_coff_osabi_sniffer
);
1874 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
1875 i386_nlm_osabi_sniffer
);
1877 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
1878 i386_svr4_init_abi
);
1879 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
1880 i386_go32_init_abi
);
1881 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
1884 /* Initialize the i386 specific register groups. */
1885 i386_init_reggroups ();