1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
25 #include "dummy-frame.h"
26 #include "dwarf2-frame.h"
29 #include "frame-base.h"
30 #include "frame-unwind.h"
38 #include "reggroups.h"
46 #include "gdb_assert.h"
47 #include "gdb_string.h"
49 #include "i386-tdep.h"
50 #include "i387-tdep.h"
54 static char *i386_register_names
[] =
56 "eax", "ecx", "edx", "ebx",
57 "esp", "ebp", "esi", "edi",
58 "eip", "eflags", "cs", "ss",
59 "ds", "es", "fs", "gs",
60 "st0", "st1", "st2", "st3",
61 "st4", "st5", "st6", "st7",
62 "fctrl", "fstat", "ftag", "fiseg",
63 "fioff", "foseg", "fooff", "fop",
64 "xmm0", "xmm1", "xmm2", "xmm3",
65 "xmm4", "xmm5", "xmm6", "xmm7",
69 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
71 /* Register names for MMX pseudo-registers. */
73 static char *i386_mmx_names
[] =
75 "mm0", "mm1", "mm2", "mm3",
76 "mm4", "mm5", "mm6", "mm7"
79 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
82 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
84 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
89 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
95 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
97 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
99 if (I387_NUM_XMM_REGS (tdep
) == 0)
102 return (I387_XMM0_REGNUM (tdep
) <= regnum
103 && regnum
< I387_MXCSR_REGNUM (tdep
));
107 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
109 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
111 if (I387_NUM_XMM_REGS (tdep
) == 0)
114 return (regnum
== I387_MXCSR_REGNUM (tdep
));
120 i386_fp_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
122 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
124 if (I387_ST0_REGNUM (tdep
) < 0)
127 return (I387_ST0_REGNUM (tdep
) <= regnum
128 && regnum
< I387_FCTRL_REGNUM (tdep
));
132 i386_fpc_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
134 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
136 if (I387_ST0_REGNUM (tdep
) < 0)
139 return (I387_FCTRL_REGNUM (tdep
) <= regnum
140 && regnum
< I387_XMM0_REGNUM (tdep
));
143 /* Return the name of register REGNUM. */
146 i386_register_name (struct gdbarch
*gdbarch
, int regnum
)
148 if (i386_mmx_regnum_p (gdbarch
, regnum
))
149 return i386_mmx_names
[regnum
- I387_MM0_REGNUM (gdbarch_tdep (gdbarch
))];
151 if (regnum
>= 0 && regnum
< i386_num_register_names
)
152 return i386_register_names
[regnum
];
157 /* Convert a dbx register number REG to the appropriate register
158 number used by GDB. */
161 i386_dbx_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
163 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
165 /* This implements what GCC calls the "default" register map
166 (dbx_register_map[]). */
168 if (reg
>= 0 && reg
<= 7)
170 /* General-purpose registers. The debug info calls %ebp
171 register 4, and %esp register 5. */
178 else if (reg
>= 12 && reg
<= 19)
180 /* Floating-point registers. */
181 return reg
- 12 + I387_ST0_REGNUM (tdep
);
183 else if (reg
>= 21 && reg
<= 28)
186 return reg
- 21 + I387_XMM0_REGNUM (tdep
);
188 else if (reg
>= 29 && reg
<= 36)
191 return reg
- 29 + I387_MM0_REGNUM (tdep
);
194 /* This will hopefully provoke a warning. */
195 return gdbarch_num_regs (gdbarch
) + gdbarch_num_pseudo_regs (gdbarch
);
198 /* Convert SVR4 register number REG to the appropriate register number
202 i386_svr4_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
204 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
206 /* This implements the GCC register map that tries to be compatible
207 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
209 /* The SVR4 register numbering includes %eip and %eflags, and
210 numbers the floating point registers differently. */
211 if (reg
>= 0 && reg
<= 9)
213 /* General-purpose registers. */
216 else if (reg
>= 11 && reg
<= 18)
218 /* Floating-point registers. */
219 return reg
- 11 + I387_ST0_REGNUM (tdep
);
221 else if (reg
>= 21 && reg
<= 36)
223 /* The SSE and MMX registers have the same numbers as with dbx. */
224 return i386_dbx_reg_to_regnum (gdbarch
, reg
);
229 case 37: return I387_FCTRL_REGNUM (tdep
);
230 case 38: return I387_FSTAT_REGNUM (tdep
);
231 case 39: return I387_MXCSR_REGNUM (tdep
);
232 case 40: return I386_ES_REGNUM
;
233 case 41: return I386_CS_REGNUM
;
234 case 42: return I386_SS_REGNUM
;
235 case 43: return I386_DS_REGNUM
;
236 case 44: return I386_FS_REGNUM
;
237 case 45: return I386_GS_REGNUM
;
240 /* This will hopefully provoke a warning. */
241 return gdbarch_num_regs (gdbarch
) + gdbarch_num_pseudo_regs (gdbarch
);
246 /* This is the variable that is set with "set disassembly-flavor", and
247 its legitimate values. */
248 static const char att_flavor
[] = "att";
249 static const char intel_flavor
[] = "intel";
250 static const char *valid_flavors
[] =
256 static const char *disassembly_flavor
= att_flavor
;
259 /* Use the program counter to determine the contents and size of a
260 breakpoint instruction. Return a pointer to a string of bytes that
261 encode a breakpoint instruction, store the length of the string in
262 *LEN and optionally adjust *PC to point to the correct memory
263 location for inserting the breakpoint.
265 On the i386 we have a single breakpoint that fits in a single byte
266 and can be inserted anywhere.
268 This function is 64-bit safe. */
270 static const gdb_byte
*
271 i386_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pc
, int *len
)
273 static gdb_byte break_insn
[] = { 0xcc }; /* int 3 */
275 *len
= sizeof (break_insn
);
279 #ifdef I386_REGNO_TO_SYMMETRY
280 #error "The Sequent Symmetry is no longer supported."
283 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
284 and %esp "belong" to the calling function. Therefore these
285 registers should be saved if they're going to be modified. */
287 /* The maximum number of saved registers. This should include all
288 registers mentioned above, and %eip. */
289 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
291 struct i386_frame_cache
298 /* Saved registers. */
299 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
304 /* Stack space reserved for local variables. */
308 /* Allocate and initialize a frame cache. */
310 static struct i386_frame_cache
*
311 i386_alloc_frame_cache (void)
313 struct i386_frame_cache
*cache
;
316 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
320 cache
->sp_offset
= -4;
323 /* Saved registers. We initialize these to -1 since zero is a valid
324 offset (that's where %ebp is supposed to be stored). */
325 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
326 cache
->saved_regs
[i
] = -1;
328 cache
->stack_align
= 0;
329 cache
->pc_in_eax
= 0;
331 /* Frameless until proven otherwise. */
337 /* If the instruction at PC is a jump, return the address of its
338 target. Otherwise, return PC. */
341 i386_follow_jump (CORE_ADDR pc
)
347 target_read_memory (pc
, &op
, 1);
351 op
= read_memory_unsigned_integer (pc
+ 1, 1);
357 /* Relative jump: if data16 == 0, disp32, else disp16. */
360 delta
= read_memory_integer (pc
+ 2, 2);
362 /* Include the size of the jmp instruction (including the
368 delta
= read_memory_integer (pc
+ 1, 4);
370 /* Include the size of the jmp instruction. */
375 /* Relative jump, disp8 (ignore data16). */
376 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
385 /* Check whether PC points at a prologue for a function returning a
386 structure or union. If so, it updates CACHE and returns the
387 address of the first instruction after the code sequence that
388 removes the "hidden" argument from the stack or CURRENT_PC,
389 whichever is smaller. Otherwise, return PC. */
392 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
393 struct i386_frame_cache
*cache
)
395 /* Functions that return a structure or union start with:
398 xchgl %eax, (%esp) 0x87 0x04 0x24
399 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
401 (the System V compiler puts out the second `xchg' instruction,
402 and the assembler doesn't try to optimize it, so the 'sib' form
403 gets generated). This sequence is used to get the address of the
404 return buffer for a function that returns a structure. */
405 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
406 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
410 if (current_pc
<= pc
)
413 target_read_memory (pc
, &op
, 1);
415 if (op
!= 0x58) /* popl %eax */
418 target_read_memory (pc
+ 1, buf
, 4);
419 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
422 if (current_pc
== pc
)
424 cache
->sp_offset
+= 4;
428 if (current_pc
== pc
+ 1)
430 cache
->pc_in_eax
= 1;
434 if (buf
[1] == proto1
[1])
441 i386_skip_probe (CORE_ADDR pc
)
443 /* A function may start with
457 target_read_memory (pc
, &op
, 1);
459 if (op
== 0x68 || op
== 0x6a)
463 /* Skip past the `pushl' instruction; it has either a one-byte or a
464 four-byte operand, depending on the opcode. */
470 /* Read the following 8 bytes, which should be `call _probe' (6
471 bytes) followed by `addl $4,%esp' (2 bytes). */
472 read_memory (pc
+ delta
, buf
, sizeof (buf
));
473 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
474 pc
+= delta
+ sizeof (buf
);
480 /* GCC 4.1 and later, can put code in the prologue to realign the
481 stack pointer. Check whether PC points to such code, and update
482 CACHE accordingly. Return the first instruction after the code
483 sequence or CURRENT_PC, whichever is smaller. If we don't
484 recognize the code, return PC. */
487 i386_analyze_stack_align (CORE_ADDR pc
, CORE_ADDR current_pc
,
488 struct i386_frame_cache
*cache
)
490 /* The register used by the compiler to perform the stack re-alignment
491 is, in order of preference, either %ecx, %edx, or %eax. GCC should
492 never use %ebx as it always treats it as callee-saved, whereas
493 the compiler can only use caller-saved registers. */
494 static const gdb_byte insns_ecx
[10] = {
495 0x8d, 0x4c, 0x24, 0x04, /* leal 4(%esp), %ecx */
496 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
497 0xff, 0x71, 0xfc /* pushl -4(%ecx) */
499 static const gdb_byte insns_edx
[10] = {
500 0x8d, 0x54, 0x24, 0x04, /* leal 4(%esp), %edx */
501 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
502 0xff, 0x72, 0xfc /* pushl -4(%edx) */
504 static const gdb_byte insns_eax
[10] = {
505 0x8d, 0x44, 0x24, 0x04, /* leal 4(%esp), %eax */
506 0x83, 0xe4, 0xf0, /* andl $-16, %esp */
507 0xff, 0x70, 0xfc /* pushl -4(%eax) */
511 if (target_read_memory (pc
, buf
, sizeof buf
)
512 || (memcmp (buf
, insns_ecx
, sizeof buf
) != 0
513 && memcmp (buf
, insns_edx
, sizeof buf
) != 0
514 && memcmp (buf
, insns_eax
, sizeof buf
) != 0))
517 if (current_pc
> pc
+ 4)
518 cache
->stack_align
= 1;
520 return min (pc
+ 10, current_pc
);
523 /* Maximum instruction length we need to handle. */
524 #define I386_MAX_INSN_LEN 6
526 /* Instruction description. */
530 gdb_byte insn
[I386_MAX_INSN_LEN
];
531 gdb_byte mask
[I386_MAX_INSN_LEN
];
534 /* Search for the instruction at PC in the list SKIP_INSNS. Return
535 the first instruction description that matches. Otherwise, return
538 static struct i386_insn
*
539 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*skip_insns
)
541 struct i386_insn
*insn
;
544 target_read_memory (pc
, &op
, 1);
546 for (insn
= skip_insns
; insn
->len
> 0; insn
++)
548 if ((op
& insn
->mask
[0]) == insn
->insn
[0])
550 gdb_byte buf
[I386_MAX_INSN_LEN
- 1];
551 int insn_matched
= 1;
554 gdb_assert (insn
->len
> 1);
555 gdb_assert (insn
->len
<= I386_MAX_INSN_LEN
);
557 target_read_memory (pc
+ 1, buf
, insn
->len
- 1);
558 for (i
= 1; i
< insn
->len
; i
++)
560 if ((buf
[i
- 1] & insn
->mask
[i
]) != insn
->insn
[i
])
572 /* Some special instructions that might be migrated by GCC into the
573 part of the prologue that sets up the new stack frame. Because the
574 stack frame hasn't been setup yet, no registers have been saved
575 yet, and only the scratch registers %eax, %ecx and %edx can be
578 struct i386_insn i386_frame_setup_skip_insns
[] =
580 /* Check for `movb imm8, r' and `movl imm32, r'.
582 ??? Should we handle 16-bit operand-sizes here? */
584 /* `movb imm8, %al' and `movb imm8, %ah' */
585 /* `movb imm8, %cl' and `movb imm8, %ch' */
586 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
587 /* `movb imm8, %dl' and `movb imm8, %dh' */
588 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
589 /* `movl imm32, %eax' and `movl imm32, %ecx' */
590 { 5, { 0xb8 }, { 0xfe } },
591 /* `movl imm32, %edx' */
592 { 5, { 0xba }, { 0xff } },
594 /* Check for `mov imm32, r32'. Note that there is an alternative
595 encoding for `mov m32, %eax'.
597 ??? Should we handle SIB adressing here?
598 ??? Should we handle 16-bit operand-sizes here? */
600 /* `movl m32, %eax' */
601 { 5, { 0xa1 }, { 0xff } },
602 /* `movl m32, %eax' and `mov; m32, %ecx' */
603 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
604 /* `movl m32, %edx' */
605 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
607 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
608 Because of the symmetry, there are actually two ways to encode
609 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
610 opcode bytes 0x31 and 0x33 for `xorl'. */
612 /* `subl %eax, %eax' */
613 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
614 /* `subl %ecx, %ecx' */
615 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
616 /* `subl %edx, %edx' */
617 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
618 /* `xorl %eax, %eax' */
619 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
620 /* `xorl %ecx, %ecx' */
621 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
622 /* `xorl %edx, %edx' */
623 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
628 /* Check whether PC points to a no-op instruction. */
630 i386_skip_noop (CORE_ADDR pc
)
635 target_read_memory (pc
, &op
, 1);
640 /* Ignore `nop' instruction. */
644 target_read_memory (pc
, &op
, 1);
647 /* Ignore no-op instruction `mov %edi, %edi'.
648 Microsoft system dlls often start with
649 a `mov %edi,%edi' instruction.
650 The 5 bytes before the function start are
651 filled with `nop' instructions.
652 This pattern can be used for hot-patching:
653 The `mov %edi, %edi' instruction can be replaced by a
654 near jump to the location of the 5 `nop' instructions
655 which can be replaced by a 32-bit jump to anywhere
656 in the 32-bit address space. */
660 target_read_memory (pc
+ 1, &op
, 1);
664 target_read_memory (pc
, &op
, 1);
672 /* Check whether PC points at a code that sets up a new stack frame.
673 If so, it updates CACHE and returns the address of the first
674 instruction after the sequence that sets up the frame or LIMIT,
675 whichever is smaller. If we don't recognize the code, return PC. */
678 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR limit
,
679 struct i386_frame_cache
*cache
)
681 struct i386_insn
*insn
;
688 target_read_memory (pc
, &op
, 1);
690 if (op
== 0x55) /* pushl %ebp */
692 /* Take into account that we've executed the `pushl %ebp' that
693 starts this instruction sequence. */
694 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
695 cache
->sp_offset
+= 4;
698 /* If that's all, return now. */
702 /* Check for some special instructions that might be migrated by
703 GCC into the prologue and skip them. At this point in the
704 prologue, code should only touch the scratch registers %eax,
705 %ecx and %edx, so while the number of posibilities is sheer,
708 Make sure we only skip these instructions if we later see the
709 `movl %esp, %ebp' that actually sets up the frame. */
710 while (pc
+ skip
< limit
)
712 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
719 /* If that's all, return now. */
720 if (limit
<= pc
+ skip
)
723 target_read_memory (pc
+ skip
, &op
, 1);
725 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
729 if (read_memory_unsigned_integer (pc
+ skip
+ 1, 1) != 0xec)
733 if (read_memory_unsigned_integer (pc
+ skip
+ 1, 1) != 0xe5)
740 /* OK, we actually have a frame. We just don't know how large
741 it is yet. Set its size to zero. We'll adjust it if
742 necessary. We also now commit to skipping the special
743 instructions mentioned before. */
747 /* If that's all, return now. */
751 /* Check for stack adjustment
755 NOTE: You can't subtract a 16-bit immediate from a 32-bit
756 reg, so we don't have to worry about a data16 prefix. */
757 target_read_memory (pc
, &op
, 1);
760 /* `subl' with 8-bit immediate. */
761 if (read_memory_unsigned_integer (pc
+ 1, 1) != 0xec)
762 /* Some instruction starting with 0x83 other than `subl'. */
765 /* `subl' with signed 8-bit immediate (though it wouldn't
766 make sense to be negative). */
767 cache
->locals
= read_memory_integer (pc
+ 2, 1);
772 /* Maybe it is `subl' with a 32-bit immediate. */
773 if (read_memory_unsigned_integer (pc
+ 1, 1) != 0xec)
774 /* Some instruction starting with 0x81 other than `subl'. */
777 /* It is `subl' with a 32-bit immediate. */
778 cache
->locals
= read_memory_integer (pc
+ 2, 4);
783 /* Some instruction other than `subl'. */
787 else if (op
== 0xc8) /* enter */
789 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
796 /* Check whether PC points at code that saves registers on the stack.
797 If so, it updates CACHE and returns the address of the first
798 instruction after the register saves or CURRENT_PC, whichever is
799 smaller. Otherwise, return PC. */
802 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
803 struct i386_frame_cache
*cache
)
805 CORE_ADDR offset
= 0;
809 if (cache
->locals
> 0)
810 offset
-= cache
->locals
;
811 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
813 target_read_memory (pc
, &op
, 1);
814 if (op
< 0x50 || op
> 0x57)
818 cache
->saved_regs
[op
- 0x50] = offset
;
819 cache
->sp_offset
+= 4;
826 /* Do a full analysis of the prologue at PC and update CACHE
827 accordingly. Bail out early if CURRENT_PC is reached. Return the
828 address where the analysis stopped.
830 We handle these cases:
832 The startup sequence can be at the start of the function, or the
833 function can start with a branch to startup code at the end.
835 %ebp can be set up with either the 'enter' instruction, or "pushl
836 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
837 once used in the System V compiler).
839 Local space is allocated just below the saved %ebp by either the
840 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
841 16-bit unsigned argument for space to allocate, and the 'addl'
842 instruction could have either a signed byte, or 32-bit immediate.
844 Next, the registers used by this function are pushed. With the
845 System V compiler they will always be in the order: %edi, %esi,
846 %ebx (and sometimes a harmless bug causes it to also save but not
847 restore %eax); however, the code below is willing to see the pushes
848 in any order, and will handle up to 8 of them.
850 If the setup sequence is at the end of the function, then the next
851 instruction will be a branch back to the start. */
854 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
855 struct i386_frame_cache
*cache
)
857 pc
= i386_skip_noop (pc
);
858 pc
= i386_follow_jump (pc
);
859 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
860 pc
= i386_skip_probe (pc
);
861 pc
= i386_analyze_stack_align (pc
, current_pc
, cache
);
862 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
863 return i386_analyze_register_saves (pc
, current_pc
, cache
);
866 /* Return PC of first real instruction. */
869 i386_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
)
871 static gdb_byte pic_pat
[6] =
873 0xe8, 0, 0, 0, 0, /* call 0x0 */
874 0x5b, /* popl %ebx */
876 struct i386_frame_cache cache
;
882 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
883 if (cache
.locals
< 0)
886 /* Found valid frame setup. */
888 /* The native cc on SVR4 in -K PIC mode inserts the following code
889 to get the address of the global offset table (GOT) into register
894 movl %ebx,x(%ebp) (optional)
897 This code is with the rest of the prologue (at the end of the
898 function), so we have to skip it to get to the first real
899 instruction at the start of the function. */
901 for (i
= 0; i
< 6; i
++)
903 target_read_memory (pc
+ i
, &op
, 1);
904 if (pic_pat
[i
] != op
)
911 target_read_memory (pc
+ delta
, &op
, 1);
913 if (op
== 0x89) /* movl %ebx, x(%ebp) */
915 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
917 if (op
== 0x5d) /* One byte offset from %ebp. */
919 else if (op
== 0x9d) /* Four byte offset from %ebp. */
921 else /* Unexpected instruction. */
924 target_read_memory (pc
+ delta
, &op
, 1);
928 if (delta
> 0 && op
== 0x81
929 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3)
935 /* If the function starts with a branch (to startup code at the end)
936 the last instruction should bring us back to the first
937 instruction of the real code. */
938 if (i386_follow_jump (start_pc
) != start_pc
)
939 pc
= i386_follow_jump (pc
);
944 /* This function is 64-bit safe. */
947 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
951 frame_unwind_register (next_frame
, gdbarch_pc_regnum (gdbarch
), buf
);
952 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
958 static struct i386_frame_cache
*
959 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
961 struct i386_frame_cache
*cache
;
968 cache
= i386_alloc_frame_cache ();
971 /* In principle, for normal frames, %ebp holds the frame pointer,
972 which holds the base address for the current stack frame.
973 However, for functions that don't need it, the frame pointer is
974 optional. For these "frameless" functions the frame pointer is
975 actually the frame pointer of the calling frame. Signal
976 trampolines are just a special case of a "frameless" function.
977 They (usually) share their frame pointer with the frame that was
978 in progress when the signal occurred. */
980 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
981 cache
->base
= extract_unsigned_integer (buf
, 4);
982 if (cache
->base
== 0)
985 /* For normal frames, %eip is stored at 4(%ebp). */
986 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
988 cache
->pc
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
990 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
992 if (cache
->stack_align
)
994 /* Saved stack pointer has been saved in %ecx. */
995 frame_unwind_register (next_frame
, I386_ECX_REGNUM
, buf
);
996 cache
->saved_sp
= extract_unsigned_integer(buf
, 4);
999 if (cache
->locals
< 0)
1001 /* We didn't find a valid frame, which means that CACHE->base
1002 currently holds the frame pointer for our calling frame. If
1003 we're at the start of a function, or somewhere half-way its
1004 prologue, the function's frame probably hasn't been fully
1005 setup yet. Try to reconstruct the base address for the stack
1006 frame by looking at the stack pointer. For truly "frameless"
1007 functions this might work too. */
1009 if (cache
->stack_align
)
1011 /* We're halfway aligning the stack. */
1012 cache
->base
= ((cache
->saved_sp
- 4) & 0xfffffff0) - 4;
1013 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->saved_sp
- 4;
1015 /* This will be added back below. */
1016 cache
->saved_regs
[I386_EIP_REGNUM
] -= cache
->base
;
1020 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1021 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
1025 /* Now that we have the base address for the stack frame we can
1026 calculate the value of %esp in the calling frame. */
1027 if (cache
->saved_sp
== 0)
1028 cache
->saved_sp
= cache
->base
+ 8;
1030 /* Adjust all the saved registers such that they contain addresses
1031 instead of offsets. */
1032 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
1033 if (cache
->saved_regs
[i
] != -1)
1034 cache
->saved_regs
[i
] += cache
->base
;
1040 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1041 struct frame_id
*this_id
)
1043 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1045 /* This marks the outermost frame. */
1046 if (cache
->base
== 0)
1049 /* See the end of i386_push_dummy_call. */
1050 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
1054 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1055 int regnum
, int *optimizedp
,
1056 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1057 int *realnump
, gdb_byte
*valuep
)
1059 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1061 gdb_assert (regnum
>= 0);
1063 /* The System V ABI says that:
1065 "The flags register contains the system flags, such as the
1066 direction flag and the carry flag. The direction flag must be
1067 set to the forward (that is, zero) direction before entry and
1068 upon exit from a function. Other user flags have no specified
1069 role in the standard calling sequence and are not preserved."
1071 To guarantee the "upon exit" part of that statement we fake a
1072 saved flags register that has its direction flag cleared.
1074 Note that GCC doesn't seem to rely on the fact that the direction
1075 flag is cleared after a function return; it always explicitly
1076 clears the flag before operations where it matters.
1078 FIXME: kettenis/20030316: I'm not quite sure whether this is the
1079 right thing to do. The way we fake the flags register here makes
1080 it impossible to change it. */
1082 if (regnum
== I386_EFLAGS_REGNUM
)
1092 /* Clear the direction flag. */
1093 val
= frame_unwind_register_unsigned (next_frame
,
1094 I386_EFLAGS_REGNUM
);
1096 store_unsigned_integer (valuep
, 4, val
);
1102 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
1105 *lvalp
= lval_register
;
1107 *realnump
= I386_EAX_REGNUM
;
1109 frame_unwind_register (next_frame
, (*realnump
), valuep
);
1113 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
1121 /* Store the value. */
1122 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
1127 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
1130 *lvalp
= lval_memory
;
1131 *addrp
= cache
->saved_regs
[regnum
];
1135 /* Read the value in from memory. */
1136 read_memory (*addrp
, valuep
,
1137 register_size (get_frame_arch (next_frame
), regnum
));
1143 *lvalp
= lval_register
;
1147 frame_unwind_register (next_frame
, (*realnump
), valuep
);
1150 static const struct frame_unwind i386_frame_unwind
=
1154 i386_frame_prev_register
1157 static const struct frame_unwind
*
1158 i386_frame_sniffer (struct frame_info
*next_frame
)
1160 return &i386_frame_unwind
;
1164 /* Signal trampolines. */
1166 static struct i386_frame_cache
*
1167 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1169 struct i386_frame_cache
*cache
;
1170 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1177 cache
= i386_alloc_frame_cache ();
1179 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1180 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
1182 addr
= tdep
->sigcontext_addr (next_frame
);
1183 if (tdep
->sc_reg_offset
)
1187 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
1189 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1190 if (tdep
->sc_reg_offset
[i
] != -1)
1191 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1195 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
1196 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
1199 *this_cache
= cache
;
1204 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1205 struct frame_id
*this_id
)
1207 struct i386_frame_cache
*cache
=
1208 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1210 /* See the end of i386_push_dummy_call. */
1211 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
1215 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1217 int regnum
, int *optimizedp
,
1218 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1219 int *realnump
, gdb_byte
*valuep
)
1221 /* Make sure we've initialized the cache. */
1222 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1224 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
1225 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1228 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1231 i386_sigtramp_frame_this_id
,
1232 i386_sigtramp_frame_prev_register
1235 static const struct frame_unwind
*
1236 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1238 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1240 /* We shouldn't even bother if we don't have a sigcontext_addr
1242 if (tdep
->sigcontext_addr
== NULL
)
1245 if (tdep
->sigtramp_p
!= NULL
)
1247 if (tdep
->sigtramp_p (next_frame
))
1248 return &i386_sigtramp_frame_unwind
;
1251 if (tdep
->sigtramp_start
!= 0)
1253 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1255 gdb_assert (tdep
->sigtramp_end
!= 0);
1256 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
1257 return &i386_sigtramp_frame_unwind
;
1265 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1267 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1272 static const struct frame_base i386_frame_base
=
1275 i386_frame_base_address
,
1276 i386_frame_base_address
,
1277 i386_frame_base_address
1280 static struct frame_id
1281 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1286 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1287 fp
= extract_unsigned_integer (buf
, 4);
1289 /* See the end of i386_push_dummy_call. */
1290 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1294 /* Figure out where the longjmp will land. Slurp the args out of the
1295 stack. We expect the first arg to be a pointer to the jmp_buf
1296 structure from which we extract the address that we will land at.
1297 This address is copied into PC. This routine returns non-zero on
1301 i386_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1304 CORE_ADDR sp
, jb_addr
;
1305 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1306 int jb_pc_offset
= gdbarch_tdep (gdbarch
)->jb_pc_offset
;
1308 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1309 longjmp will land. */
1310 if (jb_pc_offset
== -1)
1313 get_frame_register (frame
, I386_ESP_REGNUM
, buf
);
1314 sp
= extract_unsigned_integer (buf
, 4);
1315 if (target_read_memory (sp
+ 4, buf
, 4))
1318 jb_addr
= extract_unsigned_integer (buf
, 4);
1319 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, 4))
1322 *pc
= extract_unsigned_integer (buf
, 4);
1328 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1329 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1330 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1331 CORE_ADDR struct_addr
)
1336 /* Push arguments in reverse order. */
1337 for (i
= nargs
- 1; i
>= 0; i
--)
1339 int len
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
1341 /* The System V ABI says that:
1343 "An argument's size is increased, if necessary, to make it a
1344 multiple of [32-bit] words. This may require tail padding,
1345 depending on the size of the argument."
1347 This makes sure the stack stays word-aligned. */
1348 sp
-= (len
+ 3) & ~3;
1349 write_memory (sp
, value_contents_all (args
[i
]), len
);
1352 /* Push value address. */
1356 store_unsigned_integer (buf
, 4, struct_addr
);
1357 write_memory (sp
, buf
, 4);
1360 /* Store return address. */
1362 store_unsigned_integer (buf
, 4, bp_addr
);
1363 write_memory (sp
, buf
, 4);
1365 /* Finally, update the stack pointer... */
1366 store_unsigned_integer (buf
, 4, sp
);
1367 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1369 /* ...and fake a frame pointer. */
1370 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1372 /* MarkK wrote: This "+ 8" is all over the place:
1373 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1374 i386_unwind_dummy_id). It's there, since all frame unwinders for
1375 a given target have to agree (within a certain margin) on the
1376 definition of the stack address of a frame. Otherwise
1377 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1378 stack address *before* the function call as a frame's CFA. On
1379 the i386, when %ebp is used as a frame pointer, the offset
1380 between the contents %ebp and the CFA as defined by GCC. */
1384 /* These registers are used for returning integers (and on some
1385 targets also for returning `struct' and `union' values when their
1386 size and alignment match an integer type). */
1387 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1388 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1390 /* Read, for architecture GDBARCH, a function return value of TYPE
1391 from REGCACHE, and copy that into VALBUF. */
1394 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1395 struct regcache
*regcache
, gdb_byte
*valbuf
)
1397 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1398 int len
= TYPE_LENGTH (type
);
1399 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
1401 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1403 if (tdep
->st0_regnum
< 0)
1405 warning (_("Cannot find floating-point return value."));
1406 memset (valbuf
, 0, len
);
1410 /* Floating-point return values can be found in %st(0). Convert
1411 its contents to the desired type. This is probably not
1412 exactly how it would happen on the target itself, but it is
1413 the best we can do. */
1414 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1415 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1419 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
1420 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
1422 if (len
<= low_size
)
1424 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1425 memcpy (valbuf
, buf
, len
);
1427 else if (len
<= (low_size
+ high_size
))
1429 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1430 memcpy (valbuf
, buf
, low_size
);
1431 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1432 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1435 internal_error (__FILE__
, __LINE__
,
1436 _("Cannot extract return value of %d bytes long."), len
);
1440 /* Write, for architecture GDBARCH, a function return value of TYPE
1441 from VALBUF into REGCACHE. */
1444 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1445 struct regcache
*regcache
, const gdb_byte
*valbuf
)
1447 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1448 int len
= TYPE_LENGTH (type
);
1450 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1453 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
1455 if (tdep
->st0_regnum
< 0)
1457 warning (_("Cannot set floating-point return value."));
1461 /* Returning floating-point values is a bit tricky. Apart from
1462 storing the return value in %st(0), we have to simulate the
1463 state of the FPU at function return point. */
1465 /* Convert the value found in VALBUF to the extended
1466 floating-point format used by the FPU. This is probably
1467 not exactly how it would happen on the target itself, but
1468 it is the best we can do. */
1469 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1470 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1472 /* Set the top of the floating-point register stack to 7. The
1473 actual value doesn't really matter, but 7 is what a normal
1474 function return would end up with if the program started out
1475 with a freshly initialized FPU. */
1476 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
1478 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
1480 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1481 the floating-point register stack to 7, the appropriate value
1482 for the tag word is 0x3fff. */
1483 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
1487 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
1488 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
1490 if (len
<= low_size
)
1491 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1492 else if (len
<= (low_size
+ high_size
))
1494 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1495 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1496 len
- low_size
, valbuf
+ low_size
);
1499 internal_error (__FILE__
, __LINE__
,
1500 _("Cannot store return value of %d bytes long."), len
);
1505 /* This is the variable that is set with "set struct-convention", and
1506 its legitimate values. */
1507 static const char default_struct_convention
[] = "default";
1508 static const char pcc_struct_convention
[] = "pcc";
1509 static const char reg_struct_convention
[] = "reg";
1510 static const char *valid_conventions
[] =
1512 default_struct_convention
,
1513 pcc_struct_convention
,
1514 reg_struct_convention
,
1517 static const char *struct_convention
= default_struct_convention
;
1519 /* Return non-zero if TYPE, which is assumed to be a structure,
1520 a union type, or an array type, should be returned in registers
1521 for architecture GDBARCH. */
1524 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1526 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1527 enum type_code code
= TYPE_CODE (type
);
1528 int len
= TYPE_LENGTH (type
);
1530 gdb_assert (code
== TYPE_CODE_STRUCT
1531 || code
== TYPE_CODE_UNION
1532 || code
== TYPE_CODE_ARRAY
);
1534 if (struct_convention
== pcc_struct_convention
1535 || (struct_convention
== default_struct_convention
1536 && tdep
->struct_return
== pcc_struct_return
))
1539 /* Structures consisting of a single `float', `double' or 'long
1540 double' member are returned in %st(0). */
1541 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1543 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1544 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1545 return (len
== 4 || len
== 8 || len
== 12);
1548 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1551 /* Determine, for architecture GDBARCH, how a return value of TYPE
1552 should be returned. If it is supposed to be returned in registers,
1553 and READBUF is non-zero, read the appropriate value from REGCACHE,
1554 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1555 from WRITEBUF into REGCACHE. */
1557 static enum return_value_convention
1558 i386_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
1559 struct type
*type
, struct regcache
*regcache
,
1560 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
1562 enum type_code code
= TYPE_CODE (type
);
1564 if (((code
== TYPE_CODE_STRUCT
1565 || code
== TYPE_CODE_UNION
1566 || code
== TYPE_CODE_ARRAY
)
1567 && !i386_reg_struct_return_p (gdbarch
, type
))
1568 /* 128-bit decimal float uses the struct return convention. */
1569 || (code
== TYPE_CODE_DECFLOAT
&& TYPE_LENGTH (type
) == 16))
1571 /* The System V ABI says that:
1573 "A function that returns a structure or union also sets %eax
1574 to the value of the original address of the caller's area
1575 before it returns. Thus when the caller receives control
1576 again, the address of the returned object resides in register
1577 %eax and can be used to access the object."
1579 So the ABI guarantees that we can always find the return
1580 value just after the function has returned. */
1582 /* Note that the ABI doesn't mention functions returning arrays,
1583 which is something possible in certain languages such as Ada.
1584 In this case, the value is returned as if it was wrapped in
1585 a record, so the convention applied to records also applies
1592 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
1593 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
1596 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
1599 /* This special case is for structures consisting of a single
1600 `float', `double' or 'long double' member. These structures are
1601 returned in %st(0). For these structures, we call ourselves
1602 recursively, changing TYPE into the type of the first member of
1603 the structure. Since that should work for all structures that
1604 have only one member, we don't bother to check the member's type
1606 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1608 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1609 return i386_return_value (gdbarch
, func_type
, type
, regcache
,
1614 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1616 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1618 return RETURN_VALUE_REGISTER_CONVENTION
;
1622 /* Type for %eflags. */
1623 struct type
*i386_eflags_type
;
1625 /* Type for %mxcsr. */
1626 struct type
*i386_mxcsr_type
;
1628 /* Construct types for ISA-specific registers. */
1630 i386_init_types (void)
1634 type
= init_flags_type ("builtin_type_i386_eflags", 4);
1635 append_flags_type_flag (type
, 0, "CF");
1636 append_flags_type_flag (type
, 1, NULL
);
1637 append_flags_type_flag (type
, 2, "PF");
1638 append_flags_type_flag (type
, 4, "AF");
1639 append_flags_type_flag (type
, 6, "ZF");
1640 append_flags_type_flag (type
, 7, "SF");
1641 append_flags_type_flag (type
, 8, "TF");
1642 append_flags_type_flag (type
, 9, "IF");
1643 append_flags_type_flag (type
, 10, "DF");
1644 append_flags_type_flag (type
, 11, "OF");
1645 append_flags_type_flag (type
, 14, "NT");
1646 append_flags_type_flag (type
, 16, "RF");
1647 append_flags_type_flag (type
, 17, "VM");
1648 append_flags_type_flag (type
, 18, "AC");
1649 append_flags_type_flag (type
, 19, "VIF");
1650 append_flags_type_flag (type
, 20, "VIP");
1651 append_flags_type_flag (type
, 21, "ID");
1652 i386_eflags_type
= type
;
1654 type
= init_flags_type ("builtin_type_i386_mxcsr", 4);
1655 append_flags_type_flag (type
, 0, "IE");
1656 append_flags_type_flag (type
, 1, "DE");
1657 append_flags_type_flag (type
, 2, "ZE");
1658 append_flags_type_flag (type
, 3, "OE");
1659 append_flags_type_flag (type
, 4, "UE");
1660 append_flags_type_flag (type
, 5, "PE");
1661 append_flags_type_flag (type
, 6, "DAZ");
1662 append_flags_type_flag (type
, 7, "IM");
1663 append_flags_type_flag (type
, 8, "DM");
1664 append_flags_type_flag (type
, 9, "ZM");
1665 append_flags_type_flag (type
, 10, "OM");
1666 append_flags_type_flag (type
, 11, "UM");
1667 append_flags_type_flag (type
, 12, "PM");
1668 append_flags_type_flag (type
, 15, "FZ");
1669 i386_mxcsr_type
= type
;
1672 /* Construct vector type for MMX registers. */
1674 i386_mmx_type (struct gdbarch
*gdbarch
)
1676 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1678 if (!tdep
->i386_mmx_type
)
1680 /* The type we're building is this: */
1682 union __gdb_builtin_type_vec64i
1685 int32_t v2_int32
[2];
1686 int16_t v4_int16
[4];
1693 t
= init_composite_type ("__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
1694 append_composite_type_field (t
, "uint64", builtin_type_int64
);
1695 append_composite_type_field (t
, "v2_int32",
1696 init_vector_type (builtin_type_int32
, 2));
1697 append_composite_type_field (t
, "v4_int16",
1698 init_vector_type (builtin_type_int16
, 4));
1699 append_composite_type_field (t
, "v8_int8",
1700 init_vector_type (builtin_type_int8
, 8));
1702 TYPE_FLAGS (t
) |= TYPE_FLAG_VECTOR
;
1703 TYPE_NAME (t
) = "builtin_type_vec64i";
1704 tdep
->i386_mmx_type
= t
;
1707 return tdep
->i386_mmx_type
;
1711 i386_sse_type (struct gdbarch
*gdbarch
)
1713 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1715 if (!tdep
->i386_sse_type
)
1717 /* The type we're building is this: */
1719 union __gdb_builtin_type_vec128i
1722 int64_t v2_int64
[2];
1723 int32_t v4_int32
[4];
1724 int16_t v8_int16
[8];
1725 int8_t v16_int8
[16];
1726 double v2_double
[2];
1733 t
= init_composite_type ("__gdb_builtin_type_vec128i", TYPE_CODE_UNION
);
1734 append_composite_type_field (t
, "v4_float",
1735 init_vector_type (builtin_type_float
, 4));
1736 append_composite_type_field (t
, "v2_double",
1737 init_vector_type (builtin_type_double
, 2));
1738 append_composite_type_field (t
, "v16_int8",
1739 init_vector_type (builtin_type_int8
, 16));
1740 append_composite_type_field (t
, "v8_int16",
1741 init_vector_type (builtin_type_int16
, 8));
1742 append_composite_type_field (t
, "v4_int32",
1743 init_vector_type (builtin_type_int32
, 4));
1744 append_composite_type_field (t
, "v2_int64",
1745 init_vector_type (builtin_type_int64
, 2));
1746 append_composite_type_field (t
, "uint128", builtin_type_int128
);
1748 TYPE_FLAGS (t
) |= TYPE_FLAG_VECTOR
;
1749 TYPE_NAME (t
) = "builtin_type_vec128i";
1750 tdep
->i386_sse_type
= t
;
1753 return tdep
->i386_sse_type
;
1756 /* Return the GDB type object for the "standard" data type of data in
1757 register REGNUM. Perhaps %esi and %edi should go here, but
1758 potentially they could be used for things other than address. */
1760 static struct type
*
1761 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1763 if (regnum
== I386_EIP_REGNUM
)
1764 return builtin_type_void_func_ptr
;
1766 if (regnum
== I386_EFLAGS_REGNUM
)
1767 return i386_eflags_type
;
1769 if (regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1770 return builtin_type_void_data_ptr
;
1772 if (i386_fp_regnum_p (gdbarch
, regnum
))
1773 return builtin_type_i387_ext
;
1775 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1776 return i386_mmx_type (gdbarch
);
1778 if (i386_sse_regnum_p (gdbarch
, regnum
))
1779 return i386_sse_type (gdbarch
);
1781 if (regnum
== I387_MXCSR_REGNUM (gdbarch_tdep (gdbarch
)))
1782 return i386_mxcsr_type
;
1784 return builtin_type_int
;
1787 /* Map a cooked register onto a raw register or memory. For the i386,
1788 the MMX registers need to be mapped onto floating point registers. */
1791 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1793 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1798 mmxreg
= regnum
- tdep
->mm0_regnum
;
1799 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
1800 tos
= (fstat
>> 11) & 0x7;
1801 fpreg
= (mmxreg
+ tos
) % 8;
1803 return (I387_ST0_REGNUM (tdep
) + fpreg
);
1807 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1808 int regnum
, gdb_byte
*buf
)
1810 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1812 gdb_byte mmx_buf
[MAX_REGISTER_SIZE
];
1813 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1815 /* Extract (always little endian). */
1816 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1817 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1820 regcache_raw_read (regcache
, regnum
, buf
);
1824 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1825 int regnum
, const gdb_byte
*buf
)
1827 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1829 gdb_byte mmx_buf
[MAX_REGISTER_SIZE
];
1830 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1833 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1834 /* ... Modify ... (always little endian). */
1835 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1837 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1840 regcache_raw_write (regcache
, regnum
, buf
);
1844 /* Return the register number of the register allocated by GCC after
1845 REGNUM, or -1 if there is no such register. */
1848 i386_next_regnum (int regnum
)
1850 /* GCC allocates the registers in the order:
1852 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1854 Since storing a variable in %esp doesn't make any sense we return
1855 -1 for %ebp and for %esp itself. */
1856 static int next_regnum
[] =
1858 I386_EDX_REGNUM
, /* Slot for %eax. */
1859 I386_EBX_REGNUM
, /* Slot for %ecx. */
1860 I386_ECX_REGNUM
, /* Slot for %edx. */
1861 I386_ESI_REGNUM
, /* Slot for %ebx. */
1862 -1, -1, /* Slots for %esp and %ebp. */
1863 I386_EDI_REGNUM
, /* Slot for %esi. */
1864 I386_EBP_REGNUM
/* Slot for %edi. */
1867 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1868 return next_regnum
[regnum
];
1873 /* Return nonzero if a value of type TYPE stored in register REGNUM
1874 needs any special handling. */
1877 i386_convert_register_p (struct gdbarch
*gdbarch
, int regnum
, struct type
*type
)
1879 int len
= TYPE_LENGTH (type
);
1881 /* Values may be spread across multiple registers. Most debugging
1882 formats aren't expressive enough to specify the locations, so
1883 some heuristics is involved. Right now we only handle types that
1884 have a length that is a multiple of the word size, since GCC
1885 doesn't seem to put any other types into registers. */
1886 if (len
> 4 && len
% 4 == 0)
1888 int last_regnum
= regnum
;
1892 last_regnum
= i386_next_regnum (last_regnum
);
1896 if (last_regnum
!= -1)
1900 return i387_convert_register_p (gdbarch
, regnum
, type
);
1903 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1904 return its contents in TO. */
1907 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1908 struct type
*type
, gdb_byte
*to
)
1910 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1911 int len
= TYPE_LENGTH (type
);
1913 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1914 available in FRAME (i.e. if it wasn't saved)? */
1916 if (i386_fp_regnum_p (gdbarch
, regnum
))
1918 i387_register_to_value (frame
, regnum
, type
, to
);
1922 /* Read a value spread across multiple registers. */
1924 gdb_assert (len
> 4 && len
% 4 == 0);
1928 gdb_assert (regnum
!= -1);
1929 gdb_assert (register_size (gdbarch
, regnum
) == 4);
1931 get_frame_register (frame
, regnum
, to
);
1932 regnum
= i386_next_regnum (regnum
);
1938 /* Write the contents FROM of a value of type TYPE into register
1939 REGNUM in frame FRAME. */
1942 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1943 struct type
*type
, const gdb_byte
*from
)
1945 int len
= TYPE_LENGTH (type
);
1947 if (i386_fp_regnum_p (get_frame_arch (frame
), regnum
))
1949 i387_value_to_register (frame
, regnum
, type
, from
);
1953 /* Write a value spread across multiple registers. */
1955 gdb_assert (len
> 4 && len
% 4 == 0);
1959 gdb_assert (regnum
!= -1);
1960 gdb_assert (register_size (get_frame_arch (frame
), regnum
) == 4);
1962 put_frame_register (frame
, regnum
, from
);
1963 regnum
= i386_next_regnum (regnum
);
1969 /* Supply register REGNUM from the buffer specified by GREGS and LEN
1970 in the general-purpose register set REGSET to register cache
1971 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
1974 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1975 int regnum
, const void *gregs
, size_t len
)
1977 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
1978 const gdb_byte
*regs
= gregs
;
1981 gdb_assert (len
== tdep
->sizeof_gregset
);
1983 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1985 if ((regnum
== i
|| regnum
== -1)
1986 && tdep
->gregset_reg_offset
[i
] != -1)
1987 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1991 /* Collect register REGNUM from the register cache REGCACHE and store
1992 it in the buffer specified by GREGS and LEN as described by the
1993 general-purpose register set REGSET. If REGNUM is -1, do this for
1994 all registers in REGSET. */
1997 i386_collect_gregset (const struct regset
*regset
,
1998 const struct regcache
*regcache
,
1999 int regnum
, void *gregs
, size_t len
)
2001 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2002 gdb_byte
*regs
= gregs
;
2005 gdb_assert (len
== tdep
->sizeof_gregset
);
2007 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
2009 if ((regnum
== i
|| regnum
== -1)
2010 && tdep
->gregset_reg_offset
[i
] != -1)
2011 regcache_raw_collect (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
2015 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
2016 in the floating-point register set REGSET to register cache
2017 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
2020 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
2021 int regnum
, const void *fpregs
, size_t len
)
2023 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2025 if (len
== I387_SIZEOF_FXSAVE
)
2027 i387_supply_fxsave (regcache
, regnum
, fpregs
);
2031 gdb_assert (len
== tdep
->sizeof_fpregset
);
2032 i387_supply_fsave (regcache
, regnum
, fpregs
);
2035 /* Collect register REGNUM from the register cache REGCACHE and store
2036 it in the buffer specified by FPREGS and LEN as described by the
2037 floating-point register set REGSET. If REGNUM is -1, do this for
2038 all registers in REGSET. */
2041 i386_collect_fpregset (const struct regset
*regset
,
2042 const struct regcache
*regcache
,
2043 int regnum
, void *fpregs
, size_t len
)
2045 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (regset
->arch
);
2047 if (len
== I387_SIZEOF_FXSAVE
)
2049 i387_collect_fxsave (regcache
, regnum
, fpregs
);
2053 gdb_assert (len
== tdep
->sizeof_fpregset
);
2054 i387_collect_fsave (regcache
, regnum
, fpregs
);
2057 /* Return the appropriate register set for the core section identified
2058 by SECT_NAME and SECT_SIZE. */
2060 const struct regset
*
2061 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
2062 const char *sect_name
, size_t sect_size
)
2064 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2066 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
2068 if (tdep
->gregset
== NULL
)
2069 tdep
->gregset
= regset_alloc (gdbarch
, i386_supply_gregset
,
2070 i386_collect_gregset
);
2071 return tdep
->gregset
;
2074 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
2075 || (strcmp (sect_name
, ".reg-xfp") == 0
2076 && sect_size
== I387_SIZEOF_FXSAVE
))
2078 if (tdep
->fpregset
== NULL
)
2079 tdep
->fpregset
= regset_alloc (gdbarch
, i386_supply_fpregset
,
2080 i386_collect_fpregset
);
2081 return tdep
->fpregset
;
2088 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
2091 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
2093 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
2095 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
2096 struct minimal_symbol
*indsym
=
2097 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
2098 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
2102 if (strncmp (symname
, "__imp_", 6) == 0
2103 || strncmp (symname
, "_imp_", 5) == 0)
2104 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
2107 return 0; /* Not a trampoline. */
2111 /* Return whether the frame preceding NEXT_FRAME corresponds to a
2112 sigtramp routine. */
2115 i386_sigtramp_p (struct frame_info
*next_frame
)
2117 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2120 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2121 return (name
&& strcmp ("_sigtramp", name
) == 0);
2125 /* We have two flavours of disassembly. The machinery on this page
2126 deals with switching between those. */
2129 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
2131 gdb_assert (disassembly_flavor
== att_flavor
2132 || disassembly_flavor
== intel_flavor
);
2134 /* FIXME: kettenis/20020915: Until disassembler_options is properly
2135 constified, cast to prevent a compiler warning. */
2136 info
->disassembler_options
= (char *) disassembly_flavor
;
2138 return print_insn_i386 (pc
, info
);
2142 /* There are a few i386 architecture variants that differ only
2143 slightly from the generic i386 target. For now, we don't give them
2144 their own source file, but include them here. As a consequence,
2145 they'll always be included. */
2147 /* System V Release 4 (SVR4). */
2149 /* Return whether the frame preceding NEXT_FRAME corresponds to a SVR4
2150 sigtramp routine. */
2153 i386_svr4_sigtramp_p (struct frame_info
*next_frame
)
2155 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2158 /* UnixWare uses _sigacthandler. The origin of the other symbols is
2159 currently unknown. */
2160 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2161 return (name
&& (strcmp ("_sigreturn", name
) == 0
2162 || strcmp ("_sigacthandler", name
) == 0
2163 || strcmp ("sigvechandler", name
) == 0));
2166 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
2167 routine, return the address of the associated sigcontext (ucontext)
2171 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
2176 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
2177 sp
= extract_unsigned_integer (buf
, 4);
2179 return read_memory_unsigned_integer (sp
+ 8, 4);
2186 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2188 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
2189 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2192 /* System V Release 4 (SVR4). */
2195 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2197 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2199 /* System V Release 4 uses ELF. */
2200 i386_elf_init_abi (info
, gdbarch
);
2202 /* System V Release 4 has shared libraries. */
2203 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
2205 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
2206 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
2207 tdep
->sc_pc_offset
= 36 + 14 * 4;
2208 tdep
->sc_sp_offset
= 36 + 17 * 4;
2210 tdep
->jb_pc_offset
= 20;
2216 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
2218 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2220 /* DJGPP doesn't have any special frames for signal handlers. */
2221 tdep
->sigtramp_p
= NULL
;
2223 tdep
->jb_pc_offset
= 36;
2227 /* i386 register groups. In addition to the normal groups, add "mmx"
2230 static struct reggroup
*i386_sse_reggroup
;
2231 static struct reggroup
*i386_mmx_reggroup
;
2234 i386_init_reggroups (void)
2236 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
2237 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
2241 i386_add_reggroups (struct gdbarch
*gdbarch
)
2243 reggroup_add (gdbarch
, i386_sse_reggroup
);
2244 reggroup_add (gdbarch
, i386_mmx_reggroup
);
2245 reggroup_add (gdbarch
, general_reggroup
);
2246 reggroup_add (gdbarch
, float_reggroup
);
2247 reggroup_add (gdbarch
, all_reggroup
);
2248 reggroup_add (gdbarch
, save_reggroup
);
2249 reggroup_add (gdbarch
, restore_reggroup
);
2250 reggroup_add (gdbarch
, vector_reggroup
);
2251 reggroup_add (gdbarch
, system_reggroup
);
2255 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
2256 struct reggroup
*group
)
2258 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
2259 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
2260 int fp_regnum_p
= (i386_fp_regnum_p (gdbarch
, regnum
)
2261 || i386_fpc_regnum_p (gdbarch
, regnum
));
2262 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
2264 if (group
== i386_mmx_reggroup
)
2265 return mmx_regnum_p
;
2266 if (group
== i386_sse_reggroup
)
2267 return sse_regnum_p
;
2268 if (group
== vector_reggroup
)
2269 return (mmx_regnum_p
|| sse_regnum_p
);
2270 if (group
== float_reggroup
)
2272 if (group
== general_reggroup
)
2273 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
2275 return default_register_reggroup_p (gdbarch
, regnum
, group
);
2279 /* Get the ARGIth function argument for the current function. */
2282 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
2285 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
2286 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
2290 static struct gdbarch
*
2291 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2293 struct gdbarch_tdep
*tdep
;
2294 struct gdbarch
*gdbarch
;
2296 /* If there is already a candidate, use it. */
2297 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2299 return arches
->gdbarch
;
2301 /* Allocate space for the new architecture. */
2302 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2303 gdbarch
= gdbarch_alloc (&info
, tdep
);
2305 /* General-purpose registers. */
2306 tdep
->gregset
= NULL
;
2307 tdep
->gregset_reg_offset
= NULL
;
2308 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
2309 tdep
->sizeof_gregset
= 0;
2311 /* Floating-point registers. */
2312 tdep
->fpregset
= NULL
;
2313 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
2315 /* The default settings include the FPU registers, the MMX registers
2316 and the SSE registers. This can be overridden for a specific ABI
2317 by adjusting the members `st0_regnum', `mm0_regnum' and
2318 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
2319 will show up in the output of "info all-registers". Ideally we
2320 should try to autodetect whether they are available, such that we
2321 can prevent "info all-registers" from displaying registers that
2324 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
2325 [the SSE registers] always (even when they don't exist) or never
2326 showing them to the user (even when they do exist), I prefer the
2327 former over the latter. */
2329 tdep
->st0_regnum
= I386_ST0_REGNUM
;
2331 /* The MMX registers are implemented as pseudo-registers. Put off
2332 calculating the register number for %mm0 until we know the number
2333 of raw registers. */
2334 tdep
->mm0_regnum
= 0;
2336 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
2337 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
2339 tdep
->jb_pc_offset
= -1;
2340 tdep
->struct_return
= pcc_struct_return
;
2341 tdep
->sigtramp_start
= 0;
2342 tdep
->sigtramp_end
= 0;
2343 tdep
->sigtramp_p
= i386_sigtramp_p
;
2344 tdep
->sigcontext_addr
= NULL
;
2345 tdep
->sc_reg_offset
= NULL
;
2346 tdep
->sc_pc_offset
= -1;
2347 tdep
->sc_sp_offset
= -1;
2349 /* The format used for `long double' on almost all i386 targets is
2350 the i387 extended floating-point format. In fact, of all targets
2351 in the GCC 2.95 tree, only OSF/1 does it different, and insists
2352 on having a `long double' that's not `long' at all. */
2353 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
2355 /* Although the i387 extended floating-point has only 80 significant
2356 bits, a `long double' actually takes up 96, probably to enforce
2358 set_gdbarch_long_double_bit (gdbarch
, 96);
2360 /* The default ABI includes general-purpose registers,
2361 floating-point registers, and the SSE registers. */
2362 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
2363 set_gdbarch_register_name (gdbarch
, i386_register_name
);
2364 set_gdbarch_register_type (gdbarch
, i386_register_type
);
2366 /* Register numbers of various important registers. */
2367 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
2368 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
2369 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
2370 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
2372 /* NOTE: kettenis/20040418: GCC does have two possible register
2373 numbering schemes on the i386: dbx and SVR4. These schemes
2374 differ in how they number %ebp, %esp, %eflags, and the
2375 floating-point registers, and are implemented by the arrays
2376 dbx_register_map[] and svr4_dbx_register_map in
2377 gcc/config/i386.c. GCC also defines a third numbering scheme in
2378 gcc/config/i386.c, which it designates as the "default" register
2379 map used in 64bit mode. This last register numbering scheme is
2380 implemented in dbx64_register_map, and is used for AMD64; see
2383 Currently, each GCC i386 target always uses the same register
2384 numbering scheme across all its supported debugging formats
2385 i.e. SDB (COFF), stabs and DWARF 2. This is because
2386 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2387 DBX_REGISTER_NUMBER macro which is defined by each target's
2388 respective config header in a manner independent of the requested
2389 output debugging format.
2391 This does not match the arrangement below, which presumes that
2392 the SDB and stabs numbering schemes differ from the DWARF and
2393 DWARF 2 ones. The reason for this arrangement is that it is
2394 likely to get the numbering scheme for the target's
2395 default/native debug format right. For targets where GCC is the
2396 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2397 targets where the native toolchain uses a different numbering
2398 scheme for a particular debug format (stabs-in-ELF on Solaris)
2399 the defaults below will have to be overridden, like
2400 i386_elf_init_abi() does. */
2402 /* Use the dbx register numbering scheme for stabs and COFF. */
2403 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2404 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2406 /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */
2407 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2408 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2410 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
2411 be in use on any of the supported i386 targets. */
2413 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
2415 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
2417 /* Call dummy code. */
2418 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
2420 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
2421 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
2422 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
2424 set_gdbarch_return_value (gdbarch
, i386_return_value
);
2426 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
2428 /* Stack grows downward. */
2429 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2431 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
2432 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
2434 set_gdbarch_frame_args_skip (gdbarch
, 8);
2436 /* Wire in the MMX registers. */
2437 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2438 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2439 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2441 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2443 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
2445 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2447 /* Add the i386 register groups. */
2448 i386_add_reggroups (gdbarch
);
2449 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2451 /* Helper for function argument information. */
2452 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2454 /* Hook in the DWARF CFI frame unwinder. */
2455 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
2457 frame_base_set_default (gdbarch
, &i386_frame_base
);
2459 /* Hook in ABI-specific overrides, if they have been registered. */
2460 gdbarch_init_osabi (info
, gdbarch
);
2462 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
2463 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
2465 /* If we have a register mapping, enable the generic core file
2466 support, unless it has already been enabled. */
2467 if (tdep
->gregset_reg_offset
2468 && !gdbarch_regset_from_core_section_p (gdbarch
))
2469 set_gdbarch_regset_from_core_section (gdbarch
,
2470 i386_regset_from_core_section
);
2472 /* Unless support for MMX has been disabled, make %mm0 the first
2474 if (tdep
->mm0_regnum
== 0)
2475 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2480 static enum gdb_osabi
2481 i386_coff_osabi_sniffer (bfd
*abfd
)
2483 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2484 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2485 return GDB_OSABI_GO32
;
2487 return GDB_OSABI_UNKNOWN
;
2491 /* Provide a prototype to silence -Wmissing-prototypes. */
2492 void _initialize_i386_tdep (void);
2495 _initialize_i386_tdep (void)
2497 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2499 /* Add the variable that controls the disassembly flavor. */
2500 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
2501 &disassembly_flavor
, _("\
2502 Set the disassembly flavor."), _("\
2503 Show the disassembly flavor."), _("\
2504 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
2506 NULL
, /* FIXME: i18n: */
2507 &setlist
, &showlist
);
2509 /* Add the variable that controls the convention for returning
2511 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
2512 &struct_convention
, _("\
2513 Set the convention for returning small structs."), _("\
2514 Show the convention for returning small structs."), _("\
2515 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
2518 NULL
, /* FIXME: i18n: */
2519 &setlist
, &showlist
);
2521 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2522 i386_coff_osabi_sniffer
);
2524 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2525 i386_svr4_init_abi
);
2526 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2527 i386_go32_init_abi
);
2529 /* Initialize the i386-specific register groups & types. */
2530 i386_init_reggroups ();