1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988-2021 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "opcode/i386.h"
22 #include "arch-utils.h"
24 #include "dummy-frame.h"
25 #include "dwarf2/frame.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
37 #include "reggroups.h"
42 #include "target-float.h"
47 #include "i386-tdep.h"
48 #include "i387-tdep.h"
49 #include "gdbsupport/x86-xstate.h"
54 #include "record-full.h"
55 #include "target-descriptions.h"
56 #include "arch/i386.h"
61 #include "stap-probe.h"
62 #include "user-regs.h"
63 #include "cli/cli-utils.h"
64 #include "expression.h"
65 #include "parser-defs.h"
68 #include <unordered_set>
73 static const char * const i386_register_names
[] =
75 "eax", "ecx", "edx", "ebx",
76 "esp", "ebp", "esi", "edi",
77 "eip", "eflags", "cs", "ss",
78 "ds", "es", "fs", "gs",
79 "st0", "st1", "st2", "st3",
80 "st4", "st5", "st6", "st7",
81 "fctrl", "fstat", "ftag", "fiseg",
82 "fioff", "foseg", "fooff", "fop",
83 "xmm0", "xmm1", "xmm2", "xmm3",
84 "xmm4", "xmm5", "xmm6", "xmm7",
88 static const char * const i386_zmm_names
[] =
90 "zmm0", "zmm1", "zmm2", "zmm3",
91 "zmm4", "zmm5", "zmm6", "zmm7"
94 static const char * const i386_zmmh_names
[] =
96 "zmm0h", "zmm1h", "zmm2h", "zmm3h",
97 "zmm4h", "zmm5h", "zmm6h", "zmm7h"
100 static const char * const i386_k_names
[] =
102 "k0", "k1", "k2", "k3",
103 "k4", "k5", "k6", "k7"
106 static const char * const i386_ymm_names
[] =
108 "ymm0", "ymm1", "ymm2", "ymm3",
109 "ymm4", "ymm5", "ymm6", "ymm7",
112 static const char * const i386_ymmh_names
[] =
114 "ymm0h", "ymm1h", "ymm2h", "ymm3h",
115 "ymm4h", "ymm5h", "ymm6h", "ymm7h",
118 static const char * const i386_mpx_names
[] =
120 "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
123 static const char * const i386_pkeys_names
[] =
128 /* Register names for MPX pseudo-registers. */
130 static const char * const i386_bnd_names
[] =
132 "bnd0", "bnd1", "bnd2", "bnd3"
135 /* Register names for MMX pseudo-registers. */
137 static const char * const i386_mmx_names
[] =
139 "mm0", "mm1", "mm2", "mm3",
140 "mm4", "mm5", "mm6", "mm7"
143 /* Register names for byte pseudo-registers. */
145 static const char * const i386_byte_names
[] =
147 "al", "cl", "dl", "bl",
148 "ah", "ch", "dh", "bh"
151 /* Register names for word pseudo-registers. */
153 static const char * const i386_word_names
[] =
155 "ax", "cx", "dx", "bx",
159 /* Constant used for reading/writing pseudo registers. In 64-bit mode, we have
160 16 lower ZMM regs that extend corresponding xmm/ymm registers. In addition,
161 we have 16 upper ZMM regs that have to be handled differently. */
163 const int num_lower_zmm_regs
= 16;
168 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
170 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
171 int mm0_regnum
= tdep
->mm0_regnum
;
176 regnum
-= mm0_regnum
;
177 return regnum
>= 0 && regnum
< tdep
->num_mmx_regs
;
183 i386_byte_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
185 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
187 regnum
-= tdep
->al_regnum
;
188 return regnum
>= 0 && regnum
< tdep
->num_byte_regs
;
194 i386_word_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
196 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
198 regnum
-= tdep
->ax_regnum
;
199 return regnum
>= 0 && regnum
< tdep
->num_word_regs
;
202 /* Dword register? */
205 i386_dword_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
207 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
208 int eax_regnum
= tdep
->eax_regnum
;
213 regnum
-= eax_regnum
;
214 return regnum
>= 0 && regnum
< tdep
->num_dword_regs
;
217 /* AVX512 register? */
220 i386_zmmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
222 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
223 int zmm0h_regnum
= tdep
->zmm0h_regnum
;
225 if (zmm0h_regnum
< 0)
228 regnum
-= zmm0h_regnum
;
229 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
233 i386_zmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
235 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
236 int zmm0_regnum
= tdep
->zmm0_regnum
;
241 regnum
-= zmm0_regnum
;
242 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
246 i386_k_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
248 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
249 int k0_regnum
= tdep
->k0_regnum
;
255 return regnum
>= 0 && regnum
< I387_NUM_K_REGS
;
259 i386_ymmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
261 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
262 int ymm0h_regnum
= tdep
->ymm0h_regnum
;
264 if (ymm0h_regnum
< 0)
267 regnum
-= ymm0h_regnum
;
268 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
274 i386_ymm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
276 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
277 int ymm0_regnum
= tdep
->ymm0_regnum
;
282 regnum
-= ymm0_regnum
;
283 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
287 i386_ymmh_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
289 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
290 int ymm16h_regnum
= tdep
->ymm16h_regnum
;
292 if (ymm16h_regnum
< 0)
295 regnum
-= ymm16h_regnum
;
296 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
300 i386_ymm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
302 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
303 int ymm16_regnum
= tdep
->ymm16_regnum
;
305 if (ymm16_regnum
< 0)
308 regnum
-= ymm16_regnum
;
309 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
315 i386_bnd_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
317 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
318 int bnd0_regnum
= tdep
->bnd0_regnum
;
323 regnum
-= bnd0_regnum
;
324 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
330 i386_xmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
332 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
333 int num_xmm_regs
= I387_NUM_XMM_REGS (tdep
);
335 if (num_xmm_regs
== 0)
338 regnum
-= I387_XMM0_REGNUM (tdep
);
339 return regnum
>= 0 && regnum
< num_xmm_regs
;
342 /* XMM_512 register? */
345 i386_xmm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
347 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
348 int num_xmm_avx512_regs
= I387_NUM_XMM_AVX512_REGS (tdep
);
350 if (num_xmm_avx512_regs
== 0)
353 regnum
-= I387_XMM16_REGNUM (tdep
);
354 return regnum
>= 0 && regnum
< num_xmm_avx512_regs
;
358 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
360 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
362 if (I387_NUM_XMM_REGS (tdep
) == 0)
365 return (regnum
== I387_MXCSR_REGNUM (tdep
));
371 i386_fp_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
373 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
375 if (I387_ST0_REGNUM (tdep
) < 0)
378 return (I387_ST0_REGNUM (tdep
) <= regnum
379 && regnum
< I387_FCTRL_REGNUM (tdep
));
383 i386_fpc_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
385 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
387 if (I387_ST0_REGNUM (tdep
) < 0)
390 return (I387_FCTRL_REGNUM (tdep
) <= regnum
391 && regnum
< I387_XMM0_REGNUM (tdep
));
394 /* BNDr (raw) register? */
397 i386_bndr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
399 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
401 if (I387_BND0R_REGNUM (tdep
) < 0)
404 regnum
-= tdep
->bnd0r_regnum
;
405 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
408 /* BND control register? */
411 i386_mpx_ctrl_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
413 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
415 if (I387_BNDCFGU_REGNUM (tdep
) < 0)
418 regnum
-= I387_BNDCFGU_REGNUM (tdep
);
419 return regnum
>= 0 && regnum
< I387_NUM_MPX_CTRL_REGS
;
425 i386_pkru_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
427 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
428 int pkru_regnum
= tdep
->pkru_regnum
;
433 regnum
-= pkru_regnum
;
434 return regnum
>= 0 && regnum
< I387_NUM_PKEYS_REGS
;
437 /* Return the name of register REGNUM, or the empty string if it is
438 an anonymous register. */
441 i386_register_name (struct gdbarch
*gdbarch
, int regnum
)
443 /* Hide the upper YMM registers. */
444 if (i386_ymmh_regnum_p (gdbarch
, regnum
))
447 /* Hide the upper YMM16-31 registers. */
448 if (i386_ymmh_avx512_regnum_p (gdbarch
, regnum
))
451 /* Hide the upper ZMM registers. */
452 if (i386_zmmh_regnum_p (gdbarch
, regnum
))
455 return tdesc_register_name (gdbarch
, regnum
);
458 /* Return the name of register REGNUM. */
461 i386_pseudo_register_name (struct gdbarch
*gdbarch
, int regnum
)
463 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
464 if (i386_bnd_regnum_p (gdbarch
, regnum
))
465 return i386_bnd_names
[regnum
- tdep
->bnd0_regnum
];
466 if (i386_mmx_regnum_p (gdbarch
, regnum
))
467 return i386_mmx_names
[regnum
- I387_MM0_REGNUM (tdep
)];
468 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
469 return i386_ymm_names
[regnum
- tdep
->ymm0_regnum
];
470 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
471 return i386_zmm_names
[regnum
- tdep
->zmm0_regnum
];
472 else if (i386_byte_regnum_p (gdbarch
, regnum
))
473 return i386_byte_names
[regnum
- tdep
->al_regnum
];
474 else if (i386_word_regnum_p (gdbarch
, regnum
))
475 return i386_word_names
[regnum
- tdep
->ax_regnum
];
477 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
480 /* Convert a dbx register number REG to the appropriate register
481 number used by GDB. */
484 i386_dbx_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
486 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
488 /* This implements what GCC calls the "default" register map
489 (dbx_register_map[]). */
491 if (reg
>= 0 && reg
<= 7)
493 /* General-purpose registers. The debug info calls %ebp
494 register 4, and %esp register 5. */
501 else if (reg
>= 12 && reg
<= 19)
503 /* Floating-point registers. */
504 return reg
- 12 + I387_ST0_REGNUM (tdep
);
506 else if (reg
>= 21 && reg
<= 28)
509 int ymm0_regnum
= tdep
->ymm0_regnum
;
512 && i386_xmm_regnum_p (gdbarch
, reg
))
513 return reg
- 21 + ymm0_regnum
;
515 return reg
- 21 + I387_XMM0_REGNUM (tdep
);
517 else if (reg
>= 29 && reg
<= 36)
520 return reg
- 29 + I387_MM0_REGNUM (tdep
);
523 /* This will hopefully provoke a warning. */
524 return gdbarch_num_cooked_regs (gdbarch
);
527 /* Convert SVR4 DWARF register number REG to the appropriate register number
531 i386_svr4_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
533 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
535 /* This implements the GCC register map that tries to be compatible
536 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
538 /* The SVR4 register numbering includes %eip and %eflags, and
539 numbers the floating point registers differently. */
540 if (reg
>= 0 && reg
<= 9)
542 /* General-purpose registers. */
545 else if (reg
>= 11 && reg
<= 18)
547 /* Floating-point registers. */
548 return reg
- 11 + I387_ST0_REGNUM (tdep
);
550 else if (reg
>= 21 && reg
<= 36)
552 /* The SSE and MMX registers have the same numbers as with dbx. */
553 return i386_dbx_reg_to_regnum (gdbarch
, reg
);
558 case 37: return I387_FCTRL_REGNUM (tdep
);
559 case 38: return I387_FSTAT_REGNUM (tdep
);
560 case 39: return I387_MXCSR_REGNUM (tdep
);
561 case 40: return I386_ES_REGNUM
;
562 case 41: return I386_CS_REGNUM
;
563 case 42: return I386_SS_REGNUM
;
564 case 43: return I386_DS_REGNUM
;
565 case 44: return I386_FS_REGNUM
;
566 case 45: return I386_GS_REGNUM
;
572 /* Wrapper on i386_svr4_dwarf_reg_to_regnum to return
573 num_regs + num_pseudo_regs for other debug formats. */
576 i386_svr4_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
578 int regnum
= i386_svr4_dwarf_reg_to_regnum (gdbarch
, reg
);
581 return gdbarch_num_cooked_regs (gdbarch
);
587 /* This is the variable that is set with "set disassembly-flavor", and
588 its legitimate values. */
589 static const char att_flavor
[] = "att";
590 static const char intel_flavor
[] = "intel";
591 static const char *const valid_flavors
[] =
597 static const char *disassembly_flavor
= att_flavor
;
600 /* Use the program counter to determine the contents and size of a
601 breakpoint instruction. Return a pointer to a string of bytes that
602 encode a breakpoint instruction, store the length of the string in
603 *LEN and optionally adjust *PC to point to the correct memory
604 location for inserting the breakpoint.
606 On the i386 we have a single breakpoint that fits in a single byte
607 and can be inserted anywhere.
609 This function is 64-bit safe. */
611 constexpr gdb_byte i386_break_insn
[] = { 0xcc }; /* int 3 */
613 typedef BP_MANIPULATION (i386_break_insn
) i386_breakpoint
;
616 /* Displaced instruction handling. */
618 /* Skip the legacy instruction prefixes in INSN.
619 Not all prefixes are valid for any particular insn
620 but we needn't care, the insn will fault if it's invalid.
621 The result is a pointer to the first opcode byte,
622 or NULL if we run off the end of the buffer. */
625 i386_skip_prefixes (gdb_byte
*insn
, size_t max_len
)
627 gdb_byte
*end
= insn
+ max_len
;
633 case DATA_PREFIX_OPCODE
:
634 case ADDR_PREFIX_OPCODE
:
635 case CS_PREFIX_OPCODE
:
636 case DS_PREFIX_OPCODE
:
637 case ES_PREFIX_OPCODE
:
638 case FS_PREFIX_OPCODE
:
639 case GS_PREFIX_OPCODE
:
640 case SS_PREFIX_OPCODE
:
641 case LOCK_PREFIX_OPCODE
:
642 case REPE_PREFIX_OPCODE
:
643 case REPNE_PREFIX_OPCODE
:
655 i386_absolute_jmp_p (const gdb_byte
*insn
)
657 /* jmp far (absolute address in operand). */
663 /* jump near, absolute indirect (/4). */
664 if ((insn
[1] & 0x38) == 0x20)
667 /* jump far, absolute indirect (/5). */
668 if ((insn
[1] & 0x38) == 0x28)
675 /* Return non-zero if INSN is a jump, zero otherwise. */
678 i386_jmp_p (const gdb_byte
*insn
)
680 /* jump short, relative. */
684 /* jump near, relative. */
688 return i386_absolute_jmp_p (insn
);
692 i386_absolute_call_p (const gdb_byte
*insn
)
694 /* call far, absolute. */
700 /* Call near, absolute indirect (/2). */
701 if ((insn
[1] & 0x38) == 0x10)
704 /* Call far, absolute indirect (/3). */
705 if ((insn
[1] & 0x38) == 0x18)
713 i386_ret_p (const gdb_byte
*insn
)
717 case 0xc2: /* ret near, pop N bytes. */
718 case 0xc3: /* ret near */
719 case 0xca: /* ret far, pop N bytes. */
720 case 0xcb: /* ret far */
721 case 0xcf: /* iret */
730 i386_call_p (const gdb_byte
*insn
)
732 if (i386_absolute_call_p (insn
))
735 /* call near, relative. */
742 /* Return non-zero if INSN is a system call, and set *LENGTHP to its
743 length in bytes. Otherwise, return zero. */
746 i386_syscall_p (const gdb_byte
*insn
, int *lengthp
)
748 /* Is it 'int $0x80'? */
749 if ((insn
[0] == 0xcd && insn
[1] == 0x80)
750 /* Or is it 'sysenter'? */
751 || (insn
[0] == 0x0f && insn
[1] == 0x34)
752 /* Or is it 'syscall'? */
753 || (insn
[0] == 0x0f && insn
[1] == 0x05))
762 /* The gdbarch insn_is_call method. */
765 i386_insn_is_call (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
767 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
769 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
770 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
772 return i386_call_p (insn
);
775 /* The gdbarch insn_is_ret method. */
778 i386_insn_is_ret (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
780 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
782 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
783 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
785 return i386_ret_p (insn
);
788 /* The gdbarch insn_is_jump method. */
791 i386_insn_is_jump (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
793 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
795 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
796 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
798 return i386_jmp_p (insn
);
801 /* Some kernels may run one past a syscall insn, so we have to cope. */
803 displaced_step_copy_insn_closure_up
804 i386_displaced_step_copy_insn (struct gdbarch
*gdbarch
,
805 CORE_ADDR from
, CORE_ADDR to
,
806 struct regcache
*regs
)
808 size_t len
= gdbarch_max_insn_length (gdbarch
);
809 std::unique_ptr
<i386_displaced_step_copy_insn_closure
> closure
810 (new i386_displaced_step_copy_insn_closure (len
));
811 gdb_byte
*buf
= closure
->buf
.data ();
813 read_memory (from
, buf
, len
);
815 /* GDB may get control back after the insn after the syscall.
816 Presumably this is a kernel bug.
817 If this is a syscall, make sure there's a nop afterwards. */
822 insn
= i386_skip_prefixes (buf
, len
);
823 if (insn
!= NULL
&& i386_syscall_p (insn
, &syscall_length
))
824 insn
[syscall_length
] = NOP_OPCODE
;
827 write_memory (to
, buf
, len
);
829 displaced_debug_printf ("%s->%s: %s",
830 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
831 displaced_step_dump_bytes (buf
, len
).c_str ());
833 /* This is a work around for a problem with g++ 4.8. */
834 return displaced_step_copy_insn_closure_up (closure
.release ());
837 /* Fix up the state of registers and memory after having single-stepped
838 a displaced instruction. */
841 i386_displaced_step_fixup (struct gdbarch
*gdbarch
,
842 struct displaced_step_copy_insn_closure
*closure_
,
843 CORE_ADDR from
, CORE_ADDR to
,
844 struct regcache
*regs
)
846 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
848 /* The offset we applied to the instruction's address.
849 This could well be negative (when viewed as a signed 32-bit
850 value), but ULONGEST won't reflect that, so take care when
852 ULONGEST insn_offset
= to
- from
;
854 i386_displaced_step_copy_insn_closure
*closure
855 = (i386_displaced_step_copy_insn_closure
*) closure_
;
856 gdb_byte
*insn
= closure
->buf
.data ();
857 /* The start of the insn, needed in case we see some prefixes. */
858 gdb_byte
*insn_start
= insn
;
860 displaced_debug_printf ("fixup (%s, %s), insn = 0x%02x 0x%02x ...",
861 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
864 /* The list of issues to contend with here is taken from
865 resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
866 Yay for Free Software! */
868 /* Relocate the %eip, if necessary. */
870 /* The instruction recognizers we use assume any leading prefixes
871 have been skipped. */
873 /* This is the size of the buffer in closure. */
874 size_t max_insn_len
= gdbarch_max_insn_length (gdbarch
);
875 gdb_byte
*opcode
= i386_skip_prefixes (insn
, max_insn_len
);
876 /* If there are too many prefixes, just ignore the insn.
877 It will fault when run. */
882 /* Except in the case of absolute or indirect jump or call
883 instructions, or a return instruction, the new eip is relative to
884 the displaced instruction; make it relative. Well, signal
885 handler returns don't need relocation either, but we use the
886 value of %eip to recognize those; see below. */
887 if (! i386_absolute_jmp_p (insn
)
888 && ! i386_absolute_call_p (insn
)
889 && ! i386_ret_p (insn
))
894 regcache_cooked_read_unsigned (regs
, I386_EIP_REGNUM
, &orig_eip
);
896 /* A signal trampoline system call changes the %eip, resuming
897 execution of the main program after the signal handler has
898 returned. That makes them like 'return' instructions; we
899 shouldn't relocate %eip.
901 But most system calls don't, and we do need to relocate %eip.
903 Our heuristic for distinguishing these cases: if stepping
904 over the system call instruction left control directly after
905 the instruction, the we relocate --- control almost certainly
906 doesn't belong in the displaced copy. Otherwise, we assume
907 the instruction has put control where it belongs, and leave
908 it unrelocated. Goodness help us if there are PC-relative
910 if (i386_syscall_p (insn
, &insn_len
)
911 && orig_eip
!= to
+ (insn
- insn_start
) + insn_len
912 /* GDB can get control back after the insn after the syscall.
913 Presumably this is a kernel bug.
914 i386_displaced_step_copy_insn ensures its a nop,
915 we add one to the length for it. */
916 && orig_eip
!= to
+ (insn
- insn_start
) + insn_len
+ 1)
917 displaced_debug_printf ("syscall changed %%eip; not relocating");
920 ULONGEST eip
= (orig_eip
- insn_offset
) & 0xffffffffUL
;
922 /* If we just stepped over a breakpoint insn, we don't backup
923 the pc on purpose; this is to match behaviour without
926 regcache_cooked_write_unsigned (regs
, I386_EIP_REGNUM
, eip
);
928 displaced_debug_printf ("relocated %%eip from %s to %s",
929 paddress (gdbarch
, orig_eip
),
930 paddress (gdbarch
, eip
));
934 /* If the instruction was PUSHFL, then the TF bit will be set in the
935 pushed value, and should be cleared. We'll leave this for later,
936 since GDB already messes up the TF flag when stepping over a
939 /* If the instruction was a call, the return address now atop the
940 stack is the address following the copied instruction. We need
941 to make it the address following the original instruction. */
942 if (i386_call_p (insn
))
946 const ULONGEST retaddr_len
= 4;
948 regcache_cooked_read_unsigned (regs
, I386_ESP_REGNUM
, &esp
);
949 retaddr
= read_memory_unsigned_integer (esp
, retaddr_len
, byte_order
);
950 retaddr
= (retaddr
- insn_offset
) & 0xffffffffUL
;
951 write_memory_unsigned_integer (esp
, retaddr_len
, byte_order
, retaddr
);
953 displaced_debug_printf ("relocated return addr at %s to %s",
954 paddress (gdbarch
, esp
),
955 paddress (gdbarch
, retaddr
));
960 append_insns (CORE_ADDR
*to
, ULONGEST len
, const gdb_byte
*buf
)
962 target_write_memory (*to
, buf
, len
);
967 i386_relocate_instruction (struct gdbarch
*gdbarch
,
968 CORE_ADDR
*to
, CORE_ADDR oldloc
)
970 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
971 gdb_byte buf
[I386_MAX_INSN_LEN
];
972 int offset
= 0, rel32
, newrel
;
974 gdb_byte
*insn
= buf
;
976 read_memory (oldloc
, buf
, I386_MAX_INSN_LEN
);
978 insn_length
= gdb_buffered_insn_length (gdbarch
, insn
,
979 I386_MAX_INSN_LEN
, oldloc
);
981 /* Get past the prefixes. */
982 insn
= i386_skip_prefixes (insn
, I386_MAX_INSN_LEN
);
984 /* Adjust calls with 32-bit relative addresses as push/jump, with
985 the address pushed being the location where the original call in
986 the user program would return to. */
989 gdb_byte push_buf
[16];
990 unsigned int ret_addr
;
992 /* Where "ret" in the original code will return to. */
993 ret_addr
= oldloc
+ insn_length
;
994 push_buf
[0] = 0x68; /* pushq $... */
995 store_unsigned_integer (&push_buf
[1], 4, byte_order
, ret_addr
);
997 append_insns (to
, 5, push_buf
);
999 /* Convert the relative call to a relative jump. */
1002 /* Adjust the destination offset. */
1003 rel32
= extract_signed_integer (insn
+ 1, 4, byte_order
);
1004 newrel
= (oldloc
- *to
) + rel32
;
1005 store_signed_integer (insn
+ 1, 4, byte_order
, newrel
);
1007 displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
1008 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1009 hex_string (newrel
), paddress (gdbarch
, *to
));
1011 /* Write the adjusted jump into its displaced location. */
1012 append_insns (to
, 5, insn
);
1016 /* Adjust jumps with 32-bit relative addresses. Calls are already
1018 if (insn
[0] == 0xe9)
1020 /* Adjust conditional jumps. */
1021 else if (insn
[0] == 0x0f && (insn
[1] & 0xf0) == 0x80)
1026 rel32
= extract_signed_integer (insn
+ offset
, 4, byte_order
);
1027 newrel
= (oldloc
- *to
) + rel32
;
1028 store_signed_integer (insn
+ offset
, 4, byte_order
, newrel
);
1029 displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
1030 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1031 hex_string (newrel
), paddress (gdbarch
, *to
));
1034 /* Write the adjusted instructions into their displaced
1036 append_insns (to
, insn_length
, buf
);
1040 #ifdef I386_REGNO_TO_SYMMETRY
1041 #error "The Sequent Symmetry is no longer supported."
1044 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
1045 and %esp "belong" to the calling function. Therefore these
1046 registers should be saved if they're going to be modified. */
1048 /* The maximum number of saved registers. This should include all
1049 registers mentioned above, and %eip. */
1050 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
1052 struct i386_frame_cache
1060 /* Saved registers. */
1061 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
1066 /* Stack space reserved for local variables. */
1070 /* Allocate and initialize a frame cache. */
1072 static struct i386_frame_cache
*
1073 i386_alloc_frame_cache (void)
1075 struct i386_frame_cache
*cache
;
1078 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
1083 cache
->sp_offset
= -4;
1086 /* Saved registers. We initialize these to -1 since zero is a valid
1087 offset (that's where %ebp is supposed to be stored). */
1088 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
1089 cache
->saved_regs
[i
] = -1;
1090 cache
->saved_sp
= 0;
1091 cache
->saved_sp_reg
= -1;
1092 cache
->pc_in_eax
= 0;
1094 /* Frameless until proven otherwise. */
1100 /* If the instruction at PC is a jump, return the address of its
1101 target. Otherwise, return PC. */
1104 i386_follow_jump (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1106 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1111 if (target_read_code (pc
, &op
, 1))
1118 op
= read_code_unsigned_integer (pc
+ 1, 1, byte_order
);
1124 /* Relative jump: if data16 == 0, disp32, else disp16. */
1127 delta
= read_memory_integer (pc
+ 2, 2, byte_order
);
1129 /* Include the size of the jmp instruction (including the
1135 delta
= read_memory_integer (pc
+ 1, 4, byte_order
);
1137 /* Include the size of the jmp instruction. */
1142 /* Relative jump, disp8 (ignore data16). */
1143 delta
= read_memory_integer (pc
+ data16
+ 1, 1, byte_order
);
1145 delta
+= data16
+ 2;
1152 /* Check whether PC points at a prologue for a function returning a
1153 structure or union. If so, it updates CACHE and returns the
1154 address of the first instruction after the code sequence that
1155 removes the "hidden" argument from the stack or CURRENT_PC,
1156 whichever is smaller. Otherwise, return PC. */
1159 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
1160 struct i386_frame_cache
*cache
)
1162 /* Functions that return a structure or union start with:
1165 xchgl %eax, (%esp) 0x87 0x04 0x24
1166 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
1168 (the System V compiler puts out the second `xchg' instruction,
1169 and the assembler doesn't try to optimize it, so the 'sib' form
1170 gets generated). This sequence is used to get the address of the
1171 return buffer for a function that returns a structure. */
1172 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
1173 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
1177 if (current_pc
<= pc
)
1180 if (target_read_code (pc
, &op
, 1))
1183 if (op
!= 0x58) /* popl %eax */
1186 if (target_read_code (pc
+ 1, buf
, 4))
1189 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
1192 if (current_pc
== pc
)
1194 cache
->sp_offset
+= 4;
1198 if (current_pc
== pc
+ 1)
1200 cache
->pc_in_eax
= 1;
1204 if (buf
[1] == proto1
[1])
1211 i386_skip_probe (CORE_ADDR pc
)
1213 /* A function may start with
1227 if (target_read_code (pc
, &op
, 1))
1230 if (op
== 0x68 || op
== 0x6a)
1234 /* Skip past the `pushl' instruction; it has either a one-byte or a
1235 four-byte operand, depending on the opcode. */
1241 /* Read the following 8 bytes, which should be `call _probe' (6
1242 bytes) followed by `addl $4,%esp' (2 bytes). */
1243 read_memory (pc
+ delta
, buf
, sizeof (buf
));
1244 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
1245 pc
+= delta
+ sizeof (buf
);
1251 /* GCC 4.1 and later, can put code in the prologue to realign the
1252 stack pointer. Check whether PC points to such code, and update
1253 CACHE accordingly. Return the first instruction after the code
1254 sequence or CURRENT_PC, whichever is smaller. If we don't
1255 recognize the code, return PC. */
1258 i386_analyze_stack_align (CORE_ADDR pc
, CORE_ADDR current_pc
,
1259 struct i386_frame_cache
*cache
)
1261 /* There are 2 code sequences to re-align stack before the frame
1264 1. Use a caller-saved saved register:
1270 2. Use a callee-saved saved register:
1277 "andl $-XXX, %esp" can be either 3 bytes or 6 bytes:
1279 0x83 0xe4 0xf0 andl $-16, %esp
1280 0x81 0xe4 0x00 0xff 0xff 0xff andl $-256, %esp
1285 int offset
, offset_and
;
1286 static int regnums
[8] = {
1287 I386_EAX_REGNUM
, /* %eax */
1288 I386_ECX_REGNUM
, /* %ecx */
1289 I386_EDX_REGNUM
, /* %edx */
1290 I386_EBX_REGNUM
, /* %ebx */
1291 I386_ESP_REGNUM
, /* %esp */
1292 I386_EBP_REGNUM
, /* %ebp */
1293 I386_ESI_REGNUM
, /* %esi */
1294 I386_EDI_REGNUM
/* %edi */
1297 if (target_read_code (pc
, buf
, sizeof buf
))
1300 /* Check caller-saved saved register. The first instruction has
1301 to be "leal 4(%esp), %reg". */
1302 if (buf
[0] == 0x8d && buf
[2] == 0x24 && buf
[3] == 0x4)
1304 /* MOD must be binary 10 and R/M must be binary 100. */
1305 if ((buf
[1] & 0xc7) != 0x44)
1308 /* REG has register number. */
1309 reg
= (buf
[1] >> 3) & 7;
1314 /* Check callee-saved saved register. The first instruction
1315 has to be "pushl %reg". */
1316 if ((buf
[0] & 0xf8) != 0x50)
1322 /* The next instruction has to be "leal 8(%esp), %reg". */
1323 if (buf
[1] != 0x8d || buf
[3] != 0x24 || buf
[4] != 0x8)
1326 /* MOD must be binary 10 and R/M must be binary 100. */
1327 if ((buf
[2] & 0xc7) != 0x44)
1330 /* REG has register number. Registers in pushl and leal have to
1332 if (reg
!= ((buf
[2] >> 3) & 7))
1338 /* Rigister can't be %esp nor %ebp. */
1339 if (reg
== 4 || reg
== 5)
1342 /* The next instruction has to be "andl $-XXX, %esp". */
1343 if (buf
[offset
+ 1] != 0xe4
1344 || (buf
[offset
] != 0x81 && buf
[offset
] != 0x83))
1347 offset_and
= offset
;
1348 offset
+= buf
[offset
] == 0x81 ? 6 : 3;
1350 /* The next instruction has to be "pushl -4(%reg)". 8bit -4 is
1351 0xfc. REG must be binary 110 and MOD must be binary 01. */
1352 if (buf
[offset
] != 0xff
1353 || buf
[offset
+ 2] != 0xfc
1354 || (buf
[offset
+ 1] & 0xf8) != 0x70)
1357 /* R/M has register. Registers in leal and pushl have to be the
1359 if (reg
!= (buf
[offset
+ 1] & 7))
1362 if (current_pc
> pc
+ offset_and
)
1363 cache
->saved_sp_reg
= regnums
[reg
];
1365 return std::min (pc
+ offset
+ 3, current_pc
);
1368 /* Maximum instruction length we need to handle. */
1369 #define I386_MAX_MATCHED_INSN_LEN 6
1371 /* Instruction description. */
1375 gdb_byte insn
[I386_MAX_MATCHED_INSN_LEN
];
1376 gdb_byte mask
[I386_MAX_MATCHED_INSN_LEN
];
1379 /* Return whether instruction at PC matches PATTERN. */
1382 i386_match_pattern (CORE_ADDR pc
, struct i386_insn pattern
)
1386 if (target_read_code (pc
, &op
, 1))
1389 if ((op
& pattern
.mask
[0]) == pattern
.insn
[0])
1391 gdb_byte buf
[I386_MAX_MATCHED_INSN_LEN
- 1];
1392 int insn_matched
= 1;
1395 gdb_assert (pattern
.len
> 1);
1396 gdb_assert (pattern
.len
<= I386_MAX_MATCHED_INSN_LEN
);
1398 if (target_read_code (pc
+ 1, buf
, pattern
.len
- 1))
1401 for (i
= 1; i
< pattern
.len
; i
++)
1403 if ((buf
[i
- 1] & pattern
.mask
[i
]) != pattern
.insn
[i
])
1406 return insn_matched
;
1411 /* Search for the instruction at PC in the list INSN_PATTERNS. Return
1412 the first instruction description that matches. Otherwise, return
1415 static struct i386_insn
*
1416 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1418 struct i386_insn
*pattern
;
1420 for (pattern
= insn_patterns
; pattern
->len
> 0; pattern
++)
1422 if (i386_match_pattern (pc
, *pattern
))
1429 /* Return whether PC points inside a sequence of instructions that
1430 matches INSN_PATTERNS. */
1433 i386_match_insn_block (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1435 CORE_ADDR current_pc
;
1437 struct i386_insn
*insn
;
1439 insn
= i386_match_insn (pc
, insn_patterns
);
1444 ix
= insn
- insn_patterns
;
1445 for (i
= ix
- 1; i
>= 0; i
--)
1447 current_pc
-= insn_patterns
[i
].len
;
1449 if (!i386_match_pattern (current_pc
, insn_patterns
[i
]))
1453 current_pc
= pc
+ insn
->len
;
1454 for (insn
= insn_patterns
+ ix
+ 1; insn
->len
> 0; insn
++)
1456 if (!i386_match_pattern (current_pc
, *insn
))
1459 current_pc
+= insn
->len
;
1465 /* Some special instructions that might be migrated by GCC into the
1466 part of the prologue that sets up the new stack frame. Because the
1467 stack frame hasn't been setup yet, no registers have been saved
1468 yet, and only the scratch registers %eax, %ecx and %edx can be
1471 static i386_insn i386_frame_setup_skip_insns
[] =
1473 /* Check for `movb imm8, r' and `movl imm32, r'.
1475 ??? Should we handle 16-bit operand-sizes here? */
1477 /* `movb imm8, %al' and `movb imm8, %ah' */
1478 /* `movb imm8, %cl' and `movb imm8, %ch' */
1479 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
1480 /* `movb imm8, %dl' and `movb imm8, %dh' */
1481 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
1482 /* `movl imm32, %eax' and `movl imm32, %ecx' */
1483 { 5, { 0xb8 }, { 0xfe } },
1484 /* `movl imm32, %edx' */
1485 { 5, { 0xba }, { 0xff } },
1487 /* Check for `mov imm32, r32'. Note that there is an alternative
1488 encoding for `mov m32, %eax'.
1490 ??? Should we handle SIB addressing here?
1491 ??? Should we handle 16-bit operand-sizes here? */
1493 /* `movl m32, %eax' */
1494 { 5, { 0xa1 }, { 0xff } },
1495 /* `movl m32, %eax' and `mov; m32, %ecx' */
1496 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
1497 /* `movl m32, %edx' */
1498 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
1500 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
1501 Because of the symmetry, there are actually two ways to encode
1502 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
1503 opcode bytes 0x31 and 0x33 for `xorl'. */
1505 /* `subl %eax, %eax' */
1506 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
1507 /* `subl %ecx, %ecx' */
1508 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
1509 /* `subl %edx, %edx' */
1510 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
1511 /* `xorl %eax, %eax' */
1512 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
1513 /* `xorl %ecx, %ecx' */
1514 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
1515 /* `xorl %edx, %edx' */
1516 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
1520 /* Check whether PC points to an endbr32 instruction. */
1522 i386_skip_endbr (CORE_ADDR pc
)
1524 static const gdb_byte endbr32
[] = { 0xf3, 0x0f, 0x1e, 0xfb };
1526 gdb_byte buf
[sizeof (endbr32
)];
1528 /* Stop there if we can't read the code */
1529 if (target_read_code (pc
, buf
, sizeof (endbr32
)))
1532 /* If the instruction isn't an endbr32, stop */
1533 if (memcmp (buf
, endbr32
, sizeof (endbr32
)) != 0)
1536 return pc
+ sizeof (endbr32
);
1539 /* Check whether PC points to a no-op instruction. */
1541 i386_skip_noop (CORE_ADDR pc
)
1546 if (target_read_code (pc
, &op
, 1))
1552 /* Ignore `nop' instruction. */
1556 if (target_read_code (pc
, &op
, 1))
1560 /* Ignore no-op instruction `mov %edi, %edi'.
1561 Microsoft system dlls often start with
1562 a `mov %edi,%edi' instruction.
1563 The 5 bytes before the function start are
1564 filled with `nop' instructions.
1565 This pattern can be used for hot-patching:
1566 The `mov %edi, %edi' instruction can be replaced by a
1567 near jump to the location of the 5 `nop' instructions
1568 which can be replaced by a 32-bit jump to anywhere
1569 in the 32-bit address space. */
1571 else if (op
== 0x8b)
1573 if (target_read_code (pc
+ 1, &op
, 1))
1579 if (target_read_code (pc
, &op
, 1))
1589 /* Check whether PC points at a code that sets up a new stack frame.
1590 If so, it updates CACHE and returns the address of the first
1591 instruction after the sequence that sets up the frame or LIMIT,
1592 whichever is smaller. If we don't recognize the code, return PC. */
1595 i386_analyze_frame_setup (struct gdbarch
*gdbarch
,
1596 CORE_ADDR pc
, CORE_ADDR limit
,
1597 struct i386_frame_cache
*cache
)
1599 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1600 struct i386_insn
*insn
;
1607 if (target_read_code (pc
, &op
, 1))
1610 if (op
== 0x55) /* pushl %ebp */
1612 /* Take into account that we've executed the `pushl %ebp' that
1613 starts this instruction sequence. */
1614 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
1615 cache
->sp_offset
+= 4;
1618 /* If that's all, return now. */
1622 /* Check for some special instructions that might be migrated by
1623 GCC into the prologue and skip them. At this point in the
1624 prologue, code should only touch the scratch registers %eax,
1625 %ecx and %edx, so while the number of possibilities is sheer,
1628 Make sure we only skip these instructions if we later see the
1629 `movl %esp, %ebp' that actually sets up the frame. */
1630 while (pc
+ skip
< limit
)
1632 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
1639 /* If that's all, return now. */
1640 if (limit
<= pc
+ skip
)
1643 if (target_read_code (pc
+ skip
, &op
, 1))
1646 /* The i386 prologue looks like
1652 and a different prologue can be generated for atom.
1656 lea -0x10(%esp),%esp
1658 We handle both of them here. */
1662 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
1664 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1670 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1675 case 0x8d: /* Check for 'lea (%ebp), %ebp'. */
1676 if (read_code_unsigned_integer (pc
+ skip
+ 1, 2, byte_order
)
1685 /* OK, we actually have a frame. We just don't know how large
1686 it is yet. Set its size to zero. We'll adjust it if
1687 necessary. We also now commit to skipping the special
1688 instructions mentioned before. */
1691 /* If that's all, return now. */
1695 /* Check for stack adjustment
1701 NOTE: You can't subtract a 16-bit immediate from a 32-bit
1702 reg, so we don't have to worry about a data16 prefix. */
1703 if (target_read_code (pc
, &op
, 1))
1707 /* `subl' with 8-bit immediate. */
1708 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1709 /* Some instruction starting with 0x83 other than `subl'. */
1712 /* `subl' with signed 8-bit immediate (though it wouldn't
1713 make sense to be negative). */
1714 cache
->locals
= read_code_integer (pc
+ 2, 1, byte_order
);
1717 else if (op
== 0x81)
1719 /* Maybe it is `subl' with a 32-bit immediate. */
1720 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1721 /* Some instruction starting with 0x81 other than `subl'. */
1724 /* It is `subl' with a 32-bit immediate. */
1725 cache
->locals
= read_code_integer (pc
+ 2, 4, byte_order
);
1728 else if (op
== 0x8d)
1730 /* The ModR/M byte is 0x64. */
1731 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0x64)
1733 /* 'lea' with 8-bit displacement. */
1734 cache
->locals
= -1 * read_code_integer (pc
+ 3, 1, byte_order
);
1739 /* Some instruction other than `subl' nor 'lea'. */
1743 else if (op
== 0xc8) /* enter */
1745 cache
->locals
= read_code_unsigned_integer (pc
+ 1, 2, byte_order
);
1752 /* Check whether PC points at code that saves registers on the stack.
1753 If so, it updates CACHE and returns the address of the first
1754 instruction after the register saves or CURRENT_PC, whichever is
1755 smaller. Otherwise, return PC. */
1758 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
1759 struct i386_frame_cache
*cache
)
1761 CORE_ADDR offset
= 0;
1765 if (cache
->locals
> 0)
1766 offset
-= cache
->locals
;
1767 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
1769 if (target_read_code (pc
, &op
, 1))
1771 if (op
< 0x50 || op
> 0x57)
1775 cache
->saved_regs
[op
- 0x50] = offset
;
1776 cache
->sp_offset
+= 4;
1783 /* Do a full analysis of the prologue at PC and update CACHE
1784 accordingly. Bail out early if CURRENT_PC is reached. Return the
1785 address where the analysis stopped.
1787 We handle these cases:
1789 The startup sequence can be at the start of the function, or the
1790 function can start with a branch to startup code at the end.
1792 %ebp can be set up with either the 'enter' instruction, or "pushl
1793 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
1794 once used in the System V compiler).
1796 Local space is allocated just below the saved %ebp by either the
1797 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
1798 16-bit unsigned argument for space to allocate, and the 'addl'
1799 instruction could have either a signed byte, or 32-bit immediate.
1801 Next, the registers used by this function are pushed. With the
1802 System V compiler they will always be in the order: %edi, %esi,
1803 %ebx (and sometimes a harmless bug causes it to also save but not
1804 restore %eax); however, the code below is willing to see the pushes
1805 in any order, and will handle up to 8 of them.
1807 If the setup sequence is at the end of the function, then the next
1808 instruction will be a branch back to the start. */
1811 i386_analyze_prologue (struct gdbarch
*gdbarch
,
1812 CORE_ADDR pc
, CORE_ADDR current_pc
,
1813 struct i386_frame_cache
*cache
)
1815 pc
= i386_skip_endbr (pc
);
1816 pc
= i386_skip_noop (pc
);
1817 pc
= i386_follow_jump (gdbarch
, pc
);
1818 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
1819 pc
= i386_skip_probe (pc
);
1820 pc
= i386_analyze_stack_align (pc
, current_pc
, cache
);
1821 pc
= i386_analyze_frame_setup (gdbarch
, pc
, current_pc
, cache
);
1822 return i386_analyze_register_saves (pc
, current_pc
, cache
);
1825 /* Return PC of first real instruction. */
1828 i386_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
)
1830 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1832 static gdb_byte pic_pat
[6] =
1834 0xe8, 0, 0, 0, 0, /* call 0x0 */
1835 0x5b, /* popl %ebx */
1837 struct i386_frame_cache cache
;
1841 CORE_ADDR func_addr
;
1843 if (find_pc_partial_function (start_pc
, NULL
, &func_addr
, NULL
))
1845 CORE_ADDR post_prologue_pc
1846 = skip_prologue_using_sal (gdbarch
, func_addr
);
1847 struct compunit_symtab
*cust
= find_pc_compunit_symtab (func_addr
);
1849 /* LLVM backend (Clang/Flang) always emits a line note before the
1850 prologue and another one after. We trust clang to emit usable
1852 if (post_prologue_pc
1854 && COMPUNIT_PRODUCER (cust
) != NULL
1855 && producer_is_llvm (COMPUNIT_PRODUCER (cust
))))
1856 return std::max (start_pc
, post_prologue_pc
);
1860 pc
= i386_analyze_prologue (gdbarch
, start_pc
, 0xffffffff, &cache
);
1861 if (cache
.locals
< 0)
1864 /* Found valid frame setup. */
1866 /* The native cc on SVR4 in -K PIC mode inserts the following code
1867 to get the address of the global offset table (GOT) into register
1872 movl %ebx,x(%ebp) (optional)
1875 This code is with the rest of the prologue (at the end of the
1876 function), so we have to skip it to get to the first real
1877 instruction at the start of the function. */
1879 for (i
= 0; i
< 6; i
++)
1881 if (target_read_code (pc
+ i
, &op
, 1))
1884 if (pic_pat
[i
] != op
)
1891 if (target_read_code (pc
+ delta
, &op
, 1))
1894 if (op
== 0x89) /* movl %ebx, x(%ebp) */
1896 op
= read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
);
1898 if (op
== 0x5d) /* One byte offset from %ebp. */
1900 else if (op
== 0x9d) /* Four byte offset from %ebp. */
1902 else /* Unexpected instruction. */
1905 if (target_read_code (pc
+ delta
, &op
, 1))
1910 if (delta
> 0 && op
== 0x81
1911 && read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
)
1918 /* If the function starts with a branch (to startup code at the end)
1919 the last instruction should bring us back to the first
1920 instruction of the real code. */
1921 if (i386_follow_jump (gdbarch
, start_pc
) != start_pc
)
1922 pc
= i386_follow_jump (gdbarch
, pc
);
1927 /* Check that the code pointed to by PC corresponds to a call to
1928 __main, skip it if so. Return PC otherwise. */
1931 i386_skip_main_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1933 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1936 if (target_read_code (pc
, &op
, 1))
1942 if (target_read_code (pc
+ 1, buf
, sizeof buf
) == 0)
1944 /* Make sure address is computed correctly as a 32bit
1945 integer even if CORE_ADDR is 64 bit wide. */
1946 struct bound_minimal_symbol s
;
1947 CORE_ADDR call_dest
;
1949 call_dest
= pc
+ 5 + extract_signed_integer (buf
, 4, byte_order
);
1950 call_dest
= call_dest
& 0xffffffffU
;
1951 s
= lookup_minimal_symbol_by_pc (call_dest
);
1952 if (s
.minsym
!= NULL
1953 && s
.minsym
->linkage_name () != NULL
1954 && strcmp (s
.minsym
->linkage_name (), "__main") == 0)
1962 /* This function is 64-bit safe. */
1965 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1969 frame_unwind_register (next_frame
, gdbarch_pc_regnum (gdbarch
), buf
);
1970 return extract_typed_address (buf
, builtin_type (gdbarch
)->builtin_func_ptr
);
1974 /* Normal frames. */
1977 i386_frame_cache_1 (struct frame_info
*this_frame
,
1978 struct i386_frame_cache
*cache
)
1980 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1981 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1985 cache
->pc
= get_frame_func (this_frame
);
1987 /* In principle, for normal frames, %ebp holds the frame pointer,
1988 which holds the base address for the current stack frame.
1989 However, for functions that don't need it, the frame pointer is
1990 optional. For these "frameless" functions the frame pointer is
1991 actually the frame pointer of the calling frame. Signal
1992 trampolines are just a special case of a "frameless" function.
1993 They (usually) share their frame pointer with the frame that was
1994 in progress when the signal occurred. */
1996 get_frame_register (this_frame
, I386_EBP_REGNUM
, buf
);
1997 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
);
1998 if (cache
->base
== 0)
2004 /* For normal frames, %eip is stored at 4(%ebp). */
2005 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
2008 i386_analyze_prologue (gdbarch
, cache
->pc
, get_frame_pc (this_frame
),
2011 if (cache
->locals
< 0)
2013 /* We didn't find a valid frame, which means that CACHE->base
2014 currently holds the frame pointer for our calling frame. If
2015 we're at the start of a function, or somewhere half-way its
2016 prologue, the function's frame probably hasn't been fully
2017 setup yet. Try to reconstruct the base address for the stack
2018 frame by looking at the stack pointer. For truly "frameless"
2019 functions this might work too. */
2021 if (cache
->saved_sp_reg
!= -1)
2023 /* Saved stack pointer has been saved. */
2024 get_frame_register (this_frame
, cache
->saved_sp_reg
, buf
);
2025 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2027 /* We're halfway aligning the stack. */
2028 cache
->base
= ((cache
->saved_sp
- 4) & 0xfffffff0) - 4;
2029 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->saved_sp
- 4;
2031 /* This will be added back below. */
2032 cache
->saved_regs
[I386_EIP_REGNUM
] -= cache
->base
;
2034 else if (cache
->pc
!= 0
2035 || target_read_code (get_frame_pc (this_frame
), buf
, 1))
2037 /* We're in a known function, but did not find a frame
2038 setup. Assume that the function does not use %ebp.
2039 Alternatively, we may have jumped to an invalid
2040 address; in that case there is definitely no new
2042 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2043 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
)
2047 /* We're in an unknown function. We could not find the start
2048 of the function to analyze the prologue; our best option is
2049 to assume a typical frame layout with the caller's %ebp
2051 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
2054 if (cache
->saved_sp_reg
!= -1)
2056 /* Saved stack pointer has been saved (but the SAVED_SP_REG
2057 register may be unavailable). */
2058 if (cache
->saved_sp
== 0
2059 && deprecated_frame_register_read (this_frame
,
2060 cache
->saved_sp_reg
, buf
))
2061 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2063 /* Now that we have the base address for the stack frame we can
2064 calculate the value of %esp in the calling frame. */
2065 else if (cache
->saved_sp
== 0)
2066 cache
->saved_sp
= cache
->base
+ 8;
2068 /* Adjust all the saved registers such that they contain addresses
2069 instead of offsets. */
2070 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
2071 if (cache
->saved_regs
[i
] != -1)
2072 cache
->saved_regs
[i
] += cache
->base
;
2077 static struct i386_frame_cache
*
2078 i386_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2080 struct i386_frame_cache
*cache
;
2083 return (struct i386_frame_cache
*) *this_cache
;
2085 cache
= i386_alloc_frame_cache ();
2086 *this_cache
= cache
;
2090 i386_frame_cache_1 (this_frame
, cache
);
2092 catch (const gdb_exception_error
&ex
)
2094 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2102 i386_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2103 struct frame_id
*this_id
)
2105 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2108 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2109 else if (cache
->base
== 0)
2111 /* This marks the outermost frame. */
2115 /* See the end of i386_push_dummy_call. */
2116 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2120 static enum unwind_stop_reason
2121 i386_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2124 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2127 return UNWIND_UNAVAILABLE
;
2129 /* This marks the outermost frame. */
2130 if (cache
->base
== 0)
2131 return UNWIND_OUTERMOST
;
2133 return UNWIND_NO_REASON
;
2136 static struct value
*
2137 i386_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
2140 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2142 gdb_assert (regnum
>= 0);
2144 /* The System V ABI says that:
2146 "The flags register contains the system flags, such as the
2147 direction flag and the carry flag. The direction flag must be
2148 set to the forward (that is, zero) direction before entry and
2149 upon exit from a function. Other user flags have no specified
2150 role in the standard calling sequence and are not preserved."
2152 To guarantee the "upon exit" part of that statement we fake a
2153 saved flags register that has its direction flag cleared.
2155 Note that GCC doesn't seem to rely on the fact that the direction
2156 flag is cleared after a function return; it always explicitly
2157 clears the flag before operations where it matters.
2159 FIXME: kettenis/20030316: I'm not quite sure whether this is the
2160 right thing to do. The way we fake the flags register here makes
2161 it impossible to change it. */
2163 if (regnum
== I386_EFLAGS_REGNUM
)
2167 val
= get_frame_register_unsigned (this_frame
, regnum
);
2169 return frame_unwind_got_constant (this_frame
, regnum
, val
);
2172 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
2173 return frame_unwind_got_register (this_frame
, regnum
, I386_EAX_REGNUM
);
2175 if (regnum
== I386_ESP_REGNUM
2176 && (cache
->saved_sp
!= 0 || cache
->saved_sp_reg
!= -1))
2178 /* If the SP has been saved, but we don't know where, then this
2179 means that SAVED_SP_REG register was found unavailable back
2180 when we built the cache. */
2181 if (cache
->saved_sp
== 0)
2182 return frame_unwind_got_register (this_frame
, regnum
,
2183 cache
->saved_sp_reg
);
2185 return frame_unwind_got_constant (this_frame
, regnum
,
2189 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
2190 return frame_unwind_got_memory (this_frame
, regnum
,
2191 cache
->saved_regs
[regnum
]);
2193 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2196 static const struct frame_unwind i386_frame_unwind
=
2199 i386_frame_unwind_stop_reason
,
2201 i386_frame_prev_register
,
2203 default_frame_sniffer
2206 /* Normal frames, but in a function epilogue. */
2208 /* Implement the stack_frame_destroyed_p gdbarch method.
2210 The epilogue is defined here as the 'ret' instruction, which will
2211 follow any instruction such as 'leave' or 'pop %ebp' that destroys
2212 the function's stack frame. */
2215 i386_stack_frame_destroyed_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
2218 struct compunit_symtab
*cust
;
2220 cust
= find_pc_compunit_symtab (pc
);
2221 if (cust
!= NULL
&& COMPUNIT_EPILOGUE_UNWIND_VALID (cust
))
2224 if (target_read_memory (pc
, &insn
, 1))
2225 return 0; /* Can't read memory at pc. */
2227 if (insn
!= 0xc3) /* 'ret' instruction. */
2234 i386_epilogue_frame_sniffer (const struct frame_unwind
*self
,
2235 struct frame_info
*this_frame
,
2236 void **this_prologue_cache
)
2238 if (frame_relative_level (this_frame
) == 0)
2239 return i386_stack_frame_destroyed_p (get_frame_arch (this_frame
),
2240 get_frame_pc (this_frame
));
2245 static struct i386_frame_cache
*
2246 i386_epilogue_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2248 struct i386_frame_cache
*cache
;
2252 return (struct i386_frame_cache
*) *this_cache
;
2254 cache
= i386_alloc_frame_cache ();
2255 *this_cache
= cache
;
2259 cache
->pc
= get_frame_func (this_frame
);
2261 /* At this point the stack looks as if we just entered the
2262 function, with the return address at the top of the
2264 sp
= get_frame_register_unsigned (this_frame
, I386_ESP_REGNUM
);
2265 cache
->base
= sp
+ cache
->sp_offset
;
2266 cache
->saved_sp
= cache
->base
+ 8;
2267 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->base
+ 4;
2271 catch (const gdb_exception_error
&ex
)
2273 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2280 static enum unwind_stop_reason
2281 i386_epilogue_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2284 struct i386_frame_cache
*cache
=
2285 i386_epilogue_frame_cache (this_frame
, this_cache
);
2288 return UNWIND_UNAVAILABLE
;
2290 return UNWIND_NO_REASON
;
2294 i386_epilogue_frame_this_id (struct frame_info
*this_frame
,
2296 struct frame_id
*this_id
)
2298 struct i386_frame_cache
*cache
=
2299 i386_epilogue_frame_cache (this_frame
, this_cache
);
2302 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2304 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2307 static struct value
*
2308 i386_epilogue_frame_prev_register (struct frame_info
*this_frame
,
2309 void **this_cache
, int regnum
)
2311 /* Make sure we've initialized the cache. */
2312 i386_epilogue_frame_cache (this_frame
, this_cache
);
2314 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2317 static const struct frame_unwind i386_epilogue_frame_unwind
=
2320 i386_epilogue_frame_unwind_stop_reason
,
2321 i386_epilogue_frame_this_id
,
2322 i386_epilogue_frame_prev_register
,
2324 i386_epilogue_frame_sniffer
2328 /* Stack-based trampolines. */
2330 /* These trampolines are used on cross x86 targets, when taking the
2331 address of a nested function. When executing these trampolines,
2332 no stack frame is set up, so we are in a similar situation as in
2333 epilogues and i386_epilogue_frame_this_id can be re-used. */
2335 /* Static chain passed in register. */
2337 static i386_insn i386_tramp_chain_in_reg_insns
[] =
2339 /* `movl imm32, %eax' and `movl imm32, %ecx' */
2340 { 5, { 0xb8 }, { 0xfe } },
2343 { 5, { 0xe9 }, { 0xff } },
2348 /* Static chain passed on stack (when regparm=3). */
2350 static i386_insn i386_tramp_chain_on_stack_insns
[] =
2353 { 5, { 0x68 }, { 0xff } },
2356 { 5, { 0xe9 }, { 0xff } },
2361 /* Return whether PC points inside a stack trampoline. */
2364 i386_in_stack_tramp_p (CORE_ADDR pc
)
2369 /* A stack trampoline is detected if no name is associated
2370 to the current pc and if it points inside a trampoline
2373 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2377 if (target_read_memory (pc
, &insn
, 1))
2380 if (!i386_match_insn_block (pc
, i386_tramp_chain_in_reg_insns
)
2381 && !i386_match_insn_block (pc
, i386_tramp_chain_on_stack_insns
))
2388 i386_stack_tramp_frame_sniffer (const struct frame_unwind
*self
,
2389 struct frame_info
*this_frame
,
2392 if (frame_relative_level (this_frame
) == 0)
2393 return i386_in_stack_tramp_p (get_frame_pc (this_frame
));
2398 static const struct frame_unwind i386_stack_tramp_frame_unwind
=
2401 i386_epilogue_frame_unwind_stop_reason
,
2402 i386_epilogue_frame_this_id
,
2403 i386_epilogue_frame_prev_register
,
2405 i386_stack_tramp_frame_sniffer
2408 /* Generate a bytecode expression to get the value of the saved PC. */
2411 i386_gen_return_address (struct gdbarch
*gdbarch
,
2412 struct agent_expr
*ax
, struct axs_value
*value
,
2415 /* The following sequence assumes the traditional use of the base
2417 ax_reg (ax
, I386_EBP_REGNUM
);
2419 ax_simple (ax
, aop_add
);
2420 value
->type
= register_type (gdbarch
, I386_EIP_REGNUM
);
2421 value
->kind
= axs_lvalue_memory
;
2425 /* Signal trampolines. */
2427 static struct i386_frame_cache
*
2428 i386_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2430 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2431 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2432 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2433 struct i386_frame_cache
*cache
;
2438 return (struct i386_frame_cache
*) *this_cache
;
2440 cache
= i386_alloc_frame_cache ();
2444 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2445 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
) - 4;
2447 addr
= tdep
->sigcontext_addr (this_frame
);
2448 if (tdep
->sc_reg_offset
)
2452 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
2454 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
2455 if (tdep
->sc_reg_offset
[i
] != -1)
2456 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
2460 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
2461 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
2466 catch (const gdb_exception_error
&ex
)
2468 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2472 *this_cache
= cache
;
2476 static enum unwind_stop_reason
2477 i386_sigtramp_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2480 struct i386_frame_cache
*cache
=
2481 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2484 return UNWIND_UNAVAILABLE
;
2486 return UNWIND_NO_REASON
;
2490 i386_sigtramp_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2491 struct frame_id
*this_id
)
2493 struct i386_frame_cache
*cache
=
2494 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2497 (*this_id
) = frame_id_build_unavailable_stack (get_frame_pc (this_frame
));
2500 /* See the end of i386_push_dummy_call. */
2501 (*this_id
) = frame_id_build (cache
->base
+ 8, get_frame_pc (this_frame
));
2505 static struct value
*
2506 i386_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2507 void **this_cache
, int regnum
)
2509 /* Make sure we've initialized the cache. */
2510 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2512 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2516 i386_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2517 struct frame_info
*this_frame
,
2518 void **this_prologue_cache
)
2520 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2522 /* We shouldn't even bother if we don't have a sigcontext_addr
2524 if (tdep
->sigcontext_addr
== NULL
)
2527 if (tdep
->sigtramp_p
!= NULL
)
2529 if (tdep
->sigtramp_p (this_frame
))
2533 if (tdep
->sigtramp_start
!= 0)
2535 CORE_ADDR pc
= get_frame_pc (this_frame
);
2537 gdb_assert (tdep
->sigtramp_end
!= 0);
2538 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
2545 static const struct frame_unwind i386_sigtramp_frame_unwind
=
2548 i386_sigtramp_frame_unwind_stop_reason
,
2549 i386_sigtramp_frame_this_id
,
2550 i386_sigtramp_frame_prev_register
,
2552 i386_sigtramp_frame_sniffer
2557 i386_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2559 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2564 static const struct frame_base i386_frame_base
=
2567 i386_frame_base_address
,
2568 i386_frame_base_address
,
2569 i386_frame_base_address
2572 static struct frame_id
2573 i386_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
2577 fp
= get_frame_register_unsigned (this_frame
, I386_EBP_REGNUM
);
2579 /* See the end of i386_push_dummy_call. */
2580 return frame_id_build (fp
+ 8, get_frame_pc (this_frame
));
2583 /* _Decimal128 function return values need 16-byte alignment on the
2587 i386_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
2589 return sp
& -(CORE_ADDR
)16;
2593 /* Figure out where the longjmp will land. Slurp the args out of the
2594 stack. We expect the first arg to be a pointer to the jmp_buf
2595 structure from which we extract the address that we will land at.
2596 This address is copied into PC. This routine returns non-zero on
2600 i386_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
2603 CORE_ADDR sp
, jb_addr
;
2604 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2605 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2606 int jb_pc_offset
= gdbarch_tdep (gdbarch
)->jb_pc_offset
;
2608 /* If JB_PC_OFFSET is -1, we have no way to find out where the
2609 longjmp will land. */
2610 if (jb_pc_offset
== -1)
2613 get_frame_register (frame
, I386_ESP_REGNUM
, buf
);
2614 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2615 if (target_read_memory (sp
+ 4, buf
, 4))
2618 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
2619 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, 4))
2622 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
2627 /* Check whether TYPE must be 16-byte-aligned when passed as a
2628 function argument. 16-byte vectors, _Decimal128 and structures or
2629 unions containing such types must be 16-byte-aligned; other
2630 arguments are 4-byte-aligned. */
2633 i386_16_byte_align_p (struct type
*type
)
2635 type
= check_typedef (type
);
2636 if ((type
->code () == TYPE_CODE_DECFLOAT
2637 || (type
->code () == TYPE_CODE_ARRAY
&& type
->is_vector ()))
2638 && TYPE_LENGTH (type
) == 16)
2640 if (type
->code () == TYPE_CODE_ARRAY
)
2641 return i386_16_byte_align_p (TYPE_TARGET_TYPE (type
));
2642 if (type
->code () == TYPE_CODE_STRUCT
2643 || type
->code () == TYPE_CODE_UNION
)
2646 for (i
= 0; i
< type
->num_fields (); i
++)
2648 if (field_is_static (&type
->field (i
)))
2650 if (i386_16_byte_align_p (type
->field (i
).type ()))
2657 /* Implementation for set_gdbarch_push_dummy_code. */
2660 i386_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
2661 struct value
**args
, int nargs
, struct type
*value_type
,
2662 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
2663 struct regcache
*regcache
)
2665 /* Use 0xcc breakpoint - 1 byte. */
2669 /* Keep the stack aligned. */
2673 /* The "push_dummy_call" gdbarch method, optionally with the thiscall
2674 calling convention. */
2677 i386_thiscall_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2678 struct regcache
*regcache
, CORE_ADDR bp_addr
,
2679 int nargs
, struct value
**args
, CORE_ADDR sp
,
2680 function_call_return_method return_method
,
2681 CORE_ADDR struct_addr
, bool thiscall
)
2683 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2689 /* BND registers can be in arbitrary values at the moment of the
2690 inferior call. This can cause boundary violations that are not
2691 due to a real bug or even desired by the user. The best to be done
2692 is set the BND registers to allow access to the whole memory, INIT
2693 state, before pushing the inferior call. */
2694 i387_reset_bnd_regs (gdbarch
, regcache
);
2696 /* Determine the total space required for arguments and struct
2697 return address in a first pass (allowing for 16-byte-aligned
2698 arguments), then push arguments in a second pass. */
2700 for (write_pass
= 0; write_pass
< 2; write_pass
++)
2702 int args_space_used
= 0;
2704 if (return_method
== return_method_struct
)
2708 /* Push value address. */
2709 store_unsigned_integer (buf
, 4, byte_order
, struct_addr
);
2710 write_memory (sp
, buf
, 4);
2711 args_space_used
+= 4;
2717 for (i
= thiscall
? 1 : 0; i
< nargs
; i
++)
2719 int len
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
2723 if (i386_16_byte_align_p (value_enclosing_type (args
[i
])))
2724 args_space_used
= align_up (args_space_used
, 16);
2726 write_memory (sp
+ args_space_used
,
2727 value_contents_all (args
[i
]), len
);
2728 /* The System V ABI says that:
2730 "An argument's size is increased, if necessary, to make it a
2731 multiple of [32-bit] words. This may require tail padding,
2732 depending on the size of the argument."
2734 This makes sure the stack stays word-aligned. */
2735 args_space_used
+= align_up (len
, 4);
2739 if (i386_16_byte_align_p (value_enclosing_type (args
[i
])))
2740 args_space
= align_up (args_space
, 16);
2741 args_space
+= align_up (len
, 4);
2749 /* The original System V ABI only requires word alignment,
2750 but modern incarnations need 16-byte alignment in order
2751 to support SSE. Since wasting a few bytes here isn't
2752 harmful we unconditionally enforce 16-byte alignment. */
2757 /* Store return address. */
2759 store_unsigned_integer (buf
, 4, byte_order
, bp_addr
);
2760 write_memory (sp
, buf
, 4);
2762 /* Finally, update the stack pointer... */
2763 store_unsigned_integer (buf
, 4, byte_order
, sp
);
2764 regcache
->cooked_write (I386_ESP_REGNUM
, buf
);
2766 /* ...and fake a frame pointer. */
2767 regcache
->cooked_write (I386_EBP_REGNUM
, buf
);
2769 /* The 'this' pointer needs to be in ECX. */
2771 regcache
->cooked_write (I386_ECX_REGNUM
, value_contents_all (args
[0]));
2773 /* MarkK wrote: This "+ 8" is all over the place:
2774 (i386_frame_this_id, i386_sigtramp_frame_this_id,
2775 i386_dummy_id). It's there, since all frame unwinders for
2776 a given target have to agree (within a certain margin) on the
2777 definition of the stack address of a frame. Otherwise frame id
2778 comparison might not work correctly. Since DWARF2/GCC uses the
2779 stack address *before* the function call as a frame's CFA. On
2780 the i386, when %ebp is used as a frame pointer, the offset
2781 between the contents %ebp and the CFA as defined by GCC. */
2785 /* Implement the "push_dummy_call" gdbarch method. */
2788 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2789 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
2790 struct value
**args
, CORE_ADDR sp
,
2791 function_call_return_method return_method
,
2792 CORE_ADDR struct_addr
)
2794 return i386_thiscall_push_dummy_call (gdbarch
, function
, regcache
, bp_addr
,
2795 nargs
, args
, sp
, return_method
,
2796 struct_addr
, false);
2799 /* These registers are used for returning integers (and on some
2800 targets also for returning `struct' and `union' values when their
2801 size and alignment match an integer type). */
2802 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
2803 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
2805 /* Read, for architecture GDBARCH, a function return value of TYPE
2806 from REGCACHE, and copy that into VALBUF. */
2809 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2810 struct regcache
*regcache
, gdb_byte
*valbuf
)
2812 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2813 int len
= TYPE_LENGTH (type
);
2814 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2816 if (type
->code () == TYPE_CODE_FLT
)
2818 if (tdep
->st0_regnum
< 0)
2820 warning (_("Cannot find floating-point return value."));
2821 memset (valbuf
, 0, len
);
2825 /* Floating-point return values can be found in %st(0). Convert
2826 its contents to the desired type. This is probably not
2827 exactly how it would happen on the target itself, but it is
2828 the best we can do. */
2829 regcache
->raw_read (I386_ST0_REGNUM
, buf
);
2830 target_float_convert (buf
, i387_ext_type (gdbarch
), valbuf
, type
);
2834 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2835 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2837 if (len
<= low_size
)
2839 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2840 memcpy (valbuf
, buf
, len
);
2842 else if (len
<= (low_size
+ high_size
))
2844 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2845 memcpy (valbuf
, buf
, low_size
);
2846 regcache
->raw_read (HIGH_RETURN_REGNUM
, buf
);
2847 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
2850 internal_error (__FILE__
, __LINE__
,
2851 _("Cannot extract return value of %d bytes long."),
2856 /* Write, for architecture GDBARCH, a function return value of TYPE
2857 from VALBUF into REGCACHE. */
2860 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2861 struct regcache
*regcache
, const gdb_byte
*valbuf
)
2863 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2864 int len
= TYPE_LENGTH (type
);
2866 if (type
->code () == TYPE_CODE_FLT
)
2869 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2871 if (tdep
->st0_regnum
< 0)
2873 warning (_("Cannot set floating-point return value."));
2877 /* Returning floating-point values is a bit tricky. Apart from
2878 storing the return value in %st(0), we have to simulate the
2879 state of the FPU at function return point. */
2881 /* Convert the value found in VALBUF to the extended
2882 floating-point format used by the FPU. This is probably
2883 not exactly how it would happen on the target itself, but
2884 it is the best we can do. */
2885 target_float_convert (valbuf
, type
, buf
, i387_ext_type (gdbarch
));
2886 regcache
->raw_write (I386_ST0_REGNUM
, buf
);
2888 /* Set the top of the floating-point register stack to 7. The
2889 actual value doesn't really matter, but 7 is what a normal
2890 function return would end up with if the program started out
2891 with a freshly initialized FPU. */
2892 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
2894 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
2896 /* Mark %st(1) through %st(7) as empty. Since we set the top of
2897 the floating-point register stack to 7, the appropriate value
2898 for the tag word is 0x3fff. */
2899 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
2903 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2904 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2906 if (len
<= low_size
)
2907 regcache
->raw_write_part (LOW_RETURN_REGNUM
, 0, len
, valbuf
);
2908 else if (len
<= (low_size
+ high_size
))
2910 regcache
->raw_write (LOW_RETURN_REGNUM
, valbuf
);
2911 regcache
->raw_write_part (HIGH_RETURN_REGNUM
, 0, len
- low_size
,
2915 internal_error (__FILE__
, __LINE__
,
2916 _("Cannot store return value of %d bytes long."), len
);
2921 /* This is the variable that is set with "set struct-convention", and
2922 its legitimate values. */
2923 static const char default_struct_convention
[] = "default";
2924 static const char pcc_struct_convention
[] = "pcc";
2925 static const char reg_struct_convention
[] = "reg";
2926 static const char *const valid_conventions
[] =
2928 default_struct_convention
,
2929 pcc_struct_convention
,
2930 reg_struct_convention
,
2933 static const char *struct_convention
= default_struct_convention
;
2935 /* Return non-zero if TYPE, which is assumed to be a structure,
2936 a union type, or an array type, should be returned in registers
2937 for architecture GDBARCH. */
2940 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
2942 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2943 enum type_code code
= type
->code ();
2944 int len
= TYPE_LENGTH (type
);
2946 gdb_assert (code
== TYPE_CODE_STRUCT
2947 || code
== TYPE_CODE_UNION
2948 || code
== TYPE_CODE_ARRAY
);
2950 if (struct_convention
== pcc_struct_convention
2951 || (struct_convention
== default_struct_convention
2952 && tdep
->struct_return
== pcc_struct_return
))
2955 /* Structures consisting of a single `float', `double' or 'long
2956 double' member are returned in %st(0). */
2957 if (code
== TYPE_CODE_STRUCT
&& type
->num_fields () == 1)
2959 type
= check_typedef (type
->field (0).type ());
2960 if (type
->code () == TYPE_CODE_FLT
)
2961 return (len
== 4 || len
== 8 || len
== 12);
2964 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
2967 /* Determine, for architecture GDBARCH, how a return value of TYPE
2968 should be returned. If it is supposed to be returned in registers,
2969 and READBUF is non-zero, read the appropriate value from REGCACHE,
2970 and copy it into READBUF. If WRITEBUF is non-zero, write the value
2971 from WRITEBUF into REGCACHE. */
2973 static enum return_value_convention
2974 i386_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
2975 struct type
*type
, struct regcache
*regcache
,
2976 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
2978 enum type_code code
= type
->code ();
2980 if (((code
== TYPE_CODE_STRUCT
2981 || code
== TYPE_CODE_UNION
2982 || code
== TYPE_CODE_ARRAY
)
2983 && !i386_reg_struct_return_p (gdbarch
, type
))
2984 /* Complex double and long double uses the struct return convention. */
2985 || (code
== TYPE_CODE_COMPLEX
&& TYPE_LENGTH (type
) == 16)
2986 || (code
== TYPE_CODE_COMPLEX
&& TYPE_LENGTH (type
) == 24)
2987 /* 128-bit decimal float uses the struct return convention. */
2988 || (code
== TYPE_CODE_DECFLOAT
&& TYPE_LENGTH (type
) == 16))
2990 /* The System V ABI says that:
2992 "A function that returns a structure or union also sets %eax
2993 to the value of the original address of the caller's area
2994 before it returns. Thus when the caller receives control
2995 again, the address of the returned object resides in register
2996 %eax and can be used to access the object."
2998 So the ABI guarantees that we can always find the return
2999 value just after the function has returned. */
3001 /* Note that the ABI doesn't mention functions returning arrays,
3002 which is something possible in certain languages such as Ada.
3003 In this case, the value is returned as if it was wrapped in
3004 a record, so the convention applied to records also applies
3011 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
3012 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
3015 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
3018 /* This special case is for structures consisting of a single
3019 `float', `double' or 'long double' member. These structures are
3020 returned in %st(0). For these structures, we call ourselves
3021 recursively, changing TYPE into the type of the first member of
3022 the structure. Since that should work for all structures that
3023 have only one member, we don't bother to check the member's type
3025 if (code
== TYPE_CODE_STRUCT
&& type
->num_fields () == 1)
3027 type
= check_typedef (type
->field (0).type ());
3028 return i386_return_value (gdbarch
, function
, type
, regcache
,
3033 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
3035 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
3037 return RETURN_VALUE_REGISTER_CONVENTION
;
3042 i387_ext_type (struct gdbarch
*gdbarch
)
3044 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3046 if (!tdep
->i387_ext_type
)
3048 tdep
->i387_ext_type
= tdesc_find_type (gdbarch
, "i387_ext");
3049 gdb_assert (tdep
->i387_ext_type
!= NULL
);
3052 return tdep
->i387_ext_type
;
3055 /* Construct type for pseudo BND registers. We can't use
3056 tdesc_find_type since a complement of one value has to be used
3057 to describe the upper bound. */
3059 static struct type
*
3060 i386_bnd_type (struct gdbarch
*gdbarch
)
3062 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3065 if (!tdep
->i386_bnd_type
)
3068 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3070 /* The type we're building is described bellow: */
3075 void *ubound
; /* One complement of raw ubound field. */
3079 t
= arch_composite_type (gdbarch
,
3080 "__gdb_builtin_type_bound128", TYPE_CODE_STRUCT
);
3082 append_composite_type_field (t
, "lbound", bt
->builtin_data_ptr
);
3083 append_composite_type_field (t
, "ubound", bt
->builtin_data_ptr
);
3085 t
->set_name ("builtin_type_bound128");
3086 tdep
->i386_bnd_type
= t
;
3089 return tdep
->i386_bnd_type
;
3092 /* Construct vector type for pseudo ZMM registers. We can't use
3093 tdesc_find_type since ZMM isn't described in target description. */
3095 static struct type
*
3096 i386_zmm_type (struct gdbarch
*gdbarch
)
3098 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3100 if (!tdep
->i386_zmm_type
)
3102 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3104 /* The type we're building is this: */
3106 union __gdb_builtin_type_vec512i
3108 int128_t v4_int128
[4];
3109 int64_t v8_int64
[8];
3110 int32_t v16_int32
[16];
3111 int16_t v32_int16
[32];
3112 int8_t v64_int8
[64];
3113 double v8_double
[8];
3114 float v16_float
[16];
3115 bfloat16_t v32_bfloat16
[32];
3121 t
= arch_composite_type (gdbarch
,
3122 "__gdb_builtin_type_vec512i", TYPE_CODE_UNION
);
3123 append_composite_type_field (t
, "v32_bfloat16",
3124 init_vector_type (bt
->builtin_bfloat16
, 32));
3125 append_composite_type_field (t
, "v16_float",
3126 init_vector_type (bt
->builtin_float
, 16));
3127 append_composite_type_field (t
, "v8_double",
3128 init_vector_type (bt
->builtin_double
, 8));
3129 append_composite_type_field (t
, "v64_int8",
3130 init_vector_type (bt
->builtin_int8
, 64));
3131 append_composite_type_field (t
, "v32_int16",
3132 init_vector_type (bt
->builtin_int16
, 32));
3133 append_composite_type_field (t
, "v16_int32",
3134 init_vector_type (bt
->builtin_int32
, 16));
3135 append_composite_type_field (t
, "v8_int64",
3136 init_vector_type (bt
->builtin_int64
, 8));
3137 append_composite_type_field (t
, "v4_int128",
3138 init_vector_type (bt
->builtin_int128
, 4));
3140 t
->set_is_vector (true);
3141 t
->set_name ("builtin_type_vec512i");
3142 tdep
->i386_zmm_type
= t
;
3145 return tdep
->i386_zmm_type
;
3148 /* Construct vector type for pseudo YMM registers. We can't use
3149 tdesc_find_type since YMM isn't described in target description. */
3151 static struct type
*
3152 i386_ymm_type (struct gdbarch
*gdbarch
)
3154 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3156 if (!tdep
->i386_ymm_type
)
3158 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3160 /* The type we're building is this: */
3162 union __gdb_builtin_type_vec256i
3164 int128_t v2_int128
[2];
3165 int64_t v4_int64
[4];
3166 int32_t v8_int32
[8];
3167 int16_t v16_int16
[16];
3168 int8_t v32_int8
[32];
3169 double v4_double
[4];
3171 bfloat16_t v16_bfloat16
[16];
3177 t
= arch_composite_type (gdbarch
,
3178 "__gdb_builtin_type_vec256i", TYPE_CODE_UNION
);
3179 append_composite_type_field (t
, "v16_bfloat16",
3180 init_vector_type (bt
->builtin_bfloat16
, 16));
3181 append_composite_type_field (t
, "v8_float",
3182 init_vector_type (bt
->builtin_float
, 8));
3183 append_composite_type_field (t
, "v4_double",
3184 init_vector_type (bt
->builtin_double
, 4));
3185 append_composite_type_field (t
, "v32_int8",
3186 init_vector_type (bt
->builtin_int8
, 32));
3187 append_composite_type_field (t
, "v16_int16",
3188 init_vector_type (bt
->builtin_int16
, 16));
3189 append_composite_type_field (t
, "v8_int32",
3190 init_vector_type (bt
->builtin_int32
, 8));
3191 append_composite_type_field (t
, "v4_int64",
3192 init_vector_type (bt
->builtin_int64
, 4));
3193 append_composite_type_field (t
, "v2_int128",
3194 init_vector_type (bt
->builtin_int128
, 2));
3196 t
->set_is_vector (true);
3197 t
->set_name ("builtin_type_vec256i");
3198 tdep
->i386_ymm_type
= t
;
3201 return tdep
->i386_ymm_type
;
3204 /* Construct vector type for MMX registers. */
3205 static struct type
*
3206 i386_mmx_type (struct gdbarch
*gdbarch
)
3208 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3210 if (!tdep
->i386_mmx_type
)
3212 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3214 /* The type we're building is this: */
3216 union __gdb_builtin_type_vec64i
3219 int32_t v2_int32
[2];
3220 int16_t v4_int16
[4];
3227 t
= arch_composite_type (gdbarch
,
3228 "__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
3230 append_composite_type_field (t
, "uint64", bt
->builtin_int64
);
3231 append_composite_type_field (t
, "v2_int32",
3232 init_vector_type (bt
->builtin_int32
, 2));
3233 append_composite_type_field (t
, "v4_int16",
3234 init_vector_type (bt
->builtin_int16
, 4));
3235 append_composite_type_field (t
, "v8_int8",
3236 init_vector_type (bt
->builtin_int8
, 8));
3238 t
->set_is_vector (true);
3239 t
->set_name ("builtin_type_vec64i");
3240 tdep
->i386_mmx_type
= t
;
3243 return tdep
->i386_mmx_type
;
3246 /* Return the GDB type object for the "standard" data type of data in
3250 i386_pseudo_register_type (struct gdbarch
*gdbarch
, int regnum
)
3252 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3253 return i386_bnd_type (gdbarch
);
3254 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3255 return i386_mmx_type (gdbarch
);
3256 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3257 return i386_ymm_type (gdbarch
);
3258 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3259 return i386_ymm_type (gdbarch
);
3260 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3261 return i386_zmm_type (gdbarch
);
3264 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3265 if (i386_byte_regnum_p (gdbarch
, regnum
))
3266 return bt
->builtin_int8
;
3267 else if (i386_word_regnum_p (gdbarch
, regnum
))
3268 return bt
->builtin_int16
;
3269 else if (i386_dword_regnum_p (gdbarch
, regnum
))
3270 return bt
->builtin_int32
;
3271 else if (i386_k_regnum_p (gdbarch
, regnum
))
3272 return bt
->builtin_int64
;
3275 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3278 /* Map a cooked register onto a raw register or memory. For the i386,
3279 the MMX registers need to be mapped onto floating point registers. */
3282 i386_mmx_regnum_to_fp_regnum (readable_regcache
*regcache
, int regnum
)
3284 struct gdbarch_tdep
*tdep
= gdbarch_tdep (regcache
->arch ());
3289 mmxreg
= regnum
- tdep
->mm0_regnum
;
3290 regcache
->raw_read (I387_FSTAT_REGNUM (tdep
), &fstat
);
3291 tos
= (fstat
>> 11) & 0x7;
3292 fpreg
= (mmxreg
+ tos
) % 8;
3294 return (I387_ST0_REGNUM (tdep
) + fpreg
);
3297 /* A helper function for us by i386_pseudo_register_read_value and
3298 amd64_pseudo_register_read_value. It does all the work but reads
3299 the data into an already-allocated value. */
3302 i386_pseudo_register_read_into_value (struct gdbarch
*gdbarch
,
3303 readable_regcache
*regcache
,
3305 struct value
*result_value
)
3307 gdb_byte raw_buf
[I386_MAX_REGISTER_SIZE
];
3308 enum register_status status
;
3309 gdb_byte
*buf
= value_contents_raw (result_value
);
3311 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3313 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
3315 /* Extract (always little endian). */
3316 status
= regcache
->raw_read (fpnum
, raw_buf
);
3317 if (status
!= REG_VALID
)
3318 mark_value_bytes_unavailable (result_value
, 0,
3319 TYPE_LENGTH (value_type (result_value
)));
3321 memcpy (buf
, raw_buf
, register_size (gdbarch
, regnum
));
3325 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3326 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3328 regnum
-= tdep
->bnd0_regnum
;
3330 /* Extract (always little endian). Read lower 128bits. */
3331 status
= regcache
->raw_read (I387_BND0R_REGNUM (tdep
) + regnum
,
3333 if (status
!= REG_VALID
)
3334 mark_value_bytes_unavailable (result_value
, 0, 16);
3337 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
3338 LONGEST upper
, lower
;
3339 int size
= TYPE_LENGTH (builtin_type (gdbarch
)->builtin_data_ptr
);
3341 lower
= extract_unsigned_integer (raw_buf
, 8, byte_order
);
3342 upper
= extract_unsigned_integer (raw_buf
+ 8, 8, byte_order
);
3345 memcpy (buf
, &lower
, size
);
3346 memcpy (buf
+ size
, &upper
, size
);
3349 else if (i386_k_regnum_p (gdbarch
, regnum
))
3351 regnum
-= tdep
->k0_regnum
;
3353 /* Extract (always little endian). */
3354 status
= regcache
->raw_read (tdep
->k0_regnum
+ regnum
, raw_buf
);
3355 if (status
!= REG_VALID
)
3356 mark_value_bytes_unavailable (result_value
, 0, 8);
3358 memcpy (buf
, raw_buf
, 8);
3360 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3362 regnum
-= tdep
->zmm0_regnum
;
3364 if (regnum
< num_lower_zmm_regs
)
3366 /* Extract (always little endian). Read lower 128bits. */
3367 status
= regcache
->raw_read (I387_XMM0_REGNUM (tdep
) + regnum
,
3369 if (status
!= REG_VALID
)
3370 mark_value_bytes_unavailable (result_value
, 0, 16);
3372 memcpy (buf
, raw_buf
, 16);
3374 /* Extract (always little endian). Read upper 128bits. */
3375 status
= regcache
->raw_read (tdep
->ymm0h_regnum
+ regnum
,
3377 if (status
!= REG_VALID
)
3378 mark_value_bytes_unavailable (result_value
, 16, 16);
3380 memcpy (buf
+ 16, raw_buf
, 16);
3384 /* Extract (always little endian). Read lower 128bits. */
3385 status
= regcache
->raw_read (I387_XMM16_REGNUM (tdep
) + regnum
3386 - num_lower_zmm_regs
,
3388 if (status
!= REG_VALID
)
3389 mark_value_bytes_unavailable (result_value
, 0, 16);
3391 memcpy (buf
, raw_buf
, 16);
3393 /* Extract (always little endian). Read upper 128bits. */
3394 status
= regcache
->raw_read (I387_YMM16H_REGNUM (tdep
) + regnum
3395 - num_lower_zmm_regs
,
3397 if (status
!= REG_VALID
)
3398 mark_value_bytes_unavailable (result_value
, 16, 16);
3400 memcpy (buf
+ 16, raw_buf
, 16);
3403 /* Read upper 256bits. */
3404 status
= regcache
->raw_read (tdep
->zmm0h_regnum
+ regnum
,
3406 if (status
!= REG_VALID
)
3407 mark_value_bytes_unavailable (result_value
, 32, 32);
3409 memcpy (buf
+ 32, raw_buf
, 32);
3411 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3413 regnum
-= tdep
->ymm0_regnum
;
3415 /* Extract (always little endian). Read lower 128bits. */
3416 status
= regcache
->raw_read (I387_XMM0_REGNUM (tdep
) + regnum
,
3418 if (status
!= REG_VALID
)
3419 mark_value_bytes_unavailable (result_value
, 0, 16);
3421 memcpy (buf
, raw_buf
, 16);
3422 /* Read upper 128bits. */
3423 status
= regcache
->raw_read (tdep
->ymm0h_regnum
+ regnum
,
3425 if (status
!= REG_VALID
)
3426 mark_value_bytes_unavailable (result_value
, 16, 32);
3428 memcpy (buf
+ 16, raw_buf
, 16);
3430 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3432 regnum
-= tdep
->ymm16_regnum
;
3433 /* Extract (always little endian). Read lower 128bits. */
3434 status
= regcache
->raw_read (I387_XMM16_REGNUM (tdep
) + regnum
,
3436 if (status
!= REG_VALID
)
3437 mark_value_bytes_unavailable (result_value
, 0, 16);
3439 memcpy (buf
, raw_buf
, 16);
3440 /* Read upper 128bits. */
3441 status
= regcache
->raw_read (tdep
->ymm16h_regnum
+ regnum
,
3443 if (status
!= REG_VALID
)
3444 mark_value_bytes_unavailable (result_value
, 16, 16);
3446 memcpy (buf
+ 16, raw_buf
, 16);
3448 else if (i386_word_regnum_p (gdbarch
, regnum
))
3450 int gpnum
= regnum
- tdep
->ax_regnum
;
3452 /* Extract (always little endian). */
3453 status
= regcache
->raw_read (gpnum
, raw_buf
);
3454 if (status
!= REG_VALID
)
3455 mark_value_bytes_unavailable (result_value
, 0,
3456 TYPE_LENGTH (value_type (result_value
)));
3458 memcpy (buf
, raw_buf
, 2);
3460 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3462 int gpnum
= regnum
- tdep
->al_regnum
;
3464 /* Extract (always little endian). We read both lower and
3466 status
= regcache
->raw_read (gpnum
% 4, raw_buf
);
3467 if (status
!= REG_VALID
)
3468 mark_value_bytes_unavailable (result_value
, 0,
3469 TYPE_LENGTH (value_type (result_value
)));
3470 else if (gpnum
>= 4)
3471 memcpy (buf
, raw_buf
+ 1, 1);
3473 memcpy (buf
, raw_buf
, 1);
3476 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3480 static struct value
*
3481 i386_pseudo_register_read_value (struct gdbarch
*gdbarch
,
3482 readable_regcache
*regcache
,
3485 struct value
*result
;
3487 result
= allocate_value (register_type (gdbarch
, regnum
));
3488 VALUE_LVAL (result
) = lval_register
;
3489 VALUE_REGNUM (result
) = regnum
;
3491 i386_pseudo_register_read_into_value (gdbarch
, regcache
, regnum
, result
);
3497 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3498 int regnum
, const gdb_byte
*buf
)
3500 gdb_byte raw_buf
[I386_MAX_REGISTER_SIZE
];
3502 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3504 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
3507 regcache
->raw_read (fpnum
, raw_buf
);
3508 /* ... Modify ... (always little endian). */
3509 memcpy (raw_buf
, buf
, register_size (gdbarch
, regnum
));
3511 regcache
->raw_write (fpnum
, raw_buf
);
3515 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3517 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3519 ULONGEST upper
, lower
;
3520 int size
= TYPE_LENGTH (builtin_type (gdbarch
)->builtin_data_ptr
);
3521 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
3523 /* New values from input value. */
3524 regnum
-= tdep
->bnd0_regnum
;
3525 lower
= extract_unsigned_integer (buf
, size
, byte_order
);
3526 upper
= extract_unsigned_integer (buf
+ size
, size
, byte_order
);
3528 /* Fetching register buffer. */
3529 regcache
->raw_read (I387_BND0R_REGNUM (tdep
) + regnum
,
3534 /* Set register bits. */
3535 memcpy (raw_buf
, &lower
, 8);
3536 memcpy (raw_buf
+ 8, &upper
, 8);
3538 regcache
->raw_write (I387_BND0R_REGNUM (tdep
) + regnum
, raw_buf
);
3540 else if (i386_k_regnum_p (gdbarch
, regnum
))
3542 regnum
-= tdep
->k0_regnum
;
3544 regcache
->raw_write (tdep
->k0_regnum
+ regnum
, buf
);
3546 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3548 regnum
-= tdep
->zmm0_regnum
;
3550 if (regnum
< num_lower_zmm_regs
)
3552 /* Write lower 128bits. */
3553 regcache
->raw_write (I387_XMM0_REGNUM (tdep
) + regnum
, buf
);
3554 /* Write upper 128bits. */
3555 regcache
->raw_write (I387_YMM0_REGNUM (tdep
) + regnum
, buf
+ 16);
3559 /* Write lower 128bits. */
3560 regcache
->raw_write (I387_XMM16_REGNUM (tdep
) + regnum
3561 - num_lower_zmm_regs
, buf
);
3562 /* Write upper 128bits. */
3563 regcache
->raw_write (I387_YMM16H_REGNUM (tdep
) + regnum
3564 - num_lower_zmm_regs
, buf
+ 16);
3566 /* Write upper 256bits. */
3567 regcache
->raw_write (tdep
->zmm0h_regnum
+ regnum
, buf
+ 32);
3569 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3571 regnum
-= tdep
->ymm0_regnum
;
3573 /* ... Write lower 128bits. */
3574 regcache
->raw_write (I387_XMM0_REGNUM (tdep
) + regnum
, buf
);
3575 /* ... Write upper 128bits. */
3576 regcache
->raw_write (tdep
->ymm0h_regnum
+ regnum
, buf
+ 16);
3578 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3580 regnum
-= tdep
->ymm16_regnum
;
3582 /* ... Write lower 128bits. */
3583 regcache
->raw_write (I387_XMM16_REGNUM (tdep
) + regnum
, buf
);
3584 /* ... Write upper 128bits. */
3585 regcache
->raw_write (tdep
->ymm16h_regnum
+ regnum
, buf
+ 16);
3587 else if (i386_word_regnum_p (gdbarch
, regnum
))
3589 int gpnum
= regnum
- tdep
->ax_regnum
;
3592 regcache
->raw_read (gpnum
, raw_buf
);
3593 /* ... Modify ... (always little endian). */
3594 memcpy (raw_buf
, buf
, 2);
3596 regcache
->raw_write (gpnum
, raw_buf
);
3598 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3600 int gpnum
= regnum
- tdep
->al_regnum
;
3602 /* Read ... We read both lower and upper registers. */
3603 regcache
->raw_read (gpnum
% 4, raw_buf
);
3604 /* ... Modify ... (always little endian). */
3606 memcpy (raw_buf
+ 1, buf
, 1);
3608 memcpy (raw_buf
, buf
, 1);
3610 regcache
->raw_write (gpnum
% 4, raw_buf
);
3613 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3617 /* Implement the 'ax_pseudo_register_collect' gdbarch method. */
3620 i386_ax_pseudo_register_collect (struct gdbarch
*gdbarch
,
3621 struct agent_expr
*ax
, int regnum
)
3623 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3625 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3627 /* MMX to FPU register mapping depends on current TOS. Let's just
3628 not care and collect everything... */
3631 ax_reg_mask (ax
, I387_FSTAT_REGNUM (tdep
));
3632 for (i
= 0; i
< 8; i
++)
3633 ax_reg_mask (ax
, I387_ST0_REGNUM (tdep
) + i
);
3636 else if (i386_bnd_regnum_p (gdbarch
, regnum
))
3638 regnum
-= tdep
->bnd0_regnum
;
3639 ax_reg_mask (ax
, I387_BND0R_REGNUM (tdep
) + regnum
);
3642 else if (i386_k_regnum_p (gdbarch
, regnum
))
3644 regnum
-= tdep
->k0_regnum
;
3645 ax_reg_mask (ax
, tdep
->k0_regnum
+ regnum
);
3648 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3650 regnum
-= tdep
->zmm0_regnum
;
3651 if (regnum
< num_lower_zmm_regs
)
3653 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3654 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3658 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
3659 - num_lower_zmm_regs
);
3660 ax_reg_mask (ax
, I387_YMM16H_REGNUM (tdep
) + regnum
3661 - num_lower_zmm_regs
);
3663 ax_reg_mask (ax
, tdep
->zmm0h_regnum
+ regnum
);
3666 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3668 regnum
-= tdep
->ymm0_regnum
;
3669 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3670 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3673 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3675 regnum
-= tdep
->ymm16_regnum
;
3676 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
);
3677 ax_reg_mask (ax
, tdep
->ymm16h_regnum
+ regnum
);
3680 else if (i386_word_regnum_p (gdbarch
, regnum
))
3682 int gpnum
= regnum
- tdep
->ax_regnum
;
3684 ax_reg_mask (ax
, gpnum
);
3687 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3689 int gpnum
= regnum
- tdep
->al_regnum
;
3691 ax_reg_mask (ax
, gpnum
% 4);
3695 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3700 /* Return the register number of the register allocated by GCC after
3701 REGNUM, or -1 if there is no such register. */
3704 i386_next_regnum (int regnum
)
3706 /* GCC allocates the registers in the order:
3708 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
3710 Since storing a variable in %esp doesn't make any sense we return
3711 -1 for %ebp and for %esp itself. */
3712 static int next_regnum
[] =
3714 I386_EDX_REGNUM
, /* Slot for %eax. */
3715 I386_EBX_REGNUM
, /* Slot for %ecx. */
3716 I386_ECX_REGNUM
, /* Slot for %edx. */
3717 I386_ESI_REGNUM
, /* Slot for %ebx. */
3718 -1, -1, /* Slots for %esp and %ebp. */
3719 I386_EDI_REGNUM
, /* Slot for %esi. */
3720 I386_EBP_REGNUM
/* Slot for %edi. */
3723 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
3724 return next_regnum
[regnum
];
3729 /* Return nonzero if a value of type TYPE stored in register REGNUM
3730 needs any special handling. */
3733 i386_convert_register_p (struct gdbarch
*gdbarch
,
3734 int regnum
, struct type
*type
)
3736 int len
= TYPE_LENGTH (type
);
3738 /* Values may be spread across multiple registers. Most debugging
3739 formats aren't expressive enough to specify the locations, so
3740 some heuristics is involved. Right now we only handle types that
3741 have a length that is a multiple of the word size, since GCC
3742 doesn't seem to put any other types into registers. */
3743 if (len
> 4 && len
% 4 == 0)
3745 int last_regnum
= regnum
;
3749 last_regnum
= i386_next_regnum (last_regnum
);
3753 if (last_regnum
!= -1)
3757 return i387_convert_register_p (gdbarch
, regnum
, type
);
3760 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
3761 return its contents in TO. */
3764 i386_register_to_value (struct frame_info
*frame
, int regnum
,
3765 struct type
*type
, gdb_byte
*to
,
3766 int *optimizedp
, int *unavailablep
)
3768 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3769 int len
= TYPE_LENGTH (type
);
3771 if (i386_fp_regnum_p (gdbarch
, regnum
))
3772 return i387_register_to_value (frame
, regnum
, type
, to
,
3773 optimizedp
, unavailablep
);
3775 /* Read a value spread across multiple registers. */
3777 gdb_assert (len
> 4 && len
% 4 == 0);
3781 gdb_assert (regnum
!= -1);
3782 gdb_assert (register_size (gdbarch
, regnum
) == 4);
3784 if (!get_frame_register_bytes (frame
, regnum
, 0,
3785 gdb::make_array_view (to
,
3786 register_size (gdbarch
,
3788 optimizedp
, unavailablep
))
3791 regnum
= i386_next_regnum (regnum
);
3796 *optimizedp
= *unavailablep
= 0;
3800 /* Write the contents FROM of a value of type TYPE into register
3801 REGNUM in frame FRAME. */
3804 i386_value_to_register (struct frame_info
*frame
, int regnum
,
3805 struct type
*type
, const gdb_byte
*from
)
3807 int len
= TYPE_LENGTH (type
);
3809 if (i386_fp_regnum_p (get_frame_arch (frame
), regnum
))
3811 i387_value_to_register (frame
, regnum
, type
, from
);
3815 /* Write a value spread across multiple registers. */
3817 gdb_assert (len
> 4 && len
% 4 == 0);
3821 gdb_assert (regnum
!= -1);
3822 gdb_assert (register_size (get_frame_arch (frame
), regnum
) == 4);
3824 put_frame_register (frame
, regnum
, from
);
3825 regnum
= i386_next_regnum (regnum
);
3831 /* Supply register REGNUM from the buffer specified by GREGS and LEN
3832 in the general-purpose register set REGSET to register cache
3833 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3836 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
3837 int regnum
, const void *gregs
, size_t len
)
3839 struct gdbarch
*gdbarch
= regcache
->arch ();
3840 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3841 const gdb_byte
*regs
= (const gdb_byte
*) gregs
;
3844 gdb_assert (len
>= tdep
->sizeof_gregset
);
3846 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3848 if ((regnum
== i
|| regnum
== -1)
3849 && tdep
->gregset_reg_offset
[i
] != -1)
3850 regcache
->raw_supply (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3854 /* Collect register REGNUM from the register cache REGCACHE and store
3855 it in the buffer specified by GREGS and LEN as described by the
3856 general-purpose register set REGSET. If REGNUM is -1, do this for
3857 all registers in REGSET. */
3860 i386_collect_gregset (const struct regset
*regset
,
3861 const struct regcache
*regcache
,
3862 int regnum
, void *gregs
, size_t len
)
3864 struct gdbarch
*gdbarch
= regcache
->arch ();
3865 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3866 gdb_byte
*regs
= (gdb_byte
*) gregs
;
3869 gdb_assert (len
>= tdep
->sizeof_gregset
);
3871 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3873 if ((regnum
== i
|| regnum
== -1)
3874 && tdep
->gregset_reg_offset
[i
] != -1)
3875 regcache
->raw_collect (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3879 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
3880 in the floating-point register set REGSET to register cache
3881 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3884 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
3885 int regnum
, const void *fpregs
, size_t len
)
3887 struct gdbarch
*gdbarch
= regcache
->arch ();
3888 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3890 if (len
== I387_SIZEOF_FXSAVE
)
3892 i387_supply_fxsave (regcache
, regnum
, fpregs
);
3896 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3897 i387_supply_fsave (regcache
, regnum
, fpregs
);
3900 /* Collect register REGNUM from the register cache REGCACHE and store
3901 it in the buffer specified by FPREGS and LEN as described by the
3902 floating-point register set REGSET. If REGNUM is -1, do this for
3903 all registers in REGSET. */
3906 i386_collect_fpregset (const struct regset
*regset
,
3907 const struct regcache
*regcache
,
3908 int regnum
, void *fpregs
, size_t len
)
3910 struct gdbarch
*gdbarch
= regcache
->arch ();
3911 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3913 if (len
== I387_SIZEOF_FXSAVE
)
3915 i387_collect_fxsave (regcache
, regnum
, fpregs
);
3919 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3920 i387_collect_fsave (regcache
, regnum
, fpregs
);
3923 /* Register set definitions. */
3925 const struct regset i386_gregset
=
3927 NULL
, i386_supply_gregset
, i386_collect_gregset
3930 const struct regset i386_fpregset
=
3932 NULL
, i386_supply_fpregset
, i386_collect_fpregset
3935 /* Default iterator over core file register note sections. */
3938 i386_iterate_over_regset_sections (struct gdbarch
*gdbarch
,
3939 iterate_over_regset_sections_cb
*cb
,
3941 const struct regcache
*regcache
)
3943 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3945 cb (".reg", tdep
->sizeof_gregset
, tdep
->sizeof_gregset
, &i386_gregset
, NULL
,
3947 if (tdep
->sizeof_fpregset
)
3948 cb (".reg2", tdep
->sizeof_fpregset
, tdep
->sizeof_fpregset
, tdep
->fpregset
,
3953 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
3956 i386_pe_skip_trampoline_code (struct frame_info
*frame
,
3957 CORE_ADDR pc
, char *name
)
3959 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3960 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3963 if (pc
&& read_memory_unsigned_integer (pc
, 2, byte_order
) == 0x25ff)
3965 unsigned long indirect
=
3966 read_memory_unsigned_integer (pc
+ 2, 4, byte_order
);
3967 struct minimal_symbol
*indsym
=
3968 indirect
? lookup_minimal_symbol_by_pc (indirect
).minsym
: 0;
3969 const char *symname
= indsym
? indsym
->linkage_name () : 0;
3973 if (startswith (symname
, "__imp_")
3974 || startswith (symname
, "_imp_"))
3976 read_memory_unsigned_integer (indirect
, 4, byte_order
);
3979 return 0; /* Not a trampoline. */
3983 /* Return whether the THIS_FRAME corresponds to a sigtramp
3987 i386_sigtramp_p (struct frame_info
*this_frame
)
3989 CORE_ADDR pc
= get_frame_pc (this_frame
);
3992 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
3993 return (name
&& strcmp ("_sigtramp", name
) == 0);
3997 /* We have two flavours of disassembly. The machinery on this page
3998 deals with switching between those. */
4001 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
4003 gdb_assert (disassembly_flavor
== att_flavor
4004 || disassembly_flavor
== intel_flavor
);
4006 info
->disassembler_options
= disassembly_flavor
;
4008 return default_print_insn (pc
, info
);
4012 /* There are a few i386 architecture variants that differ only
4013 slightly from the generic i386 target. For now, we don't give them
4014 their own source file, but include them here. As a consequence,
4015 they'll always be included. */
4017 /* System V Release 4 (SVR4). */
4019 /* Return whether THIS_FRAME corresponds to a SVR4 sigtramp
4023 i386_svr4_sigtramp_p (struct frame_info
*this_frame
)
4025 CORE_ADDR pc
= get_frame_pc (this_frame
);
4028 /* The origin of these symbols is currently unknown. */
4029 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
4030 return (name
&& (strcmp ("_sigreturn", name
) == 0
4031 || strcmp ("sigvechandler", name
) == 0));
4034 /* Assuming THIS_FRAME is for a SVR4 sigtramp routine, return the
4035 address of the associated sigcontext (ucontext) structure. */
4038 i386_svr4_sigcontext_addr (struct frame_info
*this_frame
)
4040 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
4041 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4045 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
4046 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
4048 return read_memory_unsigned_integer (sp
+ 8, 4, byte_order
);
4053 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
4057 i386_stap_is_single_operand (struct gdbarch
*gdbarch
, const char *s
)
4059 return (*s
== '$' /* Literal number. */
4060 || (isdigit (*s
) && s
[1] == '(' && s
[2] == '%') /* Displacement. */
4061 || (*s
== '(' && s
[1] == '%') /* Register indirection. */
4062 || (*s
== '%' && isalpha (s
[1]))); /* Register access. */
4065 /* Helper function for i386_stap_parse_special_token.
4067 This function parses operands of the form `-8+3+1(%rbp)', which
4068 must be interpreted as `*(-8 + 3 - 1 + (void *) $eax)'.
4070 Return true if the operand was parsed successfully, false
4073 static expr::operation_up
4074 i386_stap_parse_special_token_triplet (struct gdbarch
*gdbarch
,
4075 struct stap_parse_info
*p
)
4077 const char *s
= p
->arg
;
4079 if (isdigit (*s
) || *s
== '-' || *s
== '+')
4083 long displacements
[3];
4088 got_minus
[0] = false;
4094 got_minus
[0] = true;
4097 if (!isdigit ((unsigned char) *s
))
4100 displacements
[0] = strtol (s
, &endp
, 10);
4103 if (*s
!= '+' && *s
!= '-')
4105 /* We are not dealing with a triplet. */
4109 got_minus
[1] = false;
4115 got_minus
[1] = true;
4118 if (!isdigit ((unsigned char) *s
))
4121 displacements
[1] = strtol (s
, &endp
, 10);
4124 if (*s
!= '+' && *s
!= '-')
4126 /* We are not dealing with a triplet. */
4130 got_minus
[2] = false;
4136 got_minus
[2] = true;
4139 if (!isdigit ((unsigned char) *s
))
4142 displacements
[2] = strtol (s
, &endp
, 10);
4145 if (*s
!= '(' || s
[1] != '%')
4151 while (isalnum (*s
))
4157 len
= s
- start
- 1;
4158 std::string
regname (start
, len
);
4160 if (user_reg_map_name_to_regnum (gdbarch
, regname
.c_str (), len
) == -1)
4161 error (_("Invalid register name `%s' on expression `%s'."),
4162 regname
.c_str (), p
->saved_arg
);
4165 for (i
= 0; i
< 3; i
++)
4167 LONGEST this_val
= displacements
[i
];
4169 this_val
= -this_val
;
4175 using namespace expr
;
4177 struct type
*long_type
= builtin_type (gdbarch
)->builtin_long
;
4179 = make_operation
<long_const_operation
> (long_type
, value
);
4182 = make_operation
<register_operation
> (std::move (regname
));
4183 struct type
*void_ptr
= builtin_type (gdbarch
)->builtin_data_ptr
;
4184 reg
= make_operation
<unop_cast_operation
> (std::move (reg
), void_ptr
);
4187 = make_operation
<add_operation
> (std::move (reg
), std::move (offset
));
4188 struct type
*arg_ptr_type
= lookup_pointer_type (p
->arg_type
);
4189 sum
= make_operation
<unop_cast_operation
> (std::move (sum
),
4191 return make_operation
<unop_ind_operation
> (std::move (sum
));
4197 /* Helper function for i386_stap_parse_special_token.
4199 This function parses operands of the form `register base +
4200 (register index * size) + offset', as represented in
4201 `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4203 Return true if the operand was parsed successfully, false
4206 static expr::operation_up
4207 i386_stap_parse_special_token_three_arg_disp (struct gdbarch
*gdbarch
,
4208 struct stap_parse_info
*p
)
4210 const char *s
= p
->arg
;
4212 if (isdigit (*s
) || *s
== '(' || *s
== '-' || *s
== '+')
4214 bool offset_minus
= false;
4216 bool size_minus
= false;
4227 offset_minus
= true;
4230 if (offset_minus
&& !isdigit (*s
))
4237 offset
= strtol (s
, &endp
, 10);
4241 if (*s
!= '(' || s
[1] != '%')
4247 while (isalnum (*s
))
4250 if (*s
!= ',' || s
[1] != '%')
4253 len_base
= s
- start
;
4254 std::string
base (start
, len_base
);
4256 if (user_reg_map_name_to_regnum (gdbarch
, base
.c_str (), len_base
) == -1)
4257 error (_("Invalid register name `%s' on expression `%s'."),
4258 base
.c_str (), p
->saved_arg
);
4263 while (isalnum (*s
))
4266 len_index
= s
- start
;
4267 std::string
index (start
, len_index
);
4269 if (user_reg_map_name_to_regnum (gdbarch
, index
.c_str (),
4271 error (_("Invalid register name `%s' on expression `%s'."),
4272 index
.c_str (), p
->saved_arg
);
4274 if (*s
!= ',' && *s
!= ')')
4290 size
= strtol (s
, &endp
, 10);
4300 using namespace expr
;
4302 struct type
*long_type
= builtin_type (gdbarch
)->builtin_long
;
4303 operation_up reg
= make_operation
<register_operation
> (std::move (base
));
4310 = make_operation
<long_const_operation
> (long_type
, offset
);
4311 reg
= make_operation
<add_operation
> (std::move (reg
),
4315 operation_up ind_reg
4316 = make_operation
<register_operation
> (std::move (index
));
4323 = make_operation
<long_const_operation
> (long_type
, size
);
4324 ind_reg
= make_operation
<mul_operation
> (std::move (ind_reg
),
4329 = make_operation
<add_operation
> (std::move (reg
),
4330 std::move (ind_reg
));
4332 struct type
*arg_ptr_type
= lookup_pointer_type (p
->arg_type
);
4333 sum
= make_operation
<unop_cast_operation
> (std::move (sum
),
4335 return make_operation
<unop_ind_operation
> (std::move (sum
));
4341 /* Implementation of `gdbarch_stap_parse_special_token', as defined in
4345 i386_stap_parse_special_token (struct gdbarch
*gdbarch
,
4346 struct stap_parse_info
*p
)
4348 /* The special tokens to be parsed here are:
4350 - `register base + (register index * size) + offset', as represented
4351 in `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4353 - Operands of the form `-8+3+1(%rbp)', which must be interpreted as
4354 `*(-8 + 3 - 1 + (void *) $eax)'. */
4356 expr::operation_up result
4357 = i386_stap_parse_special_token_triplet (gdbarch
, p
);
4359 if (result
== nullptr)
4360 result
= i386_stap_parse_special_token_three_arg_disp (gdbarch
, p
);
4365 /* Implementation of 'gdbarch_stap_adjust_register', as defined in
4369 i386_stap_adjust_register (struct gdbarch
*gdbarch
, struct stap_parse_info
*p
,
4370 const std::string
®name
, int regnum
)
4372 static const std::unordered_set
<std::string
> reg_assoc
4373 = { "ax", "bx", "cx", "dx",
4374 "si", "di", "bp", "sp" };
4376 /* If we are dealing with a register whose size is less than the size
4377 specified by the "[-]N@" prefix, and it is one of the registers that
4378 we know has an extended variant available, then use the extended
4379 version of the register instead. */
4380 if (register_size (gdbarch
, regnum
) < TYPE_LENGTH (p
->arg_type
)
4381 && reg_assoc
.find (regname
) != reg_assoc
.end ())
4382 return "e" + regname
;
4384 /* Otherwise, just use the requested register. */
4390 /* gdbarch gnu_triplet_regexp method. Both arches are acceptable as GDB always
4391 also supplies -m64 or -m32 by gdbarch_gcc_target_options. */
4394 i386_gnu_triplet_regexp (struct gdbarch
*gdbarch
)
4396 return "(x86_64|i.86)";
4401 /* Implement the "in_indirect_branch_thunk" gdbarch function. */
4404 i386_in_indirect_branch_thunk (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
4406 return x86_in_indirect_branch_thunk (pc
, i386_register_names
,
4407 I386_EAX_REGNUM
, I386_EIP_REGNUM
);
4413 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4415 static const char *const stap_integer_prefixes
[] = { "$", NULL
};
4416 static const char *const stap_register_prefixes
[] = { "%", NULL
};
4417 static const char *const stap_register_indirection_prefixes
[] = { "(",
4419 static const char *const stap_register_indirection_suffixes
[] = { ")",
4422 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
4423 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
4425 /* Registering SystemTap handlers. */
4426 set_gdbarch_stap_integer_prefixes (gdbarch
, stap_integer_prefixes
);
4427 set_gdbarch_stap_register_prefixes (gdbarch
, stap_register_prefixes
);
4428 set_gdbarch_stap_register_indirection_prefixes (gdbarch
,
4429 stap_register_indirection_prefixes
);
4430 set_gdbarch_stap_register_indirection_suffixes (gdbarch
,
4431 stap_register_indirection_suffixes
);
4432 set_gdbarch_stap_is_single_operand (gdbarch
,
4433 i386_stap_is_single_operand
);
4434 set_gdbarch_stap_parse_special_token (gdbarch
,
4435 i386_stap_parse_special_token
);
4436 set_gdbarch_stap_adjust_register (gdbarch
,
4437 i386_stap_adjust_register
);
4439 set_gdbarch_in_indirect_branch_thunk (gdbarch
,
4440 i386_in_indirect_branch_thunk
);
4443 /* System V Release 4 (SVR4). */
4446 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4448 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4450 /* System V Release 4 uses ELF. */
4451 i386_elf_init_abi (info
, gdbarch
);
4453 /* System V Release 4 has shared libraries. */
4454 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
4456 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
4457 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
4458 tdep
->sc_pc_offset
= 36 + 14 * 4;
4459 tdep
->sc_sp_offset
= 36 + 17 * 4;
4461 tdep
->jb_pc_offset
= 20;
4466 /* i386 register groups. In addition to the normal groups, add "mmx"
4469 static struct reggroup
*i386_sse_reggroup
;
4470 static struct reggroup
*i386_mmx_reggroup
;
4473 i386_init_reggroups (void)
4475 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
4476 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
4480 i386_add_reggroups (struct gdbarch
*gdbarch
)
4482 reggroup_add (gdbarch
, i386_sse_reggroup
);
4483 reggroup_add (gdbarch
, i386_mmx_reggroup
);
4484 reggroup_add (gdbarch
, general_reggroup
);
4485 reggroup_add (gdbarch
, float_reggroup
);
4486 reggroup_add (gdbarch
, all_reggroup
);
4487 reggroup_add (gdbarch
, save_reggroup
);
4488 reggroup_add (gdbarch
, restore_reggroup
);
4489 reggroup_add (gdbarch
, vector_reggroup
);
4490 reggroup_add (gdbarch
, system_reggroup
);
4494 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
4495 struct reggroup
*group
)
4497 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4498 int fp_regnum_p
, mmx_regnum_p
, xmm_regnum_p
, mxcsr_regnum_p
,
4499 ymm_regnum_p
, ymmh_regnum_p
, ymm_avx512_regnum_p
, ymmh_avx512_regnum_p
,
4500 bndr_regnum_p
, bnd_regnum_p
, zmm_regnum_p
, zmmh_regnum_p
,
4501 mpx_ctrl_regnum_p
, xmm_avx512_regnum_p
,
4502 avx512_p
, avx_p
, sse_p
, pkru_regnum_p
;
4504 /* Don't include pseudo registers, except for MMX, in any register
4506 if (i386_byte_regnum_p (gdbarch
, regnum
))
4509 if (i386_word_regnum_p (gdbarch
, regnum
))
4512 if (i386_dword_regnum_p (gdbarch
, regnum
))
4515 mmx_regnum_p
= i386_mmx_regnum_p (gdbarch
, regnum
);
4516 if (group
== i386_mmx_reggroup
)
4517 return mmx_regnum_p
;
4519 pkru_regnum_p
= i386_pkru_regnum_p(gdbarch
, regnum
);
4520 xmm_regnum_p
= i386_xmm_regnum_p (gdbarch
, regnum
);
4521 xmm_avx512_regnum_p
= i386_xmm_avx512_regnum_p (gdbarch
, regnum
);
4522 mxcsr_regnum_p
= i386_mxcsr_regnum_p (gdbarch
, regnum
);
4523 if (group
== i386_sse_reggroup
)
4524 return xmm_regnum_p
|| xmm_avx512_regnum_p
|| mxcsr_regnum_p
;
4526 ymm_regnum_p
= i386_ymm_regnum_p (gdbarch
, regnum
);
4527 ymm_avx512_regnum_p
= i386_ymm_avx512_regnum_p (gdbarch
, regnum
);
4528 zmm_regnum_p
= i386_zmm_regnum_p (gdbarch
, regnum
);
4530 avx512_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4531 == X86_XSTATE_AVX_AVX512_MASK
);
4532 avx_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4533 == X86_XSTATE_AVX_MASK
) && !avx512_p
;
4534 sse_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4535 == X86_XSTATE_SSE_MASK
) && !avx512_p
&& ! avx_p
;
4537 if (group
== vector_reggroup
)
4538 return (mmx_regnum_p
4539 || (zmm_regnum_p
&& avx512_p
)
4540 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && avx_p
)
4541 || ((xmm_regnum_p
|| xmm_avx512_regnum_p
) && sse_p
)
4544 fp_regnum_p
= (i386_fp_regnum_p (gdbarch
, regnum
)
4545 || i386_fpc_regnum_p (gdbarch
, regnum
));
4546 if (group
== float_reggroup
)
4549 /* For "info reg all", don't include upper YMM registers nor XMM
4550 registers when AVX is supported. */
4551 ymmh_regnum_p
= i386_ymmh_regnum_p (gdbarch
, regnum
);
4552 ymmh_avx512_regnum_p
= i386_ymmh_avx512_regnum_p (gdbarch
, regnum
);
4553 zmmh_regnum_p
= i386_zmmh_regnum_p (gdbarch
, regnum
);
4554 if (group
== all_reggroup
4555 && (((xmm_regnum_p
|| xmm_avx512_regnum_p
) && !sse_p
)
4556 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && !avx_p
)
4558 || ymmh_avx512_regnum_p
4562 bnd_regnum_p
= i386_bnd_regnum_p (gdbarch
, regnum
);
4563 if (group
== all_reggroup
4564 && ((bnd_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4565 return bnd_regnum_p
;
4567 bndr_regnum_p
= i386_bndr_regnum_p (gdbarch
, regnum
);
4568 if (group
== all_reggroup
4569 && ((bndr_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4572 mpx_ctrl_regnum_p
= i386_mpx_ctrl_regnum_p (gdbarch
, regnum
);
4573 if (group
== all_reggroup
4574 && ((mpx_ctrl_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4575 return mpx_ctrl_regnum_p
;
4577 if (group
== general_reggroup
)
4578 return (!fp_regnum_p
4582 && !xmm_avx512_regnum_p
4585 && !ymm_avx512_regnum_p
4586 && !ymmh_avx512_regnum_p
4589 && !mpx_ctrl_regnum_p
4594 return default_register_reggroup_p (gdbarch
, regnum
, group
);
4598 /* Get the ARGIth function argument for the current function. */
4601 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
4604 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
4605 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4606 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
4607 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4, byte_order
);
4610 #define PREFIX_REPZ 0x01
4611 #define PREFIX_REPNZ 0x02
4612 #define PREFIX_LOCK 0x04
4613 #define PREFIX_DATA 0x08
4614 #define PREFIX_ADDR 0x10
4626 /* i386 arith/logic operations */
4639 struct i386_record_s
4641 struct gdbarch
*gdbarch
;
4642 struct regcache
*regcache
;
4643 CORE_ADDR orig_addr
;
4649 uint8_t mod
, reg
, rm
;
4658 /* Parse the "modrm" part of the memory address irp->addr points at.
4659 Returns -1 if something goes wrong, 0 otherwise. */
4662 i386_record_modrm (struct i386_record_s
*irp
)
4664 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4666 if (record_read_memory (gdbarch
, irp
->addr
, &irp
->modrm
, 1))
4670 irp
->mod
= (irp
->modrm
>> 6) & 3;
4671 irp
->reg
= (irp
->modrm
>> 3) & 7;
4672 irp
->rm
= irp
->modrm
& 7;
4677 /* Extract the memory address that the current instruction writes to,
4678 and return it in *ADDR. Return -1 if something goes wrong. */
4681 i386_record_lea_modrm_addr (struct i386_record_s
*irp
, uint64_t *addr
)
4683 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4684 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4689 if (irp
->aflag
|| irp
->regmap
[X86_RECORD_R8_REGNUM
])
4696 uint8_t base
= irp
->rm
;
4701 if (record_read_memory (gdbarch
, irp
->addr
, &byte
, 1))
4704 scale
= (byte
>> 6) & 3;
4705 index
= ((byte
>> 3) & 7) | irp
->rex_x
;
4713 if ((base
& 7) == 5)
4716 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4719 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4720 if (irp
->regmap
[X86_RECORD_R8_REGNUM
] && !havesib
)
4721 *addr
+= irp
->addr
+ irp
->rip_offset
;
4725 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4728 *addr
= (int8_t) buf
[0];
4731 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4733 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4741 if (base
== 4 && irp
->popl_esp_hack
)
4742 *addr
+= irp
->popl_esp_hack
;
4743 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[base
],
4746 if (irp
->aflag
== 2)
4751 *addr
= (uint32_t) (offset64
+ *addr
);
4753 if (havesib
&& (index
!= 4 || scale
!= 0))
4755 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[index
],
4757 if (irp
->aflag
== 2)
4758 *addr
+= offset64
<< scale
;
4760 *addr
= (uint32_t) (*addr
+ (offset64
<< scale
));
4765 /* Since we are in 64-bit mode with ADDR32 prefix, zero-extend
4766 address from 32-bit to 64-bit. */
4767 *addr
= (uint32_t) *addr
;
4778 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4781 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4787 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4790 *addr
= (int8_t) buf
[0];
4793 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4796 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4803 regcache_raw_read_unsigned (irp
->regcache
,
4804 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4806 *addr
= (uint32_t) (*addr
+ offset64
);
4807 regcache_raw_read_unsigned (irp
->regcache
,
4808 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4810 *addr
= (uint32_t) (*addr
+ offset64
);
4813 regcache_raw_read_unsigned (irp
->regcache
,
4814 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4816 *addr
= (uint32_t) (*addr
+ offset64
);
4817 regcache_raw_read_unsigned (irp
->regcache
,
4818 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4820 *addr
= (uint32_t) (*addr
+ offset64
);
4823 regcache_raw_read_unsigned (irp
->regcache
,
4824 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4826 *addr
= (uint32_t) (*addr
+ offset64
);
4827 regcache_raw_read_unsigned (irp
->regcache
,
4828 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4830 *addr
= (uint32_t) (*addr
+ offset64
);
4833 regcache_raw_read_unsigned (irp
->regcache
,
4834 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4836 *addr
= (uint32_t) (*addr
+ offset64
);
4837 regcache_raw_read_unsigned (irp
->regcache
,
4838 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4840 *addr
= (uint32_t) (*addr
+ offset64
);
4843 regcache_raw_read_unsigned (irp
->regcache
,
4844 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4846 *addr
= (uint32_t) (*addr
+ offset64
);
4849 regcache_raw_read_unsigned (irp
->regcache
,
4850 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4852 *addr
= (uint32_t) (*addr
+ offset64
);
4855 regcache_raw_read_unsigned (irp
->regcache
,
4856 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4858 *addr
= (uint32_t) (*addr
+ offset64
);
4861 regcache_raw_read_unsigned (irp
->regcache
,
4862 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4864 *addr
= (uint32_t) (*addr
+ offset64
);
4874 /* Record the address and contents of the memory that will be changed
4875 by the current instruction. Return -1 if something goes wrong, 0
4879 i386_record_lea_modrm (struct i386_record_s
*irp
)
4881 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4884 if (irp
->override
>= 0)
4886 if (record_full_memory_query
)
4889 Process record ignores the memory change of instruction at address %s\n\
4890 because it can't get the value of the segment register.\n\
4891 Do you want to stop the program?"),
4892 paddress (gdbarch
, irp
->orig_addr
)))
4899 if (i386_record_lea_modrm_addr (irp
, &addr
))
4902 if (record_full_arch_list_add_mem (addr
, 1 << irp
->ot
))
4908 /* Record the effects of a push operation. Return -1 if something
4909 goes wrong, 0 otherwise. */
4912 i386_record_push (struct i386_record_s
*irp
, int size
)
4916 if (record_full_arch_list_add_reg (irp
->regcache
,
4917 irp
->regmap
[X86_RECORD_RESP_REGNUM
]))
4919 regcache_raw_read_unsigned (irp
->regcache
,
4920 irp
->regmap
[X86_RECORD_RESP_REGNUM
],
4922 if (record_full_arch_list_add_mem ((CORE_ADDR
) addr
- size
, size
))
4929 /* Defines contents to record. */
4930 #define I386_SAVE_FPU_REGS 0xfffd
4931 #define I386_SAVE_FPU_ENV 0xfffe
4932 #define I386_SAVE_FPU_ENV_REG_STACK 0xffff
4934 /* Record the values of the floating point registers which will be
4935 changed by the current instruction. Returns -1 if something is
4936 wrong, 0 otherwise. */
4938 static int i386_record_floats (struct gdbarch
*gdbarch
,
4939 struct i386_record_s
*ir
,
4942 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4945 /* Oza: Because of floating point insn push/pop of fpu stack is going to
4946 happen. Currently we store st0-st7 registers, but we need not store all
4947 registers all the time, in future we use ftag register and record only
4948 those who are not marked as an empty. */
4950 if (I386_SAVE_FPU_REGS
== iregnum
)
4952 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_ST0_REGNUM (tdep
) + 7; i
++)
4954 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4958 else if (I386_SAVE_FPU_ENV
== iregnum
)
4960 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4962 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4966 else if (I386_SAVE_FPU_ENV_REG_STACK
== iregnum
)
4968 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4970 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4974 else if ((iregnum
>= I387_ST0_REGNUM (tdep
)) &&
4975 (iregnum
<= I387_FOP_REGNUM (tdep
)))
4977 if (record_full_arch_list_add_reg (ir
->regcache
,iregnum
))
4982 /* Parameter error. */
4985 if(I386_SAVE_FPU_ENV
!= iregnum
)
4987 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4989 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4996 /* Parse the current instruction, and record the values of the
4997 registers and memory that will be changed by the current
4998 instruction. Returns -1 if something goes wrong, 0 otherwise. */
5000 #define I386_RECORD_FULL_ARCH_LIST_ADD_REG(regnum) \
5001 record_full_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)])
5004 i386_process_record (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
5005 CORE_ADDR input_addr
)
5007 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
5013 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
5014 struct i386_record_s ir
;
5015 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
5019 memset (&ir
, 0, sizeof (struct i386_record_s
));
5020 ir
.regcache
= regcache
;
5021 ir
.addr
= input_addr
;
5022 ir
.orig_addr
= input_addr
;
5026 ir
.popl_esp_hack
= 0;
5027 ir
.regmap
= tdep
->record_regmap
;
5028 ir
.gdbarch
= gdbarch
;
5030 if (record_debug
> 1)
5031 fprintf_unfiltered (gdb_stdlog
, "Process record: i386_process_record "
5033 paddress (gdbarch
, ir
.addr
));
5038 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5041 switch (opcode8
) /* Instruction prefixes */
5043 case REPE_PREFIX_OPCODE
:
5044 prefixes
|= PREFIX_REPZ
;
5046 case REPNE_PREFIX_OPCODE
:
5047 prefixes
|= PREFIX_REPNZ
;
5049 case LOCK_PREFIX_OPCODE
:
5050 prefixes
|= PREFIX_LOCK
;
5052 case CS_PREFIX_OPCODE
:
5053 ir
.override
= X86_RECORD_CS_REGNUM
;
5055 case SS_PREFIX_OPCODE
:
5056 ir
.override
= X86_RECORD_SS_REGNUM
;
5058 case DS_PREFIX_OPCODE
:
5059 ir
.override
= X86_RECORD_DS_REGNUM
;
5061 case ES_PREFIX_OPCODE
:
5062 ir
.override
= X86_RECORD_ES_REGNUM
;
5064 case FS_PREFIX_OPCODE
:
5065 ir
.override
= X86_RECORD_FS_REGNUM
;
5067 case GS_PREFIX_OPCODE
:
5068 ir
.override
= X86_RECORD_GS_REGNUM
;
5070 case DATA_PREFIX_OPCODE
:
5071 prefixes
|= PREFIX_DATA
;
5073 case ADDR_PREFIX_OPCODE
:
5074 prefixes
|= PREFIX_ADDR
;
5076 case 0x40: /* i386 inc %eax */
5077 case 0x41: /* i386 inc %ecx */
5078 case 0x42: /* i386 inc %edx */
5079 case 0x43: /* i386 inc %ebx */
5080 case 0x44: /* i386 inc %esp */
5081 case 0x45: /* i386 inc %ebp */
5082 case 0x46: /* i386 inc %esi */
5083 case 0x47: /* i386 inc %edi */
5084 case 0x48: /* i386 dec %eax */
5085 case 0x49: /* i386 dec %ecx */
5086 case 0x4a: /* i386 dec %edx */
5087 case 0x4b: /* i386 dec %ebx */
5088 case 0x4c: /* i386 dec %esp */
5089 case 0x4d: /* i386 dec %ebp */
5090 case 0x4e: /* i386 dec %esi */
5091 case 0x4f: /* i386 dec %edi */
5092 if (ir
.regmap
[X86_RECORD_R8_REGNUM
]) /* 64 bit target */
5095 rex_w
= (opcode8
>> 3) & 1;
5096 rex_r
= (opcode8
& 0x4) << 1;
5097 ir
.rex_x
= (opcode8
& 0x2) << 2;
5098 ir
.rex_b
= (opcode8
& 0x1) << 3;
5100 else /* 32 bit target */
5109 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && rex_w
== 1)
5115 if (prefixes
& PREFIX_DATA
)
5118 if (prefixes
& PREFIX_ADDR
)
5120 else if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5123 /* Now check op code. */
5124 opcode
= (uint32_t) opcode8
;
5129 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5132 opcode
= (uint32_t) opcode8
| 0x0f00;
5136 case 0x00: /* arith & logic */
5184 if (((opcode
>> 3) & 7) != OP_CMPL
)
5186 if ((opcode
& 1) == 0)
5189 ir
.ot
= ir
.dflag
+ OT_WORD
;
5191 switch ((opcode
>> 1) & 3)
5193 case 0: /* OP Ev, Gv */
5194 if (i386_record_modrm (&ir
))
5198 if (i386_record_lea_modrm (&ir
))
5204 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5206 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5209 case 1: /* OP Gv, Ev */
5210 if (i386_record_modrm (&ir
))
5213 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5215 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5217 case 2: /* OP A, Iv */
5218 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5222 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5225 case 0x80: /* GRP1 */
5229 if (i386_record_modrm (&ir
))
5232 if (ir
.reg
!= OP_CMPL
)
5234 if ((opcode
& 1) == 0)
5237 ir
.ot
= ir
.dflag
+ OT_WORD
;
5244 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5245 if (i386_record_lea_modrm (&ir
))
5249 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5251 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5254 case 0x40: /* inc */
5263 case 0x48: /* dec */
5272 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 7);
5273 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5276 case 0xf6: /* GRP3 */
5278 if ((opcode
& 1) == 0)
5281 ir
.ot
= ir
.dflag
+ OT_WORD
;
5282 if (i386_record_modrm (&ir
))
5285 if (ir
.mod
!= 3 && ir
.reg
== 0)
5286 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5291 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5297 if (i386_record_lea_modrm (&ir
))
5303 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5305 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5307 if (ir
.reg
== 3) /* neg */
5308 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5314 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5315 if (ir
.ot
!= OT_BYTE
)
5316 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5317 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5321 opcode
= opcode
<< 8 | ir
.modrm
;
5327 case 0xfe: /* GRP4 */
5328 case 0xff: /* GRP5 */
5329 if (i386_record_modrm (&ir
))
5331 if (ir
.reg
>= 2 && opcode
== 0xfe)
5334 opcode
= opcode
<< 8 | ir
.modrm
;
5341 if ((opcode
& 1) == 0)
5344 ir
.ot
= ir
.dflag
+ OT_WORD
;
5347 if (i386_record_lea_modrm (&ir
))
5353 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5355 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5357 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5360 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5362 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5364 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5367 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
5368 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5370 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5374 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5377 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5379 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5384 opcode
= opcode
<< 8 | ir
.modrm
;
5390 case 0x84: /* test */
5394 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5397 case 0x98: /* CWDE/CBW */
5398 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5401 case 0x99: /* CDQ/CWD */
5402 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5403 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5406 case 0x0faf: /* imul */
5409 ir
.ot
= ir
.dflag
+ OT_WORD
;
5410 if (i386_record_modrm (&ir
))
5413 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5414 else if (opcode
== 0x6b)
5417 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5419 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5420 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5423 case 0x0fc0: /* xadd */
5425 if ((opcode
& 1) == 0)
5428 ir
.ot
= ir
.dflag
+ OT_WORD
;
5429 if (i386_record_modrm (&ir
))
5434 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5436 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5437 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5439 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5443 if (i386_record_lea_modrm (&ir
))
5445 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5447 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5449 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5452 case 0x0fb0: /* cmpxchg */
5454 if ((opcode
& 1) == 0)
5457 ir
.ot
= ir
.dflag
+ OT_WORD
;
5458 if (i386_record_modrm (&ir
))
5463 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5464 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5466 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5470 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5471 if (i386_record_lea_modrm (&ir
))
5474 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5477 case 0x0fc7: /* cmpxchg8b / rdrand / rdseed */
5478 if (i386_record_modrm (&ir
))
5482 /* rdrand and rdseed use the 3 bits of the REG field of ModR/M as
5483 an extended opcode. rdrand has bits 110 (/6) and rdseed
5484 has bits 111 (/7). */
5485 if (ir
.reg
== 6 || ir
.reg
== 7)
5487 /* The storage register is described by the 3 R/M bits, but the
5488 REX.B prefix may be used to give access to registers
5489 R8~R15. In this case ir.rex_b + R/M will give us the register
5490 in the range R8~R15.
5492 REX.W may also be used to access 64-bit registers, but we
5493 already record entire registers and not just partial bits
5495 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
+ ir
.rm
);
5496 /* These instructions also set conditional bits. */
5497 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5502 /* We don't handle this particular instruction yet. */
5504 opcode
= opcode
<< 8 | ir
.modrm
;
5508 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5509 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5510 if (i386_record_lea_modrm (&ir
))
5512 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5515 case 0x50: /* push */
5525 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5527 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5531 case 0x06: /* push es */
5532 case 0x0e: /* push cs */
5533 case 0x16: /* push ss */
5534 case 0x1e: /* push ds */
5535 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5540 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5544 case 0x0fa0: /* push fs */
5545 case 0x0fa8: /* push gs */
5546 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5551 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5555 case 0x60: /* pusha */
5556 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5561 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 4)))
5565 case 0x58: /* pop */
5573 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5574 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5577 case 0x61: /* popa */
5578 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5583 for (regnum
= X86_RECORD_REAX_REGNUM
;
5584 regnum
<= X86_RECORD_REDI_REGNUM
;
5586 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5589 case 0x8f: /* pop */
5590 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5591 ir
.ot
= ir
.dflag
? OT_QUAD
: OT_WORD
;
5593 ir
.ot
= ir
.dflag
+ OT_WORD
;
5594 if (i386_record_modrm (&ir
))
5597 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5600 ir
.popl_esp_hack
= 1 << ir
.ot
;
5601 if (i386_record_lea_modrm (&ir
))
5604 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5607 case 0xc8: /* enter */
5608 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5609 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5611 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5615 case 0xc9: /* leave */
5616 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5617 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5620 case 0x07: /* pop es */
5621 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5626 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5627 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_ES_REGNUM
);
5628 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5631 case 0x17: /* pop ss */
5632 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5637 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5638 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_SS_REGNUM
);
5639 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5642 case 0x1f: /* pop ds */
5643 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5648 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5649 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_DS_REGNUM
);
5650 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5653 case 0x0fa1: /* pop fs */
5654 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5655 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_FS_REGNUM
);
5656 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5659 case 0x0fa9: /* pop gs */
5660 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5661 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
5662 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5665 case 0x88: /* mov */
5669 if ((opcode
& 1) == 0)
5672 ir
.ot
= ir
.dflag
+ OT_WORD
;
5674 if (i386_record_modrm (&ir
))
5679 if (opcode
== 0xc6 || opcode
== 0xc7)
5680 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5681 if (i386_record_lea_modrm (&ir
))
5686 if (opcode
== 0xc6 || opcode
== 0xc7)
5688 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5690 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5694 case 0x8a: /* mov */
5696 if ((opcode
& 1) == 0)
5699 ir
.ot
= ir
.dflag
+ OT_WORD
;
5700 if (i386_record_modrm (&ir
))
5703 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5705 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5708 case 0x8c: /* mov seg */
5709 if (i386_record_modrm (&ir
))
5714 opcode
= opcode
<< 8 | ir
.modrm
;
5719 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5723 if (i386_record_lea_modrm (&ir
))
5728 case 0x8e: /* mov seg */
5729 if (i386_record_modrm (&ir
))
5734 regnum
= X86_RECORD_ES_REGNUM
;
5737 regnum
= X86_RECORD_SS_REGNUM
;
5740 regnum
= X86_RECORD_DS_REGNUM
;
5743 regnum
= X86_RECORD_FS_REGNUM
;
5746 regnum
= X86_RECORD_GS_REGNUM
;
5750 opcode
= opcode
<< 8 | ir
.modrm
;
5754 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5755 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5758 case 0x0fb6: /* movzbS */
5759 case 0x0fb7: /* movzwS */
5760 case 0x0fbe: /* movsbS */
5761 case 0x0fbf: /* movswS */
5762 if (i386_record_modrm (&ir
))
5764 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5767 case 0x8d: /* lea */
5768 if (i386_record_modrm (&ir
))
5773 opcode
= opcode
<< 8 | ir
.modrm
;
5778 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5780 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5783 case 0xa0: /* mov EAX */
5786 case 0xd7: /* xlat */
5787 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5790 case 0xa2: /* mov EAX */
5792 if (ir
.override
>= 0)
5794 if (record_full_memory_query
)
5797 Process record ignores the memory change of instruction at address %s\n\
5798 because it can't get the value of the segment register.\n\
5799 Do you want to stop the program?"),
5800 paddress (gdbarch
, ir
.orig_addr
)))
5806 if ((opcode
& 1) == 0)
5809 ir
.ot
= ir
.dflag
+ OT_WORD
;
5812 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 8))
5815 addr
= extract_unsigned_integer (buf
, 8, byte_order
);
5819 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 4))
5822 addr
= extract_unsigned_integer (buf
, 4, byte_order
);
5826 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 2))
5829 addr
= extract_unsigned_integer (buf
, 2, byte_order
);
5831 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
5836 case 0xb0: /* mov R, Ib */
5844 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((ir
.regmap
[X86_RECORD_R8_REGNUM
])
5845 ? ((opcode
& 0x7) | ir
.rex_b
)
5846 : ((opcode
& 0x7) & 0x3));
5849 case 0xb8: /* mov R, Iv */
5857 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5860 case 0x91: /* xchg R, EAX */
5867 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5868 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 0x7);
5871 case 0x86: /* xchg Ev, Gv */
5873 if ((opcode
& 1) == 0)
5876 ir
.ot
= ir
.dflag
+ OT_WORD
;
5877 if (i386_record_modrm (&ir
))
5882 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5884 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5888 if (i386_record_lea_modrm (&ir
))
5892 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5894 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5897 case 0xc4: /* les Gv */
5898 case 0xc5: /* lds Gv */
5899 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5905 case 0x0fb2: /* lss Gv */
5906 case 0x0fb4: /* lfs Gv */
5907 case 0x0fb5: /* lgs Gv */
5908 if (i386_record_modrm (&ir
))
5916 opcode
= opcode
<< 8 | ir
.modrm
;
5921 case 0xc4: /* les Gv */
5922 regnum
= X86_RECORD_ES_REGNUM
;
5924 case 0xc5: /* lds Gv */
5925 regnum
= X86_RECORD_DS_REGNUM
;
5927 case 0x0fb2: /* lss Gv */
5928 regnum
= X86_RECORD_SS_REGNUM
;
5930 case 0x0fb4: /* lfs Gv */
5931 regnum
= X86_RECORD_FS_REGNUM
;
5933 case 0x0fb5: /* lgs Gv */
5934 regnum
= X86_RECORD_GS_REGNUM
;
5937 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5938 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5939 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5942 case 0xc0: /* shifts */
5948 if ((opcode
& 1) == 0)
5951 ir
.ot
= ir
.dflag
+ OT_WORD
;
5952 if (i386_record_modrm (&ir
))
5954 if (ir
.mod
!= 3 && (opcode
== 0xd2 || opcode
== 0xd3))
5956 if (i386_record_lea_modrm (&ir
))
5962 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5964 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5966 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5973 if (i386_record_modrm (&ir
))
5977 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
))
5982 if (i386_record_lea_modrm (&ir
))
5987 case 0xd8: /* Floats. */
5995 if (i386_record_modrm (&ir
))
5997 ir
.reg
|= ((opcode
& 7) << 3);
6003 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6011 /* For fcom, ficom nothing to do. */
6017 /* For fcomp, ficomp pop FPU stack, store all. */
6018 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6045 /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,
6046 fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension
6047 of code, always affects st(0) register. */
6048 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6072 /* Handling fld, fild. */
6073 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6077 switch (ir
.reg
>> 4)
6080 if (record_full_arch_list_add_mem (addr64
, 4))
6084 if (record_full_arch_list_add_mem (addr64
, 8))
6090 if (record_full_arch_list_add_mem (addr64
, 2))
6096 switch (ir
.reg
>> 4)
6099 if (record_full_arch_list_add_mem (addr64
, 4))
6101 if (3 == (ir
.reg
& 7))
6103 /* For fstp m32fp. */
6104 if (i386_record_floats (gdbarch
, &ir
,
6105 I386_SAVE_FPU_REGS
))
6110 if (record_full_arch_list_add_mem (addr64
, 4))
6112 if ((3 == (ir
.reg
& 7))
6113 || (5 == (ir
.reg
& 7))
6114 || (7 == (ir
.reg
& 7)))
6116 /* For fstp insn. */
6117 if (i386_record_floats (gdbarch
, &ir
,
6118 I386_SAVE_FPU_REGS
))
6123 if (record_full_arch_list_add_mem (addr64
, 8))
6125 if (3 == (ir
.reg
& 7))
6127 /* For fstp m64fp. */
6128 if (i386_record_floats (gdbarch
, &ir
,
6129 I386_SAVE_FPU_REGS
))
6134 if ((3 <= (ir
.reg
& 7)) && (6 <= (ir
.reg
& 7)))
6136 /* For fistp, fbld, fild, fbstp. */
6137 if (i386_record_floats (gdbarch
, &ir
,
6138 I386_SAVE_FPU_REGS
))
6143 if (record_full_arch_list_add_mem (addr64
, 2))
6152 if (i386_record_floats (gdbarch
, &ir
,
6153 I386_SAVE_FPU_ENV_REG_STACK
))
6158 if (i386_record_floats (gdbarch
, &ir
, I387_FCTRL_REGNUM (tdep
)))
6163 if (i386_record_floats (gdbarch
, &ir
,
6164 I386_SAVE_FPU_ENV_REG_STACK
))
6170 if (record_full_arch_list_add_mem (addr64
, 28))
6175 if (record_full_arch_list_add_mem (addr64
, 14))
6181 if (record_full_arch_list_add_mem (addr64
, 2))
6183 /* Insn fstp, fbstp. */
6184 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6189 if (record_full_arch_list_add_mem (addr64
, 10))
6195 if (record_full_arch_list_add_mem (addr64
, 28))
6201 if (record_full_arch_list_add_mem (addr64
, 14))
6205 if (record_full_arch_list_add_mem (addr64
, 80))
6208 if (i386_record_floats (gdbarch
, &ir
,
6209 I386_SAVE_FPU_ENV_REG_STACK
))
6213 if (record_full_arch_list_add_mem (addr64
, 8))
6216 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6221 opcode
= opcode
<< 8 | ir
.modrm
;
6226 /* Opcode is an extension of modR/M byte. */
6232 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6236 if (0x0c == (ir
.modrm
>> 4))
6238 if ((ir
.modrm
& 0x0f) <= 7)
6240 if (i386_record_floats (gdbarch
, &ir
,
6241 I386_SAVE_FPU_REGS
))
6246 if (i386_record_floats (gdbarch
, &ir
,
6247 I387_ST0_REGNUM (tdep
)))
6249 /* If only st(0) is changing, then we have already
6251 if ((ir
.modrm
& 0x0f) - 0x08)
6253 if (i386_record_floats (gdbarch
, &ir
,
6254 I387_ST0_REGNUM (tdep
) +
6255 ((ir
.modrm
& 0x0f) - 0x08)))
6273 if (i386_record_floats (gdbarch
, &ir
,
6274 I387_ST0_REGNUM (tdep
)))
6292 if (i386_record_floats (gdbarch
, &ir
,
6293 I386_SAVE_FPU_REGS
))
6297 if (i386_record_floats (gdbarch
, &ir
,
6298 I387_ST0_REGNUM (tdep
)))
6300 if (i386_record_floats (gdbarch
, &ir
,
6301 I387_ST0_REGNUM (tdep
) + 1))
6308 if (0xe9 == ir
.modrm
)
6310 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6313 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6315 if (i386_record_floats (gdbarch
, &ir
,
6316 I387_ST0_REGNUM (tdep
)))
6318 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6320 if (i386_record_floats (gdbarch
, &ir
,
6321 I387_ST0_REGNUM (tdep
) +
6325 else if ((ir
.modrm
& 0x0f) - 0x08)
6327 if (i386_record_floats (gdbarch
, &ir
,
6328 I387_ST0_REGNUM (tdep
) +
6329 ((ir
.modrm
& 0x0f) - 0x08)))
6335 if (0xe3 == ir
.modrm
)
6337 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_ENV
))
6340 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6342 if (i386_record_floats (gdbarch
, &ir
,
6343 I387_ST0_REGNUM (tdep
)))
6345 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6347 if (i386_record_floats (gdbarch
, &ir
,
6348 I387_ST0_REGNUM (tdep
) +
6352 else if ((ir
.modrm
& 0x0f) - 0x08)
6354 if (i386_record_floats (gdbarch
, &ir
,
6355 I387_ST0_REGNUM (tdep
) +
6356 ((ir
.modrm
& 0x0f) - 0x08)))
6362 if ((0x0c == ir
.modrm
>> 4)
6363 || (0x0d == ir
.modrm
>> 4)
6364 || (0x0f == ir
.modrm
>> 4))
6366 if ((ir
.modrm
& 0x0f) <= 7)
6368 if (i386_record_floats (gdbarch
, &ir
,
6369 I387_ST0_REGNUM (tdep
) +
6375 if (i386_record_floats (gdbarch
, &ir
,
6376 I387_ST0_REGNUM (tdep
) +
6377 ((ir
.modrm
& 0x0f) - 0x08)))
6383 if (0x0c == ir
.modrm
>> 4)
6385 if (i386_record_floats (gdbarch
, &ir
,
6386 I387_FTAG_REGNUM (tdep
)))
6389 else if ((0x0d == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6391 if ((ir
.modrm
& 0x0f) <= 7)
6393 if (i386_record_floats (gdbarch
, &ir
,
6394 I387_ST0_REGNUM (tdep
) +
6400 if (i386_record_floats (gdbarch
, &ir
,
6401 I386_SAVE_FPU_REGS
))
6407 if ((0x0c == ir
.modrm
>> 4)
6408 || (0x0e == ir
.modrm
>> 4)
6409 || (0x0f == ir
.modrm
>> 4)
6410 || (0xd9 == ir
.modrm
))
6412 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6417 if (0xe0 == ir
.modrm
)
6419 if (record_full_arch_list_add_reg (ir
.regcache
,
6423 else if ((0x0f == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6425 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6433 case 0xa4: /* movsS */
6435 case 0xaa: /* stosS */
6437 case 0x6c: /* insS */
6439 regcache_raw_read_unsigned (ir
.regcache
,
6440 ir
.regmap
[X86_RECORD_RECX_REGNUM
],
6446 if ((opcode
& 1) == 0)
6449 ir
.ot
= ir
.dflag
+ OT_WORD
;
6450 regcache_raw_read_unsigned (ir
.regcache
,
6451 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
6454 regcache_raw_read_unsigned (ir
.regcache
,
6455 ir
.regmap
[X86_RECORD_ES_REGNUM
],
6457 regcache_raw_read_unsigned (ir
.regcache
,
6458 ir
.regmap
[X86_RECORD_DS_REGNUM
],
6460 if (ir
.aflag
&& (es
!= ds
))
6462 /* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
6463 if (record_full_memory_query
)
6466 Process record ignores the memory change of instruction at address %s\n\
6467 because it can't get the value of the segment register.\n\
6468 Do you want to stop the program?"),
6469 paddress (gdbarch
, ir
.orig_addr
)))
6475 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
6479 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6480 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6481 if (opcode
== 0xa4 || opcode
== 0xa5)
6482 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6483 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6484 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6488 case 0xa6: /* cmpsS */
6490 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6491 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6492 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6493 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6494 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6497 case 0xac: /* lodsS */
6499 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6500 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6501 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6502 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6503 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6506 case 0xae: /* scasS */
6508 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6509 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6510 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6511 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6514 case 0x6e: /* outsS */
6516 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6517 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6518 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6519 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6522 case 0xe4: /* port I/O */
6526 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6527 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6537 case 0xc2: /* ret im */
6538 case 0xc3: /* ret */
6539 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6540 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6543 case 0xca: /* lret im */
6544 case 0xcb: /* lret */
6545 case 0xcf: /* iret */
6546 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6547 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6548 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6551 case 0xe8: /* call im */
6552 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6554 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6558 case 0x9a: /* lcall im */
6559 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6564 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6565 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6569 case 0xe9: /* jmp im */
6570 case 0xea: /* ljmp im */
6571 case 0xeb: /* jmp Jb */
6572 case 0x70: /* jcc Jb */
6588 case 0x0f80: /* jcc Jv */
6606 case 0x0f90: /* setcc Gv */
6622 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6624 if (i386_record_modrm (&ir
))
6627 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
? (ir
.rm
| ir
.rex_b
)
6631 if (i386_record_lea_modrm (&ir
))
6636 case 0x0f40: /* cmov Gv, Ev */
6652 if (i386_record_modrm (&ir
))
6655 if (ir
.dflag
== OT_BYTE
)
6657 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
6661 case 0x9c: /* pushf */
6662 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6663 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6665 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6669 case 0x9d: /* popf */
6670 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6671 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6674 case 0x9e: /* sahf */
6675 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6681 case 0xf5: /* cmc */
6682 case 0xf8: /* clc */
6683 case 0xf9: /* stc */
6684 case 0xfc: /* cld */
6685 case 0xfd: /* std */
6686 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6689 case 0x9f: /* lahf */
6690 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6695 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6696 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6699 /* bit operations */
6700 case 0x0fba: /* bt/bts/btr/btc Gv, im */
6701 ir
.ot
= ir
.dflag
+ OT_WORD
;
6702 if (i386_record_modrm (&ir
))
6707 opcode
= opcode
<< 8 | ir
.modrm
;
6713 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6716 if (i386_record_lea_modrm (&ir
))
6720 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6723 case 0x0fa3: /* bt Gv, Ev */
6724 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6727 case 0x0fab: /* bts */
6728 case 0x0fb3: /* btr */
6729 case 0x0fbb: /* btc */
6730 ir
.ot
= ir
.dflag
+ OT_WORD
;
6731 if (i386_record_modrm (&ir
))
6734 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6738 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6740 regcache_raw_read_unsigned (ir
.regcache
,
6741 ir
.regmap
[ir
.reg
| rex_r
],
6746 addr64
+= ((int16_t) addr
>> 4) << 4;
6749 addr64
+= ((int32_t) addr
>> 5) << 5;
6752 addr64
+= ((int64_t) addr
>> 6) << 6;
6755 if (record_full_arch_list_add_mem (addr64
, 1 << ir
.ot
))
6757 if (i386_record_lea_modrm (&ir
))
6760 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6763 case 0x0fbc: /* bsf */
6764 case 0x0fbd: /* bsr */
6765 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
6766 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6770 case 0x27: /* daa */
6771 case 0x2f: /* das */
6772 case 0x37: /* aaa */
6773 case 0x3f: /* aas */
6774 case 0xd4: /* aam */
6775 case 0xd5: /* aad */
6776 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6781 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6782 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6786 case 0x90: /* nop */
6787 if (prefixes
& PREFIX_LOCK
)
6794 case 0x9b: /* fwait */
6795 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
6797 opcode
= (uint32_t) opcode8
;
6803 case 0xcc: /* int3 */
6804 printf_unfiltered (_("Process record does not support instruction "
6811 case 0xcd: /* int */
6815 if (record_read_memory (gdbarch
, ir
.addr
, &interrupt
, 1))
6818 if (interrupt
!= 0x80
6819 || tdep
->i386_intx80_record
== NULL
)
6821 printf_unfiltered (_("Process record does not support "
6822 "instruction int 0x%02x.\n"),
6827 ret
= tdep
->i386_intx80_record (ir
.regcache
);
6834 case 0xce: /* into */
6835 printf_unfiltered (_("Process record does not support "
6836 "instruction into.\n"));
6841 case 0xfa: /* cli */
6842 case 0xfb: /* sti */
6845 case 0x62: /* bound */
6846 printf_unfiltered (_("Process record does not support "
6847 "instruction bound.\n"));
6852 case 0x0fc8: /* bswap reg */
6860 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 7) | ir
.rex_b
);
6863 case 0xd6: /* salc */
6864 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6869 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6870 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6873 case 0xe0: /* loopnz */
6874 case 0xe1: /* loopz */
6875 case 0xe2: /* loop */
6876 case 0xe3: /* jecxz */
6877 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6878 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6881 case 0x0f30: /* wrmsr */
6882 printf_unfiltered (_("Process record does not support "
6883 "instruction wrmsr.\n"));
6888 case 0x0f32: /* rdmsr */
6889 printf_unfiltered (_("Process record does not support "
6890 "instruction rdmsr.\n"));
6895 case 0x0f31: /* rdtsc */
6896 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6897 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
6900 case 0x0f34: /* sysenter */
6903 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6908 if (tdep
->i386_sysenter_record
== NULL
)
6910 printf_unfiltered (_("Process record does not support "
6911 "instruction sysenter.\n"));
6915 ret
= tdep
->i386_sysenter_record (ir
.regcache
);
6921 case 0x0f35: /* sysexit */
6922 printf_unfiltered (_("Process record does not support "
6923 "instruction sysexit.\n"));
6928 case 0x0f05: /* syscall */
6931 if (tdep
->i386_syscall_record
== NULL
)
6933 printf_unfiltered (_("Process record does not support "
6934 "instruction syscall.\n"));
6938 ret
= tdep
->i386_syscall_record (ir
.regcache
);
6944 case 0x0f07: /* sysret */
6945 printf_unfiltered (_("Process record does not support "
6946 "instruction sysret.\n"));
6951 case 0x0fa2: /* cpuid */
6952 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6953 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6954 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
6955 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
6958 case 0xf4: /* hlt */
6959 printf_unfiltered (_("Process record does not support "
6960 "instruction hlt.\n"));
6966 if (i386_record_modrm (&ir
))
6973 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6977 if (i386_record_lea_modrm (&ir
))
6986 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6990 opcode
= opcode
<< 8 | ir
.modrm
;
6997 if (i386_record_modrm (&ir
))
7008 opcode
= opcode
<< 8 | ir
.modrm
;
7011 if (ir
.override
>= 0)
7013 if (record_full_memory_query
)
7016 Process record ignores the memory change of instruction at address %s\n\
7017 because it can't get the value of the segment register.\n\
7018 Do you want to stop the program?"),
7019 paddress (gdbarch
, ir
.orig_addr
)))
7025 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7027 if (record_full_arch_list_add_mem (addr64
, 2))
7030 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7032 if (record_full_arch_list_add_mem (addr64
, 8))
7037 if (record_full_arch_list_add_mem (addr64
, 4))
7048 case 0: /* monitor */
7051 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7055 opcode
= opcode
<< 8 | ir
.modrm
;
7063 if (ir
.override
>= 0)
7065 if (record_full_memory_query
)
7068 Process record ignores the memory change of instruction at address %s\n\
7069 because it can't get the value of the segment register.\n\
7070 Do you want to stop the program?"),
7071 paddress (gdbarch
, ir
.orig_addr
)))
7079 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7081 if (record_full_arch_list_add_mem (addr64
, 2))
7084 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7086 if (record_full_arch_list_add_mem (addr64
, 8))
7091 if (record_full_arch_list_add_mem (addr64
, 4))
7103 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7104 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7108 else if (ir
.rm
== 1)
7116 opcode
= opcode
<< 8 | ir
.modrm
;
7123 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
| ir
.rex_b
))
7129 if (i386_record_lea_modrm (&ir
))
7132 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7135 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7137 case 7: /* invlpg */
7140 if (ir
.rm
== 0 && ir
.regmap
[X86_RECORD_R8_REGNUM
])
7141 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
7145 opcode
= opcode
<< 8 | ir
.modrm
;
7150 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7154 opcode
= opcode
<< 8 | ir
.modrm
;
7160 case 0x0f08: /* invd */
7161 case 0x0f09: /* wbinvd */
7164 case 0x63: /* arpl */
7165 if (i386_record_modrm (&ir
))
7167 if (ir
.mod
== 3 || ir
.regmap
[X86_RECORD_R8_REGNUM
])
7169 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.regmap
[X86_RECORD_R8_REGNUM
]
7170 ? (ir
.reg
| rex_r
) : ir
.rm
);
7174 ir
.ot
= ir
.dflag
? OT_LONG
: OT_WORD
;
7175 if (i386_record_lea_modrm (&ir
))
7178 if (!ir
.regmap
[X86_RECORD_R8_REGNUM
])
7179 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7182 case 0x0f02: /* lar */
7183 case 0x0f03: /* lsl */
7184 if (i386_record_modrm (&ir
))
7186 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7187 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7191 if (i386_record_modrm (&ir
))
7193 if (ir
.mod
== 3 && ir
.reg
== 3)
7196 opcode
= opcode
<< 8 | ir
.modrm
;
7208 /* nop (multi byte) */
7211 case 0x0f20: /* mov reg, crN */
7212 case 0x0f22: /* mov crN, reg */
7213 if (i386_record_modrm (&ir
))
7215 if ((ir
.modrm
& 0xc0) != 0xc0)
7218 opcode
= opcode
<< 8 | ir
.modrm
;
7229 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7231 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7235 opcode
= opcode
<< 8 | ir
.modrm
;
7241 case 0x0f21: /* mov reg, drN */
7242 case 0x0f23: /* mov drN, reg */
7243 if (i386_record_modrm (&ir
))
7245 if ((ir
.modrm
& 0xc0) != 0xc0 || ir
.reg
== 4
7246 || ir
.reg
== 5 || ir
.reg
>= 8)
7249 opcode
= opcode
<< 8 | ir
.modrm
;
7253 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7255 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7258 case 0x0f06: /* clts */
7259 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7262 /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
7264 case 0x0f0d: /* 3DNow! prefetch */
7267 case 0x0f0e: /* 3DNow! femms */
7268 case 0x0f77: /* emms */
7269 if (i386_fpc_regnum_p (gdbarch
, I387_FTAG_REGNUM(tdep
)))
7271 record_full_arch_list_add_reg (ir
.regcache
, I387_FTAG_REGNUM(tdep
));
7274 case 0x0f0f: /* 3DNow! data */
7275 if (i386_record_modrm (&ir
))
7277 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7282 case 0x0c: /* 3DNow! pi2fw */
7283 case 0x0d: /* 3DNow! pi2fd */
7284 case 0x1c: /* 3DNow! pf2iw */
7285 case 0x1d: /* 3DNow! pf2id */
7286 case 0x8a: /* 3DNow! pfnacc */
7287 case 0x8e: /* 3DNow! pfpnacc */
7288 case 0x90: /* 3DNow! pfcmpge */
7289 case 0x94: /* 3DNow! pfmin */
7290 case 0x96: /* 3DNow! pfrcp */
7291 case 0x97: /* 3DNow! pfrsqrt */
7292 case 0x9a: /* 3DNow! pfsub */
7293 case 0x9e: /* 3DNow! pfadd */
7294 case 0xa0: /* 3DNow! pfcmpgt */
7295 case 0xa4: /* 3DNow! pfmax */
7296 case 0xa6: /* 3DNow! pfrcpit1 */
7297 case 0xa7: /* 3DNow! pfrsqit1 */
7298 case 0xaa: /* 3DNow! pfsubr */
7299 case 0xae: /* 3DNow! pfacc */
7300 case 0xb0: /* 3DNow! pfcmpeq */
7301 case 0xb4: /* 3DNow! pfmul */
7302 case 0xb6: /* 3DNow! pfrcpit2 */
7303 case 0xb7: /* 3DNow! pmulhrw */
7304 case 0xbb: /* 3DNow! pswapd */
7305 case 0xbf: /* 3DNow! pavgusb */
7306 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7307 goto no_support_3dnow_data
;
7308 record_full_arch_list_add_reg (ir
.regcache
, ir
.reg
);
7312 no_support_3dnow_data
:
7313 opcode
= (opcode
<< 8) | opcode8
;
7319 case 0x0faa: /* rsm */
7320 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7321 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7322 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
7323 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7324 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
7325 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
7326 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
7327 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
7328 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
7332 if (i386_record_modrm (&ir
))
7336 case 0: /* fxsave */
7340 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7341 if (i386_record_lea_modrm_addr (&ir
, &tmpu64
))
7343 if (record_full_arch_list_add_mem (tmpu64
, 512))
7348 case 1: /* fxrstor */
7352 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7354 for (i
= I387_MM0_REGNUM (tdep
);
7355 i386_mmx_regnum_p (gdbarch
, i
); i
++)
7356 record_full_arch_list_add_reg (ir
.regcache
, i
);
7358 for (i
= I387_XMM0_REGNUM (tdep
);
7359 i386_xmm_regnum_p (gdbarch
, i
); i
++)
7360 record_full_arch_list_add_reg (ir
.regcache
, i
);
7362 if (i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7363 record_full_arch_list_add_reg (ir
.regcache
,
7364 I387_MXCSR_REGNUM(tdep
));
7366 for (i
= I387_ST0_REGNUM (tdep
);
7367 i386_fp_regnum_p (gdbarch
, i
); i
++)
7368 record_full_arch_list_add_reg (ir
.regcache
, i
);
7370 for (i
= I387_FCTRL_REGNUM (tdep
);
7371 i386_fpc_regnum_p (gdbarch
, i
); i
++)
7372 record_full_arch_list_add_reg (ir
.regcache
, i
);
7376 case 2: /* ldmxcsr */
7377 if (!i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7379 record_full_arch_list_add_reg (ir
.regcache
, I387_MXCSR_REGNUM(tdep
));
7382 case 3: /* stmxcsr */
7384 if (i386_record_lea_modrm (&ir
))
7388 case 5: /* lfence */
7389 case 6: /* mfence */
7390 case 7: /* sfence clflush */
7394 opcode
= (opcode
<< 8) | ir
.modrm
;
7400 case 0x0fc3: /* movnti */
7401 ir
.ot
= (ir
.dflag
== 2) ? OT_QUAD
: OT_LONG
;
7402 if (i386_record_modrm (&ir
))
7407 if (i386_record_lea_modrm (&ir
))
7411 /* Add prefix to opcode. */
7526 /* Mask out PREFIX_ADDR. */
7527 switch ((prefixes
& ~PREFIX_ADDR
))
7539 reswitch_prefix_add
:
7547 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7550 opcode
= (uint32_t) opcode8
| opcode
<< 8;
7551 goto reswitch_prefix_add
;
7554 case 0x0f10: /* movups */
7555 case 0x660f10: /* movupd */
7556 case 0xf30f10: /* movss */
7557 case 0xf20f10: /* movsd */
7558 case 0x0f12: /* movlps */
7559 case 0x660f12: /* movlpd */
7560 case 0xf30f12: /* movsldup */
7561 case 0xf20f12: /* movddup */
7562 case 0x0f14: /* unpcklps */
7563 case 0x660f14: /* unpcklpd */
7564 case 0x0f15: /* unpckhps */
7565 case 0x660f15: /* unpckhpd */
7566 case 0x0f16: /* movhps */
7567 case 0x660f16: /* movhpd */
7568 case 0xf30f16: /* movshdup */
7569 case 0x0f28: /* movaps */
7570 case 0x660f28: /* movapd */
7571 case 0x0f2a: /* cvtpi2ps */
7572 case 0x660f2a: /* cvtpi2pd */
7573 case 0xf30f2a: /* cvtsi2ss */
7574 case 0xf20f2a: /* cvtsi2sd */
7575 case 0x0f2c: /* cvttps2pi */
7576 case 0x660f2c: /* cvttpd2pi */
7577 case 0x0f2d: /* cvtps2pi */
7578 case 0x660f2d: /* cvtpd2pi */
7579 case 0x660f3800: /* pshufb */
7580 case 0x660f3801: /* phaddw */
7581 case 0x660f3802: /* phaddd */
7582 case 0x660f3803: /* phaddsw */
7583 case 0x660f3804: /* pmaddubsw */
7584 case 0x660f3805: /* phsubw */
7585 case 0x660f3806: /* phsubd */
7586 case 0x660f3807: /* phsubsw */
7587 case 0x660f3808: /* psignb */
7588 case 0x660f3809: /* psignw */
7589 case 0x660f380a: /* psignd */
7590 case 0x660f380b: /* pmulhrsw */
7591 case 0x660f3810: /* pblendvb */
7592 case 0x660f3814: /* blendvps */
7593 case 0x660f3815: /* blendvpd */
7594 case 0x660f381c: /* pabsb */
7595 case 0x660f381d: /* pabsw */
7596 case 0x660f381e: /* pabsd */
7597 case 0x660f3820: /* pmovsxbw */
7598 case 0x660f3821: /* pmovsxbd */
7599 case 0x660f3822: /* pmovsxbq */
7600 case 0x660f3823: /* pmovsxwd */
7601 case 0x660f3824: /* pmovsxwq */
7602 case 0x660f3825: /* pmovsxdq */
7603 case 0x660f3828: /* pmuldq */
7604 case 0x660f3829: /* pcmpeqq */
7605 case 0x660f382a: /* movntdqa */
7606 case 0x660f3a08: /* roundps */
7607 case 0x660f3a09: /* roundpd */
7608 case 0x660f3a0a: /* roundss */
7609 case 0x660f3a0b: /* roundsd */
7610 case 0x660f3a0c: /* blendps */
7611 case 0x660f3a0d: /* blendpd */
7612 case 0x660f3a0e: /* pblendw */
7613 case 0x660f3a0f: /* palignr */
7614 case 0x660f3a20: /* pinsrb */
7615 case 0x660f3a21: /* insertps */
7616 case 0x660f3a22: /* pinsrd pinsrq */
7617 case 0x660f3a40: /* dpps */
7618 case 0x660f3a41: /* dppd */
7619 case 0x660f3a42: /* mpsadbw */
7620 case 0x660f3a60: /* pcmpestrm */
7621 case 0x660f3a61: /* pcmpestri */
7622 case 0x660f3a62: /* pcmpistrm */
7623 case 0x660f3a63: /* pcmpistri */
7624 case 0x0f51: /* sqrtps */
7625 case 0x660f51: /* sqrtpd */
7626 case 0xf20f51: /* sqrtsd */
7627 case 0xf30f51: /* sqrtss */
7628 case 0x0f52: /* rsqrtps */
7629 case 0xf30f52: /* rsqrtss */
7630 case 0x0f53: /* rcpps */
7631 case 0xf30f53: /* rcpss */
7632 case 0x0f54: /* andps */
7633 case 0x660f54: /* andpd */
7634 case 0x0f55: /* andnps */
7635 case 0x660f55: /* andnpd */
7636 case 0x0f56: /* orps */
7637 case 0x660f56: /* orpd */
7638 case 0x0f57: /* xorps */
7639 case 0x660f57: /* xorpd */
7640 case 0x0f58: /* addps */
7641 case 0x660f58: /* addpd */
7642 case 0xf20f58: /* addsd */
7643 case 0xf30f58: /* addss */
7644 case 0x0f59: /* mulps */
7645 case 0x660f59: /* mulpd */
7646 case 0xf20f59: /* mulsd */
7647 case 0xf30f59: /* mulss */
7648 case 0x0f5a: /* cvtps2pd */
7649 case 0x660f5a: /* cvtpd2ps */
7650 case 0xf20f5a: /* cvtsd2ss */
7651 case 0xf30f5a: /* cvtss2sd */
7652 case 0x0f5b: /* cvtdq2ps */
7653 case 0x660f5b: /* cvtps2dq */
7654 case 0xf30f5b: /* cvttps2dq */
7655 case 0x0f5c: /* subps */
7656 case 0x660f5c: /* subpd */
7657 case 0xf20f5c: /* subsd */
7658 case 0xf30f5c: /* subss */
7659 case 0x0f5d: /* minps */
7660 case 0x660f5d: /* minpd */
7661 case 0xf20f5d: /* minsd */
7662 case 0xf30f5d: /* minss */
7663 case 0x0f5e: /* divps */
7664 case 0x660f5e: /* divpd */
7665 case 0xf20f5e: /* divsd */
7666 case 0xf30f5e: /* divss */
7667 case 0x0f5f: /* maxps */
7668 case 0x660f5f: /* maxpd */
7669 case 0xf20f5f: /* maxsd */
7670 case 0xf30f5f: /* maxss */
7671 case 0x660f60: /* punpcklbw */
7672 case 0x660f61: /* punpcklwd */
7673 case 0x660f62: /* punpckldq */
7674 case 0x660f63: /* packsswb */
7675 case 0x660f64: /* pcmpgtb */
7676 case 0x660f65: /* pcmpgtw */
7677 case 0x660f66: /* pcmpgtd */
7678 case 0x660f67: /* packuswb */
7679 case 0x660f68: /* punpckhbw */
7680 case 0x660f69: /* punpckhwd */
7681 case 0x660f6a: /* punpckhdq */
7682 case 0x660f6b: /* packssdw */
7683 case 0x660f6c: /* punpcklqdq */
7684 case 0x660f6d: /* punpckhqdq */
7685 case 0x660f6e: /* movd */
7686 case 0x660f6f: /* movdqa */
7687 case 0xf30f6f: /* movdqu */
7688 case 0x660f70: /* pshufd */
7689 case 0xf20f70: /* pshuflw */
7690 case 0xf30f70: /* pshufhw */
7691 case 0x660f74: /* pcmpeqb */
7692 case 0x660f75: /* pcmpeqw */
7693 case 0x660f76: /* pcmpeqd */
7694 case 0x660f7c: /* haddpd */
7695 case 0xf20f7c: /* haddps */
7696 case 0x660f7d: /* hsubpd */
7697 case 0xf20f7d: /* hsubps */
7698 case 0xf30f7e: /* movq */
7699 case 0x0fc2: /* cmpps */
7700 case 0x660fc2: /* cmppd */
7701 case 0xf20fc2: /* cmpsd */
7702 case 0xf30fc2: /* cmpss */
7703 case 0x660fc4: /* pinsrw */
7704 case 0x0fc6: /* shufps */
7705 case 0x660fc6: /* shufpd */
7706 case 0x660fd0: /* addsubpd */
7707 case 0xf20fd0: /* addsubps */
7708 case 0x660fd1: /* psrlw */
7709 case 0x660fd2: /* psrld */
7710 case 0x660fd3: /* psrlq */
7711 case 0x660fd4: /* paddq */
7712 case 0x660fd5: /* pmullw */
7713 case 0xf30fd6: /* movq2dq */
7714 case 0x660fd8: /* psubusb */
7715 case 0x660fd9: /* psubusw */
7716 case 0x660fda: /* pminub */
7717 case 0x660fdb: /* pand */
7718 case 0x660fdc: /* paddusb */
7719 case 0x660fdd: /* paddusw */
7720 case 0x660fde: /* pmaxub */
7721 case 0x660fdf: /* pandn */
7722 case 0x660fe0: /* pavgb */
7723 case 0x660fe1: /* psraw */
7724 case 0x660fe2: /* psrad */
7725 case 0x660fe3: /* pavgw */
7726 case 0x660fe4: /* pmulhuw */
7727 case 0x660fe5: /* pmulhw */
7728 case 0x660fe6: /* cvttpd2dq */
7729 case 0xf20fe6: /* cvtpd2dq */
7730 case 0xf30fe6: /* cvtdq2pd */
7731 case 0x660fe8: /* psubsb */
7732 case 0x660fe9: /* psubsw */
7733 case 0x660fea: /* pminsw */
7734 case 0x660feb: /* por */
7735 case 0x660fec: /* paddsb */
7736 case 0x660fed: /* paddsw */
7737 case 0x660fee: /* pmaxsw */
7738 case 0x660fef: /* pxor */
7739 case 0xf20ff0: /* lddqu */
7740 case 0x660ff1: /* psllw */
7741 case 0x660ff2: /* pslld */
7742 case 0x660ff3: /* psllq */
7743 case 0x660ff4: /* pmuludq */
7744 case 0x660ff5: /* pmaddwd */
7745 case 0x660ff6: /* psadbw */
7746 case 0x660ff8: /* psubb */
7747 case 0x660ff9: /* psubw */
7748 case 0x660ffa: /* psubd */
7749 case 0x660ffb: /* psubq */
7750 case 0x660ffc: /* paddb */
7751 case 0x660ffd: /* paddw */
7752 case 0x660ffe: /* paddd */
7753 if (i386_record_modrm (&ir
))
7756 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.reg
))
7758 record_full_arch_list_add_reg (ir
.regcache
,
7759 I387_XMM0_REGNUM (tdep
) + ir
.reg
);
7760 if ((opcode
& 0xfffffffc) == 0x660f3a60)
7761 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7764 case 0x0f11: /* movups */
7765 case 0x660f11: /* movupd */
7766 case 0xf30f11: /* movss */
7767 case 0xf20f11: /* movsd */
7768 case 0x0f13: /* movlps */
7769 case 0x660f13: /* movlpd */
7770 case 0x0f17: /* movhps */
7771 case 0x660f17: /* movhpd */
7772 case 0x0f29: /* movaps */
7773 case 0x660f29: /* movapd */
7774 case 0x660f3a14: /* pextrb */
7775 case 0x660f3a15: /* pextrw */
7776 case 0x660f3a16: /* pextrd pextrq */
7777 case 0x660f3a17: /* extractps */
7778 case 0x660f7f: /* movdqa */
7779 case 0xf30f7f: /* movdqu */
7780 if (i386_record_modrm (&ir
))
7784 if (opcode
== 0x0f13 || opcode
== 0x660f13
7785 || opcode
== 0x0f17 || opcode
== 0x660f17)
7788 if (!i386_xmm_regnum_p (gdbarch
,
7789 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
7791 record_full_arch_list_add_reg (ir
.regcache
,
7792 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
7814 if (i386_record_lea_modrm (&ir
))
7819 case 0x0f2b: /* movntps */
7820 case 0x660f2b: /* movntpd */
7821 case 0x0fe7: /* movntq */
7822 case 0x660fe7: /* movntdq */
7825 if (opcode
== 0x0fe7)
7829 if (i386_record_lea_modrm (&ir
))
7833 case 0xf30f2c: /* cvttss2si */
7834 case 0xf20f2c: /* cvttsd2si */
7835 case 0xf30f2d: /* cvtss2si */
7836 case 0xf20f2d: /* cvtsd2si */
7837 case 0xf20f38f0: /* crc32 */
7838 case 0xf20f38f1: /* crc32 */
7839 case 0x0f50: /* movmskps */
7840 case 0x660f50: /* movmskpd */
7841 case 0x0fc5: /* pextrw */
7842 case 0x660fc5: /* pextrw */
7843 case 0x0fd7: /* pmovmskb */
7844 case 0x660fd7: /* pmovmskb */
7845 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7848 case 0x0f3800: /* pshufb */
7849 case 0x0f3801: /* phaddw */
7850 case 0x0f3802: /* phaddd */
7851 case 0x0f3803: /* phaddsw */
7852 case 0x0f3804: /* pmaddubsw */
7853 case 0x0f3805: /* phsubw */
7854 case 0x0f3806: /* phsubd */
7855 case 0x0f3807: /* phsubsw */
7856 case 0x0f3808: /* psignb */
7857 case 0x0f3809: /* psignw */
7858 case 0x0f380a: /* psignd */
7859 case 0x0f380b: /* pmulhrsw */
7860 case 0x0f381c: /* pabsb */
7861 case 0x0f381d: /* pabsw */
7862 case 0x0f381e: /* pabsd */
7863 case 0x0f382b: /* packusdw */
7864 case 0x0f3830: /* pmovzxbw */
7865 case 0x0f3831: /* pmovzxbd */
7866 case 0x0f3832: /* pmovzxbq */
7867 case 0x0f3833: /* pmovzxwd */
7868 case 0x0f3834: /* pmovzxwq */
7869 case 0x0f3835: /* pmovzxdq */
7870 case 0x0f3837: /* pcmpgtq */
7871 case 0x0f3838: /* pminsb */
7872 case 0x0f3839: /* pminsd */
7873 case 0x0f383a: /* pminuw */
7874 case 0x0f383b: /* pminud */
7875 case 0x0f383c: /* pmaxsb */
7876 case 0x0f383d: /* pmaxsd */
7877 case 0x0f383e: /* pmaxuw */
7878 case 0x0f383f: /* pmaxud */
7879 case 0x0f3840: /* pmulld */
7880 case 0x0f3841: /* phminposuw */
7881 case 0x0f3a0f: /* palignr */
7882 case 0x0f60: /* punpcklbw */
7883 case 0x0f61: /* punpcklwd */
7884 case 0x0f62: /* punpckldq */
7885 case 0x0f63: /* packsswb */
7886 case 0x0f64: /* pcmpgtb */
7887 case 0x0f65: /* pcmpgtw */
7888 case 0x0f66: /* pcmpgtd */
7889 case 0x0f67: /* packuswb */
7890 case 0x0f68: /* punpckhbw */
7891 case 0x0f69: /* punpckhwd */
7892 case 0x0f6a: /* punpckhdq */
7893 case 0x0f6b: /* packssdw */
7894 case 0x0f6e: /* movd */
7895 case 0x0f6f: /* movq */
7896 case 0x0f70: /* pshufw */
7897 case 0x0f74: /* pcmpeqb */
7898 case 0x0f75: /* pcmpeqw */
7899 case 0x0f76: /* pcmpeqd */
7900 case 0x0fc4: /* pinsrw */
7901 case 0x0fd1: /* psrlw */
7902 case 0x0fd2: /* psrld */
7903 case 0x0fd3: /* psrlq */
7904 case 0x0fd4: /* paddq */
7905 case 0x0fd5: /* pmullw */
7906 case 0xf20fd6: /* movdq2q */
7907 case 0x0fd8: /* psubusb */
7908 case 0x0fd9: /* psubusw */
7909 case 0x0fda: /* pminub */
7910 case 0x0fdb: /* pand */
7911 case 0x0fdc: /* paddusb */
7912 case 0x0fdd: /* paddusw */
7913 case 0x0fde: /* pmaxub */
7914 case 0x0fdf: /* pandn */
7915 case 0x0fe0: /* pavgb */
7916 case 0x0fe1: /* psraw */
7917 case 0x0fe2: /* psrad */
7918 case 0x0fe3: /* pavgw */
7919 case 0x0fe4: /* pmulhuw */
7920 case 0x0fe5: /* pmulhw */
7921 case 0x0fe8: /* psubsb */
7922 case 0x0fe9: /* psubsw */
7923 case 0x0fea: /* pminsw */
7924 case 0x0feb: /* por */
7925 case 0x0fec: /* paddsb */
7926 case 0x0fed: /* paddsw */
7927 case 0x0fee: /* pmaxsw */
7928 case 0x0fef: /* pxor */
7929 case 0x0ff1: /* psllw */
7930 case 0x0ff2: /* pslld */
7931 case 0x0ff3: /* psllq */
7932 case 0x0ff4: /* pmuludq */
7933 case 0x0ff5: /* pmaddwd */
7934 case 0x0ff6: /* psadbw */
7935 case 0x0ff8: /* psubb */
7936 case 0x0ff9: /* psubw */
7937 case 0x0ffa: /* psubd */
7938 case 0x0ffb: /* psubq */
7939 case 0x0ffc: /* paddb */
7940 case 0x0ffd: /* paddw */
7941 case 0x0ffe: /* paddd */
7942 if (i386_record_modrm (&ir
))
7944 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7946 record_full_arch_list_add_reg (ir
.regcache
,
7947 I387_MM0_REGNUM (tdep
) + ir
.reg
);
7950 case 0x0f71: /* psllw */
7951 case 0x0f72: /* pslld */
7952 case 0x0f73: /* psllq */
7953 if (i386_record_modrm (&ir
))
7955 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
7957 record_full_arch_list_add_reg (ir
.regcache
,
7958 I387_MM0_REGNUM (tdep
) + ir
.rm
);
7961 case 0x660f71: /* psllw */
7962 case 0x660f72: /* pslld */
7963 case 0x660f73: /* psllq */
7964 if (i386_record_modrm (&ir
))
7967 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.rm
))
7969 record_full_arch_list_add_reg (ir
.regcache
,
7970 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
7973 case 0x0f7e: /* movd */
7974 case 0x660f7e: /* movd */
7975 if (i386_record_modrm (&ir
))
7978 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7985 if (i386_record_lea_modrm (&ir
))
7990 case 0x0f7f: /* movq */
7991 if (i386_record_modrm (&ir
))
7995 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
7997 record_full_arch_list_add_reg (ir
.regcache
,
7998 I387_MM0_REGNUM (tdep
) + ir
.rm
);
8003 if (i386_record_lea_modrm (&ir
))
8008 case 0xf30fb8: /* popcnt */
8009 if (i386_record_modrm (&ir
))
8011 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
8012 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8015 case 0x660fd6: /* movq */
8016 if (i386_record_modrm (&ir
))
8021 if (!i386_xmm_regnum_p (gdbarch
,
8022 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
8024 record_full_arch_list_add_reg (ir
.regcache
,
8025 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
8030 if (i386_record_lea_modrm (&ir
))
8035 case 0x660f3817: /* ptest */
8036 case 0x0f2e: /* ucomiss */
8037 case 0x660f2e: /* ucomisd */
8038 case 0x0f2f: /* comiss */
8039 case 0x660f2f: /* comisd */
8040 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8043 case 0x0ff7: /* maskmovq */
8044 regcache_raw_read_unsigned (ir
.regcache
,
8045 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8047 if (record_full_arch_list_add_mem (addr
, 64))
8051 case 0x660ff7: /* maskmovdqu */
8052 regcache_raw_read_unsigned (ir
.regcache
,
8053 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8055 if (record_full_arch_list_add_mem (addr
, 128))
8070 /* In the future, maybe still need to deal with need_dasm. */
8071 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REIP_REGNUM
);
8072 if (record_full_arch_list_add_end ())
8078 printf_unfiltered (_("Process record does not support instruction 0x%02x "
8079 "at address %s.\n"),
8080 (unsigned int) (opcode
),
8081 paddress (gdbarch
, ir
.orig_addr
));
8085 static const int i386_record_regmap
[] =
8087 I386_EAX_REGNUM
, I386_ECX_REGNUM
, I386_EDX_REGNUM
, I386_EBX_REGNUM
,
8088 I386_ESP_REGNUM
, I386_EBP_REGNUM
, I386_ESI_REGNUM
, I386_EDI_REGNUM
,
8089 0, 0, 0, 0, 0, 0, 0, 0,
8090 I386_EIP_REGNUM
, I386_EFLAGS_REGNUM
, I386_CS_REGNUM
, I386_SS_REGNUM
,
8091 I386_DS_REGNUM
, I386_ES_REGNUM
, I386_FS_REGNUM
, I386_GS_REGNUM
8094 /* Check that the given address appears suitable for a fast
8095 tracepoint, which on x86-64 means that we need an instruction of at
8096 least 5 bytes, so that we can overwrite it with a 4-byte-offset
8097 jump and not have to worry about program jumps to an address in the
8098 middle of the tracepoint jump. On x86, it may be possible to use
8099 4-byte jumps with a 2-byte offset to a trampoline located in the
8100 bottom 64 KiB of memory. Returns 1 if OK, and writes a size
8101 of instruction to replace, and 0 if not, plus an explanatory
8105 i386_fast_tracepoint_valid_at (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
8110 /* Ask the target for the minimum instruction length supported. */
8111 jumplen
= target_get_min_fast_tracepoint_insn_len ();
8115 /* If the target does not support the get_min_fast_tracepoint_insn_len
8116 operation, assume that fast tracepoints will always be implemented
8117 using 4-byte relative jumps on both x86 and x86-64. */
8120 else if (jumplen
== 0)
8122 /* If the target does support get_min_fast_tracepoint_insn_len but
8123 returns zero, then the IPA has not loaded yet. In this case,
8124 we optimistically assume that truncated 2-byte relative jumps
8125 will be available on x86, and compensate later if this assumption
8126 turns out to be incorrect. On x86-64 architectures, 4-byte relative
8127 jumps will always be used. */
8128 jumplen
= (register_size (gdbarch
, 0) == 8) ? 5 : 4;
8131 /* Check for fit. */
8132 len
= gdb_insn_length (gdbarch
, addr
);
8136 /* Return a bit of target-specific detail to add to the caller's
8137 generic failure message. */
8139 *msg
= string_printf (_("; instruction is only %d bytes long, "
8140 "need at least %d bytes for the jump"),
8152 /* Return a floating-point format for a floating-point variable of
8153 length LEN in bits. If non-NULL, NAME is the name of its type.
8154 If no suitable type is found, return NULL. */
8156 static const struct floatformat
**
8157 i386_floatformat_for_type (struct gdbarch
*gdbarch
,
8158 const char *name
, int len
)
8160 if (len
== 128 && name
)
8161 if (strcmp (name
, "__float128") == 0
8162 || strcmp (name
, "_Float128") == 0
8163 || strcmp (name
, "complex _Float128") == 0
8164 || strcmp (name
, "complex(kind=16)") == 0
8165 || strcmp (name
, "quad complex") == 0
8166 || strcmp (name
, "real(kind=16)") == 0
8167 || strcmp (name
, "real*16") == 0)
8168 return floatformats_ia64_quad
;
8170 return default_floatformat_for_type (gdbarch
, name
, len
);
8174 i386_validate_tdesc_p (struct gdbarch_tdep
*tdep
,
8175 struct tdesc_arch_data
*tdesc_data
)
8177 const struct target_desc
*tdesc
= tdep
->tdesc
;
8178 const struct tdesc_feature
*feature_core
;
8180 const struct tdesc_feature
*feature_sse
, *feature_avx
, *feature_mpx
,
8181 *feature_avx512
, *feature_pkeys
, *feature_segments
;
8182 int i
, num_regs
, valid_p
;
8184 if (! tdesc_has_registers (tdesc
))
8187 /* Get core registers. */
8188 feature_core
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.core");
8189 if (feature_core
== NULL
)
8192 /* Get SSE registers. */
8193 feature_sse
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.sse");
8195 /* Try AVX registers. */
8196 feature_avx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx");
8198 /* Try MPX registers. */
8199 feature_mpx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx");
8201 /* Try AVX512 registers. */
8202 feature_avx512
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx512");
8204 /* Try segment base registers. */
8205 feature_segments
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.segments");
8208 feature_pkeys
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.pkeys");
8212 /* The XCR0 bits. */
8215 /* AVX512 register description requires AVX register description. */
8219 tdep
->xcr0
= X86_XSTATE_AVX_AVX512_MASK
;
8221 /* It may have been set by OSABI initialization function. */
8222 if (tdep
->k0_regnum
< 0)
8224 tdep
->k_register_names
= i386_k_names
;
8225 tdep
->k0_regnum
= I386_K0_REGNUM
;
8228 for (i
= 0; i
< I387_NUM_K_REGS
; i
++)
8229 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8230 tdep
->k0_regnum
+ i
,
8233 if (tdep
->num_zmm_regs
== 0)
8235 tdep
->zmmh_register_names
= i386_zmmh_names
;
8236 tdep
->num_zmm_regs
= 8;
8237 tdep
->zmm0h_regnum
= I386_ZMM0H_REGNUM
;
8240 for (i
= 0; i
< tdep
->num_zmm_regs
; i
++)
8241 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8242 tdep
->zmm0h_regnum
+ i
,
8243 tdep
->zmmh_register_names
[i
]);
8245 for (i
= 0; i
< tdep
->num_xmm_avx512_regs
; i
++)
8246 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8247 tdep
->xmm16_regnum
+ i
,
8248 tdep
->xmm_avx512_register_names
[i
]);
8250 for (i
= 0; i
< tdep
->num_ymm_avx512_regs
; i
++)
8251 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8252 tdep
->ymm16h_regnum
+ i
,
8253 tdep
->ymm16h_register_names
[i
]);
8257 /* AVX register description requires SSE register description. */
8261 if (!feature_avx512
)
8262 tdep
->xcr0
= X86_XSTATE_AVX_MASK
;
8264 /* It may have been set by OSABI initialization function. */
8265 if (tdep
->num_ymm_regs
== 0)
8267 tdep
->ymmh_register_names
= i386_ymmh_names
;
8268 tdep
->num_ymm_regs
= 8;
8269 tdep
->ymm0h_regnum
= I386_YMM0H_REGNUM
;
8272 for (i
= 0; i
< tdep
->num_ymm_regs
; i
++)
8273 valid_p
&= tdesc_numbered_register (feature_avx
, tdesc_data
,
8274 tdep
->ymm0h_regnum
+ i
,
8275 tdep
->ymmh_register_names
[i
]);
8277 else if (feature_sse
)
8278 tdep
->xcr0
= X86_XSTATE_SSE_MASK
;
8281 tdep
->xcr0
= X86_XSTATE_X87_MASK
;
8282 tdep
->num_xmm_regs
= 0;
8285 num_regs
= tdep
->num_core_regs
;
8286 for (i
= 0; i
< num_regs
; i
++)
8287 valid_p
&= tdesc_numbered_register (feature_core
, tdesc_data
, i
,
8288 tdep
->register_names
[i
]);
8292 /* Need to include %mxcsr, so add one. */
8293 num_regs
+= tdep
->num_xmm_regs
+ 1;
8294 for (; i
< num_regs
; i
++)
8295 valid_p
&= tdesc_numbered_register (feature_sse
, tdesc_data
, i
,
8296 tdep
->register_names
[i
]);
8301 tdep
->xcr0
|= X86_XSTATE_MPX_MASK
;
8303 if (tdep
->bnd0r_regnum
< 0)
8305 tdep
->mpx_register_names
= i386_mpx_names
;
8306 tdep
->bnd0r_regnum
= I386_BND0R_REGNUM
;
8307 tdep
->bndcfgu_regnum
= I386_BNDCFGU_REGNUM
;
8310 for (i
= 0; i
< I387_NUM_MPX_REGS
; i
++)
8311 valid_p
&= tdesc_numbered_register (feature_mpx
, tdesc_data
,
8312 I387_BND0R_REGNUM (tdep
) + i
,
8313 tdep
->mpx_register_names
[i
]);
8316 if (feature_segments
)
8318 if (tdep
->fsbase_regnum
< 0)
8319 tdep
->fsbase_regnum
= I386_FSBASE_REGNUM
;
8320 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8321 tdep
->fsbase_regnum
, "fs_base");
8322 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8323 tdep
->fsbase_regnum
+ 1, "gs_base");
8328 tdep
->xcr0
|= X86_XSTATE_PKRU
;
8329 if (tdep
->pkru_regnum
< 0)
8331 tdep
->pkeys_register_names
= i386_pkeys_names
;
8332 tdep
->pkru_regnum
= I386_PKRU_REGNUM
;
8333 tdep
->num_pkeys_regs
= 1;
8336 for (i
= 0; i
< I387_NUM_PKEYS_REGS
; i
++)
8337 valid_p
&= tdesc_numbered_register (feature_pkeys
, tdesc_data
,
8338 I387_PKRU_REGNUM (tdep
) + i
,
8339 tdep
->pkeys_register_names
[i
]);
8347 /* Implement the type_align gdbarch function. */
8350 i386_type_align (struct gdbarch
*gdbarch
, struct type
*type
)
8352 type
= check_typedef (type
);
8354 if (gdbarch_ptr_bit (gdbarch
) == 32)
8356 if ((type
->code () == TYPE_CODE_INT
8357 || type
->code () == TYPE_CODE_FLT
)
8358 && TYPE_LENGTH (type
) > 4)
8361 /* Handle x86's funny long double. */
8362 if (type
->code () == TYPE_CODE_FLT
8363 && gdbarch_long_double_bit (gdbarch
) == TYPE_LENGTH (type
) * 8)
8371 /* Note: This is called for both i386 and amd64. */
8373 static struct gdbarch
*
8374 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
8376 struct gdbarch_tdep
*tdep
;
8377 struct gdbarch
*gdbarch
;
8378 const struct target_desc
*tdesc
;
8384 /* If there is already a candidate, use it. */
8385 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
8387 return arches
->gdbarch
;
8389 /* Allocate space for the new architecture. Assume i386 for now. */
8390 tdep
= XCNEW (struct gdbarch_tdep
);
8391 gdbarch
= gdbarch_alloc (&info
, tdep
);
8393 /* General-purpose registers. */
8394 tdep
->gregset_reg_offset
= NULL
;
8395 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
8396 tdep
->sizeof_gregset
= 0;
8398 /* Floating-point registers. */
8399 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
8400 tdep
->fpregset
= &i386_fpregset
;
8402 /* The default settings include the FPU registers, the MMX registers
8403 and the SSE registers. This can be overridden for a specific ABI
8404 by adjusting the members `st0_regnum', `mm0_regnum' and
8405 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
8406 will show up in the output of "info all-registers". */
8408 tdep
->st0_regnum
= I386_ST0_REGNUM
;
8410 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
8411 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
8413 tdep
->jb_pc_offset
= -1;
8414 tdep
->struct_return
= pcc_struct_return
;
8415 tdep
->sigtramp_start
= 0;
8416 tdep
->sigtramp_end
= 0;
8417 tdep
->sigtramp_p
= i386_sigtramp_p
;
8418 tdep
->sigcontext_addr
= NULL
;
8419 tdep
->sc_reg_offset
= NULL
;
8420 tdep
->sc_pc_offset
= -1;
8421 tdep
->sc_sp_offset
= -1;
8423 tdep
->xsave_xcr0_offset
= -1;
8425 tdep
->record_regmap
= i386_record_regmap
;
8427 set_gdbarch_type_align (gdbarch
, i386_type_align
);
8429 /* The format used for `long double' on almost all i386 targets is
8430 the i387 extended floating-point format. In fact, of all targets
8431 in the GCC 2.95 tree, only OSF/1 does it different, and insists
8432 on having a `long double' that's not `long' at all. */
8433 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
8435 /* Although the i387 extended floating-point has only 80 significant
8436 bits, a `long double' actually takes up 96, probably to enforce
8438 set_gdbarch_long_double_bit (gdbarch
, 96);
8440 /* Support of bfloat16 format. */
8441 set_gdbarch_bfloat16_format (gdbarch
, floatformats_bfloat16
);
8443 /* Support for floating-point data type variants. */
8444 set_gdbarch_floatformat_for_type (gdbarch
, i386_floatformat_for_type
);
8446 /* Register numbers of various important registers. */
8447 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
8448 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
8449 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
8450 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
8452 /* NOTE: kettenis/20040418: GCC does have two possible register
8453 numbering schemes on the i386: dbx and SVR4. These schemes
8454 differ in how they number %ebp, %esp, %eflags, and the
8455 floating-point registers, and are implemented by the arrays
8456 dbx_register_map[] and svr4_dbx_register_map in
8457 gcc/config/i386.c. GCC also defines a third numbering scheme in
8458 gcc/config/i386.c, which it designates as the "default" register
8459 map used in 64bit mode. This last register numbering scheme is
8460 implemented in dbx64_register_map, and is used for AMD64; see
8463 Currently, each GCC i386 target always uses the same register
8464 numbering scheme across all its supported debugging formats
8465 i.e. SDB (COFF), stabs and DWARF 2. This is because
8466 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
8467 DBX_REGISTER_NUMBER macro which is defined by each target's
8468 respective config header in a manner independent of the requested
8469 output debugging format.
8471 This does not match the arrangement below, which presumes that
8472 the SDB and stabs numbering schemes differ from the DWARF and
8473 DWARF 2 ones. The reason for this arrangement is that it is
8474 likely to get the numbering scheme for the target's
8475 default/native debug format right. For targets where GCC is the
8476 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
8477 targets where the native toolchain uses a different numbering
8478 scheme for a particular debug format (stabs-in-ELF on Solaris)
8479 the defaults below will have to be overridden, like
8480 i386_elf_init_abi() does. */
8482 /* Use the dbx register numbering scheme for stabs and COFF. */
8483 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8484 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8486 /* Use the SVR4 register numbering scheme for DWARF 2. */
8487 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_dwarf_reg_to_regnum
);
8489 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
8490 be in use on any of the supported i386 targets. */
8492 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
8494 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
8496 /* Call dummy code. */
8497 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
8498 set_gdbarch_push_dummy_code (gdbarch
, i386_push_dummy_code
);
8499 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
8500 set_gdbarch_frame_align (gdbarch
, i386_frame_align
);
8502 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
8503 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
8504 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
8506 set_gdbarch_return_value (gdbarch
, i386_return_value
);
8508 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
8510 /* Stack grows downward. */
8511 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
8513 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, i386_breakpoint::kind_from_pc
);
8514 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, i386_breakpoint::bp_from_kind
);
8516 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
8517 set_gdbarch_max_insn_length (gdbarch
, I386_MAX_INSN_LEN
);
8519 set_gdbarch_frame_args_skip (gdbarch
, 8);
8521 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
8523 set_gdbarch_dummy_id (gdbarch
, i386_dummy_id
);
8525 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
8527 /* Add the i386 register groups. */
8528 i386_add_reggroups (gdbarch
);
8529 tdep
->register_reggroup_p
= i386_register_reggroup_p
;
8531 /* Helper for function argument information. */
8532 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
8534 /* Hook the function epilogue frame unwinder. This unwinder is
8535 appended to the list first, so that it supercedes the DWARF
8536 unwinder in function epilogues (where the DWARF unwinder
8537 currently fails). */
8538 frame_unwind_append_unwinder (gdbarch
, &i386_epilogue_frame_unwind
);
8540 /* Hook in the DWARF CFI frame unwinder. This unwinder is appended
8541 to the list before the prologue-based unwinders, so that DWARF
8542 CFI info will be used if it is available. */
8543 dwarf2_append_unwinders (gdbarch
);
8545 frame_base_set_default (gdbarch
, &i386_frame_base
);
8547 /* Pseudo registers may be changed by amd64_init_abi. */
8548 set_gdbarch_pseudo_register_read_value (gdbarch
,
8549 i386_pseudo_register_read_value
);
8550 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
8551 set_gdbarch_ax_pseudo_register_collect (gdbarch
,
8552 i386_ax_pseudo_register_collect
);
8554 set_tdesc_pseudo_register_type (gdbarch
, i386_pseudo_register_type
);
8555 set_tdesc_pseudo_register_name (gdbarch
, i386_pseudo_register_name
);
8557 /* Override the normal target description method to make the AVX
8558 upper halves anonymous. */
8559 set_gdbarch_register_name (gdbarch
, i386_register_name
);
8561 /* Even though the default ABI only includes general-purpose registers,
8562 floating-point registers and the SSE registers, we have to leave a
8563 gap for the upper AVX, MPX and AVX512 registers. */
8564 set_gdbarch_num_regs (gdbarch
, I386_NUM_REGS
);
8566 set_gdbarch_gnu_triplet_regexp (gdbarch
, i386_gnu_triplet_regexp
);
8568 /* Get the x86 target description from INFO. */
8569 tdesc
= info
.target_desc
;
8570 if (! tdesc_has_registers (tdesc
))
8571 tdesc
= i386_target_description (X86_XSTATE_SSE_MASK
, false);
8572 tdep
->tdesc
= tdesc
;
8574 tdep
->num_core_regs
= I386_NUM_GREGS
+ I387_NUM_REGS
;
8575 tdep
->register_names
= i386_register_names
;
8577 /* No upper YMM registers. */
8578 tdep
->ymmh_register_names
= NULL
;
8579 tdep
->ymm0h_regnum
= -1;
8581 /* No upper ZMM registers. */
8582 tdep
->zmmh_register_names
= NULL
;
8583 tdep
->zmm0h_regnum
= -1;
8585 /* No high XMM registers. */
8586 tdep
->xmm_avx512_register_names
= NULL
;
8587 tdep
->xmm16_regnum
= -1;
8589 /* No upper YMM16-31 registers. */
8590 tdep
->ymm16h_register_names
= NULL
;
8591 tdep
->ymm16h_regnum
= -1;
8593 tdep
->num_byte_regs
= 8;
8594 tdep
->num_word_regs
= 8;
8595 tdep
->num_dword_regs
= 0;
8596 tdep
->num_mmx_regs
= 8;
8597 tdep
->num_ymm_regs
= 0;
8599 /* No MPX registers. */
8600 tdep
->bnd0r_regnum
= -1;
8601 tdep
->bndcfgu_regnum
= -1;
8603 /* No AVX512 registers. */
8604 tdep
->k0_regnum
= -1;
8605 tdep
->num_zmm_regs
= 0;
8606 tdep
->num_ymm_avx512_regs
= 0;
8607 tdep
->num_xmm_avx512_regs
= 0;
8609 /* No PKEYS registers */
8610 tdep
->pkru_regnum
= -1;
8611 tdep
->num_pkeys_regs
= 0;
8613 /* No segment base registers. */
8614 tdep
->fsbase_regnum
= -1;
8616 tdesc_arch_data_up tdesc_data
= tdesc_data_alloc ();
8618 set_gdbarch_relocate_instruction (gdbarch
, i386_relocate_instruction
);
8620 set_gdbarch_gen_return_address (gdbarch
, i386_gen_return_address
);
8622 set_gdbarch_insn_is_call (gdbarch
, i386_insn_is_call
);
8623 set_gdbarch_insn_is_ret (gdbarch
, i386_insn_is_ret
);
8624 set_gdbarch_insn_is_jump (gdbarch
, i386_insn_is_jump
);
8626 /* Hook in ABI-specific overrides, if they have been registered.
8627 Note: If INFO specifies a 64 bit arch, this is where we turn
8628 a 32-bit i386 into a 64-bit amd64. */
8629 info
.tdesc_data
= tdesc_data
.get ();
8630 gdbarch_init_osabi (info
, gdbarch
);
8632 if (!i386_validate_tdesc_p (tdep
, tdesc_data
.get ()))
8635 gdbarch_free (gdbarch
);
8639 num_bnd_cooked
= (tdep
->bnd0r_regnum
> 0 ? I387_NUM_BND_REGS
: 0);
8641 /* Wire in pseudo registers. Number of pseudo registers may be
8643 set_gdbarch_num_pseudo_regs (gdbarch
, (tdep
->num_byte_regs
8644 + tdep
->num_word_regs
8645 + tdep
->num_dword_regs
8646 + tdep
->num_mmx_regs
8647 + tdep
->num_ymm_regs
8649 + tdep
->num_ymm_avx512_regs
8650 + tdep
->num_zmm_regs
));
8652 /* Target description may be changed. */
8653 tdesc
= tdep
->tdesc
;
8655 tdesc_use_registers (gdbarch
, tdesc
, std::move (tdesc_data
));
8657 /* Override gdbarch_register_reggroup_p set in tdesc_use_registers. */
8658 set_gdbarch_register_reggroup_p (gdbarch
, tdep
->register_reggroup_p
);
8660 /* Make %al the first pseudo-register. */
8661 tdep
->al_regnum
= gdbarch_num_regs (gdbarch
);
8662 tdep
->ax_regnum
= tdep
->al_regnum
+ tdep
->num_byte_regs
;
8664 ymm0_regnum
= tdep
->ax_regnum
+ tdep
->num_word_regs
;
8665 if (tdep
->num_dword_regs
)
8667 /* Support dword pseudo-register if it hasn't been disabled. */
8668 tdep
->eax_regnum
= ymm0_regnum
;
8669 ymm0_regnum
+= tdep
->num_dword_regs
;
8672 tdep
->eax_regnum
= -1;
8674 mm0_regnum
= ymm0_regnum
;
8675 if (tdep
->num_ymm_regs
)
8677 /* Support YMM pseudo-register if it is available. */
8678 tdep
->ymm0_regnum
= ymm0_regnum
;
8679 mm0_regnum
+= tdep
->num_ymm_regs
;
8682 tdep
->ymm0_regnum
= -1;
8684 if (tdep
->num_ymm_avx512_regs
)
8686 /* Support YMM16-31 pseudo registers if available. */
8687 tdep
->ymm16_regnum
= mm0_regnum
;
8688 mm0_regnum
+= tdep
->num_ymm_avx512_regs
;
8691 tdep
->ymm16_regnum
= -1;
8693 if (tdep
->num_zmm_regs
)
8695 /* Support ZMM pseudo-register if it is available. */
8696 tdep
->zmm0_regnum
= mm0_regnum
;
8697 mm0_regnum
+= tdep
->num_zmm_regs
;
8700 tdep
->zmm0_regnum
= -1;
8702 bnd0_regnum
= mm0_regnum
;
8703 if (tdep
->num_mmx_regs
!= 0)
8705 /* Support MMX pseudo-register if MMX hasn't been disabled. */
8706 tdep
->mm0_regnum
= mm0_regnum
;
8707 bnd0_regnum
+= tdep
->num_mmx_regs
;
8710 tdep
->mm0_regnum
= -1;
8712 if (tdep
->bnd0r_regnum
> 0)
8713 tdep
->bnd0_regnum
= bnd0_regnum
;
8715 tdep
-> bnd0_regnum
= -1;
8717 /* Hook in the legacy prologue-based unwinders last (fallback). */
8718 frame_unwind_append_unwinder (gdbarch
, &i386_stack_tramp_frame_unwind
);
8719 frame_unwind_append_unwinder (gdbarch
, &i386_sigtramp_frame_unwind
);
8720 frame_unwind_append_unwinder (gdbarch
, &i386_frame_unwind
);
8722 /* If we have a register mapping, enable the generic core file
8723 support, unless it has already been enabled. */
8724 if (tdep
->gregset_reg_offset
8725 && !gdbarch_iterate_over_regset_sections_p (gdbarch
))
8726 set_gdbarch_iterate_over_regset_sections
8727 (gdbarch
, i386_iterate_over_regset_sections
);
8729 set_gdbarch_fast_tracepoint_valid_at (gdbarch
,
8730 i386_fast_tracepoint_valid_at
);
8737 /* Return the target description for a specified XSAVE feature mask. */
8739 const struct target_desc
*
8740 i386_target_description (uint64_t xcr0
, bool segments
)
8742 static target_desc
*i386_tdescs \
8743 [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
8744 target_desc
**tdesc
;
8746 tdesc
= &i386_tdescs
[(xcr0
& X86_XSTATE_SSE
) ? 1 : 0]
8747 [(xcr0
& X86_XSTATE_AVX
) ? 1 : 0]
8748 [(xcr0
& X86_XSTATE_MPX
) ? 1 : 0]
8749 [(xcr0
& X86_XSTATE_AVX512
) ? 1 : 0]
8750 [(xcr0
& X86_XSTATE_PKRU
) ? 1 : 0]
8754 *tdesc
= i386_create_target_description (xcr0
, false, segments
);
8759 #define MPX_BASE_MASK (~(ULONGEST) 0xfff)
8761 /* Find the bound directory base address. */
8763 static unsigned long
8764 i386_mpx_bd_base (void)
8766 struct regcache
*rcache
;
8767 struct gdbarch_tdep
*tdep
;
8769 enum register_status regstatus
;
8771 rcache
= get_current_regcache ();
8772 tdep
= gdbarch_tdep (rcache
->arch ());
8774 regstatus
= regcache_raw_read_unsigned (rcache
, tdep
->bndcfgu_regnum
, &ret
);
8776 if (regstatus
!= REG_VALID
)
8777 error (_("BNDCFGU register invalid, read status %d."), regstatus
);
8779 return ret
& MPX_BASE_MASK
;
8783 i386_mpx_enabled (void)
8785 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_current_arch ());
8786 const struct target_desc
*tdesc
= tdep
->tdesc
;
8788 return (tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx") != NULL
);
8791 #define MPX_BD_MASK 0xfffffff00000ULL /* select bits [47:20] */
8792 #define MPX_BT_MASK 0x0000000ffff8 /* select bits [19:3] */
8793 #define MPX_BD_MASK_32 0xfffff000 /* select bits [31:12] */
8794 #define MPX_BT_MASK_32 0x00000ffc /* select bits [11:2] */
8796 /* Find the bound table entry given the pointer location and the base
8797 address of the table. */
8800 i386_mpx_get_bt_entry (CORE_ADDR ptr
, CORE_ADDR bd_base
)
8804 CORE_ADDR mpx_bd_mask
, bd_ptr_r_shift
, bd_ptr_l_shift
;
8805 CORE_ADDR bt_mask
, bt_select_r_shift
, bt_select_l_shift
;
8806 CORE_ADDR bd_entry_addr
;
8809 struct gdbarch
*gdbarch
= get_current_arch ();
8810 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8813 if (gdbarch_ptr_bit (gdbarch
) == 64)
8815 mpx_bd_mask
= (CORE_ADDR
) MPX_BD_MASK
;
8816 bd_ptr_r_shift
= 20;
8818 bt_select_r_shift
= 3;
8819 bt_select_l_shift
= 5;
8820 bt_mask
= (CORE_ADDR
) MPX_BT_MASK
;
8822 if ( sizeof (CORE_ADDR
) == 4)
8823 error (_("bound table examination not supported\
8824 for 64-bit process with 32-bit GDB"));
8828 mpx_bd_mask
= MPX_BD_MASK_32
;
8829 bd_ptr_r_shift
= 12;
8831 bt_select_r_shift
= 2;
8832 bt_select_l_shift
= 4;
8833 bt_mask
= MPX_BT_MASK_32
;
8836 offset1
= ((ptr
& mpx_bd_mask
) >> bd_ptr_r_shift
) << bd_ptr_l_shift
;
8837 bd_entry_addr
= bd_base
+ offset1
;
8838 bd_entry
= read_memory_typed_address (bd_entry_addr
, data_ptr_type
);
8840 if ((bd_entry
& 0x1) == 0)
8841 error (_("Invalid bounds directory entry at %s."),
8842 paddress (get_current_arch (), bd_entry_addr
));
8844 /* Clearing status bit. */
8846 bt_addr
= bd_entry
& ~bt_select_r_shift
;
8847 offset2
= ((ptr
& bt_mask
) >> bt_select_r_shift
) << bt_select_l_shift
;
8849 return bt_addr
+ offset2
;
8852 /* Print routine for the mpx bounds. */
8855 i386_mpx_print_bounds (const CORE_ADDR bt_entry
[4])
8857 struct ui_out
*uiout
= current_uiout
;
8859 struct gdbarch
*gdbarch
= get_current_arch ();
8860 CORE_ADDR onecompl
= ~((CORE_ADDR
) 0);
8861 int bounds_in_map
= ((~bt_entry
[1] == 0 && bt_entry
[0] == onecompl
) ? 1 : 0);
8863 if (bounds_in_map
== 1)
8865 uiout
->text ("Null bounds on map:");
8866 uiout
->text (" pointer value = ");
8867 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8873 uiout
->text ("{lbound = ");
8874 uiout
->field_core_addr ("lower-bound", gdbarch
, bt_entry
[0]);
8875 uiout
->text (", ubound = ");
8877 /* The upper bound is stored in 1's complement. */
8878 uiout
->field_core_addr ("upper-bound", gdbarch
, ~bt_entry
[1]);
8879 uiout
->text ("}: pointer value = ");
8880 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8882 if (gdbarch_ptr_bit (gdbarch
) == 64)
8883 size
= ( (~(int64_t) bt_entry
[1]) - (int64_t) bt_entry
[0]);
8885 size
= ( ~((int32_t) bt_entry
[1]) - (int32_t) bt_entry
[0]);
8887 /* In case the bounds are 0x0 and 0xffff... the difference will be -1.
8888 -1 represents in this sense full memory access, and there is no need
8891 size
= (size
> -1 ? size
+ 1 : size
);
8892 uiout
->text (", size = ");
8893 uiout
->field_string ("size", plongest (size
));
8895 uiout
->text (", metadata = ");
8896 uiout
->field_core_addr ("metadata", gdbarch
, bt_entry
[3]);
8901 /* Implement the command "show mpx bound". */
8904 i386_mpx_info_bounds (const char *args
, int from_tty
)
8906 CORE_ADDR bd_base
= 0;
8908 CORE_ADDR bt_entry_addr
= 0;
8909 CORE_ADDR bt_entry
[4];
8911 struct gdbarch
*gdbarch
= get_current_arch ();
8912 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8914 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
8915 || !i386_mpx_enabled ())
8917 printf_unfiltered (_("Intel Memory Protection Extensions not "
8918 "supported on this target.\n"));
8924 printf_unfiltered (_("Address of pointer variable expected.\n"));
8928 addr
= parse_and_eval_address (args
);
8930 bd_base
= i386_mpx_bd_base ();
8931 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
8933 memset (bt_entry
, 0, sizeof (bt_entry
));
8935 for (i
= 0; i
< 4; i
++)
8936 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
8937 + i
* TYPE_LENGTH (data_ptr_type
),
8940 i386_mpx_print_bounds (bt_entry
);
8943 /* Implement the command "set mpx bound". */
8946 i386_mpx_set_bounds (const char *args
, int from_tty
)
8948 CORE_ADDR bd_base
= 0;
8949 CORE_ADDR addr
, lower
, upper
;
8950 CORE_ADDR bt_entry_addr
= 0;
8951 CORE_ADDR bt_entry
[2];
8952 const char *input
= args
;
8954 struct gdbarch
*gdbarch
= get_current_arch ();
8955 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
8956 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8958 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
8959 || !i386_mpx_enabled ())
8960 error (_("Intel Memory Protection Extensions not supported\
8964 error (_("Pointer value expected."));
8966 addr
= value_as_address (parse_to_comma_and_eval (&input
));
8968 if (input
[0] == ',')
8970 if (input
[0] == '\0')
8971 error (_("wrong number of arguments: missing lower and upper bound."));
8972 lower
= value_as_address (parse_to_comma_and_eval (&input
));
8974 if (input
[0] == ',')
8976 if (input
[0] == '\0')
8977 error (_("Wrong number of arguments; Missing upper bound."));
8978 upper
= value_as_address (parse_to_comma_and_eval (&input
));
8980 bd_base
= i386_mpx_bd_base ();
8981 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
8982 for (i
= 0; i
< 2; i
++)
8983 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
8984 + i
* TYPE_LENGTH (data_ptr_type
),
8986 bt_entry
[0] = (uint64_t) lower
;
8987 bt_entry
[1] = ~(uint64_t) upper
;
8989 for (i
= 0; i
< 2; i
++)
8990 write_memory_unsigned_integer (bt_entry_addr
8991 + i
* TYPE_LENGTH (data_ptr_type
),
8992 TYPE_LENGTH (data_ptr_type
), byte_order
,
8996 static struct cmd_list_element
*mpx_set_cmdlist
, *mpx_show_cmdlist
;
8998 void _initialize_i386_tdep ();
9000 _initialize_i386_tdep ()
9002 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
9004 /* Add the variable that controls the disassembly flavor. */
9005 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
9006 &disassembly_flavor
, _("\
9007 Set the disassembly flavor."), _("\
9008 Show the disassembly flavor."), _("\
9009 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
9011 NULL
, /* FIXME: i18n: */
9012 &setlist
, &showlist
);
9014 /* Add the variable that controls the convention for returning
9016 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
9017 &struct_convention
, _("\
9018 Set the convention for returning small structs."), _("\
9019 Show the convention for returning small structs."), _("\
9020 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
9023 NULL
, /* FIXME: i18n: */
9024 &setlist
, &showlist
);
9026 /* Add "mpx" prefix for the set commands. */
9028 add_basic_prefix_cmd ("mpx", class_support
, _("\
9029 Set Intel Memory Protection Extensions specific variables."),
9030 &mpx_set_cmdlist
, "set mpx ",
9031 0 /* allow-unknown */, &setlist
);
9033 /* Add "mpx" prefix for the show commands. */
9035 add_show_prefix_cmd ("mpx", class_support
, _("\
9036 Show Intel Memory Protection Extensions specific variables."),
9037 &mpx_show_cmdlist
, "show mpx ",
9038 0 /* allow-unknown */, &showlist
);
9040 /* Add "bound" command for the show mpx commands list. */
9042 add_cmd ("bound", no_class
, i386_mpx_info_bounds
,
9043 "Show the memory bounds for a given array/pointer storage\
9044 in the bound table.",
9047 /* Add "bound" command for the set mpx commands list. */
9049 add_cmd ("bound", no_class
, i386_mpx_set_bounds
,
9050 "Set the memory bounds for a given array/pointer storage\
9051 in the bound table.",
9054 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
9055 i386_svr4_init_abi
);
9057 /* Initialize the i386-specific register groups. */
9058 i386_init_reggroups ();
9060 /* Tell remote stub that we support XML target description. */
9061 register_remote_support_xml ("i386");