1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
27 #include "dwarf2-frame.h"
29 #include "floatformat.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
39 #include "reggroups.h"
45 #include "gdb_assert.h"
46 #include "gdb_string.h"
48 #include "i386-tdep.h"
49 #include "i387-tdep.h"
51 /* Names of the registers. The first 10 registers match the register
52 numbering scheme used by GCC for stabs and DWARF. */
54 static char *i386_register_names
[] =
56 "eax", "ecx", "edx", "ebx",
57 "esp", "ebp", "esi", "edi",
58 "eip", "eflags", "cs", "ss",
59 "ds", "es", "fs", "gs",
60 "st0", "st1", "st2", "st3",
61 "st4", "st5", "st6", "st7",
62 "fctrl", "fstat", "ftag", "fiseg",
63 "fioff", "foseg", "fooff", "fop",
64 "xmm0", "xmm1", "xmm2", "xmm3",
65 "xmm4", "xmm5", "xmm6", "xmm7",
69 static const int i386_num_register_names
=
70 (sizeof (i386_register_names
) / sizeof (*i386_register_names
));
74 static char *i386_mmx_names
[] =
76 "mm0", "mm1", "mm2", "mm3",
77 "mm4", "mm5", "mm6", "mm7"
80 static const int i386_num_mmx_regs
=
81 (sizeof (i386_mmx_names
) / sizeof (i386_mmx_names
[0]));
83 #define MM0_REGNUM NUM_REGS
86 i386_mmx_regnum_p (int regnum
)
88 return (regnum
>= MM0_REGNUM
89 && regnum
< MM0_REGNUM
+ i386_num_mmx_regs
);
95 i386_fp_regnum_p (int regnum
)
97 return (regnum
< NUM_REGS
98 && (FP0_REGNUM
&& FP0_REGNUM
<= regnum
&& regnum
< FPC_REGNUM
));
102 i386_fpc_regnum_p (int regnum
)
104 return (regnum
< NUM_REGS
105 && (FPC_REGNUM
<= regnum
&& regnum
< XMM0_REGNUM
));
111 i386_sse_regnum_p (int regnum
)
113 return (regnum
< NUM_REGS
114 && (XMM0_REGNUM
<= regnum
&& regnum
< MXCSR_REGNUM
));
118 i386_mxcsr_regnum_p (int regnum
)
120 return (regnum
< NUM_REGS
121 && regnum
== MXCSR_REGNUM
);
124 /* Return the name of register REG. */
127 i386_register_name (int reg
)
129 if (i386_mmx_regnum_p (reg
))
130 return i386_mmx_names
[reg
- MM0_REGNUM
];
132 if (reg
>= 0 && reg
< i386_num_register_names
)
133 return i386_register_names
[reg
];
138 /* Convert stabs register number REG to the appropriate register
139 number used by GDB. */
142 i386_stab_reg_to_regnum (int reg
)
144 /* This implements what GCC calls the "default" register map. */
145 if (reg
>= 0 && reg
<= 7)
147 /* General-purpose registers. */
150 else if (reg
>= 12 && reg
<= 19)
152 /* Floating-point registers. */
153 return reg
- 12 + FP0_REGNUM
;
155 else if (reg
>= 21 && reg
<= 28)
158 return reg
- 21 + XMM0_REGNUM
;
160 else if (reg
>= 29 && reg
<= 36)
163 return reg
- 29 + MM0_REGNUM
;
166 /* This will hopefully provoke a warning. */
167 return NUM_REGS
+ NUM_PSEUDO_REGS
;
170 /* Convert DWARF register number REG to the appropriate register
171 number used by GDB. */
174 i386_dwarf_reg_to_regnum (int reg
)
176 /* The DWARF register numbering includes %eip and %eflags, and
177 numbers the floating point registers differently. */
178 if (reg
>= 0 && reg
<= 9)
180 /* General-purpose registers. */
183 else if (reg
>= 11 && reg
<= 18)
185 /* Floating-point registers. */
186 return reg
- 11 + FP0_REGNUM
;
190 /* The SSE and MMX registers have identical numbers as in stabs. */
191 return i386_stab_reg_to_regnum (reg
);
194 /* This will hopefully provoke a warning. */
195 return NUM_REGS
+ NUM_PSEUDO_REGS
;
199 /* This is the variable that is set with "set disassembly-flavor", and
200 its legitimate values. */
201 static const char att_flavor
[] = "att";
202 static const char intel_flavor
[] = "intel";
203 static const char *valid_flavors
[] =
209 static const char *disassembly_flavor
= att_flavor
;
212 /* Use the program counter to determine the contents and size of a
213 breakpoint instruction. Return a pointer to a string of bytes that
214 encode a breakpoint instruction, store the length of the string in
215 *LEN and optionally adjust *PC to point to the correct memory
216 location for inserting the breakpoint.
218 On the i386 we have a single breakpoint that fits in a single byte
219 and can be inserted anywhere.
221 This function is 64-bit safe. */
223 static const unsigned char *
224 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
226 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
228 *len
= sizeof (break_insn
);
232 #ifdef I386_REGNO_TO_SYMMETRY
233 #error "The Sequent Symmetry is no longer supported."
236 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
237 and %esp "belong" to the calling function. Therefore these
238 registers should be saved if they're going to be modified. */
240 /* The maximum number of saved registers. This should include all
241 registers mentioned above, and %eip. */
242 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
244 struct i386_frame_cache
251 /* Saved registers. */
252 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
256 /* Stack space reserved for local variables. */
260 /* Allocate and initialize a frame cache. */
262 static struct i386_frame_cache
*
263 i386_alloc_frame_cache (void)
265 struct i386_frame_cache
*cache
;
268 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
272 cache
->sp_offset
= -4;
275 /* Saved registers. We initialize these to -1 since zero is a valid
276 offset (that's where %ebp is supposed to be stored). */
277 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
278 cache
->saved_regs
[i
] = -1;
280 cache
->pc_in_eax
= 0;
282 /* Frameless until proven otherwise. */
288 /* If the instruction at PC is a jump, return the address of its
289 target. Otherwise, return PC. */
292 i386_follow_jump (CORE_ADDR pc
)
298 op
= read_memory_unsigned_integer (pc
, 1);
302 op
= read_memory_unsigned_integer (pc
+ 1, 1);
308 /* Relative jump: if data16 == 0, disp32, else disp16. */
311 delta
= read_memory_integer (pc
+ 2, 2);
313 /* Include the size of the jmp instruction (including the
319 delta
= read_memory_integer (pc
+ 1, 4);
321 /* Include the size of the jmp instruction. */
326 /* Relative jump, disp8 (ignore data16). */
327 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
336 /* Check whether PC points at a prologue for a function returning a
337 structure or union. If so, it updates CACHE and returns the
338 address of the first instruction after the code sequence that
339 removes the "hidden" argument from the stack or CURRENT_PC,
340 whichever is smaller. Otherwise, return PC. */
343 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
344 struct i386_frame_cache
*cache
)
346 /* Functions that return a structure or union start with:
349 xchgl %eax, (%esp) 0x87 0x04 0x24
350 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
352 (the System V compiler puts out the second `xchg' instruction,
353 and the assembler doesn't try to optimize it, so the 'sib' form
354 gets generated). This sequence is used to get the address of the
355 return buffer for a function that returns a structure. */
356 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
357 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
358 unsigned char buf
[4];
361 if (current_pc
<= pc
)
364 op
= read_memory_unsigned_integer (pc
, 1);
366 if (op
!= 0x58) /* popl %eax */
369 read_memory (pc
+ 1, buf
, 4);
370 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
373 if (current_pc
== pc
)
375 cache
->sp_offset
+= 4;
379 if (current_pc
== pc
+ 1)
381 cache
->pc_in_eax
= 1;
385 if (buf
[1] == proto1
[1])
392 i386_skip_probe (CORE_ADDR pc
)
394 /* A function may start with
405 unsigned char buf
[8];
408 op
= read_memory_unsigned_integer (pc
, 1);
410 if (op
== 0x68 || op
== 0x6a)
414 /* Skip past the `pushl' instruction; it has either a one-byte or a
415 four-byte operand, depending on the opcode. */
421 /* Read the following 8 bytes, which should be `call _probe' (6
422 bytes) followed by `addl $4,%esp' (2 bytes). */
423 read_memory (pc
+ delta
, buf
, sizeof (buf
));
424 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
425 pc
+= delta
+ sizeof (buf
);
431 /* Check whether PC points at a code that sets up a new stack frame.
432 If so, it updates CACHE and returns the address of the first
433 instruction after the sequence that sets removes the "hidden"
434 argument from the stack or CURRENT_PC, whichever is smaller.
435 Otherwise, return PC. */
438 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
439 struct i386_frame_cache
*cache
)
444 if (current_pc
<= pc
)
447 op
= read_memory_unsigned_integer (pc
, 1);
449 if (op
== 0x55) /* pushl %ebp */
451 /* Take into account that we've executed the `pushl %ebp' that
452 starts this instruction sequence. */
453 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
454 cache
->sp_offset
+= 4;
456 /* If that's all, return now. */
457 if (current_pc
<= pc
+ 1)
460 op
= read_memory_unsigned_integer (pc
+ 1, 1);
462 /* Check for some special instructions that might be migrated
463 by GCC into the prologue. We check for
475 Make sure we only skip these instructions if we later see the
476 `movl %esp, %ebp' that actually sets up the frame. */
477 while (op
== 0x29 || op
== 0x31)
479 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
482 case 0xdb: /* %ebx */
483 case 0xc9: /* %ecx */
484 case 0xd2: /* %edx */
491 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
494 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
498 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
502 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
509 /* OK, we actually have a frame. We just don't know how large
510 it is yet. Set its size to zero. We'll adjust it if
511 necessary. We also now commit to skipping the special
512 instructions mentioned before. */
516 /* If that's all, return now. */
517 if (current_pc
<= pc
+ 3)
520 /* Check for stack adjustment
524 NOTE: You can't subtract a 16 bit immediate from a 32 bit
525 reg, so we don't have to worry about a data16 prefix. */
526 op
= read_memory_unsigned_integer (pc
+ 3, 1);
529 /* `subl' with 8 bit immediate. */
530 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
531 /* Some instruction starting with 0x83 other than `subl'. */
534 /* `subl' with signed byte immediate (though it wouldn't make
535 sense to be negative). */
536 cache
->locals
= read_memory_integer (pc
+ 5, 1);
541 /* Maybe it is `subl' with a 32 bit immedediate. */
542 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
543 /* Some instruction starting with 0x81 other than `subl'. */
546 /* It is `subl' with a 32 bit immediate. */
547 cache
->locals
= read_memory_integer (pc
+ 5, 4);
552 /* Some instruction other than `subl'. */
556 else if (op
== 0xc8) /* enter $XXX */
558 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
565 /* Check whether PC points at code that saves registers on the stack.
566 If so, it updates CACHE and returns the address of the first
567 instruction after the register saves or CURRENT_PC, whichever is
568 smaller. Otherwise, return PC. */
571 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
572 struct i386_frame_cache
*cache
)
574 if (cache
->locals
>= 0)
580 offset
= - 4 - cache
->locals
;
581 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
583 op
= read_memory_unsigned_integer (pc
, 1);
584 if (op
< 0x50 || op
> 0x57)
587 cache
->saved_regs
[op
- 0x50] = offset
;
596 /* Do a full analysis of the prologue at PC and update CACHE
597 accordingly. Bail out early if CURRENT_PC is reached. Return the
598 address where the analysis stopped.
600 We handle these cases:
602 The startup sequence can be at the start of the function, or the
603 function can start with a branch to startup code at the end.
605 %ebp can be set up with either the 'enter' instruction, or "pushl
606 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
607 once used in the System V compiler).
609 Local space is allocated just below the saved %ebp by either the
610 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
611 bit unsigned argument for space to allocate, and the 'addl'
612 instruction could have either a signed byte, or 32 bit immediate.
614 Next, the registers used by this function are pushed. With the
615 System V compiler they will always be in the order: %edi, %esi,
616 %ebx (and sometimes a harmless bug causes it to also save but not
617 restore %eax); however, the code below is willing to see the pushes
618 in any order, and will handle up to 8 of them.
620 If the setup sequence is at the end of the function, then the next
621 instruction will be a branch back to the start. */
624 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
625 struct i386_frame_cache
*cache
)
627 pc
= i386_follow_jump (pc
);
628 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
629 pc
= i386_skip_probe (pc
);
630 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
631 return i386_analyze_register_saves (pc
, current_pc
, cache
);
634 /* Return PC of first real instruction. */
637 i386_skip_prologue (CORE_ADDR start_pc
)
639 static unsigned char pic_pat
[6] =
641 0xe8, 0, 0, 0, 0, /* call 0x0 */
642 0x5b, /* popl %ebx */
644 struct i386_frame_cache cache
;
650 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
651 if (cache
.locals
< 0)
654 /* Found valid frame setup. */
656 /* The native cc on SVR4 in -K PIC mode inserts the following code
657 to get the address of the global offset table (GOT) into register
662 movl %ebx,x(%ebp) (optional)
665 This code is with the rest of the prologue (at the end of the
666 function), so we have to skip it to get to the first real
667 instruction at the start of the function. */
669 for (i
= 0; i
< 6; i
++)
671 op
= read_memory_unsigned_integer (pc
+ i
, 1);
672 if (pic_pat
[i
] != op
)
679 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
681 if (op
== 0x89) /* movl %ebx, x(%ebp) */
683 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
685 if (op
== 0x5d) /* One byte offset from %ebp. */
687 else if (op
== 0x9d) /* Four byte offset from %ebp. */
689 else /* Unexpected instruction. */
692 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
696 if (delta
> 0 && op
== 0x81
697 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
703 return i386_follow_jump (pc
);
706 /* This function is 64-bit safe. */
709 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
713 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
714 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
720 static struct i386_frame_cache
*
721 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
723 struct i386_frame_cache
*cache
;
730 cache
= i386_alloc_frame_cache ();
733 /* In principle, for normal frames, %ebp holds the frame pointer,
734 which holds the base address for the current stack frame.
735 However, for functions that don't need it, the frame pointer is
736 optional. For these "frameless" functions the frame pointer is
737 actually the frame pointer of the calling frame. Signal
738 trampolines are just a special case of a "frameless" function.
739 They (usually) share their frame pointer with the frame that was
740 in progress when the signal occurred. */
742 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
743 cache
->base
= extract_unsigned_integer (buf
, 4);
744 if (cache
->base
== 0)
747 /* For normal frames, %eip is stored at 4(%ebp). */
748 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
750 cache
->pc
= frame_func_unwind (next_frame
);
752 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
754 if (cache
->locals
< 0)
756 /* We didn't find a valid frame, which means that CACHE->base
757 currently holds the frame pointer for our calling frame. If
758 we're at the start of a function, or somewhere half-way its
759 prologue, the function's frame probably hasn't been fully
760 setup yet. Try to reconstruct the base address for the stack
761 frame by looking at the stack pointer. For truly "frameless"
762 functions this might work too. */
764 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
765 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
768 /* Now that we have the base address for the stack frame we can
769 calculate the value of %esp in the calling frame. */
770 cache
->saved_sp
= cache
->base
+ 8;
772 /* Adjust all the saved registers such that they contain addresses
773 instead of offsets. */
774 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
775 if (cache
->saved_regs
[i
] != -1)
776 cache
->saved_regs
[i
] += cache
->base
;
782 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
783 struct frame_id
*this_id
)
785 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
787 /* This marks the outermost frame. */
788 if (cache
->base
== 0)
791 /* See the end of i386_push_dummy_call. */
792 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
796 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
797 int regnum
, int *optimizedp
,
798 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
799 int *realnump
, void *valuep
)
801 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
803 gdb_assert (regnum
>= 0);
805 /* The System V ABI says that:
807 "The flags register contains the system flags, such as the
808 direction flag and the carry flag. The direction flag must be
809 set to the forward (that is, zero) direction before entry and
810 upon exit from a function. Other user flags have no specified
811 role in the standard calling sequence and are not preserved."
813 To guarantee the "upon exit" part of that statement we fake a
814 saved flags register that has its direction flag cleared.
816 Note that GCC doesn't seem to rely on the fact that the direction
817 flag is cleared after a function return; it always explicitly
818 clears the flag before operations where it matters.
820 FIXME: kettenis/20030316: I'm not quite sure whether this is the
821 right thing to do. The way we fake the flags register here makes
822 it impossible to change it. */
824 if (regnum
== I386_EFLAGS_REGNUM
)
834 /* Clear the direction flag. */
835 frame_unwind_unsigned_register (next_frame
, PS_REGNUM
, &val
);
837 store_unsigned_integer (valuep
, 4, val
);
843 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
845 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
846 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
850 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
858 /* Store the value. */
859 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
864 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
867 *lvalp
= lval_memory
;
868 *addrp
= cache
->saved_regs
[regnum
];
872 /* Read the value in from memory. */
873 read_memory (*addrp
, valuep
,
874 register_size (current_gdbarch
, regnum
));
879 frame_register_unwind (next_frame
, regnum
,
880 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
883 static const struct frame_unwind i386_frame_unwind
=
887 i386_frame_prev_register
890 static const struct frame_unwind
*
891 i386_frame_sniffer (struct frame_info
*next_frame
)
893 return &i386_frame_unwind
;
897 /* Signal trampolines. */
899 static struct i386_frame_cache
*
900 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
902 struct i386_frame_cache
*cache
;
903 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
910 cache
= i386_alloc_frame_cache ();
912 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
913 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
915 addr
= tdep
->sigcontext_addr (next_frame
);
916 if (tdep
->sc_reg_offset
)
920 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
922 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
923 if (tdep
->sc_reg_offset
[i
] != -1)
924 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
928 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
929 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
937 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
938 struct frame_id
*this_id
)
940 struct i386_frame_cache
*cache
=
941 i386_sigtramp_frame_cache (next_frame
, this_cache
);
943 /* See the end of i386_push_dummy_call. */
944 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
948 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
950 int regnum
, int *optimizedp
,
951 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
952 int *realnump
, void *valuep
)
954 /* Make sure we've initialized the cache. */
955 i386_sigtramp_frame_cache (next_frame
, this_cache
);
957 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
958 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
961 static const struct frame_unwind i386_sigtramp_frame_unwind
=
964 i386_sigtramp_frame_this_id
,
965 i386_sigtramp_frame_prev_register
968 static const struct frame_unwind
*
969 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
971 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
974 /* We shouldn't even bother to try if the OSABI didn't register
975 a sigcontext_addr handler. */
976 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
979 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
980 if (PC_IN_SIGTRAMP (pc
, name
))
981 return &i386_sigtramp_frame_unwind
;
988 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
990 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
995 static const struct frame_base i386_frame_base
=
998 i386_frame_base_address
,
999 i386_frame_base_address
,
1000 i386_frame_base_address
1003 static struct frame_id
1004 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1009 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1010 fp
= extract_unsigned_integer (buf
, 4);
1012 /* See the end of i386_push_dummy_call. */
1013 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1017 /* Figure out where the longjmp will land. Slurp the args out of the
1018 stack. We expect the first arg to be a pointer to the jmp_buf
1019 structure from which we extract the address that we will land at.
1020 This address is copied into PC. This routine returns non-zero on
1023 This function is 64-bit safe. */
1026 i386_get_longjmp_target (CORE_ADDR
*pc
)
1029 CORE_ADDR sp
, jb_addr
;
1030 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1031 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1033 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1034 longjmp will land. */
1035 if (jb_pc_offset
== -1)
1038 sp
= read_register (SP_REGNUM
);
1039 if (target_read_memory (sp
+ len
, buf
, len
))
1042 jb_addr
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1043 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1046 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1052 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1053 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1054 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1055 CORE_ADDR struct_addr
)
1060 /* Push arguments in reverse order. */
1061 for (i
= nargs
- 1; i
>= 0; i
--)
1063 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1065 /* The System V ABI says that:
1067 "An argument's size is increased, if necessary, to make it a
1068 multiple of [32-bit] words. This may require tail padding,
1069 depending on the size of the argument."
1071 This makes sure the stack says word-aligned. */
1072 sp
-= (len
+ 3) & ~3;
1073 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1076 /* Push value address. */
1080 store_unsigned_integer (buf
, 4, struct_addr
);
1081 write_memory (sp
, buf
, 4);
1084 /* Store return address. */
1086 store_unsigned_integer (buf
, 4, bp_addr
);
1087 write_memory (sp
, buf
, 4);
1089 /* Finally, update the stack pointer... */
1090 store_unsigned_integer (buf
, 4, sp
);
1091 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1093 /* ...and fake a frame pointer. */
1094 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1096 /* MarkK wrote: This "+ 8" is all over the place:
1097 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1098 i386_unwind_dummy_id). It's there, since all frame unwinders for
1099 a given target have to agree (within a certain margin) on the
1100 defenition of the stack address of a frame. Otherwise
1101 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1102 stack address *before* the function call as a frame's CFA. On
1103 the i386, when %ebp is used as a frame pointer, the offset
1104 between the contents %ebp and the CFA as defined by GCC. */
1108 /* These registers are used for returning integers (and on some
1109 targets also for returning `struct' and `union' values when their
1110 size and alignment match an integer type). */
1111 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1112 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1114 /* Extract from an array REGBUF containing the (raw) register state, a
1115 function return value of TYPE, and copy that, in virtual format,
1119 i386_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1122 bfd_byte
*valbuf
= dst
;
1123 int len
= TYPE_LENGTH (type
);
1124 char buf
[I386_MAX_REGISTER_SIZE
];
1126 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1127 && TYPE_NFIELDS (type
) == 1)
1129 i386_extract_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1133 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1137 warning ("Cannot find floating-point return value.");
1138 memset (valbuf
, 0, len
);
1142 /* Floating-point return values can be found in %st(0). Convert
1143 its contents to the desired type. This is probably not
1144 exactly how it would happen on the target itself, but it is
1145 the best we can do. */
1146 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1147 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1151 int low_size
= REGISTER_RAW_SIZE (LOW_RETURN_REGNUM
);
1152 int high_size
= REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM
);
1154 if (len
<= low_size
)
1156 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1157 memcpy (valbuf
, buf
, len
);
1159 else if (len
<= (low_size
+ high_size
))
1161 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1162 memcpy (valbuf
, buf
, low_size
);
1163 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1164 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1167 internal_error (__FILE__
, __LINE__
,
1168 "Cannot extract return value of %d bytes long.", len
);
1172 /* Write into the appropriate registers a function return value stored
1173 in VALBUF of type TYPE, given in virtual format. */
1176 i386_store_return_value (struct type
*type
, struct regcache
*regcache
,
1179 int len
= TYPE_LENGTH (type
);
1181 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1182 && TYPE_NFIELDS (type
) == 1)
1184 i386_store_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1188 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1191 char buf
[FPU_REG_RAW_SIZE
];
1195 warning ("Cannot set floating-point return value.");
1199 /* Returning floating-point values is a bit tricky. Apart from
1200 storing the return value in %st(0), we have to simulate the
1201 state of the FPU at function return point. */
1203 /* Convert the value found in VALBUF to the extended
1204 floating-point format used by the FPU. This is probably
1205 not exactly how it would happen on the target itself, but
1206 it is the best we can do. */
1207 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1208 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1210 /* Set the top of the floating-point register stack to 7. The
1211 actual value doesn't really matter, but 7 is what a normal
1212 function return would end up with if the program started out
1213 with a freshly initialized FPU. */
1214 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1216 regcache_raw_write_unsigned (regcache
, FSTAT_REGNUM
, fstat
);
1218 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1219 the floating-point register stack to 7, the appropriate value
1220 for the tag word is 0x3fff. */
1221 regcache_raw_write_unsigned (regcache
, FTAG_REGNUM
, 0x3fff);
1225 int low_size
= REGISTER_RAW_SIZE (LOW_RETURN_REGNUM
);
1226 int high_size
= REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM
);
1228 if (len
<= low_size
)
1229 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1230 else if (len
<= (low_size
+ high_size
))
1232 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1233 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1234 len
- low_size
, (char *) valbuf
+ low_size
);
1237 internal_error (__FILE__
, __LINE__
,
1238 "Cannot store return value of %d bytes long.", len
);
1242 /* Extract from REGCACHE, which contains the (raw) register state, the
1243 address in which a function should return its structure value, as a
1247 i386_extract_struct_value_address (struct regcache
*regcache
)
1251 regcache_cooked_read (regcache
, I386_EAX_REGNUM
, buf
);
1252 return extract_unsigned_integer (buf
, 4);
1256 /* This is the variable that is set with "set struct-convention", and
1257 its legitimate values. */
1258 static const char default_struct_convention
[] = "default";
1259 static const char pcc_struct_convention
[] = "pcc";
1260 static const char reg_struct_convention
[] = "reg";
1261 static const char *valid_conventions
[] =
1263 default_struct_convention
,
1264 pcc_struct_convention
,
1265 reg_struct_convention
,
1268 static const char *struct_convention
= default_struct_convention
;
1271 i386_use_struct_convention (int gcc_p
, struct type
*type
)
1273 enum struct_return struct_return
;
1275 if (struct_convention
== default_struct_convention
)
1276 struct_return
= gdbarch_tdep (current_gdbarch
)->struct_return
;
1277 else if (struct_convention
== pcc_struct_convention
)
1278 struct_return
= pcc_struct_return
;
1280 struct_return
= reg_struct_return
;
1282 return generic_use_struct_convention (struct_return
== reg_struct_return
,
1287 /* Return the GDB type object for the "standard" data type of data in
1288 register REGNUM. Perhaps %esi and %edi should go here, but
1289 potentially they could be used for things other than address. */
1291 static struct type
*
1292 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1294 if (regnum
== I386_EIP_REGNUM
1295 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1296 return lookup_pointer_type (builtin_type_void
);
1298 if (i386_fp_regnum_p (regnum
))
1299 return builtin_type_i387_ext
;
1301 if (i386_sse_regnum_p (regnum
))
1302 return builtin_type_vec128i
;
1304 if (i386_mmx_regnum_p (regnum
))
1305 return builtin_type_vec64i
;
1307 return builtin_type_int
;
1310 /* Map a cooked register onto a raw register or memory. For the i386,
1311 the MMX registers need to be mapped onto floating point registers. */
1314 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1321 mmxi
= regnum
- MM0_REGNUM
;
1322 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1323 tos
= (fstat
>> 11) & 0x7;
1324 fpi
= (mmxi
+ tos
) % 8;
1326 return (FP0_REGNUM
+ fpi
);
1330 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1331 int regnum
, void *buf
)
1333 if (i386_mmx_regnum_p (regnum
))
1335 char mmx_buf
[MAX_REGISTER_SIZE
];
1336 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1338 /* Extract (always little endian). */
1339 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1340 memcpy (buf
, mmx_buf
, REGISTER_RAW_SIZE (regnum
));
1343 regcache_raw_read (regcache
, regnum
, buf
);
1347 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1348 int regnum
, const void *buf
)
1350 if (i386_mmx_regnum_p (regnum
))
1352 char mmx_buf
[MAX_REGISTER_SIZE
];
1353 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1356 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1357 /* ... Modify ... (always little endian). */
1358 memcpy (mmx_buf
, buf
, REGISTER_RAW_SIZE (regnum
));
1360 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1363 regcache_raw_write (regcache
, regnum
, buf
);
1367 /* These registers don't have pervasive standard uses. Move them to
1368 i386-tdep.h if necessary. */
1370 #define I386_EBX_REGNUM 3 /* %ebx */
1371 #define I386_ECX_REGNUM 1 /* %ecx */
1372 #define I386_ESI_REGNUM 6 /* %esi */
1373 #define I386_EDI_REGNUM 7 /* %edi */
1375 /* Return the register number of the register allocated by GCC after
1376 REGNUM, or -1 if there is no such register. */
1379 i386_next_regnum (int regnum
)
1381 /* GCC allocates the registers in the order:
1383 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1385 Since storing a variable in %esp doesn't make any sense we return
1386 -1 for %ebp and for %esp itself. */
1387 static int next_regnum
[] =
1389 I386_EDX_REGNUM
, /* Slot for %eax. */
1390 I386_EBX_REGNUM
, /* Slot for %ecx. */
1391 I386_ECX_REGNUM
, /* Slot for %edx. */
1392 I386_ESI_REGNUM
, /* Slot for %ebx. */
1393 -1, -1, /* Slots for %esp and %ebp. */
1394 I386_EDI_REGNUM
, /* Slot for %esi. */
1395 I386_EBP_REGNUM
/* Slot for %edi. */
1398 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1399 return next_regnum
[regnum
];
1404 /* Return nonzero if a value of type TYPE stored in register REGNUM
1405 needs any special handling. */
1408 i386_convert_register_p (int regnum
, struct type
*type
)
1410 int len
= TYPE_LENGTH (type
);
1412 /* Values may be spread across multiple registers. Most debugging
1413 formats aren't expressive enough to specify the locations, so
1414 some heuristics is involved. Right now we only handle types that
1415 have a length that is a multiple of the word size, since GCC
1416 doesn't seem to put any other types into registers. */
1417 if (len
> 4 && len
% 4 == 0)
1419 int last_regnum
= regnum
;
1423 last_regnum
= i386_next_regnum (last_regnum
);
1427 if (last_regnum
!= -1)
1431 return i386_fp_regnum_p (regnum
);
1434 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1435 return its contents in TO. */
1438 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1439 struct type
*type
, void *to
)
1441 int len
= TYPE_LENGTH (type
);
1444 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1445 available in FRAME (i.e. if it wasn't saved)? */
1447 if (i386_fp_regnum_p (regnum
))
1449 i387_register_to_value (frame
, regnum
, type
, to
);
1453 /* Read a value spread accross multiple registers. */
1455 gdb_assert (len
> 4 && len
% 4 == 0);
1459 gdb_assert (regnum
!= -1);
1460 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1462 frame_read_register (frame
, regnum
, buf
);
1463 regnum
= i386_next_regnum (regnum
);
1469 /* Write the contents FROM of a value of type TYPE into register
1470 REGNUM in frame FRAME. */
1473 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1474 struct type
*type
, const void *from
)
1476 int len
= TYPE_LENGTH (type
);
1477 const char *buf
= from
;
1479 if (i386_fp_regnum_p (regnum
))
1481 i387_value_to_register (frame
, regnum
, type
, from
);
1485 /* Write a value spread accross multiple registers. */
1487 gdb_assert (len
> 4 && len
% 4 == 0);
1491 gdb_assert (regnum
!= -1);
1492 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1494 put_frame_register (frame
, regnum
, buf
);
1495 regnum
= i386_next_regnum (regnum
);
1503 #ifdef STATIC_TRANSFORM_NAME
1504 /* SunPRO encodes the static variables. This is not related to C++
1505 mangling, it is done for C too. */
1508 sunpro_static_transform_name (char *name
)
1511 if (IS_STATIC_TRANSFORM_NAME (name
))
1513 /* For file-local statics there will be a period, a bunch of
1514 junk (the contents of which match a string given in the
1515 N_OPT), a period and the name. For function-local statics
1516 there will be a bunch of junk (which seems to change the
1517 second character from 'A' to 'B'), a period, the name of the
1518 function, and the name. So just skip everything before the
1520 p
= strrchr (name
, '.');
1526 #endif /* STATIC_TRANSFORM_NAME */
1529 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1532 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1534 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1536 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1537 struct minimal_symbol
*indsym
=
1538 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1539 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1543 if (strncmp (symname
, "__imp_", 6) == 0
1544 || strncmp (symname
, "_imp_", 5) == 0)
1545 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1548 return 0; /* Not a trampoline. */
1552 /* Return non-zero if PC and NAME show that we are in a signal
1556 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1558 return (name
&& strcmp ("_sigtramp", name
) == 0);
1562 /* We have two flavours of disassembly. The machinery on this page
1563 deals with switching between those. */
1566 i386_print_insn (bfd_vma pc
, disassemble_info
*info
)
1568 gdb_assert (disassembly_flavor
== att_flavor
1569 || disassembly_flavor
== intel_flavor
);
1571 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1572 constified, cast to prevent a compiler warning. */
1573 info
->disassembler_options
= (char *) disassembly_flavor
;
1574 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1576 return print_insn_i386 (pc
, info
);
1580 /* There are a few i386 architecture variants that differ only
1581 slightly from the generic i386 target. For now, we don't give them
1582 their own source file, but include them here. As a consequence,
1583 they'll always be included. */
1585 /* System V Release 4 (SVR4). */
1588 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1590 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1591 currently unknown. */
1592 return (name
&& (strcmp ("_sigreturn", name
) == 0
1593 || strcmp ("_sigacthandler", name
) == 0
1594 || strcmp ("sigvechandler", name
) == 0));
1597 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1598 routine, return the address of the associated sigcontext (ucontext)
1602 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1607 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1608 sp
= extract_unsigned_integer (buf
, 4);
1610 return read_memory_unsigned_integer (sp
+ 8, 4);
1617 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1619 /* DJGPP doesn't have any special frames for signal handlers. */
1627 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1629 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1630 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1633 /* System V Release 4 (SVR4). */
1636 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1638 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1640 /* System V Release 4 uses ELF. */
1641 i386_elf_init_abi (info
, gdbarch
);
1643 /* System V Release 4 has shared libraries. */
1644 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1645 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1647 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1648 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1649 tdep
->sc_pc_offset
= 36 + 14 * 4;
1650 tdep
->sc_sp_offset
= 36 + 17 * 4;
1652 tdep
->jb_pc_offset
= 20;
1658 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1660 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1662 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1664 tdep
->jb_pc_offset
= 36;
1670 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1672 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1674 tdep
->jb_pc_offset
= 24;
1678 /* i386 register groups. In addition to the normal groups, add "mmx"
1681 static struct reggroup
*i386_sse_reggroup
;
1682 static struct reggroup
*i386_mmx_reggroup
;
1685 i386_init_reggroups (void)
1687 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1688 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1692 i386_add_reggroups (struct gdbarch
*gdbarch
)
1694 reggroup_add (gdbarch
, i386_sse_reggroup
);
1695 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1696 reggroup_add (gdbarch
, general_reggroup
);
1697 reggroup_add (gdbarch
, float_reggroup
);
1698 reggroup_add (gdbarch
, all_reggroup
);
1699 reggroup_add (gdbarch
, save_reggroup
);
1700 reggroup_add (gdbarch
, restore_reggroup
);
1701 reggroup_add (gdbarch
, vector_reggroup
);
1702 reggroup_add (gdbarch
, system_reggroup
);
1706 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1707 struct reggroup
*group
)
1709 int sse_regnum_p
= (i386_sse_regnum_p (regnum
)
1710 || i386_mxcsr_regnum_p (regnum
));
1711 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1712 || i386_fpc_regnum_p (regnum
));
1713 int mmx_regnum_p
= (i386_mmx_regnum_p (regnum
));
1715 if (group
== i386_mmx_reggroup
)
1716 return mmx_regnum_p
;
1717 if (group
== i386_sse_reggroup
)
1718 return sse_regnum_p
;
1719 if (group
== vector_reggroup
)
1720 return (mmx_regnum_p
|| sse_regnum_p
);
1721 if (group
== float_reggroup
)
1723 if (group
== general_reggroup
)
1724 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1726 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1730 /* Get the ith function argument for the current function. */
1732 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1736 frame_read_register (frame
, SP_REGNUM
, &stack
);
1737 return read_memory_unsigned_integer (stack
+ (4 * (argi
+ 1)), 4);
1741 static struct gdbarch
*
1742 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1744 struct gdbarch_tdep
*tdep
;
1745 struct gdbarch
*gdbarch
;
1747 /* If there is already a candidate, use it. */
1748 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1750 return arches
->gdbarch
;
1752 /* Allocate space for the new architecture. */
1753 tdep
= XMALLOC (struct gdbarch_tdep
);
1754 gdbarch
= gdbarch_alloc (&info
, tdep
);
1756 /* The i386 default settings don't include the SSE registers.
1757 FIXME: kettenis/20020614: They do include the FPU registers for
1758 now, which probably is not quite right. */
1759 tdep
->num_xmm_regs
= 0;
1761 tdep
->jb_pc_offset
= -1;
1762 tdep
->struct_return
= pcc_struct_return
;
1763 tdep
->sigtramp_start
= 0;
1764 tdep
->sigtramp_end
= 0;
1765 tdep
->sigcontext_addr
= NULL
;
1766 tdep
->sc_reg_offset
= NULL
;
1767 tdep
->sc_pc_offset
= -1;
1768 tdep
->sc_sp_offset
= -1;
1770 /* The format used for `long double' on almost all i386 targets is
1771 the i387 extended floating-point format. In fact, of all targets
1772 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1773 on having a `long double' that's not `long' at all. */
1774 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1776 /* Although the i387 extended floating-point has only 80 significant
1777 bits, a `long double' actually takes up 96, probably to enforce
1779 set_gdbarch_long_double_bit (gdbarch
, 96);
1781 /* The default ABI includes general-purpose registers and
1782 floating-point registers. */
1783 set_gdbarch_num_regs (gdbarch
, I386_NUM_GREGS
+ I386_NUM_FREGS
);
1784 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1785 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1787 /* Register numbers of various important registers. */
1788 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1789 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1790 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1791 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1793 /* Use the "default" register numbering scheme for stabs and COFF. */
1794 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1795 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1797 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1798 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1799 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1801 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1802 be in use on any of the supported i386 targets. */
1804 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1806 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1808 /* Call dummy code. */
1809 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1811 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
1812 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
1813 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
1815 set_gdbarch_extract_return_value (gdbarch
, i386_extract_return_value
);
1816 set_gdbarch_store_return_value (gdbarch
, i386_store_return_value
);
1817 set_gdbarch_extract_struct_value_address (gdbarch
,
1818 i386_extract_struct_value_address
);
1819 set_gdbarch_use_struct_convention (gdbarch
, i386_use_struct_convention
);
1821 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
1823 /* Stack grows downward. */
1824 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1826 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
1827 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
1828 set_gdbarch_function_start_offset (gdbarch
, 0);
1830 set_gdbarch_frame_args_skip (gdbarch
, 8);
1831 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
1833 /* Wire in the MMX registers. */
1834 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
1835 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
1836 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
1838 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
1840 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
1842 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
1844 /* Add the i386 register groups. */
1845 i386_add_reggroups (gdbarch
);
1846 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
1848 /* Helper for function argument information. */
1849 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
1851 /* Hook in the DWARF CFI frame unwinder. */
1852 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
1854 frame_base_set_default (gdbarch
, &i386_frame_base
);
1856 /* Hook in ABI-specific overrides, if they have been registered. */
1857 gdbarch_init_osabi (info
, gdbarch
);
1859 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
1860 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
1865 static enum gdb_osabi
1866 i386_coff_osabi_sniffer (bfd
*abfd
)
1868 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
1869 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
1870 return GDB_OSABI_GO32
;
1872 return GDB_OSABI_UNKNOWN
;
1875 static enum gdb_osabi
1876 i386_nlm_osabi_sniffer (bfd
*abfd
)
1878 return GDB_OSABI_NETWARE
;
1882 /* Provide a prototype to silence -Wmissing-prototypes. */
1883 void _initialize_i386_tdep (void);
1886 _initialize_i386_tdep (void)
1888 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
1890 /* Add the variable that controls the disassembly flavor. */
1892 struct cmd_list_element
*new_cmd
;
1894 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
1896 &disassembly_flavor
,
1898 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
1899 and the default value is \"att\".",
1901 add_show_from_set (new_cmd
, &showlist
);
1904 /* Add the variable that controls the convention for returning
1907 struct cmd_list_element
*new_cmd
;
1909 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
1911 &struct_convention
, "\
1912 Set the convention for returning small structs, valid values \
1913 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
1915 add_show_from_set (new_cmd
, &showlist
);
1918 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
1919 i386_coff_osabi_sniffer
);
1920 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
1921 i386_nlm_osabi_sniffer
);
1923 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
1924 i386_svr4_init_abi
);
1925 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
1926 i386_go32_init_abi
);
1927 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
1930 /* Initialize the i386 specific register groups. */
1931 i386_init_reggroups ();