gdb/i386-tdep.h

   1 /* Target-dependent code for the i386.
   2
   3    Copyright 2001, 2002, 2003
   4    Free Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 2 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 59 Temple Place - Suite 330,
  21    Boston, MA 02111-1307, USA.  */
  22
  23 #ifndef I386_TDEP_H
  24 #define I386_TDEP_H
  25
  26 struct frame_info;
  27 struct gdbarch;
  28 struct reggroup;
  29 struct regset;
  30 struct regcache;
  31
  32 /* GDB's i386 target supports both the 32-bit Intel Architecture
  33    (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
  34    a similar register layout for both.
  35
  36    - General purpose registers
  37    - FPU data registers
  38    - FPU control registers
  39    - SSE data registers
  40    - SSE control register
  41
  42    The general purpose registers for the x86-64 architecture are quite
  43    different from IA-32.  Therefore, the FP0_REGNUM target macro
  44    determines the register number at which the FPU data registers
  45    start.  The number of FPU data and control registers is the same
  46    for both architectures.  The number of SSE registers however,
  47    differs and is determined by the num_xmm_regs member of `struct
  48    gdbarch_tdep'.  */
  49
  50 /* Convention for returning structures.  */
  51
  52 enum struct_return
  53 {
  54   pcc_struct_return,            /* Return "short" structures in memory.  */
  55   reg_struct_return             /* Return "short" structures in registers.  */
  56 };
  57
  58 /* i386 architecture specific information.  */
  59 struct gdbarch_tdep
  60 {
  61   /* General-purpose registers.  */
  62   struct regset *gregset;
  63   int *gregset_reg_offset;
  64   int gregset_num_regs;
  65   size_t sizeof_gregset;
  66
  67   /* Floating-point registers.  */
  68   struct regset *fpregset;
  69   size_t sizeof_fpregset;
  70
  71   /* Register number for %st(0).  The register numbers for the other
  72      registers follow from this one.  Set this to -1 to indicate the
  73      absence of an FPU.  */
  74   int st0_regnum;
  75
  76   /* Register number for %mm0.  Set this to -1 to indicate the absence
  77      of MMX support.  */
  78   int mm0_regnum;
  79
  80   /* Number of SSE registers.  */
  81   int num_xmm_regs;
  82
  83   /* Offset of saved PC in jmp_buf.  */
  84   int jb_pc_offset;
  85
  86   /* Convention for returning structures.  */
  87   enum struct_return struct_return;
  88
  89   /* Address range where sigtramp lives.  */
  90   CORE_ADDR sigtramp_start;
  91   CORE_ADDR sigtramp_end;
  92
  93   /* Get address of sigcontext for sigtramp.  */
  94   CORE_ADDR (*sigcontext_addr) (struct frame_info *);
  95
  96   /* Offset of registers in `struct sigcontext'.  */
  97   int *sc_reg_offset;
  98   int sc_num_regs;
  99
 100   /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
 101      is deprecated, please use `sc_reg_offset' instead.  */
 102   int sc_pc_offset;
 103   int sc_sp_offset;
 104 };
 105
 106 /* Floating-point registers.  */
 107
 108 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
 109    (at most) in the FPU, but are zero-extended to 32 bits in GDB's
 110    register cache.  */
 111
 112 /* "Generic" floating point control register.  */
 113 #define FPC_REGNUM      (FP0_REGNUM + 8)
 114
 115 /* FPU control word.  */
 116 #define FCTRL_REGNUM    FPC_REGNUM
 117
 118 /* FPU status word.  */
 119 #define FSTAT_REGNUM    (FPC_REGNUM + 1)
 120
 121 /* FPU register tag word.  */
 122 #define FTAG_REGNUM     (FPC_REGNUM + 2)
 123
 124 /* FPU instruction's code segment selector, called "FPU Instruction
 125    Pointer Selector" in the IA-32 manuals.  */
 126 #define FISEG_REGNUM    (FPC_REGNUM + 3)
 127
 128 /* FPU instruction's offset within segment.  */
 129 #define FIOFF_REGNUM    (FPC_REGNUM + 4)
 130
 131 /* FPU operand's data segment.  */
 132 #define FOSEG_REGNUM    (FPC_REGNUM + 5)
 133
 134 /* FPU operand's offset within segment */
 135 #define FOOFF_REGNUM    (FPC_REGNUM + 6)
 136
 137 /* FPU opcode, bottom eleven bits.  */
 138 #define FOP_REGNUM      (FPC_REGNUM + 7)
 139
 140 /* Return non-zero if REGNUM matches the FP register and the FP
 141    register set is active.  */
 142 extern int i386_fp_regnum_p (int regnum);
 143 extern int i386_fpc_regnum_p (int regnum);
 144
 145 /* SSE registers.  */
 146
 147 /* First SSE data register.  */
 148 #define XMM0_REGNUM     (FPC_REGNUM + 8)
 149
 150 /* SSE control/status register.  */
 151 #define MXCSR_REGNUM \
 152   (XMM0_REGNUM + gdbarch_tdep (current_gdbarch)->num_xmm_regs)
 153
 154 /* Register numbers of various important registers.  */
 155
 156 enum i386_regnum
 157 {
 158   I386_EAX_REGNUM,              /* %eax */
 159   I386_ECX_REGNUM,              /* %ecx */
 160   I386_EDX_REGNUM,              /* %edx */
 161   I386_EBX_REGNUM,              /* %ebx */
 162   I386_ESP_REGNUM,              /* %esp */
 163   I386_EBP_REGNUM,              /* %ebp */
 164   I386_ESI_REGNUM,              /* %esi */
 165   I386_EDI_REGNUM,              /* %edi */
 166   I386_EIP_REGNUM,              /* %eip */
 167   I386_EFLAGS_REGNUM,           /* %eflags */
 168   I386_CS_REGNUM,               /* %cs */
 169   I386_SS_REGNUM,               /* %ss */
 170   I386_ST0_REGNUM = 16,         /* %st(0) */
 171 };
 172
 173 #define I386_NUM_GREGS  16
 174 #define I386_NUM_FREGS  16
 175 #define I386_NUM_XREGS  9
 176
 177 #define I386_SSE_NUM_REGS       (I386_NUM_GREGS + I386_NUM_FREGS \
 178                                  + I386_NUM_XREGS)
 179
 180 /* Size of the largest register.  */
 181 #define I386_MAX_REGISTER_SIZE  16
 182
 183 /* Functions exported from i386-tdep.c.  */
 184 extern CORE_ADDR i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name);
 185 extern int i386_frameless_signal_p (struct frame_info *frame);
 186
 187 /* Return the name of register REG.  */
 188 extern char const *i386_register_name (int reg);
 189
 190 /* Return non-zero if REGNUM is a member of the specified group.  */
 191 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 192                                      struct reggroup *group);
 193
 194 /* Supply register REGNUM from the general-purpose register set REGSET
 195    to register cache REGCACHE.  If REGNUM is -1, do this for all
 196    registers in REGSET.  */
 197 extern void i386_supply_gregset (const struct regset *regset,
 198                                  struct regcache *regcache, int regnum,
 199                                  const void *gregs, size_t len);
 200
 201 /* Return the appropriate register set for the core section identified
 202    by SECT_NAME and SECT_SIZE.  */
 203 extern const struct regset *
 204   i386_regset_from_core_section (struct gdbarch *gdbarch,
 205                                  const char *sect_name, size_t sect_size);
 206
 207 /* Initialize a basic ELF architecture variant.  */
 208 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
 209
 210 /* Initialize a SVR4 architecture variant.  */
 211 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
 212 \f
 213
 214 /* Functions and variables exported from i386bsd-tdep.c.  */
 215
 216 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
 217 extern CORE_ADDR i386fbsd_sigtramp_start;
 218 extern CORE_ADDR i386fbsd_sigtramp_end;
 219 extern CORE_ADDR i386obsd_sigtramp_start;
 220 extern CORE_ADDR i386obsd_sigtramp_end;
 221 extern int i386fbsd4_sc_reg_offset[];
 222 extern int i386fbsd_sc_reg_offset[];
 223 extern int i386nbsd_sc_reg_offset[];
 224 extern int i386obsd_sc_reg_offset[];
 225 extern int i386bsd_sc_reg_offset[];
 226
 227 #endif /* i386-tdep.h */