72c634e6b7df42249a01b7bb3a9b26de52d2996a
[deliverable/binutils-gdb.git] / gdb / i386-tdep.h
1 /* Target-dependent code for the i386.
2
3 Copyright (C) 2001, 2002, 2003, 2004, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #ifndef I386_TDEP_H
22 #define I386_TDEP_H
23
24 struct frame_info;
25 struct gdbarch;
26 struct reggroup;
27 struct regset;
28 struct regcache;
29
30 /* GDB's i386 target supports both the 32-bit Intel Architecture
31 (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
32 a similar register layout for both.
33
34 - General purpose registers
35 - FPU data registers
36 - FPU control registers
37 - SSE data registers
38 - SSE control register
39
40 The general purpose registers for the x86-64 architecture are quite
41 different from IA-32. Therefore, gdbarch_fp0_regnum
42 determines the register number at which the FPU data registers
43 start. The number of FPU data and control registers is the same
44 for both architectures. The number of SSE registers however,
45 differs and is determined by the num_xmm_regs member of `struct
46 gdbarch_tdep'. */
47
48 /* Convention for returning structures. */
49
50 enum struct_return
51 {
52 pcc_struct_return, /* Return "short" structures in memory. */
53 reg_struct_return /* Return "short" structures in registers. */
54 };
55
56 /* Register classes as defined in the AMD x86-64 psABI. */
57
58 enum amd64_reg_class
59 {
60 AMD64_INTEGER,
61 AMD64_SSE,
62 AMD64_SSEUP,
63 AMD64_X87,
64 AMD64_X87UP,
65 AMD64_COMPLEX_X87,
66 AMD64_NO_CLASS,
67 AMD64_MEMORY
68 };
69
70 /* i386 architecture specific information. */
71 struct gdbarch_tdep
72 {
73 /* General-purpose registers. */
74 struct regset *gregset;
75 int *gregset_reg_offset;
76 int gregset_num_regs;
77 size_t sizeof_gregset;
78
79 /* The general-purpose registers used to pass integers when making
80 function calls. This only applies to amd64, as all parameters
81 are passed through the stack on x86. */
82 int call_dummy_num_integer_regs;
83 int *call_dummy_integer_regs;
84
85 /* Used on amd64 only. Classify TYPE according to calling conventions,
86 and store the result in CLASS. */
87 void (*classify) (struct type *type, enum amd64_reg_class class[2]);
88
89 /* Used on amd64 only. Non-zero if the first few MEMORY arguments
90 should be passed by pointer.
91
92 More precisely, MEMORY arguments are passed through the stack.
93 But certain architectures require that their address be passed
94 by register as well, if there are still some integer registers
95 available for argument passing. */
96 int memory_args_by_pointer;
97
98 /* Used on amd64 only.
99
100 If non-zero, then the callers of a function are expected to reserve
101 some space in the stack just before the area where the PC is saved
102 so that the callee may save the integer-parameter registers there.
103 The amount of space is dependent on the list of registers used for
104 integer parameter passing (see component call_dummy_num_integer_regs
105 above). */
106 int integer_param_regs_saved_in_caller_frame;
107
108 /* Floating-point registers. */
109 struct regset *fpregset;
110 size_t sizeof_fpregset;
111
112 /* Register number for %st(0). The register numbers for the other
113 registers follow from this one. Set this to -1 to indicate the
114 absence of an FPU. */
115 int st0_regnum;
116
117 /* Number of MMX registers. */
118 int num_mmx_regs;
119
120 /* Register number for %mm0. Set this to -1 to indicate the absence
121 of MMX support. */
122 int mm0_regnum;
123
124 /* Number of byte registers. */
125 int num_byte_regs;
126
127 /* Register pseudo number for %al. */
128 int al_regnum;
129
130 /* Number of pseudo word registers. */
131 int num_word_regs;
132
133 /* Register number for %ax. */
134 int ax_regnum;
135
136 /* Number of pseudo dword registers. */
137 int num_dword_regs;
138
139 /* Register number for %eax. Set this to -1 to indicate the absence
140 of pseudo dword register support. */
141 int eax_regnum;
142
143 /* Number of core registers. */
144 int num_core_regs;
145
146 /* Number of SSE registers. */
147 int num_xmm_regs;
148
149 /* Register names. */
150 const char **register_names;
151
152 /* Target description. */
153 const struct target_desc *tdesc;
154
155 /* Register group function. */
156 const void *register_reggroup_p;
157
158 /* Offset of saved PC in jmp_buf. */
159 int jb_pc_offset;
160
161 /* Convention for returning structures. */
162 enum struct_return struct_return;
163
164 /* Address range where sigtramp lives. */
165 CORE_ADDR sigtramp_start;
166 CORE_ADDR sigtramp_end;
167
168 /* Detect sigtramp. */
169 int (*sigtramp_p) (struct frame_info *);
170
171 /* Get address of sigcontext for sigtramp. */
172 CORE_ADDR (*sigcontext_addr) (struct frame_info *);
173
174 /* Offset of registers in `struct sigcontext'. */
175 int *sc_reg_offset;
176 int sc_num_regs;
177
178 /* Offset of saved PC and SP in `struct sigcontext'. Usage of these
179 is deprecated, please use `sc_reg_offset' instead. */
180 int sc_pc_offset;
181 int sc_sp_offset;
182
183 /* ISA-specific data types. */
184 struct type *i386_mmx_type;
185 struct type *i387_ext_type;
186
187 /* Process record/replay target. */
188 /* The map for registers because the AMD64's registers order
189 in GDB is not same as I386 instructions. */
190 const int *record_regmap;
191 /* Parse intx80 args. */
192 int (*i386_intx80_record) (struct regcache *regcache);
193 /* Parse sysenter args. */
194 int (*i386_sysenter_record) (struct regcache *regcache);
195 /* Parse syscall args. */
196 int (*i386_syscall_record) (struct regcache *regcache);
197 };
198
199 /* Floating-point registers. */
200
201 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
202 (at most) in the FPU, but are zero-extended to 32 bits in GDB's
203 register cache. */
204
205 /* Return non-zero if REGNUM matches the FP register and the FP
206 register set is active. */
207 extern int i386_fp_regnum_p (struct gdbarch *, int);
208 extern int i386_fpc_regnum_p (struct gdbarch *, int);
209
210 /* Register numbers of various important registers. */
211
212 enum i386_regnum
213 {
214 I386_EAX_REGNUM, /* %eax */
215 I386_ECX_REGNUM, /* %ecx */
216 I386_EDX_REGNUM, /* %edx */
217 I386_EBX_REGNUM, /* %ebx */
218 I386_ESP_REGNUM, /* %esp */
219 I386_EBP_REGNUM, /* %ebp */
220 I386_ESI_REGNUM, /* %esi */
221 I386_EDI_REGNUM, /* %edi */
222 I386_EIP_REGNUM, /* %eip */
223 I386_EFLAGS_REGNUM, /* %eflags */
224 I386_CS_REGNUM, /* %cs */
225 I386_SS_REGNUM, /* %ss */
226 I386_DS_REGNUM, /* %ds */
227 I386_ES_REGNUM, /* %es */
228 I386_FS_REGNUM, /* %fs */
229 I386_GS_REGNUM, /* %gs */
230 I386_ST0_REGNUM, /* %st(0) */
231 I386_MXCSR_REGNUM = 40 /* %mxcsr */
232 };
233
234 /* Register numbers of RECORD_REGMAP. */
235
236 enum record_i386_regnum
237 {
238 X86_RECORD_REAX_REGNUM,
239 X86_RECORD_RECX_REGNUM,
240 X86_RECORD_REDX_REGNUM,
241 X86_RECORD_REBX_REGNUM,
242 X86_RECORD_RESP_REGNUM,
243 X86_RECORD_REBP_REGNUM,
244 X86_RECORD_RESI_REGNUM,
245 X86_RECORD_REDI_REGNUM,
246 X86_RECORD_R8_REGNUM,
247 X86_RECORD_R9_REGNUM,
248 X86_RECORD_R10_REGNUM,
249 X86_RECORD_R11_REGNUM,
250 X86_RECORD_R12_REGNUM,
251 X86_RECORD_R13_REGNUM,
252 X86_RECORD_R14_REGNUM,
253 X86_RECORD_R15_REGNUM,
254 X86_RECORD_REIP_REGNUM,
255 X86_RECORD_EFLAGS_REGNUM,
256 X86_RECORD_CS_REGNUM,
257 X86_RECORD_SS_REGNUM,
258 X86_RECORD_DS_REGNUM,
259 X86_RECORD_ES_REGNUM,
260 X86_RECORD_FS_REGNUM,
261 X86_RECORD_GS_REGNUM,
262 };
263
264 #define I386_NUM_GREGS 16
265 #define I386_NUM_XREGS 9
266
267 #define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
268
269 /* Size of the largest register. */
270 #define I386_MAX_REGISTER_SIZE 16
271
272 /* Types for i386-specific registers. */
273 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
274
275 /* Checks of different pseudo-registers. */
276 extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
277 extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
278 extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
279
280 extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
281 int regnum);
282
283 extern void i386_pseudo_register_read (struct gdbarch *gdbarch,
284 struct regcache *regcache,
285 int regnum, gdb_byte *buf);
286 extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
287 struct regcache *regcache,
288 int regnum, const gdb_byte *buf);
289
290 /* Segment selectors. */
291 #define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
292 #define I386_SEL_UPL 0x0003 /* User Privilige Level. */
293 #define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
294
295 /* The length of the longest i386 instruction (according to
296 include/asm-i386/kprobes.h in Linux 2.6. */
297 #define I386_MAX_INSN_LEN (16)
298
299 /* Functions exported from i386-tdep.c. */
300 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
301 CORE_ADDR pc, char *name);
302 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc);
303
304 /* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
305 extern int i386_sigtramp_p (struct frame_info *this_frame);
306
307 /* Return non-zero if REGNUM is a member of the specified group. */
308 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
309 struct reggroup *group);
310
311 /* Supply register REGNUM from the general-purpose register set REGSET
312 to register cache REGCACHE. If REGNUM is -1, do this for all
313 registers in REGSET. */
314 extern void i386_supply_gregset (const struct regset *regset,
315 struct regcache *regcache, int regnum,
316 const void *gregs, size_t len);
317
318 /* Collect register REGNUM from the register cache REGCACHE and store
319 it in the buffer specified by GREGS and LEN as described by the
320 general-purpose register set REGSET. If REGNUM is -1, do this for
321 all registers in REGSET. */
322 extern void i386_collect_gregset (const struct regset *regset,
323 const struct regcache *regcache,
324 int regnum, void *gregs, size_t len);
325
326 /* Return the appropriate register set for the core section identified
327 by SECT_NAME and SECT_SIZE. */
328 extern const struct regset *
329 i386_regset_from_core_section (struct gdbarch *gdbarch,
330 const char *sect_name, size_t sect_size);
331
332
333 extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
334 struct displaced_step_closure *closure,
335 CORE_ADDR from, CORE_ADDR to,
336 struct regcache *regs);
337
338 /* Initialize a basic ELF architecture variant. */
339 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
340
341 /* Initialize a SVR4 architecture variant. */
342 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
343
344 extern int i386_process_record (struct gdbarch *gdbarch,
345 struct regcache *regcache, CORE_ADDR addr);
346 \f
347
348 /* Functions and variables exported from i386bsd-tdep.c. */
349
350 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
351 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
352 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
353 extern CORE_ADDR i386obsd_sigtramp_start_addr;
354 extern CORE_ADDR i386obsd_sigtramp_end_addr;
355 extern int i386fbsd4_sc_reg_offset[];
356 extern int i386fbsd_sc_reg_offset[];
357 extern int i386nbsd_sc_reg_offset[];
358 extern int i386obsd_sc_reg_offset[];
359 extern int i386bsd_sc_reg_offset[];
360
361 #endif /* i386-tdep.h */
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