8113dcc5ac0fc86b0366e07356f24c51d030f5ec
[deliverable/binutils-gdb.git] / gdb / i386-tdep.h
1 /* Target-dependent code for the i386.
2
3 Copyright (C) 2001-2013 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #ifndef I386_TDEP_H
21 #define I386_TDEP_H
22
23 struct frame_info;
24 struct gdbarch;
25 struct reggroup;
26 struct regset;
27 struct regcache;
28
29 /* GDB's i386 target supports both the 32-bit Intel Architecture
30 (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
31 a similar register layout for both.
32
33 - General purpose registers
34 - FPU data registers
35 - FPU control registers
36 - SSE data registers
37 - SSE control register
38
39 The general purpose registers for the x86-64 architecture are quite
40 different from IA-32. Therefore, gdbarch_fp0_regnum
41 determines the register number at which the FPU data registers
42 start. The number of FPU data and control registers is the same
43 for both architectures. The number of SSE registers however,
44 differs and is determined by the num_xmm_regs member of `struct
45 gdbarch_tdep'. */
46
47 /* Convention for returning structures. */
48
49 enum struct_return
50 {
51 pcc_struct_return, /* Return "short" structures in memory. */
52 reg_struct_return /* Return "short" structures in registers. */
53 };
54
55 /* Register classes as defined in the AMD x86-64 psABI. */
56
57 enum amd64_reg_class
58 {
59 AMD64_INTEGER,
60 AMD64_SSE,
61 AMD64_SSEUP,
62 AMD64_X87,
63 AMD64_X87UP,
64 AMD64_COMPLEX_X87,
65 AMD64_NO_CLASS,
66 AMD64_MEMORY
67 };
68
69 /* i386 architecture specific information. */
70 struct gdbarch_tdep
71 {
72 /* General-purpose registers. */
73 struct regset *gregset;
74 int *gregset_reg_offset;
75 int gregset_num_regs;
76 size_t sizeof_gregset;
77
78 /* The general-purpose registers used to pass integers when making
79 function calls. This only applies to amd64, as all parameters
80 are passed through the stack on x86. */
81 int call_dummy_num_integer_regs;
82 int *call_dummy_integer_regs;
83
84 /* Classify TYPE according to calling conventions, and store
85 the result in CLASS. Used on amd64 only. */
86 void (*classify) (struct type *type, enum amd64_reg_class class[2]);
87
88 /* Non-zero if the first few MEMORY arguments should be passed by
89 pointer.
90
91 More precisely, MEMORY arguments are passed through the stack.
92 But certain architectures require that their address be passed
93 by register as well, if there are still some integer registers
94 available for argument passing. */
95 int memory_args_by_pointer;
96
97 /* Floating-point registers. */
98 struct regset *fpregset;
99 size_t sizeof_fpregset;
100
101 /* XSAVE extended state. */
102 struct regset *xstateregset;
103
104 /* Register number for %st(0). The register numbers for the other
105 registers follow from this one. Set this to -1 to indicate the
106 absence of an FPU. */
107 int st0_regnum;
108
109 /* Number of MMX registers. */
110 int num_mmx_regs;
111
112 /* Register number for %mm0. Set this to -1 to indicate the absence
113 of MMX support. */
114 int mm0_regnum;
115
116 /* Number of pseudo YMM registers. */
117 int num_ymm_regs;
118
119 /* Register number for %ymm0. Set this to -1 to indicate the absence
120 of pseudo YMM register support. */
121 int ymm0_regnum;
122
123 /* Number of byte registers. */
124 int num_byte_regs;
125
126 /* Register pseudo number for %al. */
127 int al_regnum;
128
129 /* Number of pseudo word registers. */
130 int num_word_regs;
131
132 /* Register number for %ax. */
133 int ax_regnum;
134
135 /* Number of pseudo dword registers. */
136 int num_dword_regs;
137
138 /* Register number for %eax. Set this to -1 to indicate the absence
139 of pseudo dword register support. */
140 int eax_regnum;
141
142 /* Number of core registers. */
143 int num_core_regs;
144
145 /* Number of SSE registers. */
146 int num_xmm_regs;
147
148 /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
149 register), excluding the x87 bit, which are supported by this GDB. */
150
151 uint64_t xcr0;
152
153 /* Offset of XCR0 in XSAVE extended state. */
154 int xsave_xcr0_offset;
155
156 /* Register names. */
157 const char **register_names;
158
159 /* Register number for %ymm0h. Set this to -1 to indicate the absence
160 of upper YMM register support. */
161 int ymm0h_regnum;
162
163 /* Upper YMM register names. Only used for tdesc_numbered_register. */
164 const char **ymmh_register_names;
165
166 /* Target description. */
167 const struct target_desc *tdesc;
168
169 /* Register group function. */
170 const void *register_reggroup_p;
171
172 /* Offset of saved PC in jmp_buf. */
173 int jb_pc_offset;
174
175 /* Convention for returning structures. */
176 enum struct_return struct_return;
177
178 /* Address range where sigtramp lives. */
179 CORE_ADDR sigtramp_start;
180 CORE_ADDR sigtramp_end;
181
182 /* Detect sigtramp. */
183 int (*sigtramp_p) (struct frame_info *);
184
185 /* Get address of sigcontext for sigtramp. */
186 CORE_ADDR (*sigcontext_addr) (struct frame_info *);
187
188 /* Offset of registers in `struct sigcontext'. */
189 int *sc_reg_offset;
190 int sc_num_regs;
191
192 /* Offset of saved PC and SP in `struct sigcontext'. Usage of these
193 is deprecated, please use `sc_reg_offset' instead. */
194 int sc_pc_offset;
195 int sc_sp_offset;
196
197 /* ISA-specific data types. */
198 struct type *i386_mmx_type;
199 struct type *i386_ymm_type;
200 struct type *i387_ext_type;
201
202 /* Process record/replay target. */
203 /* The map for registers because the AMD64's registers order
204 in GDB is not same as I386 instructions. */
205 const int *record_regmap;
206 /* Parse intx80 args. */
207 int (*i386_intx80_record) (struct regcache *regcache);
208 /* Parse sysenter args. */
209 int (*i386_sysenter_record) (struct regcache *regcache);
210 /* Parse syscall args. */
211 int (*i386_syscall_record) (struct regcache *regcache);
212 };
213
214 /* Floating-point registers. */
215
216 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
217 (at most) in the FPU, but are zero-extended to 32 bits in GDB's
218 register cache. */
219
220 /* Return non-zero if REGNUM matches the FP register and the FP
221 register set is active. */
222 extern int i386_fp_regnum_p (struct gdbarch *, int);
223 extern int i386_fpc_regnum_p (struct gdbarch *, int);
224
225 /* Register numbers of various important registers. */
226
227 enum i386_regnum
228 {
229 I386_EAX_REGNUM, /* %eax */
230 I386_ECX_REGNUM, /* %ecx */
231 I386_EDX_REGNUM, /* %edx */
232 I386_EBX_REGNUM, /* %ebx */
233 I386_ESP_REGNUM, /* %esp */
234 I386_EBP_REGNUM, /* %ebp */
235 I386_ESI_REGNUM, /* %esi */
236 I386_EDI_REGNUM, /* %edi */
237 I386_EIP_REGNUM, /* %eip */
238 I386_EFLAGS_REGNUM, /* %eflags */
239 I386_CS_REGNUM, /* %cs */
240 I386_SS_REGNUM, /* %ss */
241 I386_DS_REGNUM, /* %ds */
242 I386_ES_REGNUM, /* %es */
243 I386_FS_REGNUM, /* %fs */
244 I386_GS_REGNUM, /* %gs */
245 I386_ST0_REGNUM, /* %st(0) */
246 I386_MXCSR_REGNUM = 40, /* %mxcsr */
247 I386_YMM0H_REGNUM, /* %ymm0h */
248 I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7
249 };
250
251 /* Register numbers of RECORD_REGMAP. */
252
253 enum record_i386_regnum
254 {
255 X86_RECORD_REAX_REGNUM,
256 X86_RECORD_RECX_REGNUM,
257 X86_RECORD_REDX_REGNUM,
258 X86_RECORD_REBX_REGNUM,
259 X86_RECORD_RESP_REGNUM,
260 X86_RECORD_REBP_REGNUM,
261 X86_RECORD_RESI_REGNUM,
262 X86_RECORD_REDI_REGNUM,
263 X86_RECORD_R8_REGNUM,
264 X86_RECORD_R9_REGNUM,
265 X86_RECORD_R10_REGNUM,
266 X86_RECORD_R11_REGNUM,
267 X86_RECORD_R12_REGNUM,
268 X86_RECORD_R13_REGNUM,
269 X86_RECORD_R14_REGNUM,
270 X86_RECORD_R15_REGNUM,
271 X86_RECORD_REIP_REGNUM,
272 X86_RECORD_EFLAGS_REGNUM,
273 X86_RECORD_CS_REGNUM,
274 X86_RECORD_SS_REGNUM,
275 X86_RECORD_DS_REGNUM,
276 X86_RECORD_ES_REGNUM,
277 X86_RECORD_FS_REGNUM,
278 X86_RECORD_GS_REGNUM,
279 };
280
281 #define I386_NUM_GREGS 16
282 #define I386_NUM_XREGS 9
283
284 #define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
285 #define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
286
287 /* Size of the largest register. */
288 #define I386_MAX_REGISTER_SIZE 16
289
290 /* Types for i386-specific registers. */
291 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
292
293 /* Checks of different pseudo-registers. */
294 extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
295 extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
296 extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
297 extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
298 extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
299
300 extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
301 int regnum);
302 extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
303 int regnum);
304
305 extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
306 struct regcache *regcache,
307 int regnum,
308 struct value *result);
309
310 extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
311 struct regcache *regcache,
312 int regnum, const gdb_byte *buf);
313
314 /* Segment selectors. */
315 #define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
316 #define I386_SEL_UPL 0x0003 /* User Privilige Level. */
317 #define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
318
319 /* The length of the longest i386 instruction (according to
320 include/asm-i386/kprobes.h in Linux 2.6. */
321 #define I386_MAX_INSN_LEN (16)
322
323 /* Functions exported from i386-tdep.c. */
324 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
325 CORE_ADDR pc, char *name);
326 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
327 CORE_ADDR pc);
328
329 /* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
330 extern int i386_sigtramp_p (struct frame_info *this_frame);
331
332 /* Return non-zero if REGNUM is a member of the specified group. */
333 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
334 struct reggroup *group);
335
336 /* Supply register REGNUM from the general-purpose register set REGSET
337 to register cache REGCACHE. If REGNUM is -1, do this for all
338 registers in REGSET. */
339 extern void i386_supply_gregset (const struct regset *regset,
340 struct regcache *regcache, int regnum,
341 const void *gregs, size_t len);
342
343 /* Collect register REGNUM from the register cache REGCACHE and store
344 it in the buffer specified by GREGS and LEN as described by the
345 general-purpose register set REGSET. If REGNUM is -1, do this for
346 all registers in REGSET. */
347 extern void i386_collect_gregset (const struct regset *regset,
348 const struct regcache *regcache,
349 int regnum, void *gregs, size_t len);
350
351 /* Return the appropriate register set for the core section identified
352 by SECT_NAME and SECT_SIZE. */
353 extern const struct regset *
354 i386_regset_from_core_section (struct gdbarch *gdbarch,
355 const char *sect_name, size_t sect_size);
356
357
358 extern struct displaced_step_closure *i386_displaced_step_copy_insn
359 (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
360 struct regcache *regs);
361 extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
362 struct displaced_step_closure *closure,
363 CORE_ADDR from, CORE_ADDR to,
364 struct regcache *regs);
365
366 /* Initialize a basic ELF architecture variant. */
367 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
368
369 /* Initialize a SVR4 architecture variant. */
370 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
371
372 extern int i386_process_record (struct gdbarch *gdbarch,
373 struct regcache *regcache, CORE_ADDR addr);
374
375 \f
376
377 /* Functions and variables exported from i386bsd-tdep.c. */
378
379 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
380 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
381 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
382 extern CORE_ADDR i386obsd_sigtramp_start_addr;
383 extern CORE_ADDR i386obsd_sigtramp_end_addr;
384 extern int i386fbsd4_sc_reg_offset[];
385 extern int i386fbsd_sc_reg_offset[];
386 extern int i386nbsd_sc_reg_offset[];
387 extern int i386obsd_sc_reg_offset[];
388 extern int i386bsd_sc_reg_offset[];
389
390 /* SystemTap related functions. */
391
392 extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
393 const char *s);
394
395 extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
396 struct stap_parse_info *p);
397
398 #endif /* i386-tdep.h */
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