gdb/i386-tdep.h

   1 /* Target-dependent code for GDB, the GNU debugger.
   2    Copyright 2001
   3    Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 59 Temple Place - Suite 330,
  20    Boston, MA 02111-1307, USA.  */
  21
  22 #ifndef I386_TDEP_H
  23 #define I386_TDEP_H
  24
  25 #define FPU_REG_RAW_SIZE 10
  26
  27 #if !defined (XMM0_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  28 #define XMM0_REGNUM FIRST_XMM_REGNUM
  29 #endif
  30 #if !defined (FIRST_FPU_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  31 #define FIRST_FPU_REGNUM FP0_REGNUM
  32 #endif
  33 #if !defined (LAST_FPU_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  34 #define LAST_FPU_REGNUM (gdbarch_tdep (current_gdbarch)->last_fpu_regnum)
  35 #endif
  36 #if !defined (FIRST_XMM_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  37 #define FIRST_XMM_REGNUM (gdbarch_tdep (current_gdbarch)->first_xmm_regnum)
  38 #endif
  39 #if !defined (LAST_XMM_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  40 #define LAST_XMM_REGNUM (gdbarch_tdep (current_gdbarch)->last_xmm_regnum)
  41 #endif
  42 #if !defined (MXCSR_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  43 #define MXCSR_REGNUM (gdbarch_tdep (current_gdbarch)->mxcsr_regnum)
  44 #endif
  45 #if !defined (FIRST_FPU_CTRL_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  46 #define FIRST_FPU_CTRL_REGNUM (gdbarch_tdep (current_gdbarch)->first_fpu_ctrl_regnum)
  47 #endif
  48 #if !defined (LAST_FPU_CTRL_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  49 #define LAST_FPU_CTRL_REGNUM (FIRST_FPU_CTRL_REGNUM + 7)
  50 #endif
  51
  52 /* All of these control registers (except for FCOFF and FDOFF) are
  53    sixteen bits long (at most) in the FPU, but are zero-extended to
  54    thirty-two bits in GDB's register file.  This makes it easier to
  55    compute the size of the control register file, and somewhat easier
  56    to convert to and from the FSAVE instruction's 32-bit format.  */
  57 /* FPU control word.  */
  58 #if !defined (FCTRL_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  59 #define FCTRL_REGNUM (FIRST_FPU_CTRL_REGNUM)
  60 #endif
  61 /* FPU status word.  */
  62 #if !defined (FSTAT_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  63 #define FSTAT_REGNUM (FIRST_FPU_CTRL_REGNUM + 1)
  64 #endif
  65 /* FPU register tag word.  */
  66 #if !defined (FTAG_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  67 #define FTAG_REGNUM  (FIRST_FPU_CTRL_REGNUM + 2)
  68 #endif
  69 /* FPU instruction's code segment selector 16 bits, called "FPU Instruction
  70    Pointer Selector" in the x86 manuals.  */
  71 #if !defined (FCS_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  72 #define FCS_REGNUM   (FIRST_FPU_CTRL_REGNUM + 3)
  73 #endif
  74 /* FPU instruction's offset within segment ("Fpu Code OFFset").  */
  75 #if !defined (FCOFF_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  76 #define FCOFF_REGNUM (FIRST_FPU_CTRL_REGNUM + 4)
  77 #endif
  78 /* FPU operand's data segment.  */
  79 #if !defined (FDS_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  80 #define FDS_REGNUM   (FIRST_FPU_CTRL_REGNUM + 5)
  81 #endif
  82 /* FPU operand's offset within segment.  */
  83 #if !defined (FDOFF_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  84 #define FDOFF_REGNUM (FIRST_FPU_CTRL_REGNUM + 6)
  85 #endif
  86 /* FPU opcode, bottom eleven bits.  */
  87 #if !defined (FOP_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
  88 #define FOP_REGNUM   (FIRST_FPU_CTRL_REGNUM + 7)
  89 #endif
  90
  91 /* i386 architecture specific information.  */
  92 struct gdbarch_tdep
  93 {
  94   int last_fpu_regnum;
  95   int first_xmm_regnum;
  96   int last_xmm_regnum;
  97   int mxcsr_regnum;             /* Streaming SIMD Extension control/status.  */
  98   int first_fpu_ctrl_regnum;
  99 };
 100
 101 #if !defined (IS_FP_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
 102 #define IS_FP_REGNUM(n) (FIRST_FPU_REGNUM <= (n) && (n) <= LAST_FPU_REGNUM)
 103 #endif
 104 #if !defined (IS_FPU_CTRL_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
 105 #define IS_FPU_CTRL_REGNUM(n) (FIRST_FPU_CTRL_REGNUM <= (n) && (n) <= LAST_FPU_CTRL_REGNUM)
 106 #endif
 107 #if !defined (IS_SSE_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
 108 #define IS_SSE_REGNUM(n) (FIRST_XMM_REGNUM <= (n) && (n) <= LAST_XMM_REGNUM)
 109 #endif
 110
 111 #endif