2011-02-26 Michael Snyder <msnyder@vmware.com>
[deliverable/binutils-gdb.git] / gdb / i386-tdep.h
1 /* Target-dependent code for the i386.
2
3 Copyright (C) 2001, 2002, 2003, 2004, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #ifndef I386_TDEP_H
22 #define I386_TDEP_H
23
24 struct frame_info;
25 struct gdbarch;
26 struct reggroup;
27 struct regset;
28 struct regcache;
29
30 /* GDB's i386 target supports both the 32-bit Intel Architecture
31 (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
32 a similar register layout for both.
33
34 - General purpose registers
35 - FPU data registers
36 - FPU control registers
37 - SSE data registers
38 - SSE control register
39
40 The general purpose registers for the x86-64 architecture are quite
41 different from IA-32. Therefore, gdbarch_fp0_regnum
42 determines the register number at which the FPU data registers
43 start. The number of FPU data and control registers is the same
44 for both architectures. The number of SSE registers however,
45 differs and is determined by the num_xmm_regs member of `struct
46 gdbarch_tdep'. */
47
48 /* Convention for returning structures. */
49
50 enum struct_return
51 {
52 pcc_struct_return, /* Return "short" structures in memory. */
53 reg_struct_return /* Return "short" structures in registers. */
54 };
55
56 /* Register classes as defined in the AMD x86-64 psABI. */
57
58 enum amd64_reg_class
59 {
60 AMD64_INTEGER,
61 AMD64_SSE,
62 AMD64_SSEUP,
63 AMD64_X87,
64 AMD64_X87UP,
65 AMD64_COMPLEX_X87,
66 AMD64_NO_CLASS,
67 AMD64_MEMORY
68 };
69
70 /* i386 architecture specific information. */
71 struct gdbarch_tdep
72 {
73 /* General-purpose registers. */
74 struct regset *gregset;
75 int *gregset_reg_offset;
76 int gregset_num_regs;
77 size_t sizeof_gregset;
78
79 /* The general-purpose registers used to pass integers when making
80 function calls. This only applies to amd64, as all parameters
81 are passed through the stack on x86. */
82 int call_dummy_num_integer_regs;
83 int *call_dummy_integer_regs;
84
85 /* Used on amd64 only. Classify TYPE according to calling conventions,
86 and store the result in CLASS. */
87 void (*classify) (struct type *type, enum amd64_reg_class class[2]);
88
89 /* Used on amd64 only. Non-zero if the first few MEMORY arguments
90 should be passed by pointer.
91
92 More precisely, MEMORY arguments are passed through the stack.
93 But certain architectures require that their address be passed
94 by register as well, if there are still some integer registers
95 available for argument passing. */
96 int memory_args_by_pointer;
97
98 /* Used on amd64 only.
99
100 If non-zero, then the callers of a function are expected to reserve
101 some space in the stack just before the area where the PC is saved
102 so that the callee may save the integer-parameter registers there.
103 The amount of space is dependent on the list of registers used for
104 integer parameter passing (see component call_dummy_num_integer_regs
105 above). */
106 int integer_param_regs_saved_in_caller_frame;
107
108 /* Floating-point registers. */
109 struct regset *fpregset;
110 size_t sizeof_fpregset;
111
112 /* XSAVE extended state. */
113 struct regset *xstateregset;
114
115 /* Register number for %st(0). The register numbers for the other
116 registers follow from this one. Set this to -1 to indicate the
117 absence of an FPU. */
118 int st0_regnum;
119
120 /* Number of MMX registers. */
121 int num_mmx_regs;
122
123 /* Register number for %mm0. Set this to -1 to indicate the absence
124 of MMX support. */
125 int mm0_regnum;
126
127 /* Number of pseudo YMM registers. */
128 int num_ymm_regs;
129
130 /* Register number for %ymm0. Set this to -1 to indicate the absence
131 of pseudo YMM register support. */
132 int ymm0_regnum;
133
134 /* Number of byte registers. */
135 int num_byte_regs;
136
137 /* Register pseudo number for %al. */
138 int al_regnum;
139
140 /* Number of pseudo word registers. */
141 int num_word_regs;
142
143 /* Register number for %ax. */
144 int ax_regnum;
145
146 /* Number of pseudo dword registers. */
147 int num_dword_regs;
148
149 /* Register number for %eax. Set this to -1 to indicate the absence
150 of pseudo dword register support. */
151 int eax_regnum;
152
153 /* Number of core registers. */
154 int num_core_regs;
155
156 /* Number of SSE registers. */
157 int num_xmm_regs;
158
159 /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
160 register), excluding the x87 bit, which are supported by this GDB. */
161
162 uint64_t xcr0;
163
164 /* Offset of XCR0 in XSAVE extended state. */
165 int xsave_xcr0_offset;
166
167 /* Register names. */
168 const char **register_names;
169
170 /* Register number for %ymm0h. Set this to -1 to indicate the absence
171 of upper YMM register support. */
172 int ymm0h_regnum;
173
174 /* Upper YMM register names. Only used for tdesc_numbered_register. */
175 const char **ymmh_register_names;
176
177 /* Target description. */
178 const struct target_desc *tdesc;
179
180 /* Register group function. */
181 const void *register_reggroup_p;
182
183 /* Offset of saved PC in jmp_buf. */
184 int jb_pc_offset;
185
186 /* Convention for returning structures. */
187 enum struct_return struct_return;
188
189 /* Address range where sigtramp lives. */
190 CORE_ADDR sigtramp_start;
191 CORE_ADDR sigtramp_end;
192
193 /* Detect sigtramp. */
194 int (*sigtramp_p) (struct frame_info *);
195
196 /* Get address of sigcontext for sigtramp. */
197 CORE_ADDR (*sigcontext_addr) (struct frame_info *);
198
199 /* Offset of registers in `struct sigcontext'. */
200 int *sc_reg_offset;
201 int sc_num_regs;
202
203 /* Offset of saved PC and SP in `struct sigcontext'. Usage of these
204 is deprecated, please use `sc_reg_offset' instead. */
205 int sc_pc_offset;
206 int sc_sp_offset;
207
208 /* ISA-specific data types. */
209 struct type *i386_mmx_type;
210 struct type *i386_ymm_type;
211 struct type *i387_ext_type;
212
213 /* Process record/replay target. */
214 /* The map for registers because the AMD64's registers order
215 in GDB is not same as I386 instructions. */
216 const int *record_regmap;
217 /* Parse intx80 args. */
218 int (*i386_intx80_record) (struct regcache *regcache);
219 /* Parse sysenter args. */
220 int (*i386_sysenter_record) (struct regcache *regcache);
221 /* Parse syscall args. */
222 int (*i386_syscall_record) (struct regcache *regcache);
223 };
224
225 /* Floating-point registers. */
226
227 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
228 (at most) in the FPU, but are zero-extended to 32 bits in GDB's
229 register cache. */
230
231 /* Return non-zero if REGNUM matches the FP register and the FP
232 register set is active. */
233 extern int i386_fp_regnum_p (struct gdbarch *, int);
234 extern int i386_fpc_regnum_p (struct gdbarch *, int);
235
236 /* Register numbers of various important registers. */
237
238 enum i386_regnum
239 {
240 I386_EAX_REGNUM, /* %eax */
241 I386_ECX_REGNUM, /* %ecx */
242 I386_EDX_REGNUM, /* %edx */
243 I386_EBX_REGNUM, /* %ebx */
244 I386_ESP_REGNUM, /* %esp */
245 I386_EBP_REGNUM, /* %ebp */
246 I386_ESI_REGNUM, /* %esi */
247 I386_EDI_REGNUM, /* %edi */
248 I386_EIP_REGNUM, /* %eip */
249 I386_EFLAGS_REGNUM, /* %eflags */
250 I386_CS_REGNUM, /* %cs */
251 I386_SS_REGNUM, /* %ss */
252 I386_DS_REGNUM, /* %ds */
253 I386_ES_REGNUM, /* %es */
254 I386_FS_REGNUM, /* %fs */
255 I386_GS_REGNUM, /* %gs */
256 I386_ST0_REGNUM, /* %st(0) */
257 I386_MXCSR_REGNUM = 40, /* %mxcsr */
258 I386_YMM0H_REGNUM, /* %ymm0h */
259 I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7
260 };
261
262 /* Register numbers of RECORD_REGMAP. */
263
264 enum record_i386_regnum
265 {
266 X86_RECORD_REAX_REGNUM,
267 X86_RECORD_RECX_REGNUM,
268 X86_RECORD_REDX_REGNUM,
269 X86_RECORD_REBX_REGNUM,
270 X86_RECORD_RESP_REGNUM,
271 X86_RECORD_REBP_REGNUM,
272 X86_RECORD_RESI_REGNUM,
273 X86_RECORD_REDI_REGNUM,
274 X86_RECORD_R8_REGNUM,
275 X86_RECORD_R9_REGNUM,
276 X86_RECORD_R10_REGNUM,
277 X86_RECORD_R11_REGNUM,
278 X86_RECORD_R12_REGNUM,
279 X86_RECORD_R13_REGNUM,
280 X86_RECORD_R14_REGNUM,
281 X86_RECORD_R15_REGNUM,
282 X86_RECORD_REIP_REGNUM,
283 X86_RECORD_EFLAGS_REGNUM,
284 X86_RECORD_CS_REGNUM,
285 X86_RECORD_SS_REGNUM,
286 X86_RECORD_DS_REGNUM,
287 X86_RECORD_ES_REGNUM,
288 X86_RECORD_FS_REGNUM,
289 X86_RECORD_GS_REGNUM,
290 };
291
292 #define I386_NUM_GREGS 16
293 #define I386_NUM_XREGS 9
294
295 #define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
296 #define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
297
298 /* Size of the largest register. */
299 #define I386_MAX_REGISTER_SIZE 16
300
301 /* Types for i386-specific registers. */
302 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
303
304 /* Checks of different pseudo-registers. */
305 extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
306 extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
307 extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
308 extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
309 extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
310
311 extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
312 int regnum);
313
314 extern void i386_pseudo_register_read (struct gdbarch *gdbarch,
315 struct regcache *regcache,
316 int regnum, gdb_byte *buf);
317 extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
318 struct regcache *regcache,
319 int regnum, const gdb_byte *buf);
320
321 /* Segment selectors. */
322 #define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
323 #define I386_SEL_UPL 0x0003 /* User Privilige Level. */
324 #define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
325
326 /* The length of the longest i386 instruction (according to
327 include/asm-i386/kprobes.h in Linux 2.6. */
328 #define I386_MAX_INSN_LEN (16)
329
330 /* Functions exported from i386-tdep.c. */
331 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
332 CORE_ADDR pc, char *name);
333 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
334 CORE_ADDR pc);
335
336 /* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
337 extern int i386_sigtramp_p (struct frame_info *this_frame);
338
339 /* Return non-zero if REGNUM is a member of the specified group. */
340 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
341 struct reggroup *group);
342
343 /* Supply register REGNUM from the general-purpose register set REGSET
344 to register cache REGCACHE. If REGNUM is -1, do this for all
345 registers in REGSET. */
346 extern void i386_supply_gregset (const struct regset *regset,
347 struct regcache *regcache, int regnum,
348 const void *gregs, size_t len);
349
350 /* Collect register REGNUM from the register cache REGCACHE and store
351 it in the buffer specified by GREGS and LEN as described by the
352 general-purpose register set REGSET. If REGNUM is -1, do this for
353 all registers in REGSET. */
354 extern void i386_collect_gregset (const struct regset *regset,
355 const struct regcache *regcache,
356 int regnum, void *gregs, size_t len);
357
358 /* Return the appropriate register set for the core section identified
359 by SECT_NAME and SECT_SIZE. */
360 extern const struct regset *
361 i386_regset_from_core_section (struct gdbarch *gdbarch,
362 const char *sect_name, size_t sect_size);
363
364
365 extern struct displaced_step_closure *i386_displaced_step_copy_insn
366 (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
367 struct regcache *regs);
368 extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
369 struct displaced_step_closure *closure,
370 CORE_ADDR from, CORE_ADDR to,
371 struct regcache *regs);
372
373 /* Initialize a basic ELF architecture variant. */
374 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
375
376 /* Initialize a SVR4 architecture variant. */
377 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
378
379 extern int i386_process_record (struct gdbarch *gdbarch,
380 struct regcache *regcache, CORE_ADDR addr);
381 \f
382
383 /* Functions and variables exported from i386bsd-tdep.c. */
384
385 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
386 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
387 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
388 extern CORE_ADDR i386obsd_sigtramp_start_addr;
389 extern CORE_ADDR i386obsd_sigtramp_end_addr;
390 extern int i386fbsd4_sc_reg_offset[];
391 extern int i386fbsd_sc_reg_offset[];
392 extern int i386nbsd_sc_reg_offset[];
393 extern int i386obsd_sc_reg_offset[];
394 extern int i386bsd_sc_reg_offset[];
395
396 #endif /* i386-tdep.h */
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