AArch64: View the pseudo V registers as vectors
[deliverable/binutils-gdb.git] / gdb / i386-tdep.h
1 /* Target-dependent code for the i386.
2
3 Copyright (C) 2001-2019 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #ifndef I386_TDEP_H
21 #define I386_TDEP_H
22
23 #include "infrun.h"
24
25 struct frame_info;
26 struct gdbarch;
27 struct reggroup;
28 struct regset;
29 struct regcache;
30
31 /* GDB's i386 target supports both the 32-bit Intel Architecture
32 (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
33 a similar register layout for both.
34
35 - General purpose registers
36 - FPU data registers
37 - FPU control registers
38 - SSE data registers
39 - SSE control register
40
41 The general purpose registers for the x86-64 architecture are quite
42 different from IA-32. Therefore, gdbarch_fp0_regnum
43 determines the register number at which the FPU data registers
44 start. The number of FPU data and control registers is the same
45 for both architectures. The number of SSE registers however,
46 differs and is determined by the num_xmm_regs member of `struct
47 gdbarch_tdep'. */
48
49 /* Convention for returning structures. */
50
51 enum struct_return
52 {
53 pcc_struct_return, /* Return "short" structures in memory. */
54 reg_struct_return /* Return "short" structures in registers. */
55 };
56
57 /* i386 architecture specific information. */
58 struct gdbarch_tdep
59 {
60 /* General-purpose registers. */
61 int *gregset_reg_offset;
62 int gregset_num_regs;
63 size_t sizeof_gregset;
64
65 /* Floating-point registers. */
66 size_t sizeof_fpregset;
67
68 /* Register number for %st(0). The register numbers for the other
69 registers follow from this one. Set this to -1 to indicate the
70 absence of an FPU. */
71 int st0_regnum;
72
73 /* Number of MMX registers. */
74 int num_mmx_regs;
75
76 /* Register number for %mm0. Set this to -1 to indicate the absence
77 of MMX support. */
78 int mm0_regnum;
79
80 /* Number of pseudo YMM registers. */
81 int num_ymm_regs;
82
83 /* Register number for %ymm0. Set this to -1 to indicate the absence
84 of pseudo YMM register support. */
85 int ymm0_regnum;
86
87 /* Number of AVX512 OpMask registers (K-registers) */
88 int num_k_regs;
89
90 /* Register number for %k0. Set this to -1 to indicate the absence
91 of AVX512 OpMask register support. */
92 int k0_regnum;
93
94 /* Number of pseudo ZMM registers ($zmm0-$zmm31). */
95 int num_zmm_regs;
96
97 /* Register number for %zmm0. Set this to -1 to indicate the absence
98 of pseudo ZMM register support. */
99 int zmm0_regnum;
100
101 /* Number of byte registers. */
102 int num_byte_regs;
103
104 /* Register pseudo number for %al. */
105 int al_regnum;
106
107 /* Number of pseudo word registers. */
108 int num_word_regs;
109
110 /* Register number for %ax. */
111 int ax_regnum;
112
113 /* Number of pseudo dword registers. */
114 int num_dword_regs;
115
116 /* Register number for %eax. Set this to -1 to indicate the absence
117 of pseudo dword register support. */
118 int eax_regnum;
119
120 /* Number of core registers. */
121 int num_core_regs;
122
123 /* Number of SSE registers. */
124 int num_xmm_regs;
125
126 /* Number of SSE registers added in AVX512. */
127 int num_xmm_avx512_regs;
128
129 /* Register number of XMM16, the first XMM register added in AVX512. */
130 int xmm16_regnum;
131
132 /* Number of YMM registers added in AVX512. */
133 int num_ymm_avx512_regs;
134
135 /* Register number of YMM16, the first YMM register added in AVX512. */
136 int ymm16_regnum;
137
138 /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
139 register), excluding the x87 bit, which are supported by this GDB. */
140
141 uint64_t xcr0;
142
143 /* Offset of XCR0 in XSAVE extended state. */
144 int xsave_xcr0_offset;
145
146 /* Register names. */
147 const char **register_names;
148
149 /* Register number for %ymm0h. Set this to -1 to indicate the absence
150 of upper YMM register support. */
151 int ymm0h_regnum;
152
153 /* Upper YMM register names. Only used for tdesc_numbered_register. */
154 const char **ymmh_register_names;
155
156 /* Register number for %ymm16h. Set this to -1 to indicate the absence
157 of support for YMM16-31. */
158 int ymm16h_regnum;
159
160 /* YMM16-31 register names. Only used for tdesc_numbered_register. */
161 const char **ymm16h_register_names;
162
163 /* Register number for %bnd0r. Set this to -1 to indicate the absence
164 bound registers. */
165 int bnd0r_regnum;
166
167 /* Register number for pseudo register %bnd0. Set this to -1 to indicate the absence
168 bound registers. */
169 int bnd0_regnum;
170
171 /* Register number for %bndcfgu. Set this to -1 to indicate the absence
172 bound control registers. */
173 int bndcfgu_regnum;
174
175 /* MPX register names. Only used for tdesc_numbered_register. */
176 const char **mpx_register_names;
177
178 /* Register number for %zmm0h. Set this to -1 to indicate the absence
179 of ZMM_HI256 register support. */
180 int zmm0h_regnum;
181
182 /* OpMask register names. */
183 const char **k_register_names;
184
185 /* ZMM register names. Only used for tdesc_numbered_register. */
186 const char **zmmh_register_names;
187
188 /* XMM16-31 register names. Only used for tdesc_numbered_register. */
189 const char **xmm_avx512_register_names;
190
191 /* YMM16-31 register names. Only used for tdesc_numbered_register. */
192 const char **ymm_avx512_register_names;
193
194 /* Number of PKEYS registers. */
195 int num_pkeys_regs;
196
197 /* Register number for PKRU register. */
198 int pkru_regnum;
199
200 /* PKEYS register names. */
201 const char **pkeys_register_names;
202
203 /* Register number for %fsbase. Set this to -1 to indicate the
204 absence of segment base registers. */
205 int fsbase_regnum;
206
207 /* Target description. */
208 const struct target_desc *tdesc;
209
210 /* Register group function. */
211 gdbarch_register_reggroup_p_ftype *register_reggroup_p;
212
213 /* Offset of saved PC in jmp_buf. */
214 int jb_pc_offset;
215
216 /* Convention for returning structures. */
217 enum struct_return struct_return;
218
219 /* Address range where sigtramp lives. */
220 CORE_ADDR sigtramp_start;
221 CORE_ADDR sigtramp_end;
222
223 /* Detect sigtramp. */
224 int (*sigtramp_p) (struct frame_info *);
225
226 /* Get address of sigcontext for sigtramp. */
227 CORE_ADDR (*sigcontext_addr) (struct frame_info *);
228
229 /* Offset of registers in `struct sigcontext'. */
230 int *sc_reg_offset;
231 int sc_num_regs;
232
233 /* Offset of saved PC and SP in `struct sigcontext'. Usage of these
234 is deprecated, please use `sc_reg_offset' instead. */
235 int sc_pc_offset;
236 int sc_sp_offset;
237
238 /* ISA-specific data types. */
239 struct type *i386_mmx_type;
240 struct type *i386_ymm_type;
241 struct type *i386_zmm_type;
242 struct type *i387_ext_type;
243 struct type *i386_bnd_type;
244
245 /* Process record/replay target. */
246 /* The map for registers because the AMD64's registers order
247 in GDB is not same as I386 instructions. */
248 const int *record_regmap;
249 /* Parse intx80 args. */
250 int (*i386_intx80_record) (struct regcache *regcache);
251 /* Parse sysenter args. */
252 int (*i386_sysenter_record) (struct regcache *regcache);
253 /* Parse syscall args. */
254 int (*i386_syscall_record) (struct regcache *regcache);
255
256 /* Regsets. */
257 const struct regset *fpregset;
258 };
259
260 /* Floating-point registers. */
261
262 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
263 (at most) in the FPU, but are zero-extended to 32 bits in GDB's
264 register cache. */
265
266 /* Return non-zero if REGNUM matches the FP register and the FP
267 register set is active. */
268 extern int i386_fp_regnum_p (struct gdbarch *, int);
269 extern int i386_fpc_regnum_p (struct gdbarch *, int);
270
271 /* Register numbers of various important registers. */
272
273 enum i386_regnum
274 {
275 I386_EAX_REGNUM, /* %eax */
276 I386_ECX_REGNUM, /* %ecx */
277 I386_EDX_REGNUM, /* %edx */
278 I386_EBX_REGNUM, /* %ebx */
279 I386_ESP_REGNUM, /* %esp */
280 I386_EBP_REGNUM, /* %ebp */
281 I386_ESI_REGNUM, /* %esi */
282 I386_EDI_REGNUM, /* %edi */
283 I386_EIP_REGNUM, /* %eip */
284 I386_EFLAGS_REGNUM, /* %eflags */
285 I386_CS_REGNUM, /* %cs */
286 I386_SS_REGNUM, /* %ss */
287 I386_DS_REGNUM, /* %ds */
288 I386_ES_REGNUM, /* %es */
289 I386_FS_REGNUM, /* %fs */
290 I386_GS_REGNUM, /* %gs */
291 I386_ST0_REGNUM, /* %st(0) */
292 I386_MXCSR_REGNUM = 40, /* %mxcsr */
293 I386_YMM0H_REGNUM, /* %ymm0h */
294 I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
295 I386_BND0R_REGNUM,
296 I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
297 I386_BNDCFGU_REGNUM,
298 I386_BNDSTATUS_REGNUM,
299 I386_K0_REGNUM, /* %k0 */
300 I386_K7_REGNUM = I386_K0_REGNUM + 7,
301 I386_ZMM0H_REGNUM, /* %zmm0h */
302 I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7,
303 I386_PKRU_REGNUM,
304 I386_FSBASE_REGNUM,
305 I386_GSBASE_REGNUM
306 };
307
308 /* Register numbers of RECORD_REGMAP. */
309
310 enum record_i386_regnum
311 {
312 X86_RECORD_REAX_REGNUM,
313 X86_RECORD_RECX_REGNUM,
314 X86_RECORD_REDX_REGNUM,
315 X86_RECORD_REBX_REGNUM,
316 X86_RECORD_RESP_REGNUM,
317 X86_RECORD_REBP_REGNUM,
318 X86_RECORD_RESI_REGNUM,
319 X86_RECORD_REDI_REGNUM,
320 X86_RECORD_R8_REGNUM,
321 X86_RECORD_R9_REGNUM,
322 X86_RECORD_R10_REGNUM,
323 X86_RECORD_R11_REGNUM,
324 X86_RECORD_R12_REGNUM,
325 X86_RECORD_R13_REGNUM,
326 X86_RECORD_R14_REGNUM,
327 X86_RECORD_R15_REGNUM,
328 X86_RECORD_REIP_REGNUM,
329 X86_RECORD_EFLAGS_REGNUM,
330 X86_RECORD_CS_REGNUM,
331 X86_RECORD_SS_REGNUM,
332 X86_RECORD_DS_REGNUM,
333 X86_RECORD_ES_REGNUM,
334 X86_RECORD_FS_REGNUM,
335 X86_RECORD_GS_REGNUM,
336 };
337
338 #define I386_NUM_GREGS 16
339 #define I386_NUM_XREGS 9
340
341 #define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
342 #define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
343 #define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1)
344 #define I386_AVX512_NUM_REGS (I386_ZMM7H_REGNUM + 1)
345 #define I386_PKEYS_NUM_REGS (I386_PKRU_REGNUM + 1)
346 #define I386_NUM_REGS (I386_GSBASE_REGNUM + 1)
347
348 /* Size of the largest register. */
349 #define I386_MAX_REGISTER_SIZE 64
350
351 /* Types for i386-specific registers. */
352 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
353
354 /* Checks of different pseudo-registers. */
355 extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
356 extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
357 extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
358 extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
359 extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum);
360 extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
361 extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum);
362 extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
363 extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum);
364 extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum);
365 extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum);
366 extern bool i386_pkru_regnum_p (struct gdbarch *gdbarch, int regnum);
367
368 extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
369 int regnum);
370 extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
371 int regnum);
372
373 extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
374 readable_regcache *regcache,
375 int regnum,
376 struct value *result);
377
378 extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
379 struct regcache *regcache,
380 int regnum, const gdb_byte *buf);
381
382 extern int i386_ax_pseudo_register_collect (struct gdbarch *gdbarch,
383 struct agent_expr *ax,
384 int regnum);
385
386 /* Segment selectors. */
387 #define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
388 #define I386_SEL_UPL 0x0003 /* User Privilige Level. */
389 #define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
390
391 /* The length of the longest i386 instruction (according to
392 include/asm-i386/kprobes.h in Linux 2.6. */
393 #define I386_MAX_INSN_LEN (16)
394
395 /* Functions exported from i386-tdep.c. */
396 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
397 CORE_ADDR pc, char *name);
398 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
399 CORE_ADDR pc);
400
401 /* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
402 extern int i386_sigtramp_p (struct frame_info *this_frame);
403
404 /* Return non-zero if REGNUM is a member of the specified group. */
405 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
406 struct reggroup *group);
407
408 /* Supply register REGNUM from the general-purpose register set REGSET
409 to register cache REGCACHE. If REGNUM is -1, do this for all
410 registers in REGSET. */
411 extern void i386_supply_gregset (const struct regset *regset,
412 struct regcache *regcache, int regnum,
413 const void *gregs, size_t len);
414
415 /* General-purpose register set. */
416 extern const struct regset i386_gregset;
417
418 /* Floating-point register set. */
419 extern const struct regset i386_fpregset;
420
421 /* Default iterator over core file register note sections. */
422 extern void
423 i386_iterate_over_regset_sections (struct gdbarch *gdbarch,
424 iterate_over_regset_sections_cb *cb,
425 void *cb_data,
426 const struct regcache *regcache);
427
428 typedef buf_displaced_step_closure i386_displaced_step_closure;
429
430 extern struct displaced_step_closure *i386_displaced_step_copy_insn
431 (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
432 struct regcache *regs);
433 extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
434 struct displaced_step_closure *closure,
435 CORE_ADDR from, CORE_ADDR to,
436 struct regcache *regs);
437
438 /* Initialize a basic ELF architecture variant. */
439 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
440
441 /* Initialize a SVR4 architecture variant. */
442 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
443
444 /* Convert SVR4 register number REG to the appropriate register number
445 used by GDB. */
446 extern int i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg);
447
448 extern int i386_process_record (struct gdbarch *gdbarch,
449 struct regcache *regcache, CORE_ADDR addr);
450 extern const struct target_desc *i386_target_description (uint64_t xcr0,
451 bool segments);
452
453 /* Return true iff the current target is MPX enabled. */
454 extern int i386_mpx_enabled (void);
455 \f
456
457 /* Functions and variables exported from i386-bsd-tdep.c. */
458
459 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
460 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
461 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
462 extern CORE_ADDR i386obsd_sigtramp_start_addr;
463 extern CORE_ADDR i386obsd_sigtramp_end_addr;
464 extern int i386fbsd4_sc_reg_offset[];
465 extern int i386fbsd_sc_reg_offset[];
466 extern int i386nbsd_sc_reg_offset[];
467 extern int i386obsd_sc_reg_offset[];
468 extern int i386bsd_sc_reg_offset[];
469
470 /* SystemTap related functions. */
471
472 extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
473 const char *s);
474
475 extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
476 struct stap_parse_info *p);
477
478 #endif /* i386-tdep.h */
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