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[deliverable/binutils-gdb.git] / gdb / i387-tdep.c
1 /* Intel 387 floating point stuff.
2
3 Copyright (C) 1988-1989, 1991-1994, 1998-2005, 2007-2012 Free
4 Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "defs.h"
22 #include "doublest.h"
23 #include "floatformat.h"
24 #include "frame.h"
25 #include "gdbcore.h"
26 #include "inferior.h"
27 #include "language.h"
28 #include "regcache.h"
29 #include "value.h"
30
31 #include "gdb_assert.h"
32 #include "gdb_string.h"
33
34 #include "i386-tdep.h"
35 #include "i387-tdep.h"
36 #include "i386-xstate.h"
37
38 /* Print the floating point number specified by RAW. */
39
40 static void
41 print_i387_value (struct gdbarch *gdbarch,
42 const gdb_byte *raw, struct ui_file *file)
43 {
44 DOUBLEST value;
45
46 /* Using extract_typed_floating here might affect the representation
47 of certain numbers such as NaNs, even if GDB is running natively.
48 This is fine since our caller already detects such special
49 numbers and we print the hexadecimal representation anyway. */
50 value = extract_typed_floating (raw, i387_ext_type (gdbarch));
51
52 /* We try to print 19 digits. The last digit may or may not contain
53 garbage, but we'd better print one too many. We need enough room
54 to print the value, 1 position for the sign, 1 for the decimal
55 point, 19 for the digits and 6 for the exponent adds up to 27. */
56 #ifdef PRINTF_HAS_LONG_DOUBLE
57 fprintf_filtered (file, " %-+27.19Lg", (long double) value);
58 #else
59 fprintf_filtered (file, " %-+27.19g", (double) value);
60 #endif
61 }
62
63 /* Print the classification for the register contents RAW. */
64
65 static void
66 print_i387_ext (struct gdbarch *gdbarch,
67 const gdb_byte *raw, struct ui_file *file)
68 {
69 int sign;
70 int integer;
71 unsigned int exponent;
72 unsigned long fraction[2];
73
74 sign = raw[9] & 0x80;
75 integer = raw[7] & 0x80;
76 exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
77 fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
78 fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
79 | (raw[5] << 8) | raw[4]);
80
81 if (exponent == 0x7fff && integer)
82 {
83 if (fraction[0] == 0x00000000 && fraction[1] == 0x00000000)
84 /* Infinity. */
85 fprintf_filtered (file, " %cInf", (sign ? '-' : '+'));
86 else if (sign && fraction[0] == 0x00000000 && fraction[1] == 0x40000000)
87 /* Real Indefinite (QNaN). */
88 fputs_unfiltered (" Real Indefinite (QNaN)", file);
89 else if (fraction[1] & 0x40000000)
90 /* QNaN. */
91 fputs_filtered (" QNaN", file);
92 else
93 /* SNaN. */
94 fputs_filtered (" SNaN", file);
95 }
96 else if (exponent < 0x7fff && exponent > 0x0000 && integer)
97 /* Normal. */
98 print_i387_value (gdbarch, raw, file);
99 else if (exponent == 0x0000)
100 {
101 /* Denormal or zero. */
102 print_i387_value (gdbarch, raw, file);
103
104 if (integer)
105 /* Pseudo-denormal. */
106 fputs_filtered (" Pseudo-denormal", file);
107 else if (fraction[0] || fraction[1])
108 /* Denormal. */
109 fputs_filtered (" Denormal", file);
110 }
111 else
112 /* Unsupported. */
113 fputs_filtered (" Unsupported", file);
114 }
115
116 /* Print the status word STATUS. If STATUS_P is false, then STATUS
117 was unavailable. */
118
119 static void
120 print_i387_status_word (int status_p,
121 unsigned int status, struct ui_file *file)
122 {
123 fprintf_filtered (file, "Status Word: ");
124 if (!status_p)
125 {
126 fprintf_filtered (file, "%s\n", _("<unavailable>"));
127 return;
128 }
129
130 fprintf_filtered (file, "%s", hex_string_custom (status, 4));
131 fputs_filtered (" ", file);
132 fprintf_filtered (file, " %s", (status & 0x0001) ? "IE" : " ");
133 fprintf_filtered (file, " %s", (status & 0x0002) ? "DE" : " ");
134 fprintf_filtered (file, " %s", (status & 0x0004) ? "ZE" : " ");
135 fprintf_filtered (file, " %s", (status & 0x0008) ? "OE" : " ");
136 fprintf_filtered (file, " %s", (status & 0x0010) ? "UE" : " ");
137 fprintf_filtered (file, " %s", (status & 0x0020) ? "PE" : " ");
138 fputs_filtered (" ", file);
139 fprintf_filtered (file, " %s", (status & 0x0080) ? "ES" : " ");
140 fputs_filtered (" ", file);
141 fprintf_filtered (file, " %s", (status & 0x0040) ? "SF" : " ");
142 fputs_filtered (" ", file);
143 fprintf_filtered (file, " %s", (status & 0x0100) ? "C0" : " ");
144 fprintf_filtered (file, " %s", (status & 0x0200) ? "C1" : " ");
145 fprintf_filtered (file, " %s", (status & 0x0400) ? "C2" : " ");
146 fprintf_filtered (file, " %s", (status & 0x4000) ? "C3" : " ");
147
148 fputs_filtered ("\n", file);
149
150 fprintf_filtered (file,
151 " TOP: %d\n", ((status >> 11) & 7));
152 }
153
154 /* Print the control word CONTROL. If CONTROL_P is false, then
155 CONTROL was unavailable. */
156
157 static void
158 print_i387_control_word (int control_p,
159 unsigned int control, struct ui_file *file)
160 {
161 fprintf_filtered (file, "Control Word: ");
162 if (!control_p)
163 {
164 fprintf_filtered (file, "%s\n", _("<unavailable>"));
165 return;
166 }
167
168 fprintf_filtered (file, "%s", hex_string_custom (control, 4));
169 fputs_filtered (" ", file);
170 fprintf_filtered (file, " %s", (control & 0x0001) ? "IM" : " ");
171 fprintf_filtered (file, " %s", (control & 0x0002) ? "DM" : " ");
172 fprintf_filtered (file, " %s", (control & 0x0004) ? "ZM" : " ");
173 fprintf_filtered (file, " %s", (control & 0x0008) ? "OM" : " ");
174 fprintf_filtered (file, " %s", (control & 0x0010) ? "UM" : " ");
175 fprintf_filtered (file, " %s", (control & 0x0020) ? "PM" : " ");
176
177 fputs_filtered ("\n", file);
178
179 fputs_filtered (" PC: ", file);
180 switch ((control >> 8) & 3)
181 {
182 case 0:
183 fputs_filtered ("Single Precision (24-bits)\n", file);
184 break;
185 case 1:
186 fputs_filtered ("Reserved\n", file);
187 break;
188 case 2:
189 fputs_filtered ("Double Precision (53-bits)\n", file);
190 break;
191 case 3:
192 fputs_filtered ("Extended Precision (64-bits)\n", file);
193 break;
194 }
195
196 fputs_filtered (" RC: ", file);
197 switch ((control >> 10) & 3)
198 {
199 case 0:
200 fputs_filtered ("Round to nearest\n", file);
201 break;
202 case 1:
203 fputs_filtered ("Round down\n", file);
204 break;
205 case 2:
206 fputs_filtered ("Round up\n", file);
207 break;
208 case 3:
209 fputs_filtered ("Round toward zero\n", file);
210 break;
211 }
212 }
213
214 /* Print out the i387 floating point state. Note that we ignore FRAME
215 in the code below. That's OK since floating-point registers are
216 never saved on the stack. */
217
218 void
219 i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
220 struct frame_info *frame, const char *args)
221 {
222 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
223 ULONGEST fctrl;
224 int fctrl_p;
225 ULONGEST fstat;
226 int fstat_p;
227 ULONGEST ftag;
228 int ftag_p;
229 ULONGEST fiseg;
230 int fiseg_p;
231 ULONGEST fioff;
232 int fioff_p;
233 ULONGEST foseg;
234 int foseg_p;
235 ULONGEST fooff;
236 int fooff_p;
237 ULONGEST fop;
238 int fop_p;
239 int fpreg;
240 int fpreg_p;
241 int top;
242 int top_p;
243
244 gdb_assert (gdbarch == get_frame_arch (frame));
245
246 fctrl_p = read_frame_register_unsigned (frame,
247 I387_FCTRL_REGNUM (tdep), &fctrl);
248 fstat_p = read_frame_register_unsigned (frame,
249 I387_FSTAT_REGNUM (tdep), &fstat);
250 ftag_p = read_frame_register_unsigned (frame,
251 I387_FTAG_REGNUM (tdep), &ftag);
252 fiseg_p = read_frame_register_unsigned (frame,
253 I387_FISEG_REGNUM (tdep), &fiseg);
254 fioff_p = read_frame_register_unsigned (frame,
255 I387_FIOFF_REGNUM (tdep), &fioff);
256 foseg_p = read_frame_register_unsigned (frame,
257 I387_FOSEG_REGNUM (tdep), &foseg);
258 fooff_p = read_frame_register_unsigned (frame,
259 I387_FOOFF_REGNUM (tdep), &fooff);
260 fop_p = read_frame_register_unsigned (frame,
261 I387_FOP_REGNUM (tdep), &fop);
262
263 if (fstat_p)
264 {
265 top = ((fstat >> 11) & 7);
266
267 for (fpreg = 7; fpreg >= 0; fpreg--)
268 {
269 struct value *regval;
270 int regnum;
271 int i;
272 int tag = -1;
273
274 fprintf_filtered (file, "%sR%d: ", fpreg == top ? "=>" : " ", fpreg);
275
276 if (ftag_p)
277 {
278 tag = (ftag >> (fpreg * 2)) & 3;
279
280 switch (tag)
281 {
282 case 0:
283 fputs_filtered ("Valid ", file);
284 break;
285 case 1:
286 fputs_filtered ("Zero ", file);
287 break;
288 case 2:
289 fputs_filtered ("Special ", file);
290 break;
291 case 3:
292 fputs_filtered ("Empty ", file);
293 break;
294 }
295 }
296 else
297 fputs_filtered ("Unknown ", file);
298
299 regnum = (fpreg + 8 - top) % 8 + I387_ST0_REGNUM (tdep);
300 regval = get_frame_register_value (frame, regnum);
301
302 if (value_entirely_available (regval))
303 {
304 const char *raw = value_contents (regval);
305
306 fputs_filtered ("0x", file);
307 for (i = 9; i >= 0; i--)
308 fprintf_filtered (file, "%02x", raw[i]);
309
310 if (tag != -1 && tag != 3)
311 print_i387_ext (gdbarch, raw, file);
312 }
313 else
314 fprintf_filtered (file, "%s", _("<unavailable>"));
315
316 fputs_filtered ("\n", file);
317 }
318 }
319
320 fputs_filtered ("\n", file);
321 print_i387_status_word (fstat_p, fstat, file);
322 print_i387_control_word (fctrl_p, fctrl, file);
323 fprintf_filtered (file, "Tag Word: %s\n",
324 ftag_p ? hex_string_custom (ftag, 4) : _("<unavailable>"));
325 fprintf_filtered (file, "Instruction Pointer: %s:",
326 fiseg_p ? hex_string_custom (fiseg, 2) : _("<unavailable>"));
327 fprintf_filtered (file, "%s\n",
328 fioff_p ? hex_string_custom (fioff, 8) : _("<unavailable>"));
329 fprintf_filtered (file, "Operand Pointer: %s:",
330 foseg_p ? hex_string_custom (foseg, 2) : _("<unavailable>"));
331 fprintf_filtered (file, "%s\n",
332 fooff_p ? hex_string_custom (fooff, 8) : _("<unavailable>"));
333 fprintf_filtered (file, "Opcode: %s\n",
334 fop_p
335 ? (hex_string_custom (fop ? (fop | 0xd800) : 0, 4))
336 : _("<unavailable>"));
337 }
338 \f
339
340 /* Return nonzero if a value of type TYPE stored in register REGNUM
341 needs any special handling. */
342
343 int
344 i387_convert_register_p (struct gdbarch *gdbarch, int regnum,
345 struct type *type)
346 {
347 if (i386_fp_regnum_p (gdbarch, regnum))
348 {
349 /* Floating point registers must be converted unless we are
350 accessing them in their hardware type. */
351 if (type == i387_ext_type (gdbarch))
352 return 0;
353 else
354 return 1;
355 }
356
357 return 0;
358 }
359
360 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
361 return its contents in TO. */
362
363 int
364 i387_register_to_value (struct frame_info *frame, int regnum,
365 struct type *type, gdb_byte *to,
366 int *optimizedp, int *unavailablep)
367 {
368 struct gdbarch *gdbarch = get_frame_arch (frame);
369 gdb_byte from[I386_MAX_REGISTER_SIZE];
370
371 gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
372
373 /* We only support floating-point values. */
374 if (TYPE_CODE (type) != TYPE_CODE_FLT)
375 {
376 warning (_("Cannot convert floating-point register value "
377 "to non-floating-point type."));
378 *optimizedp = *unavailablep = 0;
379 return 0;
380 }
381
382 /* Convert to TYPE. */
383 if (!get_frame_register_bytes (frame, regnum, 0, TYPE_LENGTH (type),
384 from, optimizedp, unavailablep))
385 return 0;
386
387 convert_typed_floating (from, i387_ext_type (gdbarch), to, type);
388 *optimizedp = *unavailablep = 0;
389 return 1;
390 }
391
392 /* Write the contents FROM of a value of type TYPE into register
393 REGNUM in frame FRAME. */
394
395 void
396 i387_value_to_register (struct frame_info *frame, int regnum,
397 struct type *type, const gdb_byte *from)
398 {
399 struct gdbarch *gdbarch = get_frame_arch (frame);
400 gdb_byte to[I386_MAX_REGISTER_SIZE];
401
402 gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
403
404 /* We only support floating-point values. */
405 if (TYPE_CODE (type) != TYPE_CODE_FLT)
406 {
407 warning (_("Cannot convert non-floating-point type "
408 "to floating-point register value."));
409 return;
410 }
411
412 /* Convert from TYPE. */
413 convert_typed_floating (from, type, to, i387_ext_type (gdbarch));
414 put_frame_register (frame, regnum, to);
415 }
416 \f
417
418 /* Handle FSAVE and FXSAVE formats. */
419
420 /* At fsave_offset[REGNUM] you'll find the offset to the location in
421 the data structure used by the "fsave" instruction where GDB
422 register REGNUM is stored. */
423
424 static int fsave_offset[] =
425 {
426 28 + 0 * 10, /* %st(0) ... */
427 28 + 1 * 10,
428 28 + 2 * 10,
429 28 + 3 * 10,
430 28 + 4 * 10,
431 28 + 5 * 10,
432 28 + 6 * 10,
433 28 + 7 * 10, /* ... %st(7). */
434 0, /* `fctrl' (16 bits). */
435 4, /* `fstat' (16 bits). */
436 8, /* `ftag' (16 bits). */
437 16, /* `fiseg' (16 bits). */
438 12, /* `fioff'. */
439 24, /* `foseg' (16 bits). */
440 20, /* `fooff'. */
441 18 /* `fop' (bottom 11 bits). */
442 };
443
444 #define FSAVE_ADDR(tdep, fsave, regnum) \
445 (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
446 \f
447
448 /* Fill register REGNUM in REGCACHE with the appropriate value from
449 *FSAVE. This function masks off any of the reserved bits in
450 *FSAVE. */
451
452 void
453 i387_supply_fsave (struct regcache *regcache, int regnum, const void *fsave)
454 {
455 struct gdbarch *gdbarch = get_regcache_arch (regcache);
456 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
457 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
458 const gdb_byte *regs = fsave;
459 int i;
460
461 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
462
463 for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
464 if (regnum == -1 || regnum == i)
465 {
466 if (fsave == NULL)
467 {
468 regcache_raw_supply (regcache, i, NULL);
469 continue;
470 }
471
472 /* Most of the FPU control registers occupy only 16 bits in the
473 fsave area. Give those a special treatment. */
474 if (i >= I387_FCTRL_REGNUM (tdep)
475 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
476 {
477 gdb_byte val[4];
478
479 memcpy (val, FSAVE_ADDR (tdep, regs, i), 2);
480 val[2] = val[3] = 0;
481 if (i == I387_FOP_REGNUM (tdep))
482 val[1] &= ((1 << 3) - 1);
483 regcache_raw_supply (regcache, i, val);
484 }
485 else
486 regcache_raw_supply (regcache, i, FSAVE_ADDR (tdep, regs, i));
487 }
488
489 /* Provide dummy values for the SSE registers. */
490 for (i = I387_XMM0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
491 if (regnum == -1 || regnum == i)
492 regcache_raw_supply (regcache, i, NULL);
493 if (regnum == -1 || regnum == I387_MXCSR_REGNUM (tdep))
494 {
495 gdb_byte buf[4];
496
497 store_unsigned_integer (buf, 4, byte_order, 0x1f80);
498 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf);
499 }
500 }
501
502 /* Fill register REGNUM (if it is a floating-point register) in *FSAVE
503 with the value from REGCACHE. If REGNUM is -1, do this for all
504 registers. This function doesn't touch any of the reserved bits in
505 *FSAVE. */
506
507 void
508 i387_collect_fsave (const struct regcache *regcache, int regnum, void *fsave)
509 {
510 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
511 gdb_byte *regs = fsave;
512 int i;
513
514 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
515
516 for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
517 if (regnum == -1 || regnum == i)
518 {
519 /* Most of the FPU control registers occupy only 16 bits in
520 the fsave area. Give those a special treatment. */
521 if (i >= I387_FCTRL_REGNUM (tdep)
522 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
523 {
524 gdb_byte buf[4];
525
526 regcache_raw_collect (regcache, i, buf);
527
528 if (i == I387_FOP_REGNUM (tdep))
529 {
530 /* The opcode occupies only 11 bits. Make sure we
531 don't touch the other bits. */
532 buf[1] &= ((1 << 3) - 1);
533 buf[1] |= ((FSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
534 }
535 memcpy (FSAVE_ADDR (tdep, regs, i), buf, 2);
536 }
537 else
538 regcache_raw_collect (regcache, i, FSAVE_ADDR (tdep, regs, i));
539 }
540 }
541 \f
542
543 /* At fxsave_offset[REGNUM] you'll find the offset to the location in
544 the data structure used by the "fxsave" instruction where GDB
545 register REGNUM is stored. */
546
547 static int fxsave_offset[] =
548 {
549 32, /* %st(0) through ... */
550 48,
551 64,
552 80,
553 96,
554 112,
555 128,
556 144, /* ... %st(7) (80 bits each). */
557 0, /* `fctrl' (16 bits). */
558 2, /* `fstat' (16 bits). */
559 4, /* `ftag' (16 bits). */
560 12, /* `fiseg' (16 bits). */
561 8, /* `fioff'. */
562 20, /* `foseg' (16 bits). */
563 16, /* `fooff'. */
564 6, /* `fop' (bottom 11 bits). */
565 160 + 0 * 16, /* %xmm0 through ... */
566 160 + 1 * 16,
567 160 + 2 * 16,
568 160 + 3 * 16,
569 160 + 4 * 16,
570 160 + 5 * 16,
571 160 + 6 * 16,
572 160 + 7 * 16,
573 160 + 8 * 16,
574 160 + 9 * 16,
575 160 + 10 * 16,
576 160 + 11 * 16,
577 160 + 12 * 16,
578 160 + 13 * 16,
579 160 + 14 * 16,
580 160 + 15 * 16, /* ... %xmm15 (128 bits each). */
581 };
582
583 #define FXSAVE_ADDR(tdep, fxsave, regnum) \
584 (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
585
586 /* We made an unfortunate choice in putting %mxcsr after the SSE
587 registers %xmm0-%xmm7 instead of before, since it makes supporting
588 the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we
589 don't include the offset for %mxcsr here above. */
590
591 #define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24)
592
593 static int i387_tag (const gdb_byte *raw);
594 \f
595
596 /* Fill register REGNUM in REGCACHE with the appropriate
597 floating-point or SSE register value from *FXSAVE. This function
598 masks off any of the reserved bits in *FXSAVE. */
599
600 void
601 i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave)
602 {
603 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
604 const gdb_byte *regs = fxsave;
605 int i;
606
607 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
608 gdb_assert (tdep->num_xmm_regs > 0);
609
610 for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
611 if (regnum == -1 || regnum == i)
612 {
613 if (regs == NULL)
614 {
615 regcache_raw_supply (regcache, i, NULL);
616 continue;
617 }
618
619 /* Most of the FPU control registers occupy only 16 bits in
620 the fxsave area. Give those a special treatment. */
621 if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
622 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
623 {
624 gdb_byte val[4];
625
626 memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
627 val[2] = val[3] = 0;
628 if (i == I387_FOP_REGNUM (tdep))
629 val[1] &= ((1 << 3) - 1);
630 else if (i== I387_FTAG_REGNUM (tdep))
631 {
632 /* The fxsave area contains a simplified version of
633 the tag word. We have to look at the actual 80-bit
634 FP data to recreate the traditional i387 tag word. */
635
636 unsigned long ftag = 0;
637 int fpreg;
638 int top;
639
640 top = ((FXSAVE_ADDR (tdep, regs,
641 I387_FSTAT_REGNUM (tdep)))[1] >> 3);
642 top &= 0x7;
643
644 for (fpreg = 7; fpreg >= 0; fpreg--)
645 {
646 int tag;
647
648 if (val[0] & (1 << fpreg))
649 {
650 int thisreg = (fpreg + 8 - top) % 8
651 + I387_ST0_REGNUM (tdep);
652 tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg));
653 }
654 else
655 tag = 3; /* Empty */
656
657 ftag |= tag << (2 * fpreg);
658 }
659 val[0] = ftag & 0xff;
660 val[1] = (ftag >> 8) & 0xff;
661 }
662 regcache_raw_supply (regcache, i, val);
663 }
664 else
665 regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
666 }
667
668 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
669 {
670 if (regs == NULL)
671 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), NULL);
672 else
673 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep),
674 FXSAVE_MXCSR_ADDR (regs));
675 }
676 }
677
678 /* Fill register REGNUM (if it is a floating-point or SSE register) in
679 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
680 all registers. This function doesn't touch any of the reserved
681 bits in *FXSAVE. */
682
683 void
684 i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave)
685 {
686 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
687 gdb_byte *regs = fxsave;
688 int i;
689
690 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
691 gdb_assert (tdep->num_xmm_regs > 0);
692
693 for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
694 if (regnum == -1 || regnum == i)
695 {
696 /* Most of the FPU control registers occupy only 16 bits in
697 the fxsave area. Give those a special treatment. */
698 if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
699 && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
700 {
701 gdb_byte buf[4];
702
703 regcache_raw_collect (regcache, i, buf);
704
705 if (i == I387_FOP_REGNUM (tdep))
706 {
707 /* The opcode occupies only 11 bits. Make sure we
708 don't touch the other bits. */
709 buf[1] &= ((1 << 3) - 1);
710 buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
711 }
712 else if (i == I387_FTAG_REGNUM (tdep))
713 {
714 /* Converting back is much easier. */
715
716 unsigned short ftag;
717 int fpreg;
718
719 ftag = (buf[1] << 8) | buf[0];
720 buf[0] = 0;
721 buf[1] = 0;
722
723 for (fpreg = 7; fpreg >= 0; fpreg--)
724 {
725 int tag = (ftag >> (fpreg * 2)) & 3;
726
727 if (tag != 3)
728 buf[0] |= (1 << fpreg);
729 }
730 }
731 memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
732 }
733 else
734 regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
735 }
736
737 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
738 regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
739 FXSAVE_MXCSR_ADDR (regs));
740 }
741
742 /* `xstate_bv' is at byte offset 512. */
743 #define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512)
744
745 /* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in
746 the upper 128bit of AVX register data structure used by the "xsave"
747 instruction where GDB register REGNUM is stored. */
748
749 static int xsave_avxh_offset[] =
750 {
751 576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */
752 576 + 1 * 16,
753 576 + 2 * 16,
754 576 + 3 * 16,
755 576 + 4 * 16,
756 576 + 5 * 16,
757 576 + 6 * 16,
758 576 + 7 * 16,
759 576 + 8 * 16,
760 576 + 9 * 16,
761 576 + 10 * 16,
762 576 + 11 * 16,
763 576 + 12 * 16,
764 576 + 13 * 16,
765 576 + 14 * 16,
766 576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
767 };
768
769 #define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
770 (xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
771
772 /* Similar to i387_supply_fxsave, but use XSAVE extended state. */
773
774 void
775 i387_supply_xsave (struct regcache *regcache, int regnum,
776 const void *xsave)
777 {
778 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
779 const gdb_byte *regs = xsave;
780 int i;
781 unsigned int clear_bv;
782 static const gdb_byte zero[MAX_REGISTER_SIZE] = { 0 };
783 const gdb_byte *p;
784 enum
785 {
786 none = 0x0,
787 x87 = 0x1,
788 sse = 0x2,
789 avxh = 0x4,
790 all = x87 | sse | avxh
791 } regclass;
792
793 gdb_assert (regs != NULL);
794 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
795 gdb_assert (tdep->num_xmm_regs > 0);
796
797 if (regnum == -1)
798 regclass = all;
799 else if (regnum >= I387_YMM0H_REGNUM (tdep)
800 && regnum < I387_YMMENDH_REGNUM (tdep))
801 regclass = avxh;
802 else if (regnum >= I387_XMM0_REGNUM(tdep)
803 && regnum < I387_MXCSR_REGNUM (tdep))
804 regclass = sse;
805 else if (regnum >= I387_ST0_REGNUM (tdep)
806 && regnum < I387_FCTRL_REGNUM (tdep))
807 regclass = x87;
808 else
809 regclass = none;
810
811 if (regclass != none)
812 {
813 /* Get `xstat_bv'. */
814 const gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
815
816 /* The supported bits in `xstat_bv' are 1 byte. Clear part in
817 vector registers if its bit in xstat_bv is zero. */
818 clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
819 }
820 else
821 clear_bv = I386_XSTATE_AVX_MASK;
822
823 /* With the delayed xsave mechanism, in between the program
824 starting, and the program accessing the vector registers for the
825 first time, the register's values are invalid. The kernel
826 initializes register states to zero when they are set the first
827 time in a program. This means that from the user-space programs'
828 perspective, it's the same as if the registers have always been
829 zero from the start of the program. Therefore, the debugger
830 should provide the same illusion to the user. */
831
832 switch (regclass)
833 {
834 case none:
835 break;
836
837 case avxh:
838 if ((clear_bv & I386_XSTATE_AVX))
839 regcache_raw_supply (regcache, regnum, zero);
840 else
841 regcache_raw_supply (regcache, regnum,
842 XSAVE_AVXH_ADDR (tdep, regs, regnum));
843 return;
844
845 case sse:
846 if ((clear_bv & I386_XSTATE_SSE))
847 regcache_raw_supply (regcache, regnum, zero);
848 else
849 regcache_raw_supply (regcache, regnum,
850 FXSAVE_ADDR (tdep, regs, regnum));
851 return;
852
853 case x87:
854 if ((clear_bv & I386_XSTATE_X87))
855 regcache_raw_supply (regcache, regnum, zero);
856 else
857 regcache_raw_supply (regcache, regnum,
858 FXSAVE_ADDR (tdep, regs, regnum));
859 return;
860
861 case all:
862 /* Handle the upper YMM registers. */
863 if ((tdep->xcr0 & I386_XSTATE_AVX))
864 {
865 if ((clear_bv & I386_XSTATE_AVX))
866 {
867 for (i = I387_YMM0H_REGNUM (tdep);
868 i < I387_YMMENDH_REGNUM (tdep);
869 i++)
870 regcache_raw_supply (regcache, i, zero);
871 }
872 else
873 {
874 for (i = I387_YMM0H_REGNUM (tdep);
875 i < I387_YMMENDH_REGNUM (tdep);
876 i++)
877 regcache_raw_supply (regcache, i,
878 XSAVE_AVXH_ADDR (tdep, regs, i));
879 }
880 }
881
882 /* Handle the XMM registers. */
883 if ((tdep->xcr0 & I386_XSTATE_SSE))
884 {
885 if ((clear_bv & I386_XSTATE_SSE))
886 {
887 for (i = I387_XMM0_REGNUM (tdep);
888 i < I387_MXCSR_REGNUM (tdep);
889 i++)
890 regcache_raw_supply (regcache, i, zero);
891 }
892 else
893 {
894 for (i = I387_XMM0_REGNUM (tdep);
895 i < I387_MXCSR_REGNUM (tdep); i++)
896 regcache_raw_supply (regcache, i,
897 FXSAVE_ADDR (tdep, regs, i));
898 }
899 }
900
901 /* Handle the x87 registers. */
902 if ((tdep->xcr0 & I386_XSTATE_X87))
903 {
904 if ((clear_bv & I386_XSTATE_X87))
905 {
906 for (i = I387_ST0_REGNUM (tdep);
907 i < I387_FCTRL_REGNUM (tdep);
908 i++)
909 regcache_raw_supply (regcache, i, zero);
910 }
911 else
912 {
913 for (i = I387_ST0_REGNUM (tdep);
914 i < I387_FCTRL_REGNUM (tdep);
915 i++)
916 regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
917 }
918 }
919 break;
920 }
921
922 /* Only handle x87 control registers. */
923 for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
924 if (regnum == -1 || regnum == i)
925 {
926 /* Most of the FPU control registers occupy only 16 bits in
927 the xsave extended state. Give those a special treatment. */
928 if (i != I387_FIOFF_REGNUM (tdep)
929 && i != I387_FOOFF_REGNUM (tdep))
930 {
931 gdb_byte val[4];
932
933 memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
934 val[2] = val[3] = 0;
935 if (i == I387_FOP_REGNUM (tdep))
936 val[1] &= ((1 << 3) - 1);
937 else if (i== I387_FTAG_REGNUM (tdep))
938 {
939 /* The fxsave area contains a simplified version of
940 the tag word. We have to look at the actual 80-bit
941 FP data to recreate the traditional i387 tag word. */
942
943 unsigned long ftag = 0;
944 int fpreg;
945 int top;
946
947 top = ((FXSAVE_ADDR (tdep, regs,
948 I387_FSTAT_REGNUM (tdep)))[1] >> 3);
949 top &= 0x7;
950
951 for (fpreg = 7; fpreg >= 0; fpreg--)
952 {
953 int tag;
954
955 if (val[0] & (1 << fpreg))
956 {
957 int thisreg = (fpreg + 8 - top) % 8
958 + I387_ST0_REGNUM (tdep);
959 tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg));
960 }
961 else
962 tag = 3; /* Empty */
963
964 ftag |= tag << (2 * fpreg);
965 }
966 val[0] = ftag & 0xff;
967 val[1] = (ftag >> 8) & 0xff;
968 }
969 regcache_raw_supply (regcache, i, val);
970 }
971 else
972 regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
973 }
974
975 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
976 regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep),
977 FXSAVE_MXCSR_ADDR (regs));
978 }
979
980 /* Similar to i387_collect_fxsave, but use XSAVE extended state. */
981
982 void
983 i387_collect_xsave (const struct regcache *regcache, int regnum,
984 void *xsave, int gcore)
985 {
986 struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
987 gdb_byte *regs = xsave;
988 int i;
989 enum
990 {
991 none = 0x0,
992 check = 0x1,
993 x87 = 0x2 | check,
994 sse = 0x4 | check,
995 avxh = 0x8 | check,
996 all = x87 | sse | avxh
997 } regclass;
998
999 gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
1000 gdb_assert (tdep->num_xmm_regs > 0);
1001
1002 if (regnum == -1)
1003 regclass = all;
1004 else if (regnum >= I387_YMM0H_REGNUM (tdep)
1005 && regnum < I387_YMMENDH_REGNUM (tdep))
1006 regclass = avxh;
1007 else if (regnum >= I387_XMM0_REGNUM(tdep)
1008 && regnum < I387_MXCSR_REGNUM (tdep))
1009 regclass = sse;
1010 else if (regnum >= I387_ST0_REGNUM (tdep)
1011 && regnum < I387_FCTRL_REGNUM (tdep))
1012 regclass = x87;
1013 else
1014 regclass = none;
1015
1016 if (gcore)
1017 {
1018 /* Clear XSAVE extended state. */
1019 memset (regs, 0, I386_XSTATE_SIZE (tdep->xcr0));
1020
1021 /* Update XCR0 and `xstate_bv' with XCR0 for gcore. */
1022 if (tdep->xsave_xcr0_offset != -1)
1023 memcpy (regs + tdep->xsave_xcr0_offset, &tdep->xcr0, 8);
1024 memcpy (XSAVE_XSTATE_BV_ADDR (regs), &tdep->xcr0, 8);
1025 }
1026
1027 if ((regclass & check))
1028 {
1029 gdb_byte raw[I386_MAX_REGISTER_SIZE];
1030 gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
1031 unsigned int xstate_bv = 0;
1032 /* The supported bits in `xstat_bv' are 1 byte. */
1033 unsigned int clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
1034 gdb_byte *p;
1035
1036 /* Clear register set if its bit in xstat_bv is zero. */
1037 if (clear_bv)
1038 {
1039 if ((clear_bv & I386_XSTATE_AVX))
1040 for (i = I387_YMM0H_REGNUM (tdep);
1041 i < I387_YMMENDH_REGNUM (tdep); i++)
1042 memset (XSAVE_AVXH_ADDR (tdep, regs, i), 0, 16);
1043
1044 if ((clear_bv & I386_XSTATE_SSE))
1045 for (i = I387_XMM0_REGNUM (tdep);
1046 i < I387_MXCSR_REGNUM (tdep); i++)
1047 memset (FXSAVE_ADDR (tdep, regs, i), 0, 16);
1048
1049 if ((clear_bv & I386_XSTATE_X87))
1050 for (i = I387_ST0_REGNUM (tdep);
1051 i < I387_FCTRL_REGNUM (tdep); i++)
1052 memset (FXSAVE_ADDR (tdep, regs, i), 0, 10);
1053 }
1054
1055 if (regclass == all)
1056 {
1057 /* Check if any upper YMM registers are changed. */
1058 if ((tdep->xcr0 & I386_XSTATE_AVX))
1059 for (i = I387_YMM0H_REGNUM (tdep);
1060 i < I387_YMMENDH_REGNUM (tdep); i++)
1061 {
1062 regcache_raw_collect (regcache, i, raw);
1063 p = XSAVE_AVXH_ADDR (tdep, regs, i);
1064 if (memcmp (raw, p, 16))
1065 {
1066 xstate_bv |= I386_XSTATE_AVX;
1067 memcpy (p, raw, 16);
1068 }
1069 }
1070
1071 /* Check if any SSE registers are changed. */
1072 if ((tdep->xcr0 & I386_XSTATE_SSE))
1073 for (i = I387_XMM0_REGNUM (tdep);
1074 i < I387_MXCSR_REGNUM (tdep); i++)
1075 {
1076 regcache_raw_collect (regcache, i, raw);
1077 p = FXSAVE_ADDR (tdep, regs, i);
1078 if (memcmp (raw, p, 16))
1079 {
1080 xstate_bv |= I386_XSTATE_SSE;
1081 memcpy (p, raw, 16);
1082 }
1083 }
1084
1085 /* Check if any X87 registers are changed. */
1086 if ((tdep->xcr0 & I386_XSTATE_X87))
1087 for (i = I387_ST0_REGNUM (tdep);
1088 i < I387_FCTRL_REGNUM (tdep); i++)
1089 {
1090 regcache_raw_collect (regcache, i, raw);
1091 p = FXSAVE_ADDR (tdep, regs, i);
1092 if (memcmp (raw, p, 10))
1093 {
1094 xstate_bv |= I386_XSTATE_X87;
1095 memcpy (p, raw, 10);
1096 }
1097 }
1098 }
1099 else
1100 {
1101 /* Check if REGNUM is changed. */
1102 regcache_raw_collect (regcache, regnum, raw);
1103
1104 switch (regclass)
1105 {
1106 default:
1107 internal_error (__FILE__, __LINE__,
1108 _("invalid i387 regclass"));
1109
1110 case avxh:
1111 /* This is an upper YMM register. */
1112 p = XSAVE_AVXH_ADDR (tdep, regs, regnum);
1113 if (memcmp (raw, p, 16))
1114 {
1115 xstate_bv |= I386_XSTATE_AVX;
1116 memcpy (p, raw, 16);
1117 }
1118 break;
1119
1120 case sse:
1121 /* This is an SSE register. */
1122 p = FXSAVE_ADDR (tdep, regs, regnum);
1123 if (memcmp (raw, p, 16))
1124 {
1125 xstate_bv |= I386_XSTATE_SSE;
1126 memcpy (p, raw, 16);
1127 }
1128 break;
1129
1130 case x87:
1131 /* This is an x87 register. */
1132 p = FXSAVE_ADDR (tdep, regs, regnum);
1133 if (memcmp (raw, p, 10))
1134 {
1135 xstate_bv |= I386_XSTATE_X87;
1136 memcpy (p, raw, 10);
1137 }
1138 break;
1139 }
1140 }
1141
1142 /* Update the corresponding bits in `xstate_bv' if any SSE/AVX
1143 registers are changed. */
1144 if (xstate_bv)
1145 {
1146 /* The supported bits in `xstat_bv' are 1 byte. */
1147 *xstate_bv_p |= (gdb_byte) xstate_bv;
1148
1149 switch (regclass)
1150 {
1151 default:
1152 internal_error (__FILE__, __LINE__,
1153 _("invalid i387 regclass"));
1154
1155 case all:
1156 break;
1157
1158 case x87:
1159 case sse:
1160 case avxh:
1161 /* Register REGNUM has been updated. Return. */
1162 return;
1163 }
1164 }
1165 else
1166 {
1167 /* Return if REGNUM isn't changed. */
1168 if (regclass != all)
1169 return;
1170 }
1171 }
1172
1173 /* Only handle x87 control registers. */
1174 for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
1175 if (regnum == -1 || regnum == i)
1176 {
1177 /* Most of the FPU control registers occupy only 16 bits in
1178 the xsave extended state. Give those a special treatment. */
1179 if (i != I387_FIOFF_REGNUM (tdep)
1180 && i != I387_FOOFF_REGNUM (tdep))
1181 {
1182 gdb_byte buf[4];
1183
1184 regcache_raw_collect (regcache, i, buf);
1185
1186 if (i == I387_FOP_REGNUM (tdep))
1187 {
1188 /* The opcode occupies only 11 bits. Make sure we
1189 don't touch the other bits. */
1190 buf[1] &= ((1 << 3) - 1);
1191 buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
1192 }
1193 else if (i == I387_FTAG_REGNUM (tdep))
1194 {
1195 /* Converting back is much easier. */
1196
1197 unsigned short ftag;
1198 int fpreg;
1199
1200 ftag = (buf[1] << 8) | buf[0];
1201 buf[0] = 0;
1202 buf[1] = 0;
1203
1204 for (fpreg = 7; fpreg >= 0; fpreg--)
1205 {
1206 int tag = (ftag >> (fpreg * 2)) & 3;
1207
1208 if (tag != 3)
1209 buf[0] |= (1 << fpreg);
1210 }
1211 }
1212 memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
1213 }
1214 else
1215 regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
1216 }
1217
1218 if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
1219 regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
1220 FXSAVE_MXCSR_ADDR (regs));
1221 }
1222
1223 /* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
1224 *RAW. */
1225
1226 static int
1227 i387_tag (const gdb_byte *raw)
1228 {
1229 int integer;
1230 unsigned int exponent;
1231 unsigned long fraction[2];
1232
1233 integer = raw[7] & 0x80;
1234 exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
1235 fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
1236 fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
1237 | (raw[5] << 8) | raw[4]);
1238
1239 if (exponent == 0x7fff)
1240 {
1241 /* Special. */
1242 return (2);
1243 }
1244 else if (exponent == 0x0000)
1245 {
1246 if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer)
1247 {
1248 /* Zero. */
1249 return (1);
1250 }
1251 else
1252 {
1253 /* Special. */
1254 return (2);
1255 }
1256 }
1257 else
1258 {
1259 if (integer)
1260 {
1261 /* Valid. */
1262 return (0);
1263 }
1264 else
1265 {
1266 /* Special. */
1267 return (2);
1268 }
1269 }
1270 }
1271
1272 /* Prepare the FPU stack in REGCACHE for a function return. */
1273
1274 void
1275 i387_return_value (struct gdbarch *gdbarch, struct regcache *regcache)
1276 {
1277 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1278 ULONGEST fstat;
1279
1280 /* Set the top of the floating-point register stack to 7. The
1281 actual value doesn't really matter, but 7 is what a normal
1282 function return would end up with if the program started out with
1283 a freshly initialized FPU. */
1284 regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
1285 fstat |= (7 << 11);
1286 regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat);
1287
1288 /* Mark %st(1) through %st(7) as empty. Since we set the top of the
1289 floating-point register stack to 7, the appropriate value for the
1290 tag word is 0x3fff. */
1291 regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
1292
1293 }
GDB Binutils - Deliverables
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