1 /* Functions specific to running gdb native on IA-64 running
4 Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "gdb_string.h"
31 #include <sys/ptrace.h>
38 #include <asm/ptrace_offsets.h>
39 #include <sys/procfs.h>
41 /* Prototypes for supply_gregset etc. */
44 /* These must match the order of the register names.
46 Some sort of lookup table is needed because the offsets associated
47 with the registers are all over the board. */
49 static int u_offsets
[] =
51 /* general registers */
52 -1, /* gr0 not available; i.e, it's always zero */
84 /* gr32 through gr127 not directly available via the ptrace interface */
85 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
86 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
87 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
88 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
89 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
90 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
91 /* Floating point registers */
92 -1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */
219 /* predicate registers - we don't fetch these individually */
220 -1, -1, -1, -1, -1, -1, -1, -1,
221 -1, -1, -1, -1, -1, -1, -1, -1,
222 -1, -1, -1, -1, -1, -1, -1, -1,
223 -1, -1, -1, -1, -1, -1, -1, -1,
224 -1, -1, -1, -1, -1, -1, -1, -1,
225 -1, -1, -1, -1, -1, -1, -1, -1,
226 -1, -1, -1, -1, -1, -1, -1, -1,
227 -1, -1, -1, -1, -1, -1, -1, -1,
228 /* branch registers */
237 /* virtual frame pointer and virtual return address pointer */
239 /* other registers */
242 PT_CR_IPSR
, /* psr */
244 /* kernel registers not visible via ptrace interface (?) */
245 -1, -1, -1, -1, -1, -1, -1, -1,
247 -1, -1, -1, -1, -1, -1, -1, -1,
253 -1, /* Not available: FCR, IA32 floating control register */
255 -1, /* Not available: EFLAG */
256 -1, /* Not available: CSD */
257 -1, /* Not available: SSD */
258 -1, /* Not available: CFLG */
259 -1, /* Not available: FSR */
260 -1, /* Not available: FIR */
261 -1, /* Not available: FDR */
269 -1, /* Not available: ITC */
270 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
271 -1, -1, -1, -1, -1, -1, -1, -1, -1,
274 -1, /* Not available: EC, the Epilog Count register */
275 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
276 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
277 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
278 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
279 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
280 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
282 /* nat bits - not fetched directly; instead we obtain these bits from
283 either rnat or unat or from memory. */
284 -1, -1, -1, -1, -1, -1, -1, -1,
285 -1, -1, -1, -1, -1, -1, -1, -1,
286 -1, -1, -1, -1, -1, -1, -1, -1,
287 -1, -1, -1, -1, -1, -1, -1, -1,
288 -1, -1, -1, -1, -1, -1, -1, -1,
289 -1, -1, -1, -1, -1, -1, -1, -1,
290 -1, -1, -1, -1, -1, -1, -1, -1,
291 -1, -1, -1, -1, -1, -1, -1, -1,
292 -1, -1, -1, -1, -1, -1, -1, -1,
293 -1, -1, -1, -1, -1, -1, -1, -1,
294 -1, -1, -1, -1, -1, -1, -1, -1,
295 -1, -1, -1, -1, -1, -1, -1, -1,
296 -1, -1, -1, -1, -1, -1, -1, -1,
297 -1, -1, -1, -1, -1, -1, -1, -1,
298 -1, -1, -1, -1, -1, -1, -1, -1,
299 -1, -1, -1, -1, -1, -1, -1, -1,
303 register_addr (int regno
, CORE_ADDR blockend
)
307 if (regno
< 0 || regno
>= NUM_REGS
)
308 error ("Invalid register number %d.", regno
);
310 if (u_offsets
[regno
] == -1)
313 addr
= (CORE_ADDR
) u_offsets
[regno
];
318 int ia64_cannot_fetch_register (regno
)
321 return regno
< 0 || regno
>= NUM_REGS
|| u_offsets
[regno
] == -1;
324 int ia64_cannot_store_register (regno
)
327 /* Rationale behind not permitting stores to bspstore...
329 The IA-64 architecture provides bspstore and bsp which refer
330 memory locations in the RSE's backing store. bspstore is the
331 next location which will be written when the RSE needs to write
332 to memory. bsp is the address at which r32 in the current frame
333 would be found if it were written to the backing store.
335 The IA-64 architecture provides read-only access to bsp and
336 read/write access to bspstore (but only when the RSE is in
337 the enforced lazy mode). It should be noted that stores
338 to bspstore also affect the value of bsp. Changing bspstore
339 does not affect the number of dirty entries between bspstore
340 and bsp, so changing bspstore by N words will also cause bsp
341 to be changed by (roughly) N as well. (It could be N-1 or N+1
342 depending upon where the NaT collection bits fall.)
344 OTOH, the Linux kernel provides read/write access to bsp (and
345 currently read/write access to bspstore as well). But it
346 is definitely the case that if you change one, the other
347 will change at the same time. It is more useful to gdb to
348 be able to change bsp. So in order to prevent strange and
349 undesirable things from happening when a dummy stack frame
350 is popped (after calling an inferior function), we allow
351 bspstore to be read, but not written. (Note that popping
352 a (generic) dummy stack frame causes all registers that
353 were previously read from the inferior process to be written
356 return regno
< 0 || regno
>= NUM_REGS
|| u_offsets
[regno
] == -1
357 || regno
== IA64_BSPSTORE_REGNUM
;
361 supply_gregset (gregset_t
*gregsetp
)
364 greg_t
*regp
= (greg_t
*) gregsetp
;
366 for (regi
= IA64_GR0_REGNUM
; regi
<= IA64_GR31_REGNUM
; regi
++)
368 supply_register (regi
, (char *) (regp
+ (regi
- IA64_GR0_REGNUM
)));
371 /* FIXME: NAT collection bits are at index 32; gotta deal with these
374 supply_register (IA64_PR_REGNUM
, (char *) (regp
+ 33));
376 for (regi
= IA64_BR0_REGNUM
; regi
<= IA64_BR7_REGNUM
; regi
++)
378 supply_register (regi
, (char *) (regp
+ 34 + (regi
- IA64_BR0_REGNUM
)));
381 supply_register (IA64_IP_REGNUM
, (char *) (regp
+ 42));
382 supply_register (IA64_CFM_REGNUM
, (char *) (regp
+ 43));
383 supply_register (IA64_PSR_REGNUM
, (char *) (regp
+ 44));
384 supply_register (IA64_RSC_REGNUM
, (char *) (regp
+ 45));
385 supply_register (IA64_BSP_REGNUM
, (char *) (regp
+ 46));
386 supply_register (IA64_BSPSTORE_REGNUM
, (char *) (regp
+ 47));
387 supply_register (IA64_RNAT_REGNUM
, (char *) (regp
+ 48));
388 supply_register (IA64_CCV_REGNUM
, (char *) (regp
+ 49));
389 supply_register (IA64_UNAT_REGNUM
, (char *) (regp
+ 50));
390 supply_register (IA64_FPSR_REGNUM
, (char *) (regp
+ 51));
391 supply_register (IA64_PFS_REGNUM
, (char *) (regp
+ 52));
392 supply_register (IA64_LC_REGNUM
, (char *) (regp
+ 53));
393 supply_register (IA64_EC_REGNUM
, (char *) (regp
+ 54));
397 fill_gregset (gregset_t
*gregsetp
, int regno
)
400 greg_t
*regp
= (greg_t
*) gregsetp
;
402 #define COPY_REG(_idx_,_regi_) \
403 if ((regno == -1) || regno == _regi_) \
404 memcpy (regp + _idx_, &deprecated_registers[REGISTER_BYTE (_regi_)], \
405 REGISTER_RAW_SIZE (_regi_))
407 for (regi
= IA64_GR0_REGNUM
; regi
<= IA64_GR31_REGNUM
; regi
++)
409 COPY_REG (regi
- IA64_GR0_REGNUM
, regi
);
412 /* FIXME: NAT collection bits at index 32? */
414 COPY_REG (33, IA64_PR_REGNUM
);
416 for (regi
= IA64_BR0_REGNUM
; regi
<= IA64_BR7_REGNUM
; regi
++)
418 COPY_REG (34 + (regi
- IA64_BR0_REGNUM
), regi
);
421 COPY_REG (42, IA64_IP_REGNUM
);
422 COPY_REG (43, IA64_CFM_REGNUM
);
423 COPY_REG (44, IA64_PSR_REGNUM
);
424 COPY_REG (45, IA64_RSC_REGNUM
);
425 COPY_REG (46, IA64_BSP_REGNUM
);
426 COPY_REG (47, IA64_BSPSTORE_REGNUM
);
427 COPY_REG (48, IA64_RNAT_REGNUM
);
428 COPY_REG (49, IA64_CCV_REGNUM
);
429 COPY_REG (50, IA64_UNAT_REGNUM
);
430 COPY_REG (51, IA64_FPSR_REGNUM
);
431 COPY_REG (52, IA64_PFS_REGNUM
);
432 COPY_REG (53, IA64_LC_REGNUM
);
433 COPY_REG (54, IA64_EC_REGNUM
);
436 /* Given a pointer to a floating point register set in /proc format
437 (fpregset_t *), unpack the register contents and supply them as gdb's
438 idea of the current floating point register values. */
441 supply_fpregset (fpregset_t
*fpregsetp
)
446 for (regi
= IA64_FR0_REGNUM
; regi
<= IA64_FR127_REGNUM
; regi
++)
448 from
= (char *) &((*fpregsetp
)[regi
- IA64_FR0_REGNUM
]);
449 supply_register (regi
, from
);
453 /* Given a pointer to a floating point register set in /proc format
454 (fpregset_t *), update the register specified by REGNO from gdb's idea
455 of the current floating point register set. If REGNO is -1, update
459 fill_fpregset (fpregset_t
*fpregsetp
, int regno
)
465 for (regi
= IA64_FR0_REGNUM
; regi
<= IA64_FR127_REGNUM
; regi
++)
467 if ((regno
== -1) || (regno
== regi
))
469 from
= (char *) &deprecated_registers
[REGISTER_BYTE (regi
)];
470 to
= (char *) &((*fpregsetp
)[regi
- IA64_FR0_REGNUM
]);
471 memcpy (to
, from
, REGISTER_RAW_SIZE (regi
));
476 #define IA64_PSR_DB (1UL << 24)
477 #define IA64_PSR_DD (1UL << 39)
480 enable_watchpoints_in_psr (ptid_t ptid
)
484 psr
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
485 if (!(psr
& IA64_PSR_DB
))
487 psr
|= IA64_PSR_DB
; /* Set the db bit - this enables hardware
488 watchpoints and breakpoints. */
489 write_register_pid (IA64_PSR_REGNUM
, psr
, ptid
);
494 fetch_debug_register (ptid_t ptid
, int idx
)
503 val
= ptrace (PT_READ_U
, tid
, (PTRACE_ARG3_TYPE
) (PT_DBR
+ 8 * idx
), 0);
509 store_debug_register (ptid_t ptid
, int idx
, long val
)
517 (void) ptrace (PT_WRITE_U
, tid
, (PTRACE_ARG3_TYPE
) (PT_DBR
+ 8 * idx
), val
);
521 fetch_debug_register_pair (ptid_t ptid
, int idx
, long *dbr_addr
, long *dbr_mask
)
524 *dbr_addr
= fetch_debug_register (ptid
, 2 * idx
);
526 *dbr_mask
= fetch_debug_register (ptid
, 2 * idx
+ 1);
530 store_debug_register_pair (ptid_t ptid
, int idx
, long *dbr_addr
, long *dbr_mask
)
533 store_debug_register (ptid
, 2 * idx
, *dbr_addr
);
535 store_debug_register (ptid
, 2 * idx
+ 1, *dbr_mask
);
539 is_power_of_2 (int val
)
544 for (i
= 0; i
< 8 * sizeof (val
); i
++)
548 return onecount
<= 1;
552 ia64_linux_insert_watchpoint (ptid_t ptid
, CORE_ADDR addr
, int len
, int rw
)
555 long dbr_addr
, dbr_mask
;
556 int max_watchpoints
= 4;
558 if (len
<= 0 || !is_power_of_2 (len
))
561 for (idx
= 0; idx
< max_watchpoints
; idx
++)
563 fetch_debug_register_pair (ptid
, idx
, NULL
, &dbr_mask
);
564 if ((dbr_mask
& (0x3UL
<< 62)) == 0)
566 /* Exit loop if both r and w bits clear */
571 if (idx
== max_watchpoints
)
574 dbr_addr
= (long) addr
;
575 dbr_mask
= (~(len
- 1) & 0x00ffffffffffffffL
); /* construct mask to match */
576 dbr_mask
|= 0x0800000000000000L
; /* Only match privilege level 3 */
580 dbr_mask
|= (1L << 62); /* Set w bit */
583 dbr_mask
|= (1L << 63); /* Set r bit */
586 dbr_mask
|= (3L << 62); /* Set both r and w bits */
592 store_debug_register_pair (ptid
, idx
, &dbr_addr
, &dbr_mask
);
593 enable_watchpoints_in_psr (ptid
);
599 ia64_linux_remove_watchpoint (ptid_t ptid
, CORE_ADDR addr
, int len
)
602 long dbr_addr
, dbr_mask
;
603 int max_watchpoints
= 4;
605 if (len
<= 0 || !is_power_of_2 (len
))
608 for (idx
= 0; idx
< max_watchpoints
; idx
++)
610 fetch_debug_register_pair (ptid
, idx
, &dbr_addr
, &dbr_mask
);
611 if ((dbr_mask
& (0x3UL
<< 62)) && addr
== (CORE_ADDR
) dbr_addr
)
615 store_debug_register_pair (ptid
, idx
, &dbr_addr
, &dbr_mask
);
623 ia64_linux_stopped_by_watchpoint (ptid_t ptid
)
627 struct siginfo siginfo
;
634 ptrace (PTRACE_GETSIGINFO
, tid
, (PTRACE_ARG3_TYPE
) 0, &siginfo
);
636 if (errno
!= 0 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
639 psr
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
640 psr
|= IA64_PSR_DD
; /* Set the dd bit - this will disable the watchpoint
641 for the next instruction */
642 write_register_pid (IA64_PSR_REGNUM
, psr
, ptid
);
644 return (CORE_ADDR
) siginfo
.si_addr
;
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