1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
2 Copyright 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 #include "symfile.h" /* for entry_point_address */
26 #include "arch-utils.h"
27 #include "floatformat.h"
30 #include "elf/common.h" /* for DT_PLTGOT value */
33 /* Hook for determining the global pointer when calling functions in
34 the inferior under AIX. The initialization code in ia64-aix-nat.c
35 sets this hook to the address of a function which will find the
36 global pointer for a given address.
38 The generic code which uses the dynamic section in the inferior for
39 finding the global pointer is not of much use on AIX since the
40 values obtained from the inferior have not been relocated. */
42 CORE_ADDR (*native_find_global_pointer
) (CORE_ADDR
) = 0;
44 /* An enumeration of the different IA-64 instruction types. */
46 typedef enum instruction_type
48 A
, /* Integer ALU ; I-unit or M-unit */
49 I
, /* Non-ALU integer; I-unit */
50 M
, /* Memory ; M-unit */
51 F
, /* Floating-point ; F-unit */
52 B
, /* Branch ; B-unit */
53 L
, /* Extended (L+X) ; I-unit */
54 X
, /* Extended (L+X) ; I-unit */
55 undefined
/* undefined or reserved */
58 /* We represent IA-64 PC addresses as the value of the instruction
59 pointer or'd with some bit combination in the low nibble which
60 represents the slot number in the bundle addressed by the
61 instruction pointer. The problem is that the Linux kernel
62 multiplies its slot numbers (for exceptions) by one while the
63 disassembler multiplies its slot numbers by 6. In addition, I've
64 heard it said that the simulator uses 1 as the multiplier.
66 I've fixed the disassembler so that the bytes_per_line field will
67 be the slot multiplier. If bytes_per_line comes in as zero, it
68 is set to six (which is how it was set up initially). -- objdump
69 displays pretty disassembly dumps with this value. For our purposes,
70 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
71 never want to also display the raw bytes the way objdump does. */
73 #define SLOT_MULTIPLIER 1
75 /* Length in bytes of an instruction bundle */
79 extern void _initialize_ia64_tdep (void);
81 extern CORE_ADDR
ia64_linux_sigcontext_register_address (CORE_ADDR
, int);
83 static gdbarch_init_ftype ia64_gdbarch_init
;
85 static gdbarch_register_name_ftype ia64_register_name
;
86 static gdbarch_register_raw_size_ftype ia64_register_raw_size
;
87 static gdbarch_register_virtual_size_ftype ia64_register_virtual_size
;
88 static gdbarch_register_virtual_type_ftype ia64_register_virtual_type
;
89 static gdbarch_register_byte_ftype ia64_register_byte
;
90 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
91 static gdbarch_frame_chain_ftype ia64_frame_chain
;
92 static gdbarch_frame_saved_pc_ftype ia64_frame_saved_pc
;
93 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
94 static gdbarch_frame_init_saved_regs_ftype ia64_frame_init_saved_regs
;
95 static gdbarch_get_saved_register_ftype ia64_get_saved_register
;
96 static gdbarch_extract_return_value_ftype ia64_extract_return_value
;
97 static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address
;
98 static gdbarch_use_struct_convention_ftype ia64_use_struct_convention
;
99 static gdbarch_frameless_function_invocation_ftype ia64_frameless_function_invocation
;
100 static gdbarch_init_extra_frame_info_ftype ia64_init_extra_frame_info
;
101 static gdbarch_store_return_value_ftype ia64_store_return_value
;
102 static gdbarch_store_struct_return_ftype ia64_store_struct_return
;
103 static gdbarch_push_arguments_ftype ia64_push_arguments
;
104 static gdbarch_push_return_address_ftype ia64_push_return_address
;
105 static gdbarch_pop_frame_ftype ia64_pop_frame
;
106 static gdbarch_saved_pc_after_call_ftype ia64_saved_pc_after_call
;
107 static void ia64_pop_frame_regular (struct frame_info
*frame
);
108 static struct type
*is_float_or_hfa_type (struct type
*t
);
110 static int ia64_num_regs
= 590;
112 static int pc_regnum
= IA64_IP_REGNUM
;
113 static int sp_regnum
= IA64_GR12_REGNUM
;
114 static int fp_regnum
= IA64_VFP_REGNUM
;
115 static int lr_regnum
= IA64_VRAP_REGNUM
;
117 static LONGEST ia64_call_dummy_words
[] = {0};
119 /* Array of register names; There should be ia64_num_regs strings in
122 static char *ia64_register_names
[] =
123 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
124 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
125 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
126 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
127 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
128 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
129 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
130 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
131 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
132 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
133 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
134 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
135 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
136 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
137 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
138 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
140 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
141 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
142 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
143 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
144 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
145 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
146 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
147 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
148 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
149 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
150 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
151 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
152 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
153 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
154 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
155 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
157 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
158 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
159 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
160 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
161 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
162 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
163 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
164 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
166 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
170 "pr", "ip", "psr", "cfm",
172 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
173 "", "", "", "", "", "", "", "",
174 "rsc", "bsp", "bspstore", "rnat",
176 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
177 "ccv", "", "", "", "unat", "", "", "",
178 "fpsr", "", "", "", "itc",
179 "", "", "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
189 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
190 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
191 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
192 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
193 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
194 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
195 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
196 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
197 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
198 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
199 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
200 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
201 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
202 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
203 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
204 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
207 struct frame_extra_info
209 CORE_ADDR bsp
; /* points at r32 for the current frame */
210 CORE_ADDR cfm
; /* cfm value for current frame */
211 int sof
; /* Size of frame (decoded from cfm value) */
212 int sol
; /* Size of locals (decoded from cfm value) */
213 CORE_ADDR after_prologue
;
214 /* Address of first instruction after the last
215 prologue instruction; Note that there may
216 be instructions from the function's body
217 intermingled with the prologue. */
218 int mem_stack_frame_size
;
219 /* Size of the memory stack frame (may be zero),
220 or -1 if it has not been determined yet. */
221 int fp_reg
; /* Register number (if any) used a frame pointer
222 for this frame. 0 if no register is being used
223 as the frame pointer. */
228 int os_ident
; /* From the ELF header, one of the ELFOSABI_
229 constants: ELFOSABI_LINUX, ELFOSABI_AIX,
231 CORE_ADDR (*sigcontext_register_address
) (CORE_ADDR
, int);
232 /* OS specific function which, given a frame address
233 and register number, returns the offset to the
234 given register from the start of the frame. */
235 CORE_ADDR (*find_global_pointer
) (CORE_ADDR
);
238 #define SIGCONTEXT_REGISTER_ADDRESS \
239 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
240 #define FIND_GLOBAL_POINTER \
241 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
244 ia64_register_name (int reg
)
246 return ia64_register_names
[reg
];
250 ia64_register_raw_size (int reg
)
252 return (IA64_FR0_REGNUM
<= reg
&& reg
<= IA64_FR127_REGNUM
) ? 16 : 8;
256 ia64_register_virtual_size (int reg
)
258 return (IA64_FR0_REGNUM
<= reg
&& reg
<= IA64_FR127_REGNUM
) ? 16 : 8;
261 /* Return true iff register N's virtual format is different from
264 ia64_register_convertible (int nr
)
266 return (IA64_FR0_REGNUM
<= nr
&& nr
<= IA64_FR127_REGNUM
);
269 const struct floatformat floatformat_ia64_ext
=
271 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
272 floatformat_intbit_yes
276 ia64_register_convert_to_virtual (int regnum
, struct type
*type
,
277 char *from
, char *to
)
279 if (regnum
>= IA64_FR0_REGNUM
&& regnum
<= IA64_FR127_REGNUM
)
282 floatformat_to_doublest (&floatformat_ia64_ext
, from
, &val
);
283 store_floating(to
, TYPE_LENGTH(type
), val
);
286 error("ia64_register_convert_to_virtual called with non floating point register number");
290 ia64_register_convert_to_raw (struct type
*type
, int regnum
,
291 char *from
, char *to
)
293 if (regnum
>= IA64_FR0_REGNUM
&& regnum
<= IA64_FR127_REGNUM
)
295 DOUBLEST val
= extract_floating (from
, TYPE_LENGTH(type
));
296 floatformat_from_doublest (&floatformat_ia64_ext
, &val
, to
);
299 error("ia64_register_convert_to_raw called with non floating point register number");
303 ia64_register_virtual_type (int reg
)
305 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
306 return builtin_type_long_double
;
308 return builtin_type_long
;
312 ia64_register_byte (int reg
)
315 (reg
<= IA64_FR0_REGNUM
? 0 : 8 * ((reg
> IA64_FR127_REGNUM
) ? 128 : reg
- IA64_FR0_REGNUM
));
318 /* Read the given register from a sigcontext structure in the
322 read_sigcontext_register (struct frame_info
*frame
, int regnum
)
327 internal_error (__FILE__
, __LINE__
,
328 "read_sigcontext_register: NULL frame");
329 if (!frame
->signal_handler_caller
)
330 internal_error (__FILE__
, __LINE__
,
331 "read_sigcontext_register: frame not a signal_handler_caller");
332 if (SIGCONTEXT_REGISTER_ADDRESS
== 0)
333 internal_error (__FILE__
, __LINE__
,
334 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
336 regaddr
= SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regnum
);
338 return read_memory_integer (regaddr
, REGISTER_RAW_SIZE (regnum
));
340 internal_error (__FILE__
, __LINE__
,
341 "read_sigcontext_register: Register %d not in struct sigcontext", regnum
);
344 /* Extract ``len'' bits from an instruction bundle starting at
348 extract_bit_field (char *bundle
, int from
, int len
)
350 long long result
= 0LL;
352 int from_byte
= from
/ 8;
353 int to_byte
= to
/ 8;
354 unsigned char *b
= (unsigned char *) bundle
;
360 if (from_byte
== to_byte
)
361 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
362 result
= c
>> (from
% 8);
363 lshift
= 8 - (from
% 8);
365 for (i
= from_byte
+1; i
< to_byte
; i
++)
367 result
|= ((long long) b
[i
]) << lshift
;
371 if (from_byte
< to_byte
&& (to
% 8 != 0))
374 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
375 result
|= ((long long) c
) << lshift
;
381 /* Replace the specified bits in an instruction bundle */
384 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
387 int from_byte
= from
/ 8;
388 int to_byte
= to
/ 8;
389 unsigned char *b
= (unsigned char *) bundle
;
392 if (from_byte
== to_byte
)
394 unsigned char left
, right
;
396 left
= (c
>> (to
% 8)) << (to
% 8);
397 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
398 c
= (unsigned char) (val
& 0xff);
399 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
407 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
408 c
= c
| (val
<< (from
% 8));
410 val
>>= 8 - from
% 8;
412 for (i
= from_byte
+1; i
< to_byte
; i
++)
421 unsigned char cv
= (unsigned char) val
;
423 c
= c
>> (to
% 8) << (to
% 8);
424 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
430 /* Return the contents of slot N (for N = 0, 1, or 2) in
431 and instruction bundle */
434 slotN_contents (unsigned char *bundle
, int slotnum
)
436 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
439 /* Store an instruction in an instruction bundle */
442 replace_slotN_contents (unsigned char *bundle
, long long instr
, int slotnum
)
444 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
447 static enum instruction_type template_encoding_table
[32][3] =
449 { M
, I
, I
}, /* 00 */
450 { M
, I
, I
}, /* 01 */
451 { M
, I
, I
}, /* 02 */
452 { M
, I
, I
}, /* 03 */
453 { M
, L
, X
}, /* 04 */
454 { M
, L
, X
}, /* 05 */
455 { undefined
, undefined
, undefined
}, /* 06 */
456 { undefined
, undefined
, undefined
}, /* 07 */
457 { M
, M
, I
}, /* 08 */
458 { M
, M
, I
}, /* 09 */
459 { M
, M
, I
}, /* 0A */
460 { M
, M
, I
}, /* 0B */
461 { M
, F
, I
}, /* 0C */
462 { M
, F
, I
}, /* 0D */
463 { M
, M
, F
}, /* 0E */
464 { M
, M
, F
}, /* 0F */
465 { M
, I
, B
}, /* 10 */
466 { M
, I
, B
}, /* 11 */
467 { M
, B
, B
}, /* 12 */
468 { M
, B
, B
}, /* 13 */
469 { undefined
, undefined
, undefined
}, /* 14 */
470 { undefined
, undefined
, undefined
}, /* 15 */
471 { B
, B
, B
}, /* 16 */
472 { B
, B
, B
}, /* 17 */
473 { M
, M
, B
}, /* 18 */
474 { M
, M
, B
}, /* 19 */
475 { undefined
, undefined
, undefined
}, /* 1A */
476 { undefined
, undefined
, undefined
}, /* 1B */
477 { M
, F
, B
}, /* 1C */
478 { M
, F
, B
}, /* 1D */
479 { undefined
, undefined
, undefined
}, /* 1E */
480 { undefined
, undefined
, undefined
}, /* 1F */
483 /* Fetch and (partially) decode an instruction at ADDR and return the
484 address of the next instruction to fetch. */
487 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
489 char bundle
[BUNDLE_LEN
];
490 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
495 error("Can't fetch instructions for slot numbers greater than 2.");
499 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
504 *instr
= slotN_contents (bundle
, slotnum
);
505 template = extract_bit_field (bundle
, 0, 5);
506 *it
= template_encoding_table
[(int)template][slotnum
];
508 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
511 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
516 /* There are 5 different break instructions (break.i, break.b,
517 break.m, break.f, and break.x), but they all have the same
518 encoding. (The five bit template in the low five bits of the
519 instruction bundle distinguishes one from another.)
521 The runtime architecture manual specifies that break instructions
522 used for debugging purposes must have the upper two bits of the 21
523 bit immediate set to a 0 and a 1 respectively. A breakpoint
524 instruction encodes the most significant bit of its 21 bit
525 immediate at bit 36 of the 41 bit instruction. The penultimate msb
526 is at bit 25 which leads to the pattern below.
528 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
529 it turns out that 0x80000 was used as the syscall break in the early
530 simulators. So I changed the pattern slightly to do "break.i 0x080001"
531 instead. But that didn't work either (I later found out that this
532 pattern was used by the simulator that I was using.) So I ended up
533 using the pattern seen below. */
536 #define BREAKPOINT 0x00002000040LL
538 #define BREAKPOINT 0x00003333300LL
541 ia64_memory_insert_breakpoint (CORE_ADDR addr
, char *contents_cache
)
543 char bundle
[BUNDLE_LEN
];
544 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
549 error("Can't insert breakpoint for slot numbers greater than 2.");
553 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
554 instr
= slotN_contents (bundle
, slotnum
);
555 memcpy(contents_cache
, &instr
, sizeof(instr
));
556 replace_slotN_contents (bundle
, BREAKPOINT
, slotnum
);
558 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
564 ia64_memory_remove_breakpoint (CORE_ADDR addr
, char *contents_cache
)
566 char bundle
[BUNDLE_LEN
];
567 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
573 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
574 memcpy (&instr
, contents_cache
, sizeof instr
);
575 replace_slotN_contents (bundle
, instr
, slotnum
);
577 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
582 /* We don't really want to use this, but remote.c needs to call it in order
583 to figure out if Z-packets are supported or not. Oh, well. */
585 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
587 static unsigned char breakpoint
[] =
588 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
589 *lenptr
= sizeof (breakpoint
);
597 ia64_read_pc (int pid
)
599 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, pid
);
600 CORE_ADDR pc_value
= read_register_pid (IA64_IP_REGNUM
, pid
);
601 int slot_num
= (psr_value
>> 41) & 3;
603 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
607 ia64_write_pc (CORE_ADDR new_pc
, int pid
)
609 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
610 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, pid
);
611 psr_value
&= ~(3LL << 41);
612 psr_value
|= (CORE_ADDR
)(slot_num
& 0x3) << 41;
616 write_register_pid (IA64_PSR_REGNUM
, psr_value
, pid
);
617 write_register_pid (IA64_IP_REGNUM
, new_pc
, pid
);
620 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
622 /* Returns the address of the slot that's NSLOTS slots away from
623 the address ADDR. NSLOTS may be positive or negative. */
625 rse_address_add(CORE_ADDR addr
, int nslots
)
628 int mandatory_nat_slots
= nslots
/ 63;
629 int direction
= nslots
< 0 ? -1 : 1;
631 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
633 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
634 new_addr
+= 8 * direction
;
636 if (IS_NaT_COLLECTION_ADDR(new_addr
))
637 new_addr
+= 8 * direction
;
642 /* The IA-64 frame chain is a bit odd. We won't always have a frame
643 pointer, so we use the SP value as the FP for the purpose of
644 creating a frame. There is sometimes a register (not fixed) which
645 is used as a frame pointer. When this register exists, it is not
646 especially hard to determine which one is being used. It isn't
647 even really hard to compute the frame chain, but it can be
648 computationally expensive. So, instead of making life difficult
649 (and slow), we pick a more convenient representation of the frame
650 chain, knowing that we'll have to make some small adjustments
651 in other places. (E.g, note that read_fp() and write_fp() are
652 actually read_sp() and write_sp() below in ia64_gdbarch_init()
655 Okay, so what is the frame chain exactly? It'll be the SP value
656 at the time that the function in question was entered.
658 Note that this *should* actually the frame pointer for the current
659 function! But as I note above, if we were to attempt to find the
660 address of the beginning of the previous frame, we'd waste a lot
661 of cycles for no good reason. So instead, we simply choose to
662 represent the frame chain as the end of the previous frame instead
666 ia64_frame_chain (struct frame_info
*frame
)
668 if (frame
->signal_handler_caller
)
669 return read_sigcontext_register (frame
, sp_regnum
);
670 else if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
674 FRAME_INIT_SAVED_REGS (frame
);
675 if (frame
->saved_regs
[IA64_VFP_REGNUM
])
676 return read_memory_integer (frame
->saved_regs
[IA64_VFP_REGNUM
], 8);
678 return frame
->frame
+ frame
->extra_info
->mem_stack_frame_size
;
683 ia64_frame_saved_pc (struct frame_info
*frame
)
685 if (frame
->signal_handler_caller
)
686 return read_sigcontext_register (frame
, pc_regnum
);
687 else if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
688 return generic_read_register_dummy (frame
->pc
, frame
->frame
, pc_regnum
);
691 FRAME_INIT_SAVED_REGS (frame
);
693 if (frame
->saved_regs
[IA64_VRAP_REGNUM
])
694 return read_memory_integer (frame
->saved_regs
[IA64_VRAP_REGNUM
], 8);
695 else if (frame
->next
&& frame
->next
->signal_handler_caller
)
696 return read_sigcontext_register (frame
->next
, IA64_BR0_REGNUM
);
697 else /* either frameless, or not far enough along in the prologue... */
698 return ia64_saved_pc_after_call (frame
);
702 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
703 || (8 <= (_regnum_) && (_regnum_) <= 11) \
704 || (14 <= (_regnum_) && (_regnum_) <= 31))
705 #define imm9(_instr_) \
706 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
707 | (((_instr_) & 0x00008000000LL) >> 20) \
708 | (((_instr_) & 0x00000001fc0LL) >> 6))
711 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*frame
)
714 CORE_ADDR last_prologue_pc
= pc
;
717 int do_fsr_stuff
= 0;
722 int unat_save_reg
= 0;
724 int mem_stack_frame_size
= 0;
726 CORE_ADDR spill_addr
= 0;
730 memset (instores
, 0, sizeof instores
);
731 memset (infpstores
, 0, sizeof infpstores
);
733 if (frame
&& !frame
->saved_regs
)
735 frame_saved_regs_zalloc (frame
);
741 && frame
->extra_info
->after_prologue
!= 0
742 && frame
->extra_info
->after_prologue
<= lim_pc
)
743 return frame
->extra_info
->after_prologue
;
745 /* Must start with an alloc instruction */
746 next_pc
= fetch_instruction (pc
, &it
, &instr
);
747 if (pc
< lim_pc
&& next_pc
748 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
751 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
752 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
753 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
754 /* Okay, so sor, sol, and sof aren't used right now; but perhaps
755 we could compare against the size given to us via the cfm as
756 either a sanity check or possibly to see if the frame has been
757 changed by a later alloc instruction... */
758 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
760 last_prologue_pc
= next_pc
;
764 pc
= lim_pc
; /* We're done early */
766 /* Loop, looking for prologue instructions, keeping track of
767 where preserved registers were spilled. */
770 next_pc
= fetch_instruction (pc
, &it
, &instr
);
774 if (it
== B
|| ((instr
& 0x3fLL
) != 0LL))
776 /* Exit loop upon hitting a branch instruction or a predicated
780 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
783 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
784 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
785 int qp
= (int) (instr
& 0x0000000003f);
787 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
790 last_prologue_pc
= next_pc
;
793 else if ((it
== I
|| it
== M
)
794 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
796 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
797 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
798 | ((instr
& 0x001f8000000LL
) >> 20)
799 | ((instr
& 0x000000fe000LL
) >> 13));
800 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
801 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
802 int qp
= (int) (instr
& 0x0000000003fLL
);
804 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
808 last_prologue_pc
= next_pc
;
810 else if (qp
== 0 && rN
== 12 && rM
== 12)
812 /* adds r12, -mem_stack_frame_size, r12 */
813 mem_stack_frame_size
-= imm
;
814 last_prologue_pc
= next_pc
;
816 else if (qp
== 0 && rN
== 2
817 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
819 /* adds r2, spilloffset, rFramePointer
821 adds r2, spilloffset, r12
823 Get ready for stf.spill or st8.spill instructions.
824 The address to start spilling at is loaded into r2.
825 FIXME: Why r2? That's what gcc currently uses; it
826 could well be different for other compilers. */
828 /* Hmm... whether or not this will work will depend on
829 where the pc is. If it's still early in the prologue
830 this'll be wrong. FIXME */
831 spill_addr
= (frame
? frame
->frame
: 0)
832 + (rM
== 12 ? 0 : mem_stack_frame_size
)
835 last_prologue_pc
= next_pc
;
839 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
840 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
842 /* stf.spill [rN] = fM, imm9
844 stf.spill [rN] = fM */
846 int imm
= imm9(instr
);
847 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
848 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
849 int qp
= (int) (instr
& 0x0000000003fLL
);
850 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
851 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
854 frame
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
856 if ((instr
& 0x1efc0000000) == 0x0eec0000000)
859 spill_addr
= 0; /* last one; must be done */
860 last_prologue_pc
= next_pc
;
863 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
864 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
870 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
871 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
872 int qp
= (int) (instr
& 0x0000000003fLL
);
873 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
875 /* We have something like "mov.m r3 = ar.unat". Remember the
876 r3 (or whatever) and watch for a store of this register... */
878 last_prologue_pc
= next_pc
;
881 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
884 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
885 int qp
= (int) (instr
& 0x0000000003fLL
);
886 if (qp
== 0 && isScratch (rN
))
889 last_prologue_pc
= next_pc
;
893 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
894 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
898 st8 [rN] = rM, imm9 */
899 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
900 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
901 int qp
= (int) (instr
& 0x0000000003fLL
);
902 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
903 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
905 /* We've found a spill of either the UNAT register or the PR
906 register. (Well, not exactly; what we've actually found is
907 a spill of the register that UNAT or PR was moved to).
908 Record that fact and move on... */
909 if (rM
== unat_save_reg
)
911 /* Track UNAT register */
913 frame
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
918 /* Track PR register */
920 frame
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
923 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
924 /* st8 [rN] = rM, imm9 */
925 spill_addr
+= imm9(instr
);
927 spill_addr
= 0; /* must be done spilling */
928 last_prologue_pc
= next_pc
;
930 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
932 /* Allow up to one store of each input register. */
934 last_prologue_pc
= next_pc
;
937 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
944 Note that the st8 case is handled in the clause above.
946 Advance over stores of input registers. One store per input
947 register is permitted. */
948 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
949 int qp
= (int) (instr
& 0x0000000003fLL
);
950 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
953 last_prologue_pc
= next_pc
;
956 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
963 Advance over stores of floating point input registers. Again
964 one store per register is permitted */
965 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
966 int qp
= (int) (instr
& 0x0000000003fLL
);
967 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
969 infpstores
[fM
-8] = 1;
970 last_prologue_pc
= next_pc
;
974 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
975 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
977 /* st8.spill [rN] = rM
979 st8.spill [rN] = rM, imm9 */
980 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
981 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
982 int qp
= (int) (instr
& 0x0000000003fLL
);
983 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
985 /* We've found a spill of one of the preserved general purpose
986 regs. Record the spill address and advance the spill
987 register if appropriate. */
989 frame
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
990 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
991 /* st8.spill [rN] = rM, imm9 */
992 spill_addr
+= imm9(instr
);
994 spill_addr
= 0; /* Done spilling */
995 last_prologue_pc
= next_pc
;
1007 /* Extract the size of the rotating portion of the stack
1008 frame and the register rename base from the current
1010 sor
= ((frame
->extra_info
->cfm
>> 14) & 0xf) * 8;
1011 rrb_gr
= (frame
->extra_info
->cfm
>> 18) & 0x7f;
1013 for (i
= 0, addr
= frame
->extra_info
->bsp
;
1014 i
< frame
->extra_info
->sof
;
1017 if (IS_NaT_COLLECTION_ADDR (addr
))
1022 frame
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1025 frame
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1027 if (i
+32 == cfm_reg
)
1028 frame
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1029 if (i
+32 == ret_reg
)
1030 frame
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1032 frame
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1036 if (frame
&& frame
->extra_info
) {
1037 frame
->extra_info
->after_prologue
= last_prologue_pc
;
1038 frame
->extra_info
->mem_stack_frame_size
= mem_stack_frame_size
;
1039 frame
->extra_info
->fp_reg
= fp_reg
;
1042 return last_prologue_pc
;
1046 ia64_skip_prologue (CORE_ADDR pc
)
1048 return examine_prologue (pc
, pc
+1024, 0);
1052 ia64_frame_init_saved_regs (struct frame_info
*frame
)
1054 if (frame
->saved_regs
)
1057 if (frame
->signal_handler_caller
&& SIGCONTEXT_REGISTER_ADDRESS
)
1061 frame_saved_regs_zalloc (frame
);
1063 frame
->saved_regs
[IA64_VRAP_REGNUM
] =
1064 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_IP_REGNUM
);
1065 frame
->saved_regs
[IA64_CFM_REGNUM
] =
1066 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_CFM_REGNUM
);
1067 frame
->saved_regs
[IA64_PSR_REGNUM
] =
1068 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_PSR_REGNUM
);
1070 frame
->saved_regs
[IA64_BSP_REGNUM
] =
1071 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_BSP_REGNUM
);
1073 frame
->saved_regs
[IA64_RNAT_REGNUM
] =
1074 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_RNAT_REGNUM
);
1075 frame
->saved_regs
[IA64_CCV_REGNUM
] =
1076 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_CCV_REGNUM
);
1077 frame
->saved_regs
[IA64_UNAT_REGNUM
] =
1078 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_UNAT_REGNUM
);
1079 frame
->saved_regs
[IA64_FPSR_REGNUM
] =
1080 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_FPSR_REGNUM
);
1081 frame
->saved_regs
[IA64_PFS_REGNUM
] =
1082 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_PFS_REGNUM
);
1083 frame
->saved_regs
[IA64_LC_REGNUM
] =
1084 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, IA64_LC_REGNUM
);
1085 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1086 if (regno
!= sp_regnum
)
1087 frame
->saved_regs
[regno
] =
1088 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regno
);
1089 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1090 frame
->saved_regs
[regno
] =
1091 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regno
);
1092 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1093 frame
->saved_regs
[regno
] =
1094 SIGCONTEXT_REGISTER_ADDRESS (frame
->frame
, regno
);
1098 CORE_ADDR func_start
;
1100 func_start
= get_pc_function_start (frame
->pc
);
1101 examine_prologue (func_start
, frame
->pc
, frame
);
1106 ia64_get_saved_register (char *raw_buffer
,
1109 struct frame_info
*frame
,
1111 enum lval_type
*lval
)
1115 if (!target_has_registers
)
1116 error ("No registers.");
1118 if (optimized
!= NULL
)
1127 is_dummy_frame
= PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
);
1129 if (regnum
== SP_REGNUM
&& frame
->next
)
1131 /* Handle SP values for all frames but the topmost. */
1132 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
), frame
->frame
);
1134 else if (regnum
== IA64_BSP_REGNUM
)
1136 store_address (raw_buffer
, REGISTER_RAW_SIZE (regnum
),
1137 frame
->extra_info
->bsp
);
1139 else if (regnum
== IA64_VFP_REGNUM
)
1141 /* If the function in question uses an automatic register (r32-r127)
1142 for the frame pointer, it'll be found by ia64_find_saved_register()
1143 above. If the function lacks one of these frame pointers, we can
1144 still provide a value since we know the size of the frame */
1145 CORE_ADDR vfp
= frame
->frame
+ frame
->extra_info
->mem_stack_frame_size
;
1146 store_address (raw_buffer
, REGISTER_RAW_SIZE (IA64_VFP_REGNUM
), vfp
);
1148 else if (IA64_PR0_REGNUM
<= regnum
&& regnum
<= IA64_PR63_REGNUM
)
1150 char pr_raw_buffer
[MAX_REGISTER_RAW_SIZE
];
1152 enum lval_type pr_lval
;
1155 ia64_get_saved_register (pr_raw_buffer
, &pr_optim
, &pr_addr
,
1156 frame
, IA64_PR_REGNUM
, &pr_lval
);
1157 if (IA64_PR16_REGNUM
<= regnum
&& regnum
<= IA64_PR63_REGNUM
)
1159 /* Fetch predicate register rename base from current frame
1160 marker for this frame. */
1161 int rrb_pr
= (frame
->extra_info
->cfm
>> 32) & 0x3f;
1163 /* Adjust the register number to account for register rotation. */
1164 regnum
= IA64_PR16_REGNUM
1165 + ((regnum
- IA64_PR16_REGNUM
) + rrb_pr
) % 48;
1167 prN_val
= extract_bit_field ((unsigned char *) pr_raw_buffer
,
1168 regnum
- IA64_PR0_REGNUM
, 1);
1169 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
), prN_val
);
1171 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1173 char unat_raw_buffer
[MAX_REGISTER_RAW_SIZE
];
1175 enum lval_type unat_lval
;
1176 CORE_ADDR unat_addr
;
1178 ia64_get_saved_register (unat_raw_buffer
, &unat_optim
, &unat_addr
,
1179 frame
, IA64_UNAT_REGNUM
, &unat_lval
);
1180 unatN_val
= extract_bit_field ((unsigned char *) unat_raw_buffer
,
1181 regnum
- IA64_NAT0_REGNUM
, 1);
1182 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
),
1185 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1188 /* Find address of general register corresponding to nat bit we're
1190 CORE_ADDR gr_addr
= 0;
1192 if (!is_dummy_frame
)
1194 FRAME_INIT_SAVED_REGS (frame
);
1195 gr_addr
= frame
->saved_regs
[ regnum
- IA64_NAT0_REGNUM
1200 /* Compute address of nat collection bits */
1201 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1202 CORE_ADDR bsp
= read_register (IA64_BSP_REGNUM
);
1203 CORE_ADDR nat_collection
;
1205 /* If our nat collection address is bigger than bsp, we have to get
1206 the nat collection from rnat. Otherwise, we fetch the nat
1207 collection from the computed address. */
1208 if (nat_addr
>= bsp
)
1209 nat_collection
= read_register (IA64_RNAT_REGNUM
);
1211 nat_collection
= read_memory_integer (nat_addr
, 8);
1212 nat_bit
= (gr_addr
>> 3) & 0x3f;
1213 natval
= (nat_collection
>> nat_bit
) & 1;
1215 store_unsigned_integer (raw_buffer
, REGISTER_RAW_SIZE (regnum
), natval
);
1217 else if (regnum
== IA64_IP_REGNUM
)
1222 /* FIXME: Set *addrp, *lval when possible. */
1223 pc
= ia64_frame_saved_pc (frame
->next
);
1229 store_address (raw_buffer
, REGISTER_RAW_SIZE (IA64_IP_REGNUM
), pc
);
1231 else if (IA64_GR32_REGNUM
<= regnum
&& regnum
<= IA64_GR127_REGNUM
)
1234 if (!is_dummy_frame
)
1236 FRAME_INIT_SAVED_REGS (frame
);
1237 addr
= frame
->saved_regs
[regnum
];
1243 *lval
= lval_memory
;
1246 read_memory (addr
, raw_buffer
, REGISTER_RAW_SIZE (regnum
));
1250 /* r32 - r127 must be fetchable via memory. If they aren't,
1251 then the register is unavailable */
1252 memset (raw_buffer
, 0, REGISTER_RAW_SIZE (regnum
));
1257 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1259 /* Fetch floating point register rename base from current
1260 frame marker for this frame. */
1261 int rrb_fr
= (frame
->extra_info
->cfm
>> 25) & 0x7f;
1263 /* Adjust the floating point register number to account for
1264 register rotation. */
1265 regnum
= IA64_FR32_REGNUM
1266 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1269 generic_get_saved_register (raw_buffer
, optimized
, addrp
, frame
,
1274 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
1275 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
1276 and TYPE is the type (which is known to be struct, union or array). */
1278 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
1280 struct type
*float_elt_type
;
1282 /* HFAs are structures (or arrays) consisting entirely of floating
1283 point values of the same length. Up to 8 of these are returned
1284 in registers. Don't use the struct convention when this is the
1286 float_elt_type
= is_float_or_hfa_type (type
);
1287 if (float_elt_type
!= NULL
1288 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
1291 /* Other structs of length 32 or less are returned in r8-r11.
1292 Don't use the struct convention for those either. */
1293 return TYPE_LENGTH (type
) > 32;
1297 ia64_extract_return_value (struct type
*type
, char *regbuf
, char *valbuf
)
1299 struct type
*float_elt_type
;
1301 float_elt_type
= is_float_or_hfa_type (type
);
1302 if (float_elt_type
!= NULL
)
1305 int regnum
= IA64_FR8_REGNUM
;
1306 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
1310 ia64_register_convert_to_virtual (regnum
, float_elt_type
,
1311 ®buf
[REGISTER_BYTE (regnum
)], valbuf
+ offset
);
1312 offset
+= TYPE_LENGTH (float_elt_type
);
1317 memcpy (valbuf
, ®buf
[REGISTER_BYTE (IA64_GR8_REGNUM
)],
1318 TYPE_LENGTH (type
));
1321 /* FIXME: Turn this into a stack of some sort. Unfortunately, something
1322 like this is necessary though since the IA-64 calling conventions specify
1323 that r8 is not preserved. */
1324 static CORE_ADDR struct_return_address
;
1327 ia64_extract_struct_value_address (char *regbuf
)
1329 /* FIXME: See above. */
1330 return struct_return_address
;
1334 ia64_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1336 /* FIXME: See above. */
1337 /* Note that most of the work was done in ia64_push_arguments() */
1338 struct_return_address
= addr
;
1342 ia64_frameless_function_invocation (struct frame_info
*frame
)
1344 /* FIXME: Implement */
1349 ia64_saved_pc_after_call (struct frame_info
*frame
)
1351 return read_register (IA64_BR0_REGNUM
);
1355 ia64_frame_args_address (struct frame_info
*frame
)
1357 /* frame->frame points at the SP for this frame; But we want the start
1358 of the frame, not the end. Calling frame chain will get his for us. */
1359 return ia64_frame_chain (frame
);
1363 ia64_frame_locals_address (struct frame_info
*frame
)
1365 /* frame->frame points at the SP for this frame; But we want the start
1366 of the frame, not the end. Calling frame chain will get his for us. */
1367 return ia64_frame_chain (frame
);
1371 ia64_init_extra_frame_info (int fromleaf
, struct frame_info
*frame
)
1374 int next_frame_is_call_dummy
= ((frame
->next
!= NULL
)
1375 && PC_IN_CALL_DUMMY (frame
->next
->pc
, frame
->next
->frame
,
1376 frame
->next
->frame
));
1378 frame
->extra_info
= (struct frame_extra_info
*)
1379 frame_obstack_alloc (sizeof (struct frame_extra_info
));
1381 if (frame
->next
== 0)
1383 bsp
= read_register (IA64_BSP_REGNUM
);
1384 cfm
= read_register (IA64_CFM_REGNUM
);
1387 else if (frame
->next
->signal_handler_caller
)
1389 bsp
= read_sigcontext_register (frame
->next
, IA64_BSP_REGNUM
);
1390 cfm
= read_sigcontext_register (frame
->next
, IA64_CFM_REGNUM
);
1392 else if (next_frame_is_call_dummy
)
1394 bsp
= generic_read_register_dummy (frame
->next
->pc
, frame
->next
->frame
,
1396 cfm
= generic_read_register_dummy (frame
->next
->pc
, frame
->next
->frame
,
1401 struct frame_info
*frn
= frame
->next
;
1403 FRAME_INIT_SAVED_REGS (frn
);
1405 if (frn
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1406 cfm
= read_memory_integer (frn
->saved_regs
[IA64_CFM_REGNUM
], 8);
1407 else if (frn
->next
&& frn
->next
->signal_handler_caller
)
1408 cfm
= read_sigcontext_register (frn
->next
, IA64_PFS_REGNUM
);
1410 && PC_IN_CALL_DUMMY (frn
->next
->pc
, frn
->next
->frame
,
1412 cfm
= generic_read_register_dummy (frn
->next
->pc
, frn
->next
->frame
,
1415 cfm
= read_register (IA64_PFS_REGNUM
);
1417 bsp
= frn
->extra_info
->bsp
;
1419 frame
->extra_info
->cfm
= cfm
;
1420 frame
->extra_info
->sof
= cfm
& 0x7f;
1421 frame
->extra_info
->sol
= (cfm
>> 7) & 0x7f;
1422 if (frame
->next
== 0
1423 || frame
->next
->signal_handler_caller
1424 || next_frame_is_call_dummy
)
1425 frame
->extra_info
->bsp
= rse_address_add (bsp
, -frame
->extra_info
->sof
);
1427 frame
->extra_info
->bsp
= rse_address_add (bsp
, -frame
->extra_info
->sol
);
1429 frame
->extra_info
->after_prologue
= 0;
1430 frame
->extra_info
->mem_stack_frame_size
= -1; /* Not yet determined */
1431 frame
->extra_info
->fp_reg
= 0;
1435 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
1437 switch (TYPE_CODE (t
))
1441 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
1448 case TYPE_CODE_ARRAY
:
1449 return is_float_or_hfa_type_recurse (TYPE_TARGET_TYPE (t
), etp
);
1451 case TYPE_CODE_STRUCT
:
1455 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
1456 if (!is_float_or_hfa_type_recurse (TYPE_FIELD_TYPE (t
, i
), etp
))
1467 /* Determine if the given type is one of the floating point types or
1468 and HFA (which is a struct, array, or combination thereof whose
1469 bottom-most elements are all of the same floating point type.) */
1471 static struct type
*
1472 is_float_or_hfa_type (struct type
*t
)
1474 struct type
*et
= 0;
1476 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
1480 /* Attempt to find (and return) the global pointer for the given
1483 This is a rather nasty bit of code searchs for the .dynamic section
1484 in the objfile corresponding to the pc of the function we're trying
1485 to call. Once it finds the addresses at which the .dynamic section
1486 lives in the child process, it scans the Elf64_Dyn entries for a
1487 DT_PLTGOT tag. If it finds one of these, the corresponding
1488 d_un.d_ptr value is the global pointer. */
1491 generic_elf_find_global_pointer (CORE_ADDR faddr
)
1493 struct obj_section
*faddr_sect
;
1495 faddr_sect
= find_pc_section (faddr
);
1496 if (faddr_sect
!= NULL
)
1498 struct obj_section
*osect
;
1500 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
1502 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
1506 if (osect
< faddr_sect
->objfile
->sections_end
)
1511 while (addr
< osect
->endaddr
)
1517 status
= target_read_memory (addr
, buf
, sizeof (buf
));
1520 tag
= extract_signed_integer (buf
, sizeof (buf
));
1522 if (tag
== DT_PLTGOT
)
1524 CORE_ADDR global_pointer
;
1526 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
1529 global_pointer
= extract_address (buf
, sizeof (buf
));
1532 return global_pointer
;
1545 /* Given a function's address, attempt to find (and return) the
1546 corresponding (canonical) function descriptor. Return 0 if
1549 find_extant_func_descr (CORE_ADDR faddr
)
1551 struct obj_section
*faddr_sect
;
1553 /* Return early if faddr is already a function descriptor */
1554 faddr_sect
= find_pc_section (faddr
);
1555 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
1558 if (faddr_sect
!= NULL
)
1560 struct obj_section
*osect
;
1561 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
1563 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
1567 if (osect
< faddr_sect
->objfile
->sections_end
)
1572 while (addr
< osect
->endaddr
)
1578 status
= target_read_memory (addr
, buf
, sizeof (buf
));
1581 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
1583 if (faddr
== faddr2
)
1593 /* Attempt to find a function descriptor corresponding to the
1594 given address. If none is found, construct one on the
1595 stack using the address at fdaptr */
1598 find_func_descr (CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
1602 fdesc
= find_extant_func_descr (faddr
);
1606 CORE_ADDR global_pointer
;
1612 global_pointer
= FIND_GLOBAL_POINTER (faddr
);
1614 if (global_pointer
== 0)
1615 global_pointer
= read_register (IA64_GR1_REGNUM
);
1617 store_address (buf
, 8, faddr
);
1618 store_address (buf
+ 8, 8, global_pointer
);
1620 write_memory (fdesc
, buf
, 16);
1627 ia64_push_arguments (int nargs
, value_ptr
*args
, CORE_ADDR sp
,
1628 int struct_return
, CORE_ADDR struct_addr
)
1634 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
1636 CORE_ADDR bsp
, cfm
, pfs
, new_bsp
, funcdescaddr
;
1640 /* Count the number of slots needed for the arguments */
1641 for (argno
= 0; argno
< nargs
; argno
++)
1644 type
= check_typedef (VALUE_TYPE (arg
));
1645 len
= TYPE_LENGTH (type
);
1647 /* FIXME: This is crude and it is wrong (IMO), but it matches
1648 what gcc does, I think. */
1649 if (len
> 8 && (nslots
& 1))
1652 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
1655 nslots
+= (len
+ 7) / 8;
1658 /* Divvy up the slots between the RSE and the memory stack */
1659 rseslots
= (nslots
> 8) ? 8 : nslots
;
1660 memslots
= nslots
- rseslots
;
1662 /* Allocate a new RSE frame */
1663 cfm
= read_register (IA64_CFM_REGNUM
);
1665 bsp
= read_register (IA64_BSP_REGNUM
);
1666 bsp
= rse_address_add (bsp
, cfm
& 0x7f);
1667 new_bsp
= rse_address_add (bsp
, rseslots
);
1668 write_register (IA64_BSP_REGNUM
, new_bsp
);
1670 pfs
= read_register (IA64_PFS_REGNUM
);
1671 pfs
&= 0xc000000000000000LL
;
1672 pfs
|= (cfm
& 0xffffffffffffLL
);
1673 write_register (IA64_PFS_REGNUM
, pfs
);
1675 cfm
&= 0xc000000000000000LL
;
1677 write_register (IA64_CFM_REGNUM
, cfm
);
1679 /* We will attempt to find function descriptors in the .opd segment,
1680 but if we can't we'll construct them ourselves. That being the
1681 case, we'll need to reserve space on the stack for them. */
1682 funcdescaddr
= sp
- nfuncargs
* 16;
1683 funcdescaddr
&= ~0xfLL
;
1685 /* Adjust the stack pointer to it's new value. The calling conventions
1686 require us to have 16 bytes of scratch, plus whatever space is
1687 necessary for the memory slots and our function descriptors */
1688 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
1689 sp
&= ~0xfLL
; /* Maintain 16 byte alignment */
1691 /* Place the arguments where they belong. The arguments will be
1692 either placed in the RSE backing store or on the memory stack.
1693 In addition, floating point arguments or HFAs are placed in
1694 floating point registers. */
1696 floatreg
= IA64_FR8_REGNUM
;
1697 for (argno
= 0; argno
< nargs
; argno
++)
1699 struct type
*float_elt_type
;
1702 type
= check_typedef (VALUE_TYPE (arg
));
1703 len
= TYPE_LENGTH (type
);
1705 /* Special handling for function parameters */
1707 && TYPE_CODE (type
) == TYPE_CODE_PTR
1708 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
1712 store_address (val_buf
, 8,
1713 find_func_descr (extract_address (VALUE_CONTENTS (arg
), 8),
1715 if (slotnum
< rseslots
)
1716 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
1718 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
1724 if (len
> 8 && (slotnum
& 1))
1731 memset (val_buf
, 0, 8);
1732 memcpy (val_buf
, VALUE_CONTENTS (arg
) + argoffset
, (len
> 8) ? 8 : len
);
1734 if (slotnum
< rseslots
)
1735 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
1737 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
1744 /* Handle floating point types (including HFAs) */
1745 float_elt_type
= is_float_or_hfa_type (type
);
1746 if (float_elt_type
!= NULL
)
1749 len
= TYPE_LENGTH (type
);
1750 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
1752 ia64_register_convert_to_raw (
1755 VALUE_CONTENTS (arg
) + argoffset
,
1756 ®isters
[REGISTER_BYTE (floatreg
)]);
1758 argoffset
+= TYPE_LENGTH (float_elt_type
);
1759 len
-= TYPE_LENGTH (float_elt_type
);
1764 /* Store the struct return value in r8 if necessary. */
1767 store_address (®isters
[REGISTER_BYTE (IA64_GR8_REGNUM
)],
1768 REGISTER_RAW_SIZE (IA64_GR8_REGNUM
),
1772 /* Sync gdb's idea of what the registers are with the target. */
1773 target_store_registers (-1);
1775 /* FIXME: This doesn't belong here! Instead, SAVE_DUMMY_FRAME_TOS needs
1776 to be defined to call generic_save_dummy_frame_tos(). But at the
1777 time of this writing, SAVE_DUMMY_FRAME_TOS wasn't gdbarch'd, so
1778 I chose to put this call here instead of using the old mechanisms.
1779 Once SAVE_DUMMY_FRAME_TOS is gdbarch'd, all we need to do is add the
1782 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1784 to ia64_gdbarch_init() and remove the line below. */
1785 generic_save_dummy_frame_tos (sp
);
1791 ia64_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1793 CORE_ADDR global_pointer
= FIND_GLOBAL_POINTER (pc
);
1795 if (global_pointer
!= 0)
1796 write_register (IA64_GR1_REGNUM
, global_pointer
);
1798 write_register (IA64_BR0_REGNUM
, CALL_DUMMY_ADDRESS ());
1803 ia64_store_return_value (struct type
*type
, char *valbuf
)
1805 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1807 ia64_register_convert_to_raw (type
, IA64_FR8_REGNUM
, valbuf
,
1808 ®isters
[REGISTER_BYTE (IA64_FR8_REGNUM
)]);
1809 target_store_registers (IA64_FR8_REGNUM
);
1812 write_register_bytes (REGISTER_BYTE (IA64_GR8_REGNUM
),
1813 valbuf
, TYPE_LENGTH (type
));
1817 ia64_pop_frame (void)
1819 generic_pop_current_frame (ia64_pop_frame_regular
);
1823 ia64_pop_frame_regular (struct frame_info
*frame
)
1826 CORE_ADDR bsp
, cfm
, pfs
;
1828 FRAME_INIT_SAVED_REGS (frame
);
1830 for (regno
= 0; regno
< ia64_num_regs
; regno
++)
1832 if (frame
->saved_regs
[regno
]
1833 && (!(IA64_GR32_REGNUM
<= regno
&& regno
<= IA64_GR127_REGNUM
))
1834 && regno
!= pc_regnum
1835 && regno
!= sp_regnum
1836 && regno
!= IA64_PFS_REGNUM
1837 && regno
!= IA64_CFM_REGNUM
1838 && regno
!= IA64_BSP_REGNUM
1839 && regno
!= IA64_BSPSTORE_REGNUM
)
1841 write_register (regno
,
1842 read_memory_integer (frame
->saved_regs
[regno
],
1843 REGISTER_RAW_SIZE (regno
)));
1847 write_register (sp_regnum
, FRAME_CHAIN (frame
));
1848 write_pc (FRAME_SAVED_PC (frame
));
1850 cfm
= read_register (IA64_CFM_REGNUM
);
1852 if (frame
->saved_regs
[IA64_PFS_REGNUM
])
1854 pfs
= read_memory_integer (frame
->saved_regs
[IA64_PFS_REGNUM
],
1855 REGISTER_RAW_SIZE (IA64_PFS_REGNUM
));
1858 pfs
= read_register (IA64_PFS_REGNUM
);
1860 /* Compute the new bsp by *adding* the difference between the
1861 size of the frame and the size of the locals (both wrt the
1862 frame that we're going back to). This seems kind of strange,
1863 especially since it seems like we ought to be subtracting the
1864 size of the locals... and we should; but the linux kernel
1865 wants bsp to be set at the end of all used registers. It's
1866 likely that this code will need to be revised to accomodate
1867 other operating systems. */
1868 bsp
= rse_address_add (frame
->extra_info
->bsp
,
1869 (pfs
& 0x7f) - ((pfs
>> 7) & 0x7f));
1870 write_register (IA64_BSP_REGNUM
, bsp
);
1872 /* FIXME: What becomes of the epilog count in the PFS? */
1873 cfm
= (cfm
& ~0xffffffffffffLL
) | (pfs
& 0xffffffffffffLL
);
1874 write_register (IA64_CFM_REGNUM
, cfm
);
1876 flush_cached_frames ();
1880 ia64_remote_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1881 CORE_ADDR
*targ_addr
, int *targ_len
)
1883 *targ_addr
= memaddr
;
1884 *targ_len
= nr_bytes
;
1888 process_note_abi_tag_sections (bfd
*abfd
, asection
*sect
, void *obj
)
1890 int *os_ident_ptr
= obj
;
1892 unsigned int sectsize
;
1894 name
= bfd_get_section_name (abfd
, sect
);
1895 sectsize
= bfd_section_size (abfd
, sect
);
1896 if (strcmp (name
, ".note.ABI-tag") == 0 && sectsize
> 0)
1898 unsigned int name_length
, data_length
, note_type
;
1899 char *note
= alloca (sectsize
);
1901 bfd_get_section_contents (abfd
, sect
, note
,
1902 (file_ptr
) 0, (bfd_size_type
) sectsize
);
1904 name_length
= bfd_h_get_32 (abfd
, note
);
1905 data_length
= bfd_h_get_32 (abfd
, note
+ 4);
1906 note_type
= bfd_h_get_32 (abfd
, note
+ 8);
1908 if (name_length
== 4 && data_length
== 16 && note_type
== 1
1909 && strcmp (note
+ 12, "GNU") == 0)
1911 int os_number
= bfd_h_get_32 (abfd
, note
+ 16);
1913 /* The case numbers are from abi-tags in glibc */
1917 *os_ident_ptr
= ELFOSABI_LINUX
;
1920 *os_ident_ptr
= ELFOSABI_HURD
;
1923 *os_ident_ptr
= ELFOSABI_SOLARIS
;
1926 internal_error (__FILE__
, __LINE__
,
1927 "process_note_abi_sections: unknown OS number %d", os_number
);
1934 static struct gdbarch
*
1935 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1937 struct gdbarch
*gdbarch
;
1938 struct gdbarch_tdep
*tdep
;
1941 if (info
.abfd
!= NULL
1942 && bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1944 os_ident
= elf_elfheader (info
.abfd
)->e_ident
[EI_OSABI
];
1946 /* If os_ident is 0, it is not necessarily the case that we're on a
1947 SYSV system. (ELFOSABI_NONE is defined to be 0.) GNU/Linux uses
1948 a note section to record OS/ABI info, but leaves e_ident[EI_OSABI]
1949 zero. So we have to check for note sections too. */
1952 bfd_map_over_sections (info
.abfd
,
1953 process_note_abi_tag_sections
,
1960 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1962 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
1964 if (gdbarch_tdep (current_gdbarch
)->os_ident
!= os_ident
)
1966 return arches
->gdbarch
;
1969 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
1970 gdbarch
= gdbarch_alloc (&info
, tdep
);
1971 tdep
->os_ident
= os_ident
;
1973 if (os_ident
== ELFOSABI_LINUX
)
1974 tdep
->sigcontext_register_address
= ia64_linux_sigcontext_register_address
;
1976 tdep
->sigcontext_register_address
= 0;
1978 /* We know that Linux won't have to resort to the native_find_global_pointer
1979 hackery. But that's the only one we know about so far, so if
1980 native_find_global_pointer is set to something non-zero, then use
1981 it. Otherwise fall back to using generic_elf_find_global_pointer.
1982 This arrangement should (in theory) allow us to cross debug Linux
1983 binaries from an AIX machine. */
1984 if (os_ident
== ELFOSABI_LINUX
)
1985 tdep
->find_global_pointer
= generic_elf_find_global_pointer
;
1986 else if (native_find_global_pointer
!= 0)
1987 tdep
->find_global_pointer
= native_find_global_pointer
;
1989 tdep
->find_global_pointer
= generic_elf_find_global_pointer
;
1991 set_gdbarch_short_bit (gdbarch
, 16);
1992 set_gdbarch_int_bit (gdbarch
, 32);
1993 set_gdbarch_long_bit (gdbarch
, 64);
1994 set_gdbarch_long_long_bit (gdbarch
, 64);
1995 set_gdbarch_float_bit (gdbarch
, 32);
1996 set_gdbarch_double_bit (gdbarch
, 64);
1997 set_gdbarch_long_double_bit (gdbarch
, 64);
1998 set_gdbarch_ptr_bit (gdbarch
, 64);
2000 set_gdbarch_num_regs (gdbarch
, ia64_num_regs
);
2001 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
2002 set_gdbarch_fp_regnum (gdbarch
, fp_regnum
);
2003 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
2004 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
2006 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
2007 set_gdbarch_register_size (gdbarch
, 8);
2008 set_gdbarch_register_bytes (gdbarch
, ia64_num_regs
* 8 + 128*8);
2009 set_gdbarch_register_byte (gdbarch
, ia64_register_byte
);
2010 set_gdbarch_register_raw_size (gdbarch
, ia64_register_raw_size
);
2011 set_gdbarch_max_register_raw_size (gdbarch
, 16);
2012 set_gdbarch_register_virtual_size (gdbarch
, ia64_register_virtual_size
);
2013 set_gdbarch_max_register_virtual_size (gdbarch
, 16);
2014 set_gdbarch_register_virtual_type (gdbarch
, ia64_register_virtual_type
);
2016 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
2018 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2019 set_gdbarch_frameless_function_invocation (gdbarch
, ia64_frameless_function_invocation
);
2021 set_gdbarch_saved_pc_after_call (gdbarch
, ia64_saved_pc_after_call
);
2023 set_gdbarch_frame_chain (gdbarch
, ia64_frame_chain
);
2024 set_gdbarch_frame_chain_valid (gdbarch
, generic_func_frame_chain_valid
);
2025 set_gdbarch_frame_saved_pc (gdbarch
, ia64_frame_saved_pc
);
2027 set_gdbarch_frame_init_saved_regs (gdbarch
, ia64_frame_init_saved_regs
);
2028 set_gdbarch_get_saved_register (gdbarch
, ia64_get_saved_register
);
2030 set_gdbarch_register_convertible (gdbarch
, ia64_register_convertible
);
2031 set_gdbarch_register_convert_to_virtual (gdbarch
, ia64_register_convert_to_virtual
);
2032 set_gdbarch_register_convert_to_raw (gdbarch
, ia64_register_convert_to_raw
);
2034 set_gdbarch_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
2035 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
2037 set_gdbarch_store_struct_return (gdbarch
, ia64_store_struct_return
);
2038 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
2039 set_gdbarch_extract_struct_value_address (gdbarch
, ia64_extract_struct_value_address
);
2041 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
2042 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
2043 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
2044 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
2045 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
2047 /* Settings for calling functions in the inferior. */
2048 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
2049 set_gdbarch_call_dummy_length (gdbarch
, 0);
2050 set_gdbarch_push_arguments (gdbarch
, ia64_push_arguments
);
2051 set_gdbarch_push_return_address (gdbarch
, ia64_push_return_address
);
2052 set_gdbarch_pop_frame (gdbarch
, ia64_pop_frame
);
2054 set_gdbarch_call_dummy_p (gdbarch
, 1);
2055 set_gdbarch_call_dummy_words (gdbarch
, ia64_call_dummy_words
);
2056 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (ia64_call_dummy_words
));
2057 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2058 set_gdbarch_init_extra_frame_info (gdbarch
, ia64_init_extra_frame_info
);
2059 set_gdbarch_frame_args_address (gdbarch
, ia64_frame_args_address
);
2060 set_gdbarch_frame_locals_address (gdbarch
, ia64_frame_locals_address
);
2062 /* We won't necessarily have a frame pointer and even if we do,
2063 it winds up being extraordinarly messy when attempting to find
2064 the frame chain. So for the purposes of creating frames (which
2065 is all read_fp() is used for), simply use the stack pointer value
2067 set_gdbarch_read_fp (gdbarch
, generic_target_read_sp
);
2068 set_gdbarch_write_fp (gdbarch
, generic_target_write_sp
);
2070 /* Settings that should be unnecessary. */
2071 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2073 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2074 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2076 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
2077 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2078 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2079 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2080 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
2081 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2082 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2083 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
2085 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2086 set_gdbarch_function_start_offset (gdbarch
, 0);
2088 set_gdbarch_remote_translate_xfer_address (
2089 gdbarch
, ia64_remote_translate_xfer_address
);
2095 _initialize_ia64_tdep (void)
2097 register_gdbarch_init (bfd_arch_ia64
, ia64_gdbarch_init
);
2099 tm_print_insn
= print_insn_ia64
;
2100 tm_print_insn_info
.bytes_per_line
= SLOT_MULTIPLIER
;