1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "arch-utils.h"
25 #include "floatformat.h"
28 #include "reggroups.h"
30 #include "frame-base.h"
31 #include "frame-unwind.h"
34 #include "gdb_assert.h"
36 #include "elf/common.h" /* for DT_PLTGOT value */
41 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
49 /* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
64 #define KERNEL_START 0xc000000000000000ULL
66 static size_t ktab_size
= 0;
67 struct ia64_table_entry
69 uint64_t start_offset
;
74 static struct ia64_table_entry
*ktab
= NULL
;
78 /* An enumeration of the different IA-64 instruction types. */
80 typedef enum instruction_type
82 A
, /* Integer ALU ; I-unit or M-unit */
83 I
, /* Non-ALU integer; I-unit */
84 M
, /* Memory ; M-unit */
85 F
, /* Floating-point ; F-unit */
86 B
, /* Branch ; B-unit */
87 L
, /* Extended (L+X) ; I-unit */
88 X
, /* Extended (L+X) ; I-unit */
89 undefined
/* undefined or reserved */
92 /* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
107 #define SLOT_MULTIPLIER 1
109 /* Length in bytes of an instruction bundle */
111 #define BUNDLE_LEN 16
113 /* See the saved memory layout comment for ia64_memory_insert_breakpoint. */
115 #if BREAKPOINT_MAX < BUNDLE_LEN - 2
116 # error "BREAKPOINT_MAX < BUNDLE_LEN - 2"
119 static gdbarch_init_ftype ia64_gdbarch_init
;
121 static gdbarch_register_name_ftype ia64_register_name
;
122 static gdbarch_register_type_ftype ia64_register_type
;
123 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
124 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
125 static struct type
*is_float_or_hfa_type (struct type
*t
);
126 static CORE_ADDR
ia64_find_global_pointer (struct gdbarch
*gdbarch
,
129 #define NUM_IA64_RAW_REGS 462
131 static int sp_regnum
= IA64_GR12_REGNUM
;
132 static int fp_regnum
= IA64_VFP_REGNUM
;
133 static int lr_regnum
= IA64_VRAP_REGNUM
;
135 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
136 they may not be accessible via the ptrace register get/set interfaces. */
137 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
138 V127_REGNUM
= V32_REGNUM
+ 95,
139 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
141 /* Array of register names; There should be ia64_num_regs strings in
144 static char *ia64_register_names
[] =
145 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
146 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
147 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
148 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
158 "", "", "", "", "", "", "", "",
159 "", "", "", "", "", "", "", "",
160 "", "", "", "", "", "", "", "",
162 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
163 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
164 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
165 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
166 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
167 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
168 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
169 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
170 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
171 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
172 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
173 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
174 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
175 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
176 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
177 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "",
188 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
192 "pr", "ip", "psr", "cfm",
194 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
195 "", "", "", "", "", "", "", "",
196 "rsc", "bsp", "bspstore", "rnat",
198 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
199 "ccv", "", "", "", "unat", "", "", "",
200 "fpsr", "", "", "", "itc",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
205 "", "", "", "", "", "", "", "", "", "",
206 "", "", "", "", "", "", "", "", "", "",
207 "", "", "", "", "", "", "", "", "", "",
208 "", "", "", "", "", "", "", "", "", "",
209 "", "", "", "", "", "", "", "", "", "",
211 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
212 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
213 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
214 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
215 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
216 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
217 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
218 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
219 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
220 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
221 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
222 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
223 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
224 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
225 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
226 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
230 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
231 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
232 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
233 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
234 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
235 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
236 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
237 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
238 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
239 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
240 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
241 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
243 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
244 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
245 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
246 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
247 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
248 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
249 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
250 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
253 struct ia64_frame_cache
255 CORE_ADDR base
; /* frame pointer base for frame */
256 CORE_ADDR pc
; /* function start pc for frame */
257 CORE_ADDR saved_sp
; /* stack pointer for frame */
258 CORE_ADDR bsp
; /* points at r32 for the current frame */
259 CORE_ADDR cfm
; /* cfm value for current frame */
260 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
262 int sof
; /* Size of frame (decoded from cfm value) */
263 int sol
; /* Size of locals (decoded from cfm value) */
264 int sor
; /* Number of rotating registers. (decoded from cfm value) */
265 CORE_ADDR after_prologue
;
266 /* Address of first instruction after the last
267 prologue instruction; Note that there may
268 be instructions from the function's body
269 intermingled with the prologue. */
270 int mem_stack_frame_size
;
271 /* Size of the memory stack frame (may be zero),
272 or -1 if it has not been determined yet. */
273 int fp_reg
; /* Register number (if any) used a frame pointer
274 for this frame. 0 if no register is being used
275 as the frame pointer. */
277 /* Saved registers. */
278 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
283 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
288 static const struct floatformat floatformat_ia64_ext
=
290 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
291 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
, NULL
294 static const struct floatformat
*floatformats_ia64_ext
[2] =
296 &floatformat_ia64_ext
,
297 &floatformat_ia64_ext
301 ia64_ext_type (struct gdbarch
*gdbarch
)
303 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
305 if (!tdep
->ia64_ext_type
)
307 = arch_float_type (gdbarch
, 128, "builtin_type_ia64_ext",
308 floatformats_ia64_ext
);
310 return tdep
->ia64_ext_type
;
314 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
315 struct reggroup
*group
)
320 if (group
== all_reggroup
)
322 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
323 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
324 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
325 if (group
== float_reggroup
)
327 if (group
== vector_reggroup
)
329 if (group
== general_reggroup
)
330 return (!vector_p
&& !float_p
);
331 if (group
== save_reggroup
|| group
== restore_reggroup
)
337 ia64_register_name (struct gdbarch
*gdbarch
, int reg
)
339 return ia64_register_names
[reg
];
343 ia64_register_type (struct gdbarch
*arch
, int reg
)
345 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
346 return ia64_ext_type (arch
);
348 return builtin_type (arch
)->builtin_long
;
352 ia64_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
354 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
355 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
360 /* Extract ``len'' bits from an instruction bundle starting at
364 extract_bit_field (const char *bundle
, int from
, int len
)
366 long long result
= 0LL;
368 int from_byte
= from
/ 8;
369 int to_byte
= to
/ 8;
370 unsigned char *b
= (unsigned char *) bundle
;
376 if (from_byte
== to_byte
)
377 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
378 result
= c
>> (from
% 8);
379 lshift
= 8 - (from
% 8);
381 for (i
= from_byte
+1; i
< to_byte
; i
++)
383 result
|= ((long long) b
[i
]) << lshift
;
387 if (from_byte
< to_byte
&& (to
% 8 != 0))
390 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
391 result
|= ((long long) c
) << lshift
;
397 /* Replace the specified bits in an instruction bundle */
400 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
403 int from_byte
= from
/ 8;
404 int to_byte
= to
/ 8;
405 unsigned char *b
= (unsigned char *) bundle
;
408 if (from_byte
== to_byte
)
410 unsigned char left
, right
;
412 left
= (c
>> (to
% 8)) << (to
% 8);
413 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
414 c
= (unsigned char) (val
& 0xff);
415 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
423 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
424 c
= c
| (val
<< (from
% 8));
426 val
>>= 8 - from
% 8;
428 for (i
= from_byte
+1; i
< to_byte
; i
++)
437 unsigned char cv
= (unsigned char) val
;
439 c
= c
>> (to
% 8) << (to
% 8);
440 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
446 /* Return the contents of slot N (for N = 0, 1, or 2) in
447 and instruction bundle */
450 slotN_contents (char *bundle
, int slotnum
)
452 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
455 /* Store an instruction in an instruction bundle */
458 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
460 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
463 static const enum instruction_type template_encoding_table
[32][3] =
465 { M
, I
, I
}, /* 00 */
466 { M
, I
, I
}, /* 01 */
467 { M
, I
, I
}, /* 02 */
468 { M
, I
, I
}, /* 03 */
469 { M
, L
, X
}, /* 04 */
470 { M
, L
, X
}, /* 05 */
471 { undefined
, undefined
, undefined
}, /* 06 */
472 { undefined
, undefined
, undefined
}, /* 07 */
473 { M
, M
, I
}, /* 08 */
474 { M
, M
, I
}, /* 09 */
475 { M
, M
, I
}, /* 0A */
476 { M
, M
, I
}, /* 0B */
477 { M
, F
, I
}, /* 0C */
478 { M
, F
, I
}, /* 0D */
479 { M
, M
, F
}, /* 0E */
480 { M
, M
, F
}, /* 0F */
481 { M
, I
, B
}, /* 10 */
482 { M
, I
, B
}, /* 11 */
483 { M
, B
, B
}, /* 12 */
484 { M
, B
, B
}, /* 13 */
485 { undefined
, undefined
, undefined
}, /* 14 */
486 { undefined
, undefined
, undefined
}, /* 15 */
487 { B
, B
, B
}, /* 16 */
488 { B
, B
, B
}, /* 17 */
489 { M
, M
, B
}, /* 18 */
490 { M
, M
, B
}, /* 19 */
491 { undefined
, undefined
, undefined
}, /* 1A */
492 { undefined
, undefined
, undefined
}, /* 1B */
493 { M
, F
, B
}, /* 1C */
494 { M
, F
, B
}, /* 1D */
495 { undefined
, undefined
, undefined
}, /* 1E */
496 { undefined
, undefined
, undefined
}, /* 1F */
499 /* Fetch and (partially) decode an instruction at ADDR and return the
500 address of the next instruction to fetch. */
503 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
505 char bundle
[BUNDLE_LEN
];
506 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
510 /* Warn about slot numbers greater than 2. We used to generate
511 an error here on the assumption that the user entered an invalid
512 address. But, sometimes GDB itself requests an invalid address.
513 This can (easily) happen when execution stops in a function for
514 which there are no symbols. The prologue scanner will attempt to
515 find the beginning of the function - if the nearest symbol
516 happens to not be aligned on a bundle boundary (16 bytes), the
517 resulting starting address will cause GDB to think that the slot
520 So we warn about it and set the slot number to zero. It is
521 not necessarily a fatal condition, particularly if debugging
522 at the assembly language level. */
525 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
526 "Using slot 0 instead"));
532 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
537 *instr
= slotN_contents (bundle
, slotnum
);
538 template = extract_bit_field (bundle
, 0, 5);
539 *it
= template_encoding_table
[(int)template][slotnum
];
541 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
544 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
549 /* There are 5 different break instructions (break.i, break.b,
550 break.m, break.f, and break.x), but they all have the same
551 encoding. (The five bit template in the low five bits of the
552 instruction bundle distinguishes one from another.)
554 The runtime architecture manual specifies that break instructions
555 used for debugging purposes must have the upper two bits of the 21
556 bit immediate set to a 0 and a 1 respectively. A breakpoint
557 instruction encodes the most significant bit of its 21 bit
558 immediate at bit 36 of the 41 bit instruction. The penultimate msb
559 is at bit 25 which leads to the pattern below.
561 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
562 it turns out that 0x80000 was used as the syscall break in the early
563 simulators. So I changed the pattern slightly to do "break.i 0x080001"
564 instead. But that didn't work either (I later found out that this
565 pattern was used by the simulator that I was using.) So I ended up
566 using the pattern seen below.
568 SHADOW_CONTENTS has byte-based addressing (PLACED_ADDRESS and SHADOW_LEN)
569 while we need bit-based addressing as the instructions length is 41 bits and
570 we must not modify/corrupt the adjacent slots in the same bundle.
571 Fortunately we may store larger memory incl. the adjacent bits with the
572 original memory content (not the possibly already stored breakpoints there).
573 We need to be careful in ia64_memory_remove_breakpoint to always restore
574 only the specific bits of this instruction ignoring any adjacent stored
577 We use the original addressing with the low nibble in the range <0..2> which
578 gets incorrectly interpreted by generic non-ia64 breakpoint_restore_shadows
579 as the direct byte offset of SHADOW_CONTENTS. We store whole BUNDLE_LEN
580 bytes just without these two possibly skipped bytes to not to exceed to the
583 If we would like to store the whole bundle to SHADOW_CONTENTS we would have
584 to store already the base address (`address & ~0x0f') into PLACED_ADDRESS.
585 In such case there is no other place where to store
586 SLOTNUM (`adress & 0x0f', value in the range <0..2>). We need to know
587 SLOTNUM in ia64_memory_remove_breakpoint.
589 ia64 16-byte bundle layout:
590 | 5 bits | slot 0 with 41 bits | slot 1 with 41 bits | slot 2 with 41 bits |
592 The current addressing used by the code below:
593 original PC placed_address placed_size required covered
594 == bp_tgt->shadow_len reqd \subset covered
595 0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
596 0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
597 0xABCDE1 L-X 0xABCDE1 L-X 0xF <0xA...0xF> <0x1..0xF>
598 L is always in slot 1 and X is always in slot 2, while the address is
599 using slot 1 the breakpoint instruction must be placed
600 to the slot 2 (requiring to shadow that last byte at 0xF).
601 0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
603 `objdump -d' and some other tools show a bit unjustified offsets:
604 original PC byte where starts the instruction objdump offset
605 0xABCDE0 0xABCDE0 0xABCDE0
606 0xABCDE1 0xABCDE5 0xABCDE6
607 0xABCDE2 0xABCDEA 0xABCDEC
610 #define IA64_BREAKPOINT 0x00003333300LL
613 ia64_memory_insert_breakpoint (struct gdbarch
*gdbarch
,
614 struct bp_target_info
*bp_tgt
)
616 CORE_ADDR addr
= bp_tgt
->placed_address
;
617 gdb_byte bundle
[BUNDLE_LEN
];
618 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
619 long long instr_breakpoint
;
622 struct cleanup
*cleanup
;
625 error (_("Can't insert breakpoint for slot numbers greater than 2."));
629 /* Enable the automatic memory restoration from breakpoints while
630 we read our instruction bundle for the purpose of SHADOW_CONTENTS.
631 Otherwise, we could possibly store into the shadow parts of the adjacent
632 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
633 breakpoint instruction bits region. */
634 cleanup
= make_show_memory_breakpoints_cleanup (0);
635 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
638 do_cleanups (cleanup
);
642 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
643 for addressing the SHADOW_CONTENTS placement. */
644 shadow_slotnum
= slotnum
;
646 /* Cover always the last byte of the bundle for the L-X slot case. */
647 bp_tgt
->shadow_len
= BUNDLE_LEN
- shadow_slotnum
;
649 /* Check for L type instruction in slot 1, if present then bump up the slot
650 number to the slot 2. */
651 template = extract_bit_field (bundle
, 0, 5);
652 if (template_encoding_table
[template][slotnum
] == X
)
654 gdb_assert (slotnum
== 2);
655 error (_("Can't insert breakpoint for non-existing slot X"));
657 if (template_encoding_table
[template][slotnum
] == L
)
659 gdb_assert (slotnum
== 1);
663 /* Store the whole bundle, except for the initial skipped bytes by the slot
664 number interpreted as bytes offset in PLACED_ADDRESS. */
665 memcpy (bp_tgt
->shadow_contents
, bundle
+ shadow_slotnum
, bp_tgt
->shadow_len
);
667 /* Re-read the same bundle as above except that, this time, read it in order
668 to compute the new bundle inside which we will be inserting the
669 breakpoint. Therefore, disable the automatic memory restoration from
670 breakpoints while we read our instruction bundle. Otherwise, the general
671 restoration mechanism kicks in and we would possibly remove parts of the
672 adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
673 the real breakpoint instruction bits region. */
674 make_show_memory_breakpoints_cleanup (1);
675 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
678 do_cleanups (cleanup
);
682 /* Breakpoints already present in the code will get deteacted and not get
683 reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
684 location cannot induce the internal error as they are optimized into
685 a single instance by update_global_location_list. */
686 instr_breakpoint
= slotN_contents (bundle
, slotnum
);
687 if (instr_breakpoint
== IA64_BREAKPOINT
)
688 internal_error (__FILE__
, __LINE__
,
689 _("Address %s already contains a breakpoint."),
690 paddress (gdbarch
, bp_tgt
->placed_address
));
691 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
693 bp_tgt
->placed_size
= bp_tgt
->shadow_len
;
695 val
= target_write_memory (addr
+ shadow_slotnum
, bundle
+ shadow_slotnum
,
698 do_cleanups (cleanup
);
703 ia64_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
704 struct bp_target_info
*bp_tgt
)
706 CORE_ADDR addr
= bp_tgt
->placed_address
;
707 gdb_byte bundle_mem
[BUNDLE_LEN
], bundle_saved
[BUNDLE_LEN
];
708 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
709 long long instr_breakpoint
, instr_saved
;
712 struct cleanup
*cleanup
;
716 /* Disable the automatic memory restoration from breakpoints while
717 we read our instruction bundle. Otherwise, the general restoration
718 mechanism kicks in and we would possibly remove parts of the adjacent
719 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
720 breakpoint instruction bits region. */
721 cleanup
= make_show_memory_breakpoints_cleanup (1);
722 val
= target_read_memory (addr
, bundle_mem
, BUNDLE_LEN
);
725 do_cleanups (cleanup
);
729 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
730 for addressing the SHADOW_CONTENTS placement. */
731 shadow_slotnum
= slotnum
;
733 /* Check for L type instruction in slot 1, if present then bump up the slot
734 number to the slot 2. */
735 template = extract_bit_field (bundle_mem
, 0, 5);
736 if (template_encoding_table
[template][slotnum
] == X
)
738 gdb_assert (slotnum
== 2);
739 warning (_("Cannot remove breakpoint at address %s "
740 "from non-existing slot X, memory has changed underneath"),
741 paddress (gdbarch
, bp_tgt
->placed_address
));
742 do_cleanups (cleanup
);
745 if (template_encoding_table
[template][slotnum
] == L
)
747 gdb_assert (slotnum
== 1);
751 gdb_assert (bp_tgt
->placed_size
== BUNDLE_LEN
- shadow_slotnum
);
752 gdb_assert (bp_tgt
->placed_size
== bp_tgt
->shadow_len
);
754 instr_breakpoint
= slotN_contents (bundle_mem
, slotnum
);
755 if (instr_breakpoint
!= IA64_BREAKPOINT
)
757 warning (_("Cannot remove breakpoint at address %s, "
758 "no break instruction at such address."),
759 paddress (gdbarch
, bp_tgt
->placed_address
));
760 do_cleanups (cleanup
);
764 /* Extract the original saved instruction from SLOTNUM normalizing its
765 bit-shift for INSTR_SAVED. */
766 memcpy (bundle_saved
, bundle_mem
, BUNDLE_LEN
);
767 memcpy (bundle_saved
+ shadow_slotnum
, bp_tgt
->shadow_contents
,
769 instr_saved
= slotN_contents (bundle_saved
, slotnum
);
771 /* In BUNDLE_MEM be careful to modify only the bits belonging to SLOTNUM and
772 never any other possibly also stored in SHADOW_CONTENTS. */
773 replace_slotN_contents (bundle_mem
, instr_saved
, slotnum
);
774 val
= target_write_memory (addr
, bundle_mem
, BUNDLE_LEN
);
776 do_cleanups (cleanup
);
780 /* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
781 instruction slots ranges are bit-granular (41 bits) we have to provide an
782 extended range as described for ia64_memory_insert_breakpoint. We also take
783 care of preserving the `break' instruction 21-bit (or 62-bit) parameter to
784 make a match for permanent breakpoints. */
786 static const gdb_byte
*
787 ia64_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pcptr
, int *lenptr
)
789 CORE_ADDR addr
= *pcptr
;
790 static gdb_byte bundle
[BUNDLE_LEN
];
791 int slotnum
= (int) (*pcptr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
792 long long instr_fetched
;
795 struct cleanup
*cleanup
;
798 error (_("Can't insert breakpoint for slot numbers greater than 2."));
802 /* Enable the automatic memory restoration from breakpoints while
803 we read our instruction bundle to match bp_loc_is_permanent. */
804 cleanup
= make_show_memory_breakpoints_cleanup (0);
805 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
806 do_cleanups (cleanup
);
808 /* The memory might be unreachable. This can happen, for instance,
809 when the user inserts a breakpoint at an invalid address. */
813 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
814 for addressing the SHADOW_CONTENTS placement. */
815 shadow_slotnum
= slotnum
;
817 /* Cover always the last byte of the bundle for the L-X slot case. */
818 *lenptr
= BUNDLE_LEN
- shadow_slotnum
;
820 /* Check for L type instruction in slot 1, if present then bump up the slot
821 number to the slot 2. */
822 template = extract_bit_field (bundle
, 0, 5);
823 if (template_encoding_table
[template][slotnum
] == X
)
825 gdb_assert (slotnum
== 2);
826 error (_("Can't insert breakpoint for non-existing slot X"));
828 if (template_encoding_table
[template][slotnum
] == L
)
830 gdb_assert (slotnum
== 1);
834 /* A break instruction has its all its opcode bits cleared except for
835 the parameter value. For L+X slot pair we are at the X slot (slot 2) so
836 we should not touch the L slot - the upper 41 bits of the parameter. */
837 instr_fetched
= slotN_contents (bundle
, slotnum
);
838 instr_fetched
&= 0x1003ffffc0LL
;
839 replace_slotN_contents (bundle
, instr_fetched
, slotnum
);
841 return bundle
+ shadow_slotnum
;
845 ia64_read_pc (struct regcache
*regcache
)
847 ULONGEST psr_value
, pc_value
;
850 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
851 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &pc_value
);
852 slot_num
= (psr_value
>> 41) & 3;
854 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
858 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
860 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
863 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
864 psr_value
&= ~(3LL << 41);
865 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
869 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
870 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
873 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
875 /* Returns the address of the slot that's NSLOTS slots away from
876 the address ADDR. NSLOTS may be positive or negative. */
878 rse_address_add(CORE_ADDR addr
, int nslots
)
881 int mandatory_nat_slots
= nslots
/ 63;
882 int direction
= nslots
< 0 ? -1 : 1;
884 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
886 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
887 new_addr
+= 8 * direction
;
889 if (IS_NaT_COLLECTION_ADDR(new_addr
))
890 new_addr
+= 8 * direction
;
896 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
897 int regnum
, gdb_byte
*buf
)
899 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
901 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
903 #ifdef HAVE_LIBUNWIND_IA64_H
904 /* First try and use the libunwind special reg accessor, otherwise fallback to
906 if (!libunwind_is_initialized ()
907 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
910 /* The fallback position is to assume that r32-r127 are found sequentially
911 in memory starting at $bof. This isn't always true, but without libunwind,
912 this is the best we can do. */
916 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
917 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
919 /* The bsp points at the end of the register frame so we
920 subtract the size of frame from it to get start of register frame. */
921 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
923 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
925 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
926 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8, byte_order
);
927 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
931 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
935 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
939 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
940 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
941 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
942 byte_order
, unatN_val
);
944 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
946 ULONGEST natN_val
= 0;
949 CORE_ADDR gr_addr
= 0;
950 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
951 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
953 /* The bsp points at the end of the register frame so we
954 subtract the size of frame from it to get start of register frame. */
955 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
957 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
958 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
962 /* Compute address of nat collection bits. */
963 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
964 CORE_ADDR nat_collection
;
966 /* If our nat collection address is bigger than bsp, we have to get
967 the nat collection from rnat. Otherwise, we fetch the nat
968 collection from the computed address. */
970 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
972 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
973 nat_bit
= (gr_addr
>> 3) & 0x3f;
974 natN_val
= (nat_collection
>> nat_bit
) & 1;
977 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
978 byte_order
, natN_val
);
980 else if (regnum
== VBOF_REGNUM
)
982 /* A virtual register frame start is provided for user convenience.
983 It can be calculated as the bsp - sof (sizeof frame). */
987 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
988 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
990 /* The bsp points at the end of the register frame so we
991 subtract the size of frame from it to get beginning of frame. */
992 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
993 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
996 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1002 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
1003 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1005 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1007 /* Fetch predicate register rename base from current frame
1008 marker for this frame. */
1009 int rrb_pr
= (cfm
>> 32) & 0x3f;
1011 /* Adjust the register number to account for register rotation. */
1012 regnum
= VP16_REGNUM
1013 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1015 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
1016 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1017 byte_order
, prN_val
);
1020 memset (buf
, 0, register_size (gdbarch
, regnum
));
1024 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1025 int regnum
, const gdb_byte
*buf
)
1027 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1029 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
1034 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1035 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1037 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1039 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1041 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1042 write_memory (reg_addr
, (void *)buf
, 8);
1045 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1047 ULONGEST unatN_val
, unat
, unatN_mask
;
1048 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
1049 unatN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1051 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
1053 unat
&= ~unatN_mask
;
1054 else if (unatN_val
== 1)
1056 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
1058 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1063 CORE_ADDR gr_addr
= 0;
1064 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1065 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1067 /* The bsp points at the end of the register frame so we
1068 subtract the size of frame from it to get start of register frame. */
1069 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1071 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1072 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1074 natN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1077 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
1079 /* Compute address of nat collection bits. */
1080 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1081 CORE_ADDR nat_collection
;
1082 int natN_bit
= (gr_addr
>> 3) & 0x3f;
1083 ULONGEST natN_mask
= (1LL << natN_bit
);
1084 /* If our nat collection address is bigger than bsp, we have to get
1085 the nat collection from rnat. Otherwise, we fetch the nat
1086 collection from the computed address. */
1087 if (nat_addr
>= bsp
)
1089 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
1091 nat_collection
|= natN_mask
;
1093 nat_collection
&= ~natN_mask
;
1094 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
1099 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1101 nat_collection
|= natN_mask
;
1103 nat_collection
&= ~natN_mask
;
1104 store_unsigned_integer (nat_buf
, register_size (gdbarch
, regnum
),
1105 byte_order
, nat_collection
);
1106 write_memory (nat_addr
, nat_buf
, 8);
1110 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1117 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
1118 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1120 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1122 /* Fetch predicate register rename base from current frame
1123 marker for this frame. */
1124 int rrb_pr
= (cfm
>> 32) & 0x3f;
1126 /* Adjust the register number to account for register rotation. */
1127 regnum
= VP16_REGNUM
1128 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1130 prN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1132 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
1135 else if (prN_val
== 1)
1137 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
1141 /* The ia64 needs to convert between various ieee floating-point formats
1142 and the special ia64 floating point register format. */
1145 ia64_convert_register_p (struct gdbarch
*gdbarch
, int regno
, struct type
*type
)
1147 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
1148 && type
!= ia64_ext_type (gdbarch
));
1152 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
1153 struct type
*valtype
, gdb_byte
*out
)
1155 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1156 char in
[MAX_REGISTER_SIZE
];
1157 frame_register_read (frame
, regnum
, in
);
1158 convert_typed_floating (in
, ia64_ext_type (gdbarch
), out
, valtype
);
1162 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
1163 struct type
*valtype
, const gdb_byte
*in
)
1165 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1166 char out
[MAX_REGISTER_SIZE
];
1167 convert_typed_floating (in
, valtype
, out
, ia64_ext_type (gdbarch
));
1168 put_frame_register (frame
, regnum
, out
);
1172 /* Limit the number of skipped non-prologue instructions since examining
1173 of the prologue is expensive. */
1174 static int max_skip_non_prologue_insns
= 40;
1176 /* Given PC representing the starting address of a function, and
1177 LIM_PC which is the (sloppy) limit to which to scan when looking
1178 for a prologue, attempt to further refine this limit by using
1179 the line data in the symbol table. If successful, a better guess
1180 on where the prologue ends is returned, otherwise the previous
1181 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
1182 which will be set to indicate whether the returned limit may be
1183 used with no further scanning in the event that the function is
1186 /* FIXME: cagney/2004-02-14: This function and logic have largely been
1187 superseded by skip_prologue_using_sal. */
1190 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
1192 struct symtab_and_line prologue_sal
;
1193 CORE_ADDR start_pc
= pc
;
1196 /* The prologue can not possibly go past the function end itself,
1197 so we can already adjust LIM_PC accordingly. */
1198 if (find_pc_partial_function (pc
, NULL
, NULL
, &end_pc
) && end_pc
< lim_pc
)
1201 /* Start off not trusting the limit. */
1204 prologue_sal
= find_pc_line (pc
, 0);
1205 if (prologue_sal
.line
!= 0)
1208 CORE_ADDR addr
= prologue_sal
.end
;
1210 /* Handle the case in which compiler's optimizer/scheduler
1211 has moved instructions into the prologue. We scan ahead
1212 in the function looking for address ranges whose corresponding
1213 line number is less than or equal to the first one that we
1214 found for the function. (It can be less than when the
1215 scheduler puts a body instruction before the first prologue
1217 for (i
= 2 * max_skip_non_prologue_insns
;
1218 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
1221 struct symtab_and_line sal
;
1223 sal
= find_pc_line (addr
, 0);
1226 if (sal
.line
<= prologue_sal
.line
1227 && sal
.symtab
== prologue_sal
.symtab
)
1234 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1236 lim_pc
= prologue_sal
.end
;
1237 if (start_pc
== get_pc_function_start (lim_pc
))
1244 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1245 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1246 || (14 <= (_regnum_) && (_regnum_) <= 31))
1247 #define imm9(_instr_) \
1248 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1249 | (((_instr_) & 0x00008000000LL) >> 20) \
1250 | (((_instr_) & 0x00000001fc0LL) >> 6))
1252 /* Allocate and initialize a frame cache. */
1254 static struct ia64_frame_cache
*
1255 ia64_alloc_frame_cache (void)
1257 struct ia64_frame_cache
*cache
;
1260 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1266 cache
->prev_cfm
= 0;
1272 cache
->frameless
= 1;
1274 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1275 cache
->saved_regs
[i
] = 0;
1281 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
,
1282 struct frame_info
*this_frame
,
1283 struct ia64_frame_cache
*cache
)
1286 CORE_ADDR last_prologue_pc
= pc
;
1287 instruction_type it
;
1292 int unat_save_reg
= 0;
1293 int pr_save_reg
= 0;
1294 int mem_stack_frame_size
= 0;
1296 CORE_ADDR spill_addr
= 0;
1299 char reg_contents
[256];
1305 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1307 memset (instores
, 0, sizeof instores
);
1308 memset (infpstores
, 0, sizeof infpstores
);
1309 memset (reg_contents
, 0, sizeof reg_contents
);
1311 if (cache
->after_prologue
!= 0
1312 && cache
->after_prologue
<= lim_pc
)
1313 return cache
->after_prologue
;
1315 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1316 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1318 /* We want to check if we have a recognizable function start before we
1319 look ahead for a prologue. */
1320 if (pc
< lim_pc
&& next_pc
1321 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1323 /* alloc - start of a regular function. */
1324 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1325 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1326 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1327 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1329 /* Verify that the current cfm matches what we think is the
1330 function start. If we have somehow jumped within a function,
1331 we do not want to interpret the prologue and calculate the
1332 addresses of various registers such as the return address.
1333 We will instead treat the frame as frameless. */
1335 (sof
== (cache
->cfm
& 0x7f) &&
1336 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1340 last_prologue_pc
= next_pc
;
1345 /* Look for a leaf routine. */
1346 if (pc
< lim_pc
&& next_pc
1347 && (it
== I
|| it
== M
)
1348 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1350 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1351 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1352 | ((instr
& 0x001f8000000LL
) >> 20)
1353 | ((instr
& 0x000000fe000LL
) >> 13));
1354 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1355 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1356 int qp
= (int) (instr
& 0x0000000003fLL
);
1357 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1359 /* mov r2, r12 - beginning of leaf routine */
1361 last_prologue_pc
= next_pc
;
1365 /* If we don't recognize a regular function or leaf routine, we are
1371 last_prologue_pc
= lim_pc
;
1375 /* Loop, looking for prologue instructions, keeping track of
1376 where preserved registers were spilled. */
1379 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1383 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1385 /* Exit loop upon hitting a non-nop branch instruction. */
1390 else if (((instr
& 0x3fLL
) != 0LL) &&
1391 (frameless
|| ret_reg
!= 0))
1393 /* Exit loop upon hitting a predicated instruction if
1394 we already have the return register or if we are frameless. */
1399 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1402 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1403 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1404 int qp
= (int) (instr
& 0x0000000003f);
1406 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1409 last_prologue_pc
= next_pc
;
1412 else if ((it
== I
|| it
== M
)
1413 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1415 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1416 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1417 | ((instr
& 0x001f8000000LL
) >> 20)
1418 | ((instr
& 0x000000fe000LL
) >> 13));
1419 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1420 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1421 int qp
= (int) (instr
& 0x0000000003fLL
);
1423 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1427 last_prologue_pc
= next_pc
;
1429 else if (qp
== 0 && rN
== 12 && rM
== 12)
1431 /* adds r12, -mem_stack_frame_size, r12 */
1432 mem_stack_frame_size
-= imm
;
1433 last_prologue_pc
= next_pc
;
1435 else if (qp
== 0 && rN
== 2
1436 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1438 char buf
[MAX_REGISTER_SIZE
];
1439 CORE_ADDR saved_sp
= 0;
1440 /* adds r2, spilloffset, rFramePointer
1442 adds r2, spilloffset, r12
1444 Get ready for stf.spill or st8.spill instructions.
1445 The address to start spilling at is loaded into r2.
1446 FIXME: Why r2? That's what gcc currently uses; it
1447 could well be different for other compilers. */
1449 /* Hmm... whether or not this will work will depend on
1450 where the pc is. If it's still early in the prologue
1451 this'll be wrong. FIXME */
1454 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1455 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1456 get_frame_register (this_frame
, sp_regnum
, buf
);
1457 saved_sp
= extract_unsigned_integer (buf
, 8, byte_order
);
1459 spill_addr
= saved_sp
1460 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1463 last_prologue_pc
= next_pc
;
1465 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
-32] &&
1466 rN
< 256 && imm
== 0)
1468 /* mov rN, rM where rM is an input register */
1469 reg_contents
[rN
] = rM
;
1470 last_prologue_pc
= next_pc
;
1472 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1476 last_prologue_pc
= next_pc
;
1481 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1482 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1484 /* stf.spill [rN] = fM, imm9
1486 stf.spill [rN] = fM */
1488 int imm
= imm9(instr
);
1489 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1490 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1491 int qp
= (int) (instr
& 0x0000000003fLL
);
1492 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1493 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1495 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1497 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1500 spill_addr
= 0; /* last one; must be done */
1501 last_prologue_pc
= next_pc
;
1504 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1505 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1511 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1512 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1513 int qp
= (int) (instr
& 0x0000000003fLL
);
1514 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1516 /* We have something like "mov.m r3 = ar.unat". Remember the
1517 r3 (or whatever) and watch for a store of this register... */
1519 last_prologue_pc
= next_pc
;
1522 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1525 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1526 int qp
= (int) (instr
& 0x0000000003fLL
);
1527 if (qp
== 0 && isScratch (rN
))
1530 last_prologue_pc
= next_pc
;
1534 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1535 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1539 st8 [rN] = rM, imm9 */
1540 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1541 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1542 int qp
= (int) (instr
& 0x0000000003fLL
);
1543 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1544 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1545 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1547 /* We've found a spill of either the UNAT register or the PR
1548 register. (Well, not exactly; what we've actually found is
1549 a spill of the register that UNAT or PR was moved to).
1550 Record that fact and move on... */
1551 if (rM
== unat_save_reg
)
1553 /* Track UNAT register */
1554 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1559 /* Track PR register */
1560 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1563 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1564 /* st8 [rN] = rM, imm9 */
1565 spill_addr
+= imm9(instr
);
1567 spill_addr
= 0; /* must be done spilling */
1568 last_prologue_pc
= next_pc
;
1570 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1572 /* Allow up to one store of each input register. */
1573 instores
[rM
-32] = 1;
1574 last_prologue_pc
= next_pc
;
1576 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1577 !instores
[indirect
-32])
1579 /* Allow an indirect store of an input register. */
1580 instores
[indirect
-32] = 1;
1581 last_prologue_pc
= next_pc
;
1584 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1591 Note that the st8 case is handled in the clause above.
1593 Advance over stores of input registers. One store per input
1594 register is permitted. */
1595 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1596 int qp
= (int) (instr
& 0x0000000003fLL
);
1597 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1598 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1600 instores
[rM
-32] = 1;
1601 last_prologue_pc
= next_pc
;
1603 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1604 !instores
[indirect
-32])
1606 /* Allow an indirect store of an input register. */
1607 instores
[indirect
-32] = 1;
1608 last_prologue_pc
= next_pc
;
1611 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1618 Advance over stores of floating point input registers. Again
1619 one store per register is permitted */
1620 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1621 int qp
= (int) (instr
& 0x0000000003fLL
);
1622 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1624 infpstores
[fM
-8] = 1;
1625 last_prologue_pc
= next_pc
;
1629 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1630 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1632 /* st8.spill [rN] = rM
1634 st8.spill [rN] = rM, imm9 */
1635 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1636 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1637 int qp
= (int) (instr
& 0x0000000003fLL
);
1638 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1640 /* We've found a spill of one of the preserved general purpose
1641 regs. Record the spill address and advance the spill
1642 register if appropriate. */
1643 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1644 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1645 /* st8.spill [rN] = rM, imm9 */
1646 spill_addr
+= imm9(instr
);
1648 spill_addr
= 0; /* Done spilling */
1649 last_prologue_pc
= next_pc
;
1656 /* If not frameless and we aren't called by skip_prologue, then we need
1657 to calculate registers for the previous frame which will be needed
1660 if (!frameless
&& this_frame
)
1662 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1663 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1665 /* Extract the size of the rotating portion of the stack
1666 frame and the register rename base from the current
1672 rrb_gr
= (cfm
>> 18) & 0x7f;
1674 /* Find the bof (beginning of frame). */
1675 bof
= rse_address_add (cache
->bsp
, -sof
);
1677 for (i
= 0, addr
= bof
;
1681 if (IS_NaT_COLLECTION_ADDR (addr
))
1685 if (i
+32 == cfm_reg
)
1686 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1687 if (i
+32 == ret_reg
)
1688 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1690 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1693 /* For the previous argument registers we require the previous bof.
1694 If we can't find the previous cfm, then we can do nothing. */
1696 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1698 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
],
1701 else if (cfm_reg
!= 0)
1703 get_frame_register (this_frame
, cfm_reg
, buf
);
1704 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1706 cache
->prev_cfm
= cfm
;
1710 sor
= ((cfm
>> 14) & 0xf) * 8;
1712 sol
= (cfm
>> 7) & 0x7f;
1713 rrb_gr
= (cfm
>> 18) & 0x7f;
1715 /* The previous bof only requires subtraction of the sol (size of
1716 locals) due to the overlap between output and input of
1717 subsequent frames. */
1718 bof
= rse_address_add (bof
, -sol
);
1720 for (i
= 0, addr
= bof
;
1724 if (IS_NaT_COLLECTION_ADDR (addr
))
1729 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1732 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1738 /* Try and trust the lim_pc value whenever possible. */
1739 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1740 last_prologue_pc
= lim_pc
;
1742 cache
->frameless
= frameless
;
1743 cache
->after_prologue
= last_prologue_pc
;
1744 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1745 cache
->fp_reg
= fp_reg
;
1747 return last_prologue_pc
;
1751 ia64_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1753 struct ia64_frame_cache cache
;
1755 cache
.after_prologue
= 0;
1759 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1760 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1764 /* Normal frames. */
1766 static struct ia64_frame_cache
*
1767 ia64_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1769 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1770 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1771 struct ia64_frame_cache
*cache
;
1773 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1779 cache
= ia64_alloc_frame_cache ();
1780 *this_cache
= cache
;
1782 get_frame_register (this_frame
, sp_regnum
, buf
);
1783 cache
->saved_sp
= extract_unsigned_integer (buf
, 8, byte_order
);
1785 /* We always want the bsp to point to the end of frame.
1786 This way, we can always get the beginning of frame (bof)
1787 by subtracting frame size. */
1788 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
1789 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
1791 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
1792 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
1794 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
1795 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1797 cache
->sof
= (cfm
& 0x7f);
1798 cache
->sol
= (cfm
>> 7) & 0x7f;
1799 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1803 cache
->pc
= get_frame_func (this_frame
);
1806 examine_prologue (cache
->pc
, get_frame_pc (this_frame
), this_frame
, cache
);
1808 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1814 ia64_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1815 struct frame_id
*this_id
)
1817 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1818 struct ia64_frame_cache
*cache
=
1819 ia64_frame_cache (this_frame
, this_cache
);
1821 /* If outermost frame, mark with null frame id. */
1822 if (cache
->base
!= 0)
1823 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1824 if (gdbarch_debug
>= 1)
1825 fprintf_unfiltered (gdb_stdlog
,
1826 "regular frame id: code %s, stack %s, special %s, this_frame %s\n",
1827 paddress (gdbarch
, this_id
->code_addr
),
1828 paddress (gdbarch
, this_id
->stack_addr
),
1829 paddress (gdbarch
, cache
->bsp
),
1830 host_address_to_string (this_frame
));
1833 static struct value
*
1834 ia64_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
1837 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1838 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1839 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
1842 gdb_assert (regnum
>= 0);
1844 if (!target_has_registers
)
1845 error (_("No registers."));
1847 if (regnum
== gdbarch_sp_regnum (gdbarch
))
1848 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1850 else if (regnum
== IA64_BSP_REGNUM
)
1853 CORE_ADDR prev_cfm
, bsp
, prev_bsp
;
1855 /* We want to calculate the previous bsp as the end of the previous
1856 register stack frame. This corresponds to what the hardware bsp
1857 register will be if we pop the frame back which is why we might
1858 have been called. We know the beginning of the current frame is
1859 cache->bsp - cache->sof. This value in the previous frame points
1860 to the start of the output registers. We can calculate the end of
1861 that frame by adding the size of output:
1862 (sof (size of frame) - sol (size of locals)). */
1863 val
= ia64_frame_prev_register (this_frame
, this_cache
, IA64_CFM_REGNUM
);
1864 prev_cfm
= extract_unsigned_integer (value_contents_all (val
),
1866 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1868 rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1870 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
1873 else if (regnum
== IA64_CFM_REGNUM
)
1875 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1878 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
1880 if (cache
->prev_cfm
)
1881 return frame_unwind_got_constant (this_frame
, regnum
, cache
->prev_cfm
);
1883 if (cache
->frameless
)
1884 return frame_unwind_got_register (this_frame
, IA64_PFS_REGNUM
,
1886 return frame_unwind_got_register (this_frame
, regnum
, 0);
1889 else if (regnum
== IA64_VFP_REGNUM
)
1891 /* If the function in question uses an automatic register (r32-r127)
1892 for the frame pointer, it'll be found by ia64_find_saved_register()
1893 above. If the function lacks one of these frame pointers, we can
1894 still provide a value since we know the size of the frame. */
1895 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1898 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1900 struct value
*pr_val
;
1903 pr_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1905 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1907 /* Fetch predicate register rename base from current frame
1908 marker for this frame. */
1909 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1911 /* Adjust the register number to account for register rotation. */
1912 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1914 prN
= extract_bit_field (value_contents_all (pr_val
),
1915 regnum
- VP0_REGNUM
, 1);
1916 return frame_unwind_got_constant (this_frame
, regnum
, prN
);
1919 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1921 struct value
*unat_val
;
1923 unat_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1925 unatN
= extract_bit_field (value_contents_all (unat_val
),
1926 regnum
- IA64_NAT0_REGNUM
, 1);
1927 return frame_unwind_got_constant (this_frame
, regnum
, unatN
);
1930 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1933 /* Find address of general register corresponding to nat bit we're
1937 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
+ IA64_GR0_REGNUM
];
1941 /* Compute address of nat collection bits. */
1942 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1944 CORE_ADDR nat_collection
;
1947 /* If our nat collection address is bigger than bsp, we have to get
1948 the nat collection from rnat. Otherwise, we fetch the nat
1949 collection from the computed address. */
1950 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
1951 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
1952 if (nat_addr
>= bsp
)
1954 get_frame_register (this_frame
, IA64_RNAT_REGNUM
, buf
);
1955 nat_collection
= extract_unsigned_integer (buf
, 8, byte_order
);
1958 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1959 nat_bit
= (gr_addr
>> 3) & 0x3f;
1960 natval
= (nat_collection
>> nat_bit
) & 1;
1963 return frame_unwind_got_constant (this_frame
, regnum
, natval
);
1966 else if (regnum
== IA64_IP_REGNUM
)
1969 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1973 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
1974 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
1976 else if (cache
->frameless
)
1978 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
1979 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
1982 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
1985 else if (regnum
== IA64_PSR_REGNUM
)
1987 /* We don't know how to get the complete previous PSR, but we need it
1988 for the slot information when we unwind the pc (pc is formed of IP
1989 register plus slot information from PSR). To get the previous
1990 slot information, we mask it off the return address. */
1991 ULONGEST slot_num
= 0;
1994 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1996 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
1997 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2001 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2002 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2004 else if (cache
->frameless
)
2006 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2007 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2009 psr
&= ~(3LL << 41);
2010 slot_num
= pc
& 0x3LL
;
2011 psr
|= (CORE_ADDR
)slot_num
<< 41;
2012 return frame_unwind_got_constant (this_frame
, regnum
, psr
);
2015 else if (regnum
== IA64_BR0_REGNUM
)
2017 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
2020 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2022 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2025 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2026 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2030 if (regnum
>= V32_REGNUM
)
2031 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2032 addr
= cache
->saved_regs
[regnum
];
2034 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2036 if (cache
->frameless
)
2038 struct value
*reg_val
;
2039 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
2041 /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
2042 with the same code above? */
2043 if (regnum
>= V32_REGNUM
)
2044 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2045 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2047 prev_cfm
= extract_unsigned_integer (value_contents_all (reg_val
),
2049 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2051 prev_bsp
= extract_unsigned_integer (value_contents_all (reg_val
),
2053 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
2055 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
2056 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2059 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2062 else /* All other registers. */
2066 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
2068 /* Fetch floating point register rename base from current
2069 frame marker for this frame. */
2070 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
2072 /* Adjust the floating point register number to account for
2073 register rotation. */
2074 regnum
= IA64_FR32_REGNUM
2075 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
2078 /* If we have stored a memory address, access the register. */
2079 addr
= cache
->saved_regs
[regnum
];
2081 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2082 /* Otherwise, punt and get the current value of the register. */
2084 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2088 static const struct frame_unwind ia64_frame_unwind
=
2091 &ia64_frame_this_id
,
2092 &ia64_frame_prev_register
,
2094 default_frame_sniffer
2097 /* Signal trampolines. */
2100 ia64_sigtramp_frame_init_saved_regs (struct frame_info
*this_frame
,
2101 struct ia64_frame_cache
*cache
)
2103 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2104 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2106 if (tdep
->sigcontext_register_address
)
2110 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
2111 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, IA64_IP_REGNUM
);
2112 cache
->saved_regs
[IA64_CFM_REGNUM
] =
2113 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, IA64_CFM_REGNUM
);
2114 cache
->saved_regs
[IA64_PSR_REGNUM
] =
2115 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, IA64_PSR_REGNUM
);
2116 cache
->saved_regs
[IA64_BSP_REGNUM
] =
2117 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, IA64_BSP_REGNUM
);
2118 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
2119 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, IA64_RNAT_REGNUM
);
2120 cache
->saved_regs
[IA64_CCV_REGNUM
] =
2121 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, IA64_CCV_REGNUM
);
2122 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
2123 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, IA64_UNAT_REGNUM
);
2124 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
2125 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, IA64_FPSR_REGNUM
);
2126 cache
->saved_regs
[IA64_PFS_REGNUM
] =
2127 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, IA64_PFS_REGNUM
);
2128 cache
->saved_regs
[IA64_LC_REGNUM
] =
2129 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, IA64_LC_REGNUM
);
2130 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
2131 cache
->saved_regs
[regno
] =
2132 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2133 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
2134 cache
->saved_regs
[regno
] =
2135 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2136 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
2137 cache
->saved_regs
[regno
] =
2138 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2142 static struct ia64_frame_cache
*
2143 ia64_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2145 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2146 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2147 struct ia64_frame_cache
*cache
;
2155 cache
= ia64_alloc_frame_cache ();
2157 get_frame_register (this_frame
, sp_regnum
, buf
);
2158 /* Note that frame size is hard-coded below. We cannot calculate it
2159 via prologue examination. */
2160 cache
->base
= extract_unsigned_integer (buf
, 8, byte_order
) + 16;
2162 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2163 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2165 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2166 cache
->cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2167 cache
->sof
= cache
->cfm
& 0x7f;
2169 ia64_sigtramp_frame_init_saved_regs (this_frame
, cache
);
2171 *this_cache
= cache
;
2176 ia64_sigtramp_frame_this_id (struct frame_info
*this_frame
,
2177 void **this_cache
, struct frame_id
*this_id
)
2179 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2180 struct ia64_frame_cache
*cache
=
2181 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2183 (*this_id
) = frame_id_build_special (cache
->base
,
2184 get_frame_pc (this_frame
),
2186 if (gdbarch_debug
>= 1)
2187 fprintf_unfiltered (gdb_stdlog
,
2188 "sigtramp frame id: code %s, stack %s, special %s, this_frame %s\n",
2189 paddress (gdbarch
, this_id
->code_addr
),
2190 paddress (gdbarch
, this_id
->stack_addr
),
2191 paddress (gdbarch
, cache
->bsp
),
2192 host_address_to_string (this_frame
));
2195 static struct value
*
2196 ia64_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2197 void **this_cache
, int regnum
)
2199 char buf
[MAX_REGISTER_SIZE
];
2201 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2202 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2203 struct ia64_frame_cache
*cache
=
2204 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2206 gdb_assert (regnum
>= 0);
2208 if (!target_has_registers
)
2209 error (_("No registers."));
2211 if (regnum
== IA64_IP_REGNUM
)
2214 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2218 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2219 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2222 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2225 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2226 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2230 if (regnum
>= V32_REGNUM
)
2231 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2232 addr
= cache
->saved_regs
[regnum
];
2234 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2236 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2239 else /* All other registers not listed above. */
2241 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2244 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2246 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2251 ia64_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2252 struct frame_info
*this_frame
,
2255 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2256 if (tdep
->pc_in_sigtramp
)
2258 CORE_ADDR pc
= get_frame_pc (this_frame
);
2260 if (tdep
->pc_in_sigtramp (pc
))
2267 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2270 ia64_sigtramp_frame_this_id
,
2271 ia64_sigtramp_frame_prev_register
,
2273 ia64_sigtramp_frame_sniffer
2279 ia64_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2281 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
2286 static const struct frame_base ia64_frame_base
=
2289 ia64_frame_base_address
,
2290 ia64_frame_base_address
,
2291 ia64_frame_base_address
2294 #ifdef HAVE_LIBUNWIND_IA64_H
2296 struct ia64_unwind_table_entry
2298 unw_word_t start_offset
;
2299 unw_word_t end_offset
;
2300 unw_word_t info_offset
;
2303 static __inline__
uint64_t
2304 ia64_rse_slot_num (uint64_t addr
)
2306 return (addr
>> 3) & 0x3f;
2309 /* Skip over a designated number of registers in the backing
2310 store, remembering every 64th position is for NAT. */
2311 static __inline__
uint64_t
2312 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2314 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2318 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2321 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2322 number to a libunwind register number. */
2324 ia64_gdb2uw_regnum (int regnum
)
2326 if (regnum
== sp_regnum
)
2328 else if (regnum
== IA64_BSP_REGNUM
)
2329 return UNW_IA64_BSP
;
2330 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2331 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2332 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2333 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2334 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2335 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2336 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2338 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2339 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2340 else if (regnum
== IA64_PR_REGNUM
)
2342 else if (regnum
== IA64_IP_REGNUM
)
2344 else if (regnum
== IA64_CFM_REGNUM
)
2345 return UNW_IA64_CFM
;
2346 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2347 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2348 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2349 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2354 /* Gdb libunwind-frame callback function to convert from a libunwind register
2355 number to a ia64 gdb register number. */
2357 ia64_uw2gdb_regnum (int uw_regnum
)
2359 if (uw_regnum
== UNW_IA64_SP
)
2361 else if (uw_regnum
== UNW_IA64_BSP
)
2362 return IA64_BSP_REGNUM
;
2363 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2364 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2365 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2366 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2367 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2368 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2369 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2370 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2371 else if (uw_regnum
== UNW_IA64_PR
)
2372 return IA64_PR_REGNUM
;
2373 else if (uw_regnum
== UNW_REG_IP
)
2374 return IA64_IP_REGNUM
;
2375 else if (uw_regnum
== UNW_IA64_CFM
)
2376 return IA64_CFM_REGNUM
;
2377 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2378 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2379 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2380 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2385 /* Gdb libunwind-frame callback function to reveal if register is a float
2388 ia64_is_fpreg (int uw_regnum
)
2390 return unw_is_fpreg (uw_regnum
);
2393 /* Libunwind callback accessor function for general registers. */
2395 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2396 int write
, void *arg
)
2398 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2399 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2400 struct frame_info
*this_frame
= arg
;
2401 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2402 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2403 long new_sof
, old_sof
;
2404 char buf
[MAX_REGISTER_SIZE
];
2406 /* We never call any libunwind routines that need to write registers. */
2407 gdb_assert (!write
);
2412 /* Libunwind expects to see the pc value which means the slot number
2413 from the psr must be merged with the ip word address. */
2414 get_frame_register (this_frame
, IA64_IP_REGNUM
, buf
);
2415 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
2416 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
2417 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2418 *val
= ip
| ((psr
>> 41) & 0x3);
2421 case UNW_IA64_AR_BSP
:
2422 /* Libunwind expects to see the beginning of the current register
2423 frame so we must account for the fact that ptrace() will return a value
2424 for bsp that points *after* the current register frame. */
2425 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2426 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2427 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2428 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2430 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2433 case UNW_IA64_AR_BSPSTORE
:
2434 /* Libunwind wants bspstore to be after the current register frame.
2435 This is what ptrace() and gdb treats as the regular bsp value. */
2436 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2437 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2441 /* For all other registers, just unwind the value directly. */
2442 get_frame_register (this_frame
, regnum
, buf
);
2443 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2447 if (gdbarch_debug
>= 1)
2448 fprintf_unfiltered (gdb_stdlog
,
2449 " access_reg: from cache: %4s=%s\n",
2450 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2451 ? ia64_register_names
[regnum
] : "r??"),
2452 paddress (gdbarch
, *val
));
2456 /* Libunwind callback accessor function for floating-point registers. */
2458 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2459 int write
, void *arg
)
2461 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2462 struct frame_info
*this_frame
= arg
;
2464 /* We never call any libunwind routines that need to write registers. */
2465 gdb_assert (!write
);
2467 get_frame_register (this_frame
, regnum
, (char *) val
);
2472 /* Libunwind callback accessor function for top-level rse registers. */
2474 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2475 int write
, void *arg
)
2477 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2478 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2479 struct regcache
*regcache
= arg
;
2480 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
2481 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2482 long new_sof
, old_sof
;
2483 char buf
[MAX_REGISTER_SIZE
];
2485 /* We never call any libunwind routines that need to write registers. */
2486 gdb_assert (!write
);
2491 /* Libunwind expects to see the pc value which means the slot number
2492 from the psr must be merged with the ip word address. */
2493 regcache_cooked_read (regcache
, IA64_IP_REGNUM
, buf
);
2494 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
2495 regcache_cooked_read (regcache
, IA64_PSR_REGNUM
, buf
);
2496 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2497 *val
= ip
| ((psr
>> 41) & 0x3);
2500 case UNW_IA64_AR_BSP
:
2501 /* Libunwind expects to see the beginning of the current register
2502 frame so we must account for the fact that ptrace() will return a value
2503 for bsp that points *after* the current register frame. */
2504 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2505 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2506 regcache_cooked_read (regcache
, IA64_CFM_REGNUM
, buf
);
2507 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2509 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2512 case UNW_IA64_AR_BSPSTORE
:
2513 /* Libunwind wants bspstore to be after the current register frame.
2514 This is what ptrace() and gdb treats as the regular bsp value. */
2515 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2516 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2520 /* For all other registers, just unwind the value directly. */
2521 regcache_cooked_read (regcache
, regnum
, buf
);
2522 *val
= extract_unsigned_integer (buf
, 8, byte_order
);
2526 if (gdbarch_debug
>= 1)
2527 fprintf_unfiltered (gdb_stdlog
,
2528 " access_rse_reg: from cache: %4s=%s\n",
2529 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2530 ? ia64_register_names
[regnum
] : "r??"),
2531 paddress (gdbarch
, *val
));
2536 /* Libunwind callback accessor function for top-level fp registers. */
2538 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2539 unw_fpreg_t
*val
, int write
, void *arg
)
2541 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2542 struct regcache
*regcache
= arg
;
2544 /* We never call any libunwind routines that need to write registers. */
2545 gdb_assert (!write
);
2547 regcache_cooked_read (regcache
, regnum
, (char *) val
);
2552 /* Libunwind callback accessor function for accessing memory. */
2554 ia64_access_mem (unw_addr_space_t as
,
2555 unw_word_t addr
, unw_word_t
*val
,
2556 int write
, void *arg
)
2558 if (addr
- KERNEL_START
< ktab_size
)
2560 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2561 + (addr
- KERNEL_START
));
2570 /* XXX do we need to normalize byte-order here? */
2572 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2574 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2577 /* Call low-level function to access the kernel unwind table. */
2579 getunwind_table (gdb_byte
**buf_p
)
2583 /* FIXME drow/2005-09-10: This code used to call
2584 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2585 for the currently running ia64-linux kernel. That data should
2586 come from the core file and be accessed via the auxv vector; if
2587 we want to preserve fall back to the running kernel's table, then
2588 we should find a way to override the corefile layer's
2589 xfer_partial method. */
2591 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2597 /* Get the kernel unwind table. */
2599 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2601 static struct ia64_table_entry
*etab
;
2608 size
= getunwind_table (&ktab_buf
);
2610 return -UNW_ENOINFO
;
2612 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2615 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2616 etab
->info_offset
+= KERNEL_START
;
2619 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2620 return -UNW_ENOINFO
;
2622 di
->format
= UNW_INFO_FORMAT_TABLE
;
2624 di
->start_ip
= ktab
[0].start_offset
;
2625 di
->end_ip
= etab
[-1].end_offset
;
2626 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2627 di
->u
.ti
.segbase
= 0;
2628 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2629 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2631 if (gdbarch_debug
>= 1)
2632 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2633 "segbase=%s, length=%s, gp=%s\n",
2634 (char *) di
->u
.ti
.name_ptr
,
2635 hex_string (di
->u
.ti
.segbase
),
2636 pulongest (di
->u
.ti
.table_len
),
2637 hex_string (di
->gp
));
2641 /* Find the unwind table entry for a specified address. */
2643 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2644 unw_dyn_info_t
*dip
, void **buf
)
2646 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2647 Elf_Internal_Ehdr
*ehdr
;
2648 unw_word_t segbase
= 0;
2649 CORE_ADDR load_base
;
2653 bfd
= objfile
->obfd
;
2655 ehdr
= elf_tdata (bfd
)->elf_header
;
2656 phdr
= elf_tdata (bfd
)->phdr
;
2658 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2660 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2662 switch (phdr
[i
].p_type
)
2665 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2670 case PT_IA_64_UNWIND
:
2671 p_unwind
= phdr
+ i
;
2679 if (!p_text
|| !p_unwind
)
2680 return -UNW_ENOINFO
;
2682 /* Verify that the segment that contains the IP also contains
2683 the static unwind table. If not, we may be in the Linux kernel's
2684 DSO gate page in which case the unwind table is another segment.
2685 Otherwise, we are dealing with runtime-generated code, for which we
2686 have no info here. */
2687 segbase
= p_text
->p_vaddr
+ load_base
;
2689 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2692 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2694 if (phdr
[i
].p_type
== PT_LOAD
2695 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2698 /* Get the segbase from the section containing the
2700 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2704 return -UNW_ENOINFO
;
2707 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2708 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2709 dip
->gp
= ia64_find_global_pointer (get_objfile_arch (objfile
), ip
);
2710 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2711 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2712 dip
->u
.rti
.segbase
= segbase
;
2713 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2714 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2719 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2721 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2722 int need_unwind_info
, void *arg
)
2724 struct obj_section
*sec
= find_pc_section (ip
);
2731 /* XXX This only works if the host and the target architecture are
2732 both ia64 and if the have (more or less) the same kernel
2734 if (get_kernel_table (ip
, &di
) < 0)
2735 return -UNW_ENOINFO
;
2737 if (gdbarch_debug
>= 1)
2738 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2739 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2740 "length=%s,data=%s)\n",
2741 hex_string (ip
), (char *)di
.u
.ti
.name_ptr
,
2742 hex_string (di
.u
.ti
.segbase
),
2743 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2745 pulongest (di
.u
.ti
.table_len
),
2746 hex_string ((CORE_ADDR
)di
.u
.ti
.table_data
));
2750 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2754 if (gdbarch_debug
>= 1)
2755 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2756 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2757 "length=%s,data=%s)\n",
2758 hex_string (ip
), (char *)di
.u
.rti
.name_ptr
,
2759 hex_string (di
.u
.rti
.segbase
),
2760 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2762 pulongest (di
.u
.rti
.table_len
),
2763 hex_string (di
.u
.rti
.table_data
));
2766 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2769 /* We no longer need the dyn info storage so free it. */
2775 /* Libunwind callback accessor function for cleanup. */
2777 ia64_put_unwind_info (unw_addr_space_t as
,
2778 unw_proc_info_t
*pip
, void *arg
)
2780 /* Nothing required for now. */
2783 /* Libunwind callback accessor function to get head of the dynamic
2784 unwind-info registration list. */
2786 ia64_get_dyn_info_list (unw_addr_space_t as
,
2787 unw_word_t
*dilap
, void *arg
)
2789 struct obj_section
*text_sec
;
2790 struct objfile
*objfile
;
2791 unw_word_t ip
, addr
;
2795 if (!libunwind_is_initialized ())
2796 return -UNW_ENOINFO
;
2798 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2802 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2803 ip
= obj_section_addr (text_sec
);
2804 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2807 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2808 /* We no longer need the dyn info storage so free it. */
2813 if (gdbarch_debug
>= 1)
2814 fprintf_unfiltered (gdb_stdlog
,
2815 "dynamic unwind table in objfile %s "
2817 bfd_get_filename (objfile
->obfd
),
2818 hex_string (addr
), hex_string (di
.gp
));
2824 return -UNW_ENOINFO
;
2828 /* Frame interface functions for libunwind. */
2831 ia64_libunwind_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2832 struct frame_id
*this_id
)
2834 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2835 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2836 struct frame_id id
= outer_frame_id
;
2840 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
2841 if (frame_id_eq (id
, outer_frame_id
))
2843 (*this_id
) = outer_frame_id
;
2847 /* We must add the bsp as the special address for frame comparison
2849 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2850 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2852 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2854 if (gdbarch_debug
>= 1)
2855 fprintf_unfiltered (gdb_stdlog
,
2856 "libunwind frame id: code %s, stack %s, special %s, this_frame %s\n",
2857 paddress (gdbarch
, id
.code_addr
),
2858 paddress (gdbarch
, id
.stack_addr
),
2859 paddress (gdbarch
, bsp
),
2860 host_address_to_string (this_frame
));
2863 static struct value
*
2864 ia64_libunwind_frame_prev_register (struct frame_info
*this_frame
,
2865 void **this_cache
, int regnum
)
2868 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2869 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2872 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2873 reg
= IA64_PR_REGNUM
;
2874 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2875 reg
= IA64_UNAT_REGNUM
;
2877 /* Let libunwind do most of the work. */
2878 val
= libunwind_frame_prev_register (this_frame
, this_cache
, reg
);
2880 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2884 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2888 unsigned char buf
[MAX_REGISTER_SIZE
];
2890 /* Fetch predicate register rename base from current frame
2891 marker for this frame. */
2892 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2893 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2894 rrb_pr
= (cfm
>> 32) & 0x3f;
2896 /* Adjust the register number to account for register rotation. */
2897 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2899 prN_val
= extract_bit_field (value_contents_all (val
),
2900 regnum
- VP0_REGNUM
, 1);
2901 return frame_unwind_got_constant (this_frame
, regnum
, prN_val
);
2904 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2908 unatN_val
= extract_bit_field (value_contents_all (val
),
2909 regnum
- IA64_NAT0_REGNUM
, 1);
2910 return frame_unwind_got_constant (this_frame
, regnum
, unatN_val
);
2913 else if (regnum
== IA64_BSP_REGNUM
)
2915 struct value
*cfm_val
;
2916 CORE_ADDR prev_bsp
, prev_cfm
;
2918 /* We want to calculate the previous bsp as the end of the previous
2919 register stack frame. This corresponds to what the hardware bsp
2920 register will be if we pop the frame back which is why we might
2921 have been called. We know that libunwind will pass us back the
2922 beginning of the current frame so we should just add sof to it. */
2923 prev_bsp
= extract_unsigned_integer (value_contents_all (val
),
2925 cfm_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
2927 prev_cfm
= extract_unsigned_integer (value_contents_all (cfm_val
),
2929 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2931 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
2938 ia64_libunwind_frame_sniffer (const struct frame_unwind
*self
,
2939 struct frame_info
*this_frame
,
2942 if (libunwind_is_initialized ()
2943 && libunwind_frame_sniffer (self
, this_frame
, this_cache
))
2949 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2952 ia64_libunwind_frame_this_id
,
2953 ia64_libunwind_frame_prev_register
,
2955 ia64_libunwind_frame_sniffer
,
2956 libunwind_frame_dealloc_cache
2960 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*this_frame
,
2962 struct frame_id
*this_id
)
2964 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2965 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2968 struct frame_id id
= outer_frame_id
;
2971 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
2972 if (frame_id_eq (id
, outer_frame_id
))
2974 (*this_id
) = outer_frame_id
;
2978 /* We must add the bsp as the special address for frame comparison
2980 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2981 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2983 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2984 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2986 if (gdbarch_debug
>= 1)
2987 fprintf_unfiltered (gdb_stdlog
,
2988 "libunwind sigtramp frame id: code %s, stack %s, special %s, this_frame %s\n",
2989 paddress (gdbarch
, id
.code_addr
),
2990 paddress (gdbarch
, id
.stack_addr
),
2991 paddress (gdbarch
, bsp
),
2992 host_address_to_string (this_frame
));
2995 static struct value
*
2996 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2997 void **this_cache
, int regnum
)
2999 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3000 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3001 struct value
*prev_ip_val
;
3004 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
3005 method of getting previous registers. */
3006 prev_ip_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
3008 prev_ip
= extract_unsigned_integer (value_contents_all (prev_ip_val
),
3013 void *tmp_cache
= NULL
;
3014 return ia64_sigtramp_frame_prev_register (this_frame
, &tmp_cache
,
3018 return ia64_libunwind_frame_prev_register (this_frame
, this_cache
, regnum
);
3022 ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
3023 struct frame_info
*this_frame
,
3026 if (libunwind_is_initialized ())
3028 if (libunwind_sigtramp_frame_sniffer (self
, this_frame
, this_cache
))
3033 return ia64_sigtramp_frame_sniffer (self
, this_frame
, this_cache
);
3036 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
3039 ia64_libunwind_sigtramp_frame_this_id
,
3040 ia64_libunwind_sigtramp_frame_prev_register
,
3042 ia64_libunwind_sigtramp_frame_sniffer
3045 /* Set of libunwind callback acccessor functions. */
3046 static unw_accessors_t ia64_unw_accessors
=
3048 ia64_find_proc_info_x
,
3049 ia64_put_unwind_info
,
3050 ia64_get_dyn_info_list
,
3058 /* Set of special libunwind callback acccessor functions specific for accessing
3059 the rse registers. At the top of the stack, we want libunwind to figure out
3060 how to read r32 - r127. Though usually they are found sequentially in memory
3061 starting from $bof, this is not always true. */
3062 static unw_accessors_t ia64_unw_rse_accessors
=
3064 ia64_find_proc_info_x
,
3065 ia64_put_unwind_info
,
3066 ia64_get_dyn_info_list
,
3068 ia64_access_rse_reg
,
3069 ia64_access_rse_fpreg
,
3074 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
3075 static struct libunwind_descr ia64_libunwind_descr
=
3080 &ia64_unw_accessors
,
3081 &ia64_unw_rse_accessors
,
3084 #endif /* HAVE_LIBUNWIND_IA64_H */
3087 ia64_use_struct_convention (struct type
*type
)
3089 struct type
*float_elt_type
;
3091 /* Don't use the struct convention for anything but structure,
3092 union, or array types. */
3093 if (!(TYPE_CODE (type
) == TYPE_CODE_STRUCT
3094 || TYPE_CODE (type
) == TYPE_CODE_UNION
3095 || TYPE_CODE (type
) == TYPE_CODE_ARRAY
))
3098 /* HFAs are structures (or arrays) consisting entirely of floating
3099 point values of the same length. Up to 8 of these are returned
3100 in registers. Don't use the struct convention when this is the
3102 float_elt_type
= is_float_or_hfa_type (type
);
3103 if (float_elt_type
!= NULL
3104 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
3107 /* Other structs of length 32 or less are returned in r8-r11.
3108 Don't use the struct convention for those either. */
3109 return TYPE_LENGTH (type
) > 32;
3113 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
3116 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3117 struct type
*float_elt_type
;
3119 float_elt_type
= is_float_or_hfa_type (type
);
3120 if (float_elt_type
!= NULL
)
3122 char from
[MAX_REGISTER_SIZE
];
3124 int regnum
= IA64_FR8_REGNUM
;
3125 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3129 regcache_cooked_read (regcache
, regnum
, from
);
3130 convert_typed_floating (from
, ia64_ext_type (gdbarch
),
3131 (char *)valbuf
+ offset
, float_elt_type
);
3132 offset
+= TYPE_LENGTH (float_elt_type
);
3140 int regnum
= IA64_GR8_REGNUM
;
3141 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3142 int n
= TYPE_LENGTH (type
) / reglen
;
3143 int m
= TYPE_LENGTH (type
) % reglen
;
3148 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3149 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3156 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3157 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3163 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3164 const gdb_byte
*valbuf
)
3166 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3167 struct type
*float_elt_type
;
3169 float_elt_type
= is_float_or_hfa_type (type
);
3170 if (float_elt_type
!= NULL
)
3172 char to
[MAX_REGISTER_SIZE
];
3174 int regnum
= IA64_FR8_REGNUM
;
3175 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3179 convert_typed_floating ((char *)valbuf
+ offset
, float_elt_type
,
3180 to
, ia64_ext_type (gdbarch
));
3181 regcache_cooked_write (regcache
, regnum
, to
);
3182 offset
+= TYPE_LENGTH (float_elt_type
);
3190 int regnum
= IA64_GR8_REGNUM
;
3191 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3192 int n
= TYPE_LENGTH (type
) / reglen
;
3193 int m
= TYPE_LENGTH (type
) % reglen
;
3198 memcpy (&val
, (char *)valbuf
+ offset
, reglen
);
3199 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3206 memcpy (&val
, (char *)valbuf
+ offset
, m
);
3207 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3212 static enum return_value_convention
3213 ia64_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
3214 struct type
*valtype
, struct regcache
*regcache
,
3215 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
3217 int struct_return
= ia64_use_struct_convention (valtype
);
3219 if (writebuf
!= NULL
)
3221 gdb_assert (!struct_return
);
3222 ia64_store_return_value (valtype
, regcache
, writebuf
);
3225 if (readbuf
!= NULL
)
3227 gdb_assert (!struct_return
);
3228 ia64_extract_return_value (valtype
, regcache
, readbuf
);
3232 return RETURN_VALUE_STRUCT_CONVENTION
;
3234 return RETURN_VALUE_REGISTER_CONVENTION
;
3238 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3240 switch (TYPE_CODE (t
))
3244 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3251 case TYPE_CODE_ARRAY
:
3253 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3256 case TYPE_CODE_STRUCT
:
3260 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3261 if (!is_float_or_hfa_type_recurse
3262 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3273 /* Determine if the given type is one of the floating point types or
3274 and HFA (which is a struct, array, or combination thereof whose
3275 bottom-most elements are all of the same floating point type). */
3277 static struct type
*
3278 is_float_or_hfa_type (struct type
*t
)
3280 struct type
*et
= 0;
3282 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3286 /* Return 1 if the alignment of T is such that the next even slot
3287 should be used. Return 0, if the next available slot should
3288 be used. (See section 8.5.1 of the IA-64 Software Conventions
3289 and Runtime manual). */
3292 slot_alignment_is_next_even (struct type
*t
)
3294 switch (TYPE_CODE (t
))
3298 if (TYPE_LENGTH (t
) > 8)
3302 case TYPE_CODE_ARRAY
:
3304 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3305 case TYPE_CODE_STRUCT
:
3309 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3310 if (slot_alignment_is_next_even
3311 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3320 /* Attempt to find (and return) the global pointer for the given
3323 This is a rather nasty bit of code searchs for the .dynamic section
3324 in the objfile corresponding to the pc of the function we're trying
3325 to call. Once it finds the addresses at which the .dynamic section
3326 lives in the child process, it scans the Elf64_Dyn entries for a
3327 DT_PLTGOT tag. If it finds one of these, the corresponding
3328 d_un.d_ptr value is the global pointer. */
3331 ia64_find_global_pointer (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3333 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3334 struct obj_section
*faddr_sect
;
3336 faddr_sect
= find_pc_section (faddr
);
3337 if (faddr_sect
!= NULL
)
3339 struct obj_section
*osect
;
3341 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3343 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3347 if (osect
< faddr_sect
->objfile
->sections_end
)
3349 CORE_ADDR addr
, endaddr
;
3351 addr
= obj_section_addr (osect
);
3352 endaddr
= obj_section_endaddr (osect
);
3354 while (addr
< endaddr
)
3360 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3363 tag
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3365 if (tag
== DT_PLTGOT
)
3367 CORE_ADDR global_pointer
;
3369 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3372 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
),
3376 return global_pointer
;
3389 /* Given a function's address, attempt to find (and return) the
3390 corresponding (canonical) function descriptor. Return 0 if
3393 find_extant_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3395 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3396 struct obj_section
*faddr_sect
;
3398 /* Return early if faddr is already a function descriptor. */
3399 faddr_sect
= find_pc_section (faddr
);
3400 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3403 if (faddr_sect
!= NULL
)
3405 struct obj_section
*osect
;
3406 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3408 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3412 if (osect
< faddr_sect
->objfile
->sections_end
)
3414 CORE_ADDR addr
, endaddr
;
3416 addr
= obj_section_addr (osect
);
3417 endaddr
= obj_section_endaddr (osect
);
3419 while (addr
< endaddr
)
3425 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3428 faddr2
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3430 if (faddr
== faddr2
)
3440 /* Attempt to find a function descriptor corresponding to the
3441 given address. If none is found, construct one on the
3442 stack using the address at fdaptr. */
3445 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3447 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
3448 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3451 fdesc
= find_extant_func_descr (gdbarch
, faddr
);
3455 ULONGEST global_pointer
;
3461 global_pointer
= ia64_find_global_pointer (gdbarch
, faddr
);
3463 if (global_pointer
== 0)
3464 regcache_cooked_read_unsigned (regcache
,
3465 IA64_GR1_REGNUM
, &global_pointer
);
3467 store_unsigned_integer (buf
, 8, byte_order
, faddr
);
3468 store_unsigned_integer (buf
+ 8, 8, byte_order
, global_pointer
);
3470 write_memory (fdesc
, buf
, 16);
3476 /* Use the following routine when printing out function pointers
3477 so the user can see the function address rather than just the
3478 function descriptor. */
3480 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3481 struct target_ops
*targ
)
3483 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3484 struct obj_section
*s
;
3486 s
= find_pc_section (addr
);
3488 /* check if ADDR points to a function descriptor. */
3489 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3490 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3492 /* Normally, functions live inside a section that is executable.
3493 So, if ADDR points to a non-executable section, then treat it
3494 as a function descriptor and return the target address iff
3495 the target address itself points to a section that is executable. */
3496 if (s
&& (s
->the_bfd_section
->flags
& SEC_CODE
) == 0)
3498 CORE_ADDR pc
= read_memory_unsigned_integer (addr
, 8, byte_order
);
3499 struct obj_section
*pc_section
= find_pc_section (pc
);
3501 if (pc_section
&& (pc_section
->the_bfd_section
->flags
& SEC_CODE
))
3505 /* There are also descriptors embedded in vtables. */
3508 struct minimal_symbol
*minsym
;
3510 minsym
= lookup_minimal_symbol_by_pc (addr
);
3512 if (minsym
&& is_vtable_name (SYMBOL_LINKAGE_NAME (minsym
)))
3513 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3520 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3526 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3527 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3528 int nargs
, struct value
**args
, CORE_ADDR sp
,
3529 int struct_return
, CORE_ADDR struct_addr
)
3531 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3536 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3538 ULONGEST bsp
, cfm
, pfs
, new_bsp
;
3539 CORE_ADDR funcdescaddr
, pc
, global_pointer
;
3540 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3544 /* Count the number of slots needed for the arguments. */
3545 for (argno
= 0; argno
< nargs
; argno
++)
3548 type
= check_typedef (value_type (arg
));
3549 len
= TYPE_LENGTH (type
);
3551 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3554 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3557 nslots
+= (len
+ 7) / 8;
3560 /* Divvy up the slots between the RSE and the memory stack. */
3561 rseslots
= (nslots
> 8) ? 8 : nslots
;
3562 memslots
= nslots
- rseslots
;
3564 /* Allocate a new RSE frame. */
3565 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3567 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3568 new_bsp
= rse_address_add (bsp
, rseslots
);
3569 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3571 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3572 pfs
&= 0xc000000000000000LL
;
3573 pfs
|= (cfm
& 0xffffffffffffLL
);
3574 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3576 cfm
&= 0xc000000000000000LL
;
3578 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3580 /* We will attempt to find function descriptors in the .opd segment,
3581 but if we can't we'll construct them ourselves. That being the
3582 case, we'll need to reserve space on the stack for them. */
3583 funcdescaddr
= sp
- nfuncargs
* 16;
3584 funcdescaddr
&= ~0xfLL
;
3586 /* Adjust the stack pointer to it's new value. The calling conventions
3587 require us to have 16 bytes of scratch, plus whatever space is
3588 necessary for the memory slots and our function descriptors. */
3589 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3590 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3592 /* Place the arguments where they belong. The arguments will be
3593 either placed in the RSE backing store or on the memory stack.
3594 In addition, floating point arguments or HFAs are placed in
3595 floating point registers. */
3597 floatreg
= IA64_FR8_REGNUM
;
3598 for (argno
= 0; argno
< nargs
; argno
++)
3600 struct type
*float_elt_type
;
3603 type
= check_typedef (value_type (arg
));
3604 len
= TYPE_LENGTH (type
);
3606 /* Special handling for function parameters. */
3608 && TYPE_CODE (type
) == TYPE_CODE_PTR
3609 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3612 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
),
3614 store_unsigned_integer (val_buf
, 8, byte_order
,
3615 find_func_descr (regcache
, faddr
,
3617 if (slotnum
< rseslots
)
3618 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3620 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3627 /* Skip odd slot if necessary... */
3628 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3636 memset (val_buf
, 0, 8);
3637 memcpy (val_buf
, value_contents (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3639 if (slotnum
< rseslots
)
3640 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3642 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3649 /* Handle floating point types (including HFAs). */
3650 float_elt_type
= is_float_or_hfa_type (type
);
3651 if (float_elt_type
!= NULL
)
3654 len
= TYPE_LENGTH (type
);
3655 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3657 char to
[MAX_REGISTER_SIZE
];
3658 convert_typed_floating (value_contents (arg
) + argoffset
, float_elt_type
,
3659 to
, ia64_ext_type (gdbarch
));
3660 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3662 argoffset
+= TYPE_LENGTH (float_elt_type
);
3663 len
-= TYPE_LENGTH (float_elt_type
);
3668 /* Store the struct return value in r8 if necessary. */
3671 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3674 global_pointer
= ia64_find_global_pointer (gdbarch
, func_addr
);
3676 if (global_pointer
!= 0)
3677 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3679 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3681 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3686 static struct frame_id
3687 ia64_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
3689 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3693 get_frame_register (this_frame
, sp_regnum
, buf
);
3694 sp
= extract_unsigned_integer (buf
, 8, byte_order
);
3696 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3697 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3699 if (gdbarch_debug
>= 1)
3700 fprintf_unfiltered (gdb_stdlog
,
3701 "dummy frame id: code %s, stack %s, special %s\n",
3702 paddress (gdbarch
, get_frame_pc (this_frame
)),
3703 paddress (gdbarch
, sp
), paddress (gdbarch
, bsp
));
3705 return frame_id_build_special (sp
, get_frame_pc (this_frame
), bsp
);
3709 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3711 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3713 CORE_ADDR ip
, psr
, pc
;
3715 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3716 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
3717 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3718 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
3720 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3725 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3727 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3728 return print_insn_ia64 (memaddr
, info
);
3731 static struct gdbarch
*
3732 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3734 struct gdbarch
*gdbarch
;
3735 struct gdbarch_tdep
*tdep
;
3737 /* If there is already a candidate, use it. */
3738 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3740 return arches
->gdbarch
;
3742 tdep
= xzalloc (sizeof (struct gdbarch_tdep
));
3743 gdbarch
= gdbarch_alloc (&info
, tdep
);
3745 /* According to the ia64 specs, instructions that store long double
3746 floats in memory use a long-double format different than that
3747 used in the floating registers. The memory format matches the
3748 x86 extended float format which is 80 bits. An OS may choose to
3749 use this format (e.g. GNU/Linux) or choose to use a different
3750 format for storing long doubles (e.g. HPUX). In the latter case,
3751 the setting of the format may be moved/overridden in an
3752 OS-specific tdep file. */
3753 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3755 set_gdbarch_short_bit (gdbarch
, 16);
3756 set_gdbarch_int_bit (gdbarch
, 32);
3757 set_gdbarch_long_bit (gdbarch
, 64);
3758 set_gdbarch_long_long_bit (gdbarch
, 64);
3759 set_gdbarch_float_bit (gdbarch
, 32);
3760 set_gdbarch_double_bit (gdbarch
, 64);
3761 set_gdbarch_long_double_bit (gdbarch
, 128);
3762 set_gdbarch_ptr_bit (gdbarch
, 64);
3764 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3765 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3766 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3767 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3769 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3770 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3772 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3773 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3774 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3775 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3776 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3777 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3778 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3780 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3782 set_gdbarch_return_value (gdbarch
, ia64_return_value
);
3784 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3785 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3786 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3787 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3788 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3790 /* Settings for calling functions in the inferior. */
3791 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3792 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3793 set_gdbarch_dummy_id (gdbarch
, ia64_dummy_id
);
3795 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3796 #ifdef HAVE_LIBUNWIND_IA64_H
3797 frame_unwind_append_unwinder (gdbarch
,
3798 &ia64_libunwind_sigtramp_frame_unwind
);
3799 frame_unwind_append_unwinder (gdbarch
, &ia64_libunwind_frame_unwind
);
3800 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
3801 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3803 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
3805 frame_unwind_append_unwinder (gdbarch
, &ia64_frame_unwind
);
3806 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3808 /* Settings that should be unnecessary. */
3809 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3811 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3812 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3814 /* The virtual table contains 16-byte descriptors, not pointers to
3816 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
3818 /* Hook in ABI-specific overrides, if they have been registered. */
3819 gdbarch_init_osabi (info
, gdbarch
);
3824 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3827 _initialize_ia64_tdep (void)
3829 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);