1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
26 #include "arch-utils.h"
27 #include "floatformat.h"
30 #include "reggroups.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
36 #include "gdb_assert.h"
38 #include "elf/common.h" /* for DT_PLTGOT value */
43 #include "ia64-tdep.h"
46 #ifdef HAVE_LIBUNWIND_IA64_H
47 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
48 #include "libunwind-frame.h"
49 #include "libunwind-ia64.h"
51 /* Note: KERNEL_START is supposed to be an address which is not going
52 to ever contain any valid unwind info. For ia64 linux, the choice
53 of 0xc000000000000000 is fairly safe since that's uncached space.
55 We use KERNEL_START as follows: after obtaining the kernel's
56 unwind table via getunwind(), we project its unwind data into
57 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
58 when ia64_access_mem() sees a memory access to this
59 address-range, we redirect it to ktab instead.
61 None of this hackery is needed with a modern kernel/libcs
62 which uses the kernel virtual DSO to provide access to the
63 kernel's unwind info. In that case, ktab_size remains 0 and
64 hence the value of KERNEL_START doesn't matter. */
66 #define KERNEL_START 0xc000000000000000ULL
68 static size_t ktab_size
= 0;
69 struct ia64_table_entry
71 uint64_t start_offset
;
76 static struct ia64_table_entry
*ktab
= NULL
;
80 /* An enumeration of the different IA-64 instruction types. */
82 typedef enum instruction_type
84 A
, /* Integer ALU ; I-unit or M-unit */
85 I
, /* Non-ALU integer; I-unit */
86 M
, /* Memory ; M-unit */
87 F
, /* Floating-point ; F-unit */
88 B
, /* Branch ; B-unit */
89 L
, /* Extended (L+X) ; I-unit */
90 X
, /* Extended (L+X) ; I-unit */
91 undefined
/* undefined or reserved */
94 /* We represent IA-64 PC addresses as the value of the instruction
95 pointer or'd with some bit combination in the low nibble which
96 represents the slot number in the bundle addressed by the
97 instruction pointer. The problem is that the Linux kernel
98 multiplies its slot numbers (for exceptions) by one while the
99 disassembler multiplies its slot numbers by 6. In addition, I've
100 heard it said that the simulator uses 1 as the multiplier.
102 I've fixed the disassembler so that the bytes_per_line field will
103 be the slot multiplier. If bytes_per_line comes in as zero, it
104 is set to six (which is how it was set up initially). -- objdump
105 displays pretty disassembly dumps with this value. For our purposes,
106 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
107 never want to also display the raw bytes the way objdump does. */
109 #define SLOT_MULTIPLIER 1
111 /* Length in bytes of an instruction bundle */
113 #define BUNDLE_LEN 16
115 static gdbarch_init_ftype ia64_gdbarch_init
;
117 static gdbarch_register_name_ftype ia64_register_name
;
118 static gdbarch_register_type_ftype ia64_register_type
;
119 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
120 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
121 static struct type
*is_float_or_hfa_type (struct type
*t
);
122 static CORE_ADDR
ia64_find_global_pointer (CORE_ADDR faddr
);
124 static struct type
*builtin_type_ia64_ext
;
126 #define NUM_IA64_RAW_REGS 462
128 static int sp_regnum
= IA64_GR12_REGNUM
;
129 static int fp_regnum
= IA64_VFP_REGNUM
;
130 static int lr_regnum
= IA64_VRAP_REGNUM
;
132 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
133 they may not be accessible via the ptrace register get/set interfaces. */
134 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
135 V127_REGNUM
= V32_REGNUM
+ 95,
136 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
138 /* Array of register names; There should be ia64_num_regs strings in
141 static char *ia64_register_names
[] =
142 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
143 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
144 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
145 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
159 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
160 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
161 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
162 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
163 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
164 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
165 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
166 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
167 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
168 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
169 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
170 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
171 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
172 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
173 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
174 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
182 "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "",
185 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
189 "pr", "ip", "psr", "cfm",
191 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
192 "", "", "", "", "", "", "", "",
193 "rsc", "bsp", "bspstore", "rnat",
195 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
196 "ccv", "", "", "", "unat", "", "", "",
197 "fpsr", "", "", "", "itc",
198 "", "", "", "", "", "", "", "", "", "",
199 "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
205 "", "", "", "", "", "", "", "", "", "",
206 "", "", "", "", "", "", "", "", "", "",
208 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
209 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
210 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
211 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
212 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
213 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
214 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
215 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
216 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
217 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
218 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
219 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
220 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
221 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
222 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
223 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
227 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
228 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
229 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
230 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
231 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
232 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
233 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
234 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
235 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
236 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
237 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
238 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
240 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
241 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
242 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
243 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
244 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
245 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
246 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
247 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
250 struct ia64_frame_cache
252 CORE_ADDR base
; /* frame pointer base for frame */
253 CORE_ADDR pc
; /* function start pc for frame */
254 CORE_ADDR saved_sp
; /* stack pointer for frame */
255 CORE_ADDR bsp
; /* points at r32 for the current frame */
256 CORE_ADDR cfm
; /* cfm value for current frame */
257 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
259 int sof
; /* Size of frame (decoded from cfm value) */
260 int sol
; /* Size of locals (decoded from cfm value) */
261 int sor
; /* Number of rotating registers. (decoded from cfm value) */
262 CORE_ADDR after_prologue
;
263 /* Address of first instruction after the last
264 prologue instruction; Note that there may
265 be instructions from the function's body
266 intermingled with the prologue. */
267 int mem_stack_frame_size
;
268 /* Size of the memory stack frame (may be zero),
269 or -1 if it has not been determined yet. */
270 int fp_reg
; /* Register number (if any) used a frame pointer
271 for this frame. 0 if no register is being used
272 as the frame pointer. */
274 /* Saved registers. */
275 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
279 #define SIGCONTEXT_REGISTER_ADDRESS \
280 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
283 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
284 struct reggroup
*group
)
289 if (group
== all_reggroup
)
291 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
292 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
293 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
294 if (group
== float_reggroup
)
296 if (group
== vector_reggroup
)
298 if (group
== general_reggroup
)
299 return (!vector_p
&& !float_p
);
300 if (group
== save_reggroup
|| group
== restore_reggroup
)
306 ia64_register_name (int reg
)
308 return ia64_register_names
[reg
];
312 ia64_register_type (struct gdbarch
*arch
, int reg
)
314 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
315 return builtin_type_ia64_ext
;
317 return builtin_type_long
;
321 ia64_dwarf_reg_to_regnum (int reg
)
323 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
324 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
329 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
334 const struct floatformat floatformat_ia64_ext
=
336 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
337 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
340 const struct floatformat
*floatformats_ia64_ext
[2] =
342 &floatformat_ia64_ext
,
343 &floatformat_ia64_ext
347 /* Extract ``len'' bits from an instruction bundle starting at
351 extract_bit_field (char *bundle
, int from
, int len
)
353 long long result
= 0LL;
355 int from_byte
= from
/ 8;
356 int to_byte
= to
/ 8;
357 unsigned char *b
= (unsigned char *) bundle
;
363 if (from_byte
== to_byte
)
364 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
365 result
= c
>> (from
% 8);
366 lshift
= 8 - (from
% 8);
368 for (i
= from_byte
+1; i
< to_byte
; i
++)
370 result
|= ((long long) b
[i
]) << lshift
;
374 if (from_byte
< to_byte
&& (to
% 8 != 0))
377 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
378 result
|= ((long long) c
) << lshift
;
384 /* Replace the specified bits in an instruction bundle */
387 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
390 int from_byte
= from
/ 8;
391 int to_byte
= to
/ 8;
392 unsigned char *b
= (unsigned char *) bundle
;
395 if (from_byte
== to_byte
)
397 unsigned char left
, right
;
399 left
= (c
>> (to
% 8)) << (to
% 8);
400 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
401 c
= (unsigned char) (val
& 0xff);
402 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
410 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
411 c
= c
| (val
<< (from
% 8));
413 val
>>= 8 - from
% 8;
415 for (i
= from_byte
+1; i
< to_byte
; i
++)
424 unsigned char cv
= (unsigned char) val
;
426 c
= c
>> (to
% 8) << (to
% 8);
427 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
433 /* Return the contents of slot N (for N = 0, 1, or 2) in
434 and instruction bundle */
437 slotN_contents (char *bundle
, int slotnum
)
439 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
442 /* Store an instruction in an instruction bundle */
445 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
447 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
450 static enum instruction_type template_encoding_table
[32][3] =
452 { M
, I
, I
}, /* 00 */
453 { M
, I
, I
}, /* 01 */
454 { M
, I
, I
}, /* 02 */
455 { M
, I
, I
}, /* 03 */
456 { M
, L
, X
}, /* 04 */
457 { M
, L
, X
}, /* 05 */
458 { undefined
, undefined
, undefined
}, /* 06 */
459 { undefined
, undefined
, undefined
}, /* 07 */
460 { M
, M
, I
}, /* 08 */
461 { M
, M
, I
}, /* 09 */
462 { M
, M
, I
}, /* 0A */
463 { M
, M
, I
}, /* 0B */
464 { M
, F
, I
}, /* 0C */
465 { M
, F
, I
}, /* 0D */
466 { M
, M
, F
}, /* 0E */
467 { M
, M
, F
}, /* 0F */
468 { M
, I
, B
}, /* 10 */
469 { M
, I
, B
}, /* 11 */
470 { M
, B
, B
}, /* 12 */
471 { M
, B
, B
}, /* 13 */
472 { undefined
, undefined
, undefined
}, /* 14 */
473 { undefined
, undefined
, undefined
}, /* 15 */
474 { B
, B
, B
}, /* 16 */
475 { B
, B
, B
}, /* 17 */
476 { M
, M
, B
}, /* 18 */
477 { M
, M
, B
}, /* 19 */
478 { undefined
, undefined
, undefined
}, /* 1A */
479 { undefined
, undefined
, undefined
}, /* 1B */
480 { M
, F
, B
}, /* 1C */
481 { M
, F
, B
}, /* 1D */
482 { undefined
, undefined
, undefined
}, /* 1E */
483 { undefined
, undefined
, undefined
}, /* 1F */
486 /* Fetch and (partially) decode an instruction at ADDR and return the
487 address of the next instruction to fetch. */
490 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
492 char bundle
[BUNDLE_LEN
];
493 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
497 /* Warn about slot numbers greater than 2. We used to generate
498 an error here on the assumption that the user entered an invalid
499 address. But, sometimes GDB itself requests an invalid address.
500 This can (easily) happen when execution stops in a function for
501 which there are no symbols. The prologue scanner will attempt to
502 find the beginning of the function - if the nearest symbol
503 happens to not be aligned on a bundle boundary (16 bytes), the
504 resulting starting address will cause GDB to think that the slot
507 So we warn about it and set the slot number to zero. It is
508 not necessarily a fatal condition, particularly if debugging
509 at the assembly language level. */
512 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
513 "Using slot 0 instead"));
519 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
524 *instr
= slotN_contents (bundle
, slotnum
);
525 template = extract_bit_field (bundle
, 0, 5);
526 *it
= template_encoding_table
[(int)template][slotnum
];
528 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
531 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
536 /* There are 5 different break instructions (break.i, break.b,
537 break.m, break.f, and break.x), but they all have the same
538 encoding. (The five bit template in the low five bits of the
539 instruction bundle distinguishes one from another.)
541 The runtime architecture manual specifies that break instructions
542 used for debugging purposes must have the upper two bits of the 21
543 bit immediate set to a 0 and a 1 respectively. A breakpoint
544 instruction encodes the most significant bit of its 21 bit
545 immediate at bit 36 of the 41 bit instruction. The penultimate msb
546 is at bit 25 which leads to the pattern below.
548 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
549 it turns out that 0x80000 was used as the syscall break in the early
550 simulators. So I changed the pattern slightly to do "break.i 0x080001"
551 instead. But that didn't work either (I later found out that this
552 pattern was used by the simulator that I was using.) So I ended up
553 using the pattern seen below. */
556 #define IA64_BREAKPOINT 0x00002000040LL
558 #define IA64_BREAKPOINT 0x00003333300LL
561 ia64_memory_insert_breakpoint (struct bp_target_info
*bp_tgt
)
563 CORE_ADDR addr
= bp_tgt
->placed_address
;
564 char bundle
[BUNDLE_LEN
];
565 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
571 error (_("Can't insert breakpoint for slot numbers greater than 2."));
575 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
577 /* Check for L type instruction in 2nd slot, if present then
578 bump up the slot number to the 3rd slot */
579 template = extract_bit_field (bundle
, 0, 5);
580 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
585 instr
= slotN_contents (bundle
, slotnum
);
586 memcpy (bp_tgt
->shadow_contents
, &instr
, sizeof (instr
));
587 bp_tgt
->placed_size
= bp_tgt
->shadow_len
= sizeof (instr
);
588 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
590 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
596 ia64_memory_remove_breakpoint (struct bp_target_info
*bp_tgt
)
598 CORE_ADDR addr
= bp_tgt
->placed_address
;
599 char bundle
[BUNDLE_LEN
];
600 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
607 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
609 /* Check for L type instruction in 2nd slot, if present then
610 bump up the slot number to the 3rd slot */
611 template = extract_bit_field (bundle
, 0, 5);
612 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
617 memcpy (&instr
, bp_tgt
->shadow_contents
, sizeof instr
);
618 replace_slotN_contents (bundle
, instr
, slotnum
);
620 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
625 /* We don't really want to use this, but remote.c needs to call it in order
626 to figure out if Z-packets are supported or not. Oh, well. */
627 const unsigned char *
628 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
630 static unsigned char breakpoint
[] =
631 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
632 *lenptr
= sizeof (breakpoint
);
640 ia64_read_pc (ptid_t ptid
)
642 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
643 CORE_ADDR pc_value
= read_register_pid (IA64_IP_REGNUM
, ptid
);
644 int slot_num
= (psr_value
>> 41) & 3;
646 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
650 ia64_write_pc (CORE_ADDR new_pc
, ptid_t ptid
)
652 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
653 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
654 psr_value
&= ~(3LL << 41);
655 psr_value
|= (CORE_ADDR
)(slot_num
& 0x3) << 41;
659 write_register_pid (IA64_PSR_REGNUM
, psr_value
, ptid
);
660 write_register_pid (IA64_IP_REGNUM
, new_pc
, ptid
);
663 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
665 /* Returns the address of the slot that's NSLOTS slots away from
666 the address ADDR. NSLOTS may be positive or negative. */
668 rse_address_add(CORE_ADDR addr
, int nslots
)
671 int mandatory_nat_slots
= nslots
/ 63;
672 int direction
= nslots
< 0 ? -1 : 1;
674 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
676 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
677 new_addr
+= 8 * direction
;
679 if (IS_NaT_COLLECTION_ADDR(new_addr
))
680 new_addr
+= 8 * direction
;
686 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
687 int regnum
, gdb_byte
*buf
)
689 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
691 #ifdef HAVE_LIBUNWIND_IA64_H
692 /* First try and use the libunwind special reg accessor, otherwise fallback to
694 if (!libunwind_is_initialized ()
695 || libunwind_get_reg_special (gdbarch
, regnum
, buf
) != 0)
698 /* The fallback position is to assume that r32-r127 are found sequentially
699 in memory starting at $bof. This isn't always true, but without libunwind,
700 this is the best we can do. */
704 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
705 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
707 /* The bsp points at the end of the register frame so we
708 subtract the size of frame from it to get start of register frame. */
709 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
711 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
713 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
714 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
715 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), reg
);
718 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), 0);
721 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
725 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
726 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
727 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), unatN_val
);
729 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
731 ULONGEST natN_val
= 0;
734 CORE_ADDR gr_addr
= 0;
735 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
736 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
738 /* The bsp points at the end of the register frame so we
739 subtract the size of frame from it to get start of register frame. */
740 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
742 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
743 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
747 /* Compute address of nat collection bits. */
748 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
749 CORE_ADDR nat_collection
;
751 /* If our nat collection address is bigger than bsp, we have to get
752 the nat collection from rnat. Otherwise, we fetch the nat
753 collection from the computed address. */
755 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
757 nat_collection
= read_memory_integer (nat_addr
, 8);
758 nat_bit
= (gr_addr
>> 3) & 0x3f;
759 natN_val
= (nat_collection
>> nat_bit
) & 1;
762 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), natN_val
);
764 else if (regnum
== VBOF_REGNUM
)
766 /* A virtual register frame start is provided for user convenience.
767 It can be calculated as the bsp - sof (sizeof frame). */
771 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
772 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
774 /* The bsp points at the end of the register frame so we
775 subtract the size of frame from it to get beginning of frame. */
776 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
777 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), vbsp
);
779 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
785 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
786 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
788 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
790 /* Fetch predicate register rename base from current frame
791 marker for this frame. */
792 int rrb_pr
= (cfm
>> 32) & 0x3f;
794 /* Adjust the register number to account for register rotation. */
796 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
798 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
799 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), prN_val
);
802 memset (buf
, 0, register_size (current_gdbarch
, regnum
));
806 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
807 int regnum
, const gdb_byte
*buf
)
809 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
814 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
815 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
817 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
819 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
821 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
822 write_memory (reg_addr
, (void *)buf
, 8);
825 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
827 ULONGEST unatN_val
, unat
, unatN_mask
;
828 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
829 unatN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
830 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
833 else if (unatN_val
== 1)
835 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
837 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
842 CORE_ADDR gr_addr
= 0;
843 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
844 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
846 /* The bsp points at the end of the register frame so we
847 subtract the size of frame from it to get start of register frame. */
848 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
850 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
851 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
853 natN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
855 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
857 /* Compute address of nat collection bits. */
858 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
859 CORE_ADDR nat_collection
;
860 int natN_bit
= (gr_addr
>> 3) & 0x3f;
861 ULONGEST natN_mask
= (1LL << natN_bit
);
862 /* If our nat collection address is bigger than bsp, we have to get
863 the nat collection from rnat. Otherwise, we fetch the nat
864 collection from the computed address. */
867 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
869 nat_collection
|= natN_mask
;
871 nat_collection
&= ~natN_mask
;
872 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
877 nat_collection
= read_memory_integer (nat_addr
, 8);
879 nat_collection
|= natN_mask
;
881 nat_collection
&= ~natN_mask
;
882 store_unsigned_integer (nat_buf
, register_size (current_gdbarch
, regnum
), nat_collection
);
883 write_memory (nat_addr
, nat_buf
, 8);
887 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
894 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
895 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
897 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
899 /* Fetch predicate register rename base from current frame
900 marker for this frame. */
901 int rrb_pr
= (cfm
>> 32) & 0x3f;
903 /* Adjust the register number to account for register rotation. */
905 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
907 prN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
908 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
911 else if (prN_val
== 1)
913 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
917 /* The ia64 needs to convert between various ieee floating-point formats
918 and the special ia64 floating point register format. */
921 ia64_convert_register_p (int regno
, struct type
*type
)
923 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
);
927 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
928 struct type
*valtype
, gdb_byte
*out
)
930 char in
[MAX_REGISTER_SIZE
];
931 frame_register_read (frame
, regnum
, in
);
932 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
936 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
937 struct type
*valtype
, const gdb_byte
*in
)
939 char out
[MAX_REGISTER_SIZE
];
940 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
941 put_frame_register (frame
, regnum
, out
);
945 /* Limit the number of skipped non-prologue instructions since examining
946 of the prologue is expensive. */
947 static int max_skip_non_prologue_insns
= 40;
949 /* Given PC representing the starting address of a function, and
950 LIM_PC which is the (sloppy) limit to which to scan when looking
951 for a prologue, attempt to further refine this limit by using
952 the line data in the symbol table. If successful, a better guess
953 on where the prologue ends is returned, otherwise the previous
954 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
955 which will be set to indicate whether the returned limit may be
956 used with no further scanning in the event that the function is
959 /* FIXME: cagney/2004-02-14: This function and logic have largely been
960 superseded by skip_prologue_using_sal. */
963 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
965 struct symtab_and_line prologue_sal
;
966 CORE_ADDR start_pc
= pc
;
968 /* Start off not trusting the limit. */
971 prologue_sal
= find_pc_line (pc
, 0);
972 if (prologue_sal
.line
!= 0)
975 CORE_ADDR addr
= prologue_sal
.end
;
977 /* Handle the case in which compiler's optimizer/scheduler
978 has moved instructions into the prologue. We scan ahead
979 in the function looking for address ranges whose corresponding
980 line number is less than or equal to the first one that we
981 found for the function. (It can be less than when the
982 scheduler puts a body instruction before the first prologue
984 for (i
= 2 * max_skip_non_prologue_insns
;
985 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
988 struct symtab_and_line sal
;
990 sal
= find_pc_line (addr
, 0);
993 if (sal
.line
<= prologue_sal
.line
994 && sal
.symtab
== prologue_sal
.symtab
)
1001 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1003 lim_pc
= prologue_sal
.end
;
1004 if (start_pc
== get_pc_function_start (lim_pc
))
1011 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1012 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1013 || (14 <= (_regnum_) && (_regnum_) <= 31))
1014 #define imm9(_instr_) \
1015 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1016 | (((_instr_) & 0x00008000000LL) >> 20) \
1017 | (((_instr_) & 0x00000001fc0LL) >> 6))
1019 /* Allocate and initialize a frame cache. */
1021 static struct ia64_frame_cache
*
1022 ia64_alloc_frame_cache (void)
1024 struct ia64_frame_cache
*cache
;
1027 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1033 cache
->prev_cfm
= 0;
1039 cache
->frameless
= 1;
1041 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1042 cache
->saved_regs
[i
] = 0;
1048 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1051 CORE_ADDR last_prologue_pc
= pc
;
1052 instruction_type it
;
1057 int unat_save_reg
= 0;
1058 int pr_save_reg
= 0;
1059 int mem_stack_frame_size
= 0;
1061 CORE_ADDR spill_addr
= 0;
1064 char reg_contents
[256];
1070 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1072 memset (instores
, 0, sizeof instores
);
1073 memset (infpstores
, 0, sizeof infpstores
);
1074 memset (reg_contents
, 0, sizeof reg_contents
);
1076 if (cache
->after_prologue
!= 0
1077 && cache
->after_prologue
<= lim_pc
)
1078 return cache
->after_prologue
;
1080 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1081 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1083 /* We want to check if we have a recognizable function start before we
1084 look ahead for a prologue. */
1085 if (pc
< lim_pc
&& next_pc
1086 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1088 /* alloc - start of a regular function. */
1089 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1090 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1091 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1092 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1094 /* Verify that the current cfm matches what we think is the
1095 function start. If we have somehow jumped within a function,
1096 we do not want to interpret the prologue and calculate the
1097 addresses of various registers such as the return address.
1098 We will instead treat the frame as frameless. */
1100 (sof
== (cache
->cfm
& 0x7f) &&
1101 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1105 last_prologue_pc
= next_pc
;
1110 /* Look for a leaf routine. */
1111 if (pc
< lim_pc
&& next_pc
1112 && (it
== I
|| it
== M
)
1113 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1115 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1116 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1117 | ((instr
& 0x001f8000000LL
) >> 20)
1118 | ((instr
& 0x000000fe000LL
) >> 13));
1119 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1120 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1121 int qp
= (int) (instr
& 0x0000000003fLL
);
1122 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1124 /* mov r2, r12 - beginning of leaf routine */
1126 last_prologue_pc
= next_pc
;
1130 /* If we don't recognize a regular function or leaf routine, we are
1136 last_prologue_pc
= lim_pc
;
1140 /* Loop, looking for prologue instructions, keeping track of
1141 where preserved registers were spilled. */
1144 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1148 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1150 /* Exit loop upon hitting a non-nop branch instruction. */
1155 else if (((instr
& 0x3fLL
) != 0LL) &&
1156 (frameless
|| ret_reg
!= 0))
1158 /* Exit loop upon hitting a predicated instruction if
1159 we already have the return register or if we are frameless. */
1164 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1167 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1168 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1169 int qp
= (int) (instr
& 0x0000000003f);
1171 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1174 last_prologue_pc
= next_pc
;
1177 else if ((it
== I
|| it
== M
)
1178 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1180 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1181 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1182 | ((instr
& 0x001f8000000LL
) >> 20)
1183 | ((instr
& 0x000000fe000LL
) >> 13));
1184 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1185 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1186 int qp
= (int) (instr
& 0x0000000003fLL
);
1188 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1192 last_prologue_pc
= next_pc
;
1194 else if (qp
== 0 && rN
== 12 && rM
== 12)
1196 /* adds r12, -mem_stack_frame_size, r12 */
1197 mem_stack_frame_size
-= imm
;
1198 last_prologue_pc
= next_pc
;
1200 else if (qp
== 0 && rN
== 2
1201 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1203 char buf
[MAX_REGISTER_SIZE
];
1204 CORE_ADDR saved_sp
= 0;
1205 /* adds r2, spilloffset, rFramePointer
1207 adds r2, spilloffset, r12
1209 Get ready for stf.spill or st8.spill instructions.
1210 The address to start spilling at is loaded into r2.
1211 FIXME: Why r2? That's what gcc currently uses; it
1212 could well be different for other compilers. */
1214 /* Hmm... whether or not this will work will depend on
1215 where the pc is. If it's still early in the prologue
1216 this'll be wrong. FIXME */
1219 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1220 saved_sp
= extract_unsigned_integer (buf
, 8);
1222 spill_addr
= saved_sp
1223 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1226 last_prologue_pc
= next_pc
;
1228 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1229 rN
< 256 && imm
== 0)
1231 /* mov rN, rM where rM is an input register */
1232 reg_contents
[rN
] = rM
;
1233 last_prologue_pc
= next_pc
;
1235 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1239 last_prologue_pc
= next_pc
;
1244 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1245 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1247 /* stf.spill [rN] = fM, imm9
1249 stf.spill [rN] = fM */
1251 int imm
= imm9(instr
);
1252 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1253 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1254 int qp
= (int) (instr
& 0x0000000003fLL
);
1255 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1256 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1258 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1260 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1263 spill_addr
= 0; /* last one; must be done */
1264 last_prologue_pc
= next_pc
;
1267 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1268 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1274 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1275 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1276 int qp
= (int) (instr
& 0x0000000003fLL
);
1277 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1279 /* We have something like "mov.m r3 = ar.unat". Remember the
1280 r3 (or whatever) and watch for a store of this register... */
1282 last_prologue_pc
= next_pc
;
1285 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1288 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1289 int qp
= (int) (instr
& 0x0000000003fLL
);
1290 if (qp
== 0 && isScratch (rN
))
1293 last_prologue_pc
= next_pc
;
1297 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1298 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1302 st8 [rN] = rM, imm9 */
1303 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1304 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1305 int qp
= (int) (instr
& 0x0000000003fLL
);
1306 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1307 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1308 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1310 /* We've found a spill of either the UNAT register or the PR
1311 register. (Well, not exactly; what we've actually found is
1312 a spill of the register that UNAT or PR was moved to).
1313 Record that fact and move on... */
1314 if (rM
== unat_save_reg
)
1316 /* Track UNAT register */
1317 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1322 /* Track PR register */
1323 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1326 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1327 /* st8 [rN] = rM, imm9 */
1328 spill_addr
+= imm9(instr
);
1330 spill_addr
= 0; /* must be done spilling */
1331 last_prologue_pc
= next_pc
;
1333 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1335 /* Allow up to one store of each input register. */
1336 instores
[rM
-32] = 1;
1337 last_prologue_pc
= next_pc
;
1339 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1340 !instores
[indirect
-32])
1342 /* Allow an indirect store of an input register. */
1343 instores
[indirect
-32] = 1;
1344 last_prologue_pc
= next_pc
;
1347 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1354 Note that the st8 case is handled in the clause above.
1356 Advance over stores of input registers. One store per input
1357 register is permitted. */
1358 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1359 int qp
= (int) (instr
& 0x0000000003fLL
);
1360 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1361 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1363 instores
[rM
-32] = 1;
1364 last_prologue_pc
= next_pc
;
1366 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1367 !instores
[indirect
-32])
1369 /* Allow an indirect store of an input register. */
1370 instores
[indirect
-32] = 1;
1371 last_prologue_pc
= next_pc
;
1374 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1381 Advance over stores of floating point input registers. Again
1382 one store per register is permitted */
1383 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1384 int qp
= (int) (instr
& 0x0000000003fLL
);
1385 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1387 infpstores
[fM
-8] = 1;
1388 last_prologue_pc
= next_pc
;
1392 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1393 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1395 /* st8.spill [rN] = rM
1397 st8.spill [rN] = rM, imm9 */
1398 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1399 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1400 int qp
= (int) (instr
& 0x0000000003fLL
);
1401 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1403 /* We've found a spill of one of the preserved general purpose
1404 regs. Record the spill address and advance the spill
1405 register if appropriate. */
1406 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1407 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1408 /* st8.spill [rN] = rM, imm9 */
1409 spill_addr
+= imm9(instr
);
1411 spill_addr
= 0; /* Done spilling */
1412 last_prologue_pc
= next_pc
;
1419 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1420 registers for the previous frame which will be needed later. */
1422 if (!frameless
&& next_frame
)
1424 /* Extract the size of the rotating portion of the stack
1425 frame and the register rename base from the current
1431 rrb_gr
= (cfm
>> 18) & 0x7f;
1433 /* Find the bof (beginning of frame). */
1434 bof
= rse_address_add (cache
->bsp
, -sof
);
1436 for (i
= 0, addr
= bof
;
1440 if (IS_NaT_COLLECTION_ADDR (addr
))
1444 if (i
+32 == cfm_reg
)
1445 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1446 if (i
+32 == ret_reg
)
1447 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1449 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1452 /* For the previous argument registers we require the previous bof.
1453 If we can't find the previous cfm, then we can do nothing. */
1455 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1457 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1459 else if (cfm_reg
!= 0)
1461 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1462 cfm
= extract_unsigned_integer (buf
, 8);
1464 cache
->prev_cfm
= cfm
;
1468 sor
= ((cfm
>> 14) & 0xf) * 8;
1470 sol
= (cfm
>> 7) & 0x7f;
1471 rrb_gr
= (cfm
>> 18) & 0x7f;
1473 /* The previous bof only requires subtraction of the sol (size of locals)
1474 due to the overlap between output and input of subsequent frames. */
1475 bof
= rse_address_add (bof
, -sol
);
1477 for (i
= 0, addr
= bof
;
1481 if (IS_NaT_COLLECTION_ADDR (addr
))
1486 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1489 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1495 /* Try and trust the lim_pc value whenever possible. */
1496 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1497 last_prologue_pc
= lim_pc
;
1499 cache
->frameless
= frameless
;
1500 cache
->after_prologue
= last_prologue_pc
;
1501 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1502 cache
->fp_reg
= fp_reg
;
1504 return last_prologue_pc
;
1508 ia64_skip_prologue (CORE_ADDR pc
)
1510 struct ia64_frame_cache cache
;
1512 cache
.after_prologue
= 0;
1516 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1517 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1521 /* Normal frames. */
1523 static struct ia64_frame_cache
*
1524 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1526 struct ia64_frame_cache
*cache
;
1528 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1534 cache
= ia64_alloc_frame_cache ();
1535 *this_cache
= cache
;
1537 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1538 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1540 /* We always want the bsp to point to the end of frame.
1541 This way, we can always get the beginning of frame (bof)
1542 by subtracting frame size. */
1543 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1544 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1546 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1547 psr
= extract_unsigned_integer (buf
, 8);
1549 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1550 cfm
= extract_unsigned_integer (buf
, 8);
1552 cache
->sof
= (cfm
& 0x7f);
1553 cache
->sol
= (cfm
>> 7) & 0x7f;
1554 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1558 cache
->pc
= frame_func_unwind (next_frame
);
1561 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1563 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1569 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1570 struct frame_id
*this_id
)
1572 struct ia64_frame_cache
*cache
=
1573 ia64_frame_cache (next_frame
, this_cache
);
1575 /* If outermost frame, mark with null frame id. */
1576 if (cache
->base
== 0)
1577 (*this_id
) = null_frame_id
;
1579 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1580 if (gdbarch_debug
>= 1)
1581 fprintf_unfiltered (gdb_stdlog
,
1582 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1583 paddr_nz (this_id
->code_addr
),
1584 paddr_nz (this_id
->stack_addr
),
1585 paddr_nz (cache
->bsp
), next_frame
);
1589 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1590 int regnum
, int *optimizedp
,
1591 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1592 int *realnump
, gdb_byte
*valuep
)
1594 struct ia64_frame_cache
*cache
=
1595 ia64_frame_cache (next_frame
, this_cache
);
1596 char dummy_valp
[MAX_REGISTER_SIZE
];
1599 gdb_assert (regnum
>= 0);
1601 if (!target_has_registers
)
1602 error (_("No registers."));
1609 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1610 when valuep is not supplied. */
1612 valuep
= dummy_valp
;
1614 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1616 if (regnum
== SP_REGNUM
)
1618 /* Handle SP values for all frames but the topmost. */
1619 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1622 else if (regnum
== IA64_BSP_REGNUM
)
1624 char cfm_valuep
[MAX_REGISTER_SIZE
];
1627 enum lval_type cfm_lval
;
1629 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1631 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1632 This corresponds to what the hardware bsp register will be if we pop the frame
1633 back which is why we might have been called. We know the beginning of the current
1634 frame is cache->bsp - cache->sof. This value in the previous frame points to
1635 the start of the output registers. We can calculate the end of that frame by adding
1636 the size of output (sof (size of frame) - sol (size of locals)). */
1637 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1638 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1639 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1641 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1642 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1644 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1647 else if (regnum
== IA64_CFM_REGNUM
)
1649 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1653 *lvalp
= lval_memory
;
1655 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1657 else if (cache
->prev_cfm
)
1658 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), cache
->prev_cfm
);
1659 else if (cache
->frameless
)
1662 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1665 else if (regnum
== IA64_VFP_REGNUM
)
1667 /* If the function in question uses an automatic register (r32-r127)
1668 for the frame pointer, it'll be found by ia64_find_saved_register()
1669 above. If the function lacks one of these frame pointers, we can
1670 still provide a value since we know the size of the frame. */
1671 CORE_ADDR vfp
= cache
->base
;
1672 store_unsigned_integer (valuep
, register_size (current_gdbarch
, IA64_VFP_REGNUM
), vfp
);
1674 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1676 char pr_valuep
[MAX_REGISTER_SIZE
];
1679 enum lval_type pr_lval
;
1682 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1683 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1684 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1686 /* Fetch predicate register rename base from current frame
1687 marker for this frame. */
1688 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1690 /* Adjust the register number to account for register rotation. */
1691 regnum
= VP16_REGNUM
1692 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1694 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1695 regnum
- VP0_REGNUM
, 1);
1696 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
1698 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1700 char unat_valuep
[MAX_REGISTER_SIZE
];
1703 enum lval_type unat_lval
;
1704 CORE_ADDR unat_addr
;
1706 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1707 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1708 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1709 regnum
- IA64_NAT0_REGNUM
, 1);
1710 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1713 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1716 /* Find address of general register corresponding to nat bit we're
1720 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1724 /* Compute address of nat collection bits. */
1725 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1727 CORE_ADDR nat_collection
;
1729 /* If our nat collection address is bigger than bsp, we have to get
1730 the nat collection from rnat. Otherwise, we fetch the nat
1731 collection from the computed address. */
1732 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1733 bsp
= extract_unsigned_integer (buf
, 8);
1734 if (nat_addr
>= bsp
)
1736 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1737 nat_collection
= extract_unsigned_integer (buf
, 8);
1740 nat_collection
= read_memory_integer (nat_addr
, 8);
1741 nat_bit
= (gr_addr
>> 3) & 0x3f;
1742 natval
= (nat_collection
>> nat_bit
) & 1;
1745 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), natval
);
1747 else if (regnum
== IA64_IP_REGNUM
)
1750 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1754 *lvalp
= lval_memory
;
1756 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1757 pc
= extract_unsigned_integer (buf
, 8);
1759 else if (cache
->frameless
)
1761 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1762 pc
= extract_unsigned_integer (buf
, 8);
1765 store_unsigned_integer (valuep
, 8, pc
);
1767 else if (regnum
== IA64_PSR_REGNUM
)
1769 /* We don't know how to get the complete previous PSR, but we need it for
1770 the slot information when we unwind the pc (pc is formed of IP register
1771 plus slot information from PSR). To get the previous slot information,
1772 we mask it off the return address. */
1773 ULONGEST slot_num
= 0;
1776 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1778 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1779 psr
= extract_unsigned_integer (buf
, 8);
1783 *lvalp
= lval_memory
;
1785 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1786 pc
= extract_unsigned_integer (buf
, 8);
1788 else if (cache
->frameless
)
1791 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1792 pc
= extract_unsigned_integer (buf
, 8);
1794 psr
&= ~(3LL << 41);
1795 slot_num
= pc
& 0x3LL
;
1796 psr
|= (CORE_ADDR
)slot_num
<< 41;
1797 store_unsigned_integer (valuep
, 8, psr
);
1799 else if (regnum
== IA64_BR0_REGNUM
)
1802 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1805 *lvalp
= lval_memory
;
1807 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_BR0_REGNUM
));
1808 br0
= extract_unsigned_integer (buf
, 8);
1810 store_unsigned_integer (valuep
, 8, br0
);
1812 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1813 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1816 if (regnum
>= V32_REGNUM
)
1817 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1818 addr
= cache
->saved_regs
[regnum
];
1821 *lvalp
= lval_memory
;
1823 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1825 else if (cache
->frameless
)
1827 char r_valuep
[MAX_REGISTER_SIZE
];
1830 enum lval_type r_lval
;
1832 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1834 if (regnum
>= V32_REGNUM
)
1835 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1836 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1837 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1838 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1839 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1840 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1841 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1842 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1844 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1845 *lvalp
= lval_memory
;
1847 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1853 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1855 /* Fetch floating point register rename base from current
1856 frame marker for this frame. */
1857 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1859 /* Adjust the floating point register number to account for
1860 register rotation. */
1861 regnum
= IA64_FR32_REGNUM
1862 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1865 /* If we have stored a memory address, access the register. */
1866 addr
= cache
->saved_regs
[regnum
];
1869 *lvalp
= lval_memory
;
1871 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1873 /* Otherwise, punt and get the current value of the register. */
1875 frame_unwind_register (next_frame
, regnum
, valuep
);
1878 if (gdbarch_debug
>= 1)
1879 fprintf_unfiltered (gdb_stdlog
,
1880 "regular prev register <%d> <%s> is 0x%s\n", regnum
,
1881 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1882 ? ia64_register_names
[regnum
] : "r??"),
1883 paddr_nz (extract_unsigned_integer (valuep
, 8)));
1886 static const struct frame_unwind ia64_frame_unwind
=
1889 &ia64_frame_this_id
,
1890 &ia64_frame_prev_register
1893 static const struct frame_unwind
*
1894 ia64_frame_sniffer (struct frame_info
*next_frame
)
1896 return &ia64_frame_unwind
;
1899 /* Signal trampolines. */
1902 ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache
*cache
)
1904 if (SIGCONTEXT_REGISTER_ADDRESS
)
1908 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1909 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_IP_REGNUM
);
1910 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1911 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CFM_REGNUM
);
1912 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1913 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PSR_REGNUM
);
1914 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1915 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_BSP_REGNUM
);
1916 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1917 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_RNAT_REGNUM
);
1918 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1919 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CCV_REGNUM
);
1920 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1921 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_UNAT_REGNUM
);
1922 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1923 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_FPSR_REGNUM
);
1924 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1925 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PFS_REGNUM
);
1926 cache
->saved_regs
[IA64_LC_REGNUM
] =
1927 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_LC_REGNUM
);
1928 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1929 cache
->saved_regs
[regno
] =
1930 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1931 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1932 cache
->saved_regs
[regno
] =
1933 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1934 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1935 cache
->saved_regs
[regno
] =
1936 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1940 static struct ia64_frame_cache
*
1941 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1943 struct ia64_frame_cache
*cache
;
1951 cache
= ia64_alloc_frame_cache ();
1953 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1954 /* Note that frame size is hard-coded below. We cannot calculate it
1955 via prologue examination. */
1956 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1958 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1959 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1961 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1962 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1963 cache
->sof
= cache
->cfm
& 0x7f;
1965 ia64_sigtramp_frame_init_saved_regs (cache
);
1967 *this_cache
= cache
;
1972 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1973 void **this_cache
, struct frame_id
*this_id
)
1975 struct ia64_frame_cache
*cache
=
1976 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1978 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1979 if (gdbarch_debug
>= 1)
1980 fprintf_unfiltered (gdb_stdlog
,
1981 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1982 paddr_nz (this_id
->code_addr
),
1983 paddr_nz (this_id
->stack_addr
),
1984 paddr_nz (cache
->bsp
), next_frame
);
1988 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1990 int regnum
, int *optimizedp
,
1991 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1992 int *realnump
, gdb_byte
*valuep
)
1994 char dummy_valp
[MAX_REGISTER_SIZE
];
1995 char buf
[MAX_REGISTER_SIZE
];
1997 struct ia64_frame_cache
*cache
=
1998 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
2000 gdb_assert (regnum
>= 0);
2002 if (!target_has_registers
)
2003 error (_("No registers."));
2010 /* Rather than check each time if valuep is non-null, supply a dummy buffer
2011 when valuep is not supplied. */
2013 valuep
= dummy_valp
;
2015 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
2017 if (regnum
== IA64_IP_REGNUM
)
2020 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2024 *lvalp
= lval_memory
;
2026 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
2027 pc
= extract_unsigned_integer (buf
, 8);
2030 store_unsigned_integer (valuep
, 8, pc
);
2032 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2033 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2036 if (regnum
>= V32_REGNUM
)
2037 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2038 addr
= cache
->saved_regs
[regnum
];
2041 *lvalp
= lval_memory
;
2043 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2048 /* All other registers not listed above. */
2049 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2052 *lvalp
= lval_memory
;
2054 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2058 if (gdbarch_debug
>= 1)
2059 fprintf_unfiltered (gdb_stdlog
,
2060 "sigtramp prev register <%s> is 0x%s\n",
2061 (regnum
< IA64_GR32_REGNUM
2062 || (regnum
> IA64_GR127_REGNUM
2063 && regnum
< LAST_PSEUDO_REGNUM
))
2064 ? ia64_register_names
[regnum
]
2065 : (regnum
< LAST_PSEUDO_REGNUM
2066 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2068 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2071 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2074 ia64_sigtramp_frame_this_id
,
2075 ia64_sigtramp_frame_prev_register
2078 static const struct frame_unwind
*
2079 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2082 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2084 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2085 if (legacy_pc_in_sigtramp (pc
, name
))
2086 return &ia64_sigtramp_frame_unwind
;
2093 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2095 struct ia64_frame_cache
*cache
=
2096 ia64_frame_cache (next_frame
, this_cache
);
2101 static const struct frame_base ia64_frame_base
=
2104 ia64_frame_base_address
,
2105 ia64_frame_base_address
,
2106 ia64_frame_base_address
2109 #ifdef HAVE_LIBUNWIND_IA64_H
2111 struct ia64_unwind_table_entry
2113 unw_word_t start_offset
;
2114 unw_word_t end_offset
;
2115 unw_word_t info_offset
;
2118 static __inline__
uint64_t
2119 ia64_rse_slot_num (uint64_t addr
)
2121 return (addr
>> 3) & 0x3f;
2124 /* Skip over a designated number of registers in the backing
2125 store, remembering every 64th position is for NAT. */
2126 static __inline__
uint64_t
2127 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2129 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2133 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2136 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2137 number to a libunwind register number. */
2139 ia64_gdb2uw_regnum (int regnum
)
2141 if (regnum
== sp_regnum
)
2143 else if (regnum
== IA64_BSP_REGNUM
)
2144 return UNW_IA64_BSP
;
2145 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2146 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2147 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2148 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2149 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2150 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2151 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2153 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2154 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2155 else if (regnum
== IA64_PR_REGNUM
)
2157 else if (regnum
== IA64_IP_REGNUM
)
2159 else if (regnum
== IA64_CFM_REGNUM
)
2160 return UNW_IA64_CFM
;
2161 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2162 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2163 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2164 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2169 /* Gdb libunwind-frame callback function to convert from a libunwind register
2170 number to a ia64 gdb register number. */
2172 ia64_uw2gdb_regnum (int uw_regnum
)
2174 if (uw_regnum
== UNW_IA64_SP
)
2176 else if (uw_regnum
== UNW_IA64_BSP
)
2177 return IA64_BSP_REGNUM
;
2178 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2179 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2180 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2181 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2182 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2183 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2184 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2185 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2186 else if (uw_regnum
== UNW_IA64_PR
)
2187 return IA64_PR_REGNUM
;
2188 else if (uw_regnum
== UNW_REG_IP
)
2189 return IA64_IP_REGNUM
;
2190 else if (uw_regnum
== UNW_IA64_CFM
)
2191 return IA64_CFM_REGNUM
;
2192 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2193 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2194 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2195 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2200 /* Gdb libunwind-frame callback function to reveal if register is a float
2203 ia64_is_fpreg (int uw_regnum
)
2205 return unw_is_fpreg (uw_regnum
);
2208 /* Libunwind callback accessor function for general registers. */
2210 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2211 int write
, void *arg
)
2213 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2214 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2215 struct frame_info
*next_frame
= arg
;
2216 long new_sof
, old_sof
;
2217 char buf
[MAX_REGISTER_SIZE
];
2222 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2228 ia64_write_pc (*val
, inferior_ptid
);
2231 case UNW_IA64_AR_BSPSTORE
:
2232 write_register (IA64_BSP_REGNUM
, *val
);
2235 case UNW_IA64_AR_BSP
:
2237 /* Account for the fact that ptrace() expects bsp to point
2238 after the current register frame. */
2239 cfm
= read_register (IA64_CFM_REGNUM
);
2241 bsp
= ia64_rse_skip_regs (*val
, sof
);
2242 write_register (IA64_BSP_REGNUM
, bsp
);
2246 /* If we change CFM, we need to adjust ptrace's notion of
2247 bsp accordingly, so that the real bsp remains
2249 bsp
= read_register (IA64_BSP_REGNUM
);
2250 cfm
= read_register (IA64_CFM_REGNUM
);
2251 old_sof
= (cfm
& 0x7f);
2252 new_sof
= (*val
& 0x7f);
2253 if (old_sof
!= new_sof
)
2255 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2256 write_register (IA64_BSP_REGNUM
, bsp
);
2258 write_register (IA64_CFM_REGNUM
, *val
);
2262 write_register (regnum
, *val
);
2265 if (gdbarch_debug
>= 1)
2266 fprintf_unfiltered (gdb_stdlog
,
2267 " access_reg: to cache: %4s=0x%s\n",
2268 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2269 ? ia64_register_names
[regnum
] : "r??"),
2277 /* Libunwind expects to see the pc value which means the slot number
2278 from the psr must be merged with the ip word address. */
2279 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2280 ip
= extract_unsigned_integer (buf
, 8);
2281 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2282 psr
= extract_unsigned_integer (buf
, 8);
2283 *val
= ip
| ((psr
>> 41) & 0x3);
2286 case UNW_IA64_AR_BSP
:
2287 /* Libunwind expects to see the beginning of the current register
2288 frame so we must account for the fact that ptrace() will return a value
2289 for bsp that points *after* the current register frame. */
2290 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2291 bsp
= extract_unsigned_integer (buf
, 8);
2292 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2293 cfm
= extract_unsigned_integer (buf
, 8);
2295 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2298 case UNW_IA64_AR_BSPSTORE
:
2299 /* Libunwind wants bspstore to be after the current register frame.
2300 This is what ptrace() and gdb treats as the regular bsp value. */
2301 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2302 *val
= extract_unsigned_integer (buf
, 8);
2306 /* For all other registers, just unwind the value directly. */
2307 frame_unwind_register (next_frame
, regnum
, buf
);
2308 *val
= extract_unsigned_integer (buf
, 8);
2312 if (gdbarch_debug
>= 1)
2313 fprintf_unfiltered (gdb_stdlog
,
2314 " access_reg: from cache: %4s=0x%s\n",
2315 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2316 ? ia64_register_names
[regnum
] : "r??"),
2322 /* Libunwind callback accessor function for floating-point registers. */
2324 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2325 int write
, void *arg
)
2327 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2330 regcache_cooked_write (current_regcache
, regnum
, (char *) val
);
2332 regcache_cooked_read (current_regcache
, regnum
, (char *) val
);
2336 /* Libunwind callback accessor function for top-level rse registers. */
2338 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2339 int write
, void *arg
)
2341 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2342 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2343 long new_sof
, old_sof
;
2348 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2354 ia64_write_pc (*val
, inferior_ptid
);
2357 case UNW_IA64_AR_BSPSTORE
:
2358 write_register (IA64_BSP_REGNUM
, *val
);
2361 case UNW_IA64_AR_BSP
:
2363 /* Account for the fact that ptrace() expects bsp to point
2364 after the current register frame. */
2365 cfm
= read_register (IA64_CFM_REGNUM
);
2367 bsp
= ia64_rse_skip_regs (*val
, sof
);
2368 write_register (IA64_BSP_REGNUM
, bsp
);
2372 /* If we change CFM, we need to adjust ptrace's notion of
2373 bsp accordingly, so that the real bsp remains
2375 bsp
= read_register (IA64_BSP_REGNUM
);
2376 cfm
= read_register (IA64_CFM_REGNUM
);
2377 old_sof
= (cfm
& 0x7f);
2378 new_sof
= (*val
& 0x7f);
2379 if (old_sof
!= new_sof
)
2381 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2382 write_register (IA64_BSP_REGNUM
, bsp
);
2384 write_register (IA64_CFM_REGNUM
, *val
);
2388 write_register (regnum
, *val
);
2391 if (gdbarch_debug
>= 1)
2392 fprintf_unfiltered (gdb_stdlog
,
2393 " access_rse_reg: to cache: %4s=0x%s\n",
2394 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2395 ? ia64_register_names
[regnum
] : "r??"),
2403 /* Libunwind expects to see the pc value which means the slot number
2404 from the psr must be merged with the ip word address. */
2405 ip
= read_register (IA64_IP_REGNUM
);
2406 psr
= read_register (IA64_PSR_REGNUM
);
2407 *val
= ip
| ((psr
>> 41) & 0x3);
2410 case UNW_IA64_AR_BSP
:
2411 /* Libunwind expects to see the beginning of the current register
2412 frame so we must account for the fact that ptrace() will return a value
2413 for bsp that points *after* the current register frame. */
2414 bsp
= read_register (IA64_BSP_REGNUM
);
2415 cfm
= read_register (IA64_CFM_REGNUM
);
2417 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2420 case UNW_IA64_AR_BSPSTORE
:
2421 /* Libunwind wants bspstore to be after the current register frame.
2422 This is what ptrace() and gdb treats as the regular bsp value. */
2423 *val
= read_register (IA64_BSP_REGNUM
);
2427 /* For all other registers, just read the value directly. */
2428 *val
= read_register (regnum
);
2433 if (gdbarch_debug
>= 1)
2434 fprintf_unfiltered (gdb_stdlog
,
2435 " access_rse_reg: from cache: %4s=0x%s\n",
2436 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2437 ? ia64_register_names
[regnum
] : "r??"),
2443 /* Libunwind callback accessor function for accessing memory. */
2445 ia64_access_mem (unw_addr_space_t as
,
2446 unw_word_t addr
, unw_word_t
*val
,
2447 int write
, void *arg
)
2449 if (addr
- KERNEL_START
< ktab_size
)
2451 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2452 + (addr
- KERNEL_START
));
2461 /* XXX do we need to normalize byte-order here? */
2463 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2465 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2468 /* Call low-level function to access the kernel unwind table. */
2470 getunwind_table (gdb_byte
**buf_p
)
2474 /* FIXME drow/2005-09-10: This code used to call
2475 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2476 for the currently running ia64-linux kernel. That data should
2477 come from the core file and be accessed via the auxv vector; if
2478 we want to preserve fall back to the running kernel's table, then
2479 we should find a way to override the corefile layer's
2480 xfer_partial method. */
2482 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2488 /* Get the kernel unwind table. */
2490 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2492 static struct ia64_table_entry
*etab
;
2499 size
= getunwind_table (&ktab_buf
);
2501 return -UNW_ENOINFO
;
2503 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2506 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2507 etab
->info_offset
+= KERNEL_START
;
2510 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2511 return -UNW_ENOINFO
;
2513 di
->format
= UNW_INFO_FORMAT_TABLE
;
2515 di
->start_ip
= ktab
[0].start_offset
;
2516 di
->end_ip
= etab
[-1].end_offset
;
2517 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2518 di
->u
.ti
.segbase
= 0;
2519 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2520 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2522 if (gdbarch_debug
>= 1)
2523 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2524 "segbase=0x%s, length=%s, gp=0x%s\n",
2525 (char *) di
->u
.ti
.name_ptr
,
2526 paddr_nz (di
->u
.ti
.segbase
),
2527 paddr_u (di
->u
.ti
.table_len
),
2532 /* Find the unwind table entry for a specified address. */
2534 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2535 unw_dyn_info_t
*dip
, void **buf
)
2537 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2538 Elf_Internal_Ehdr
*ehdr
;
2539 unw_word_t segbase
= 0;
2540 CORE_ADDR load_base
;
2544 bfd
= objfile
->obfd
;
2546 ehdr
= elf_tdata (bfd
)->elf_header
;
2547 phdr
= elf_tdata (bfd
)->phdr
;
2549 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2551 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2553 switch (phdr
[i
].p_type
)
2556 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2561 case PT_IA_64_UNWIND
:
2562 p_unwind
= phdr
+ i
;
2570 if (!p_text
|| !p_unwind
)
2571 return -UNW_ENOINFO
;
2573 /* Verify that the segment that contains the IP also contains
2574 the static unwind table. If not, we may be in the Linux kernel's
2575 DSO gate page in which case the unwind table is another segment.
2576 Otherwise, we are dealing with runtime-generated code, for which we
2577 have no info here. */
2578 segbase
= p_text
->p_vaddr
+ load_base
;
2580 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2583 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2585 if (phdr
[i
].p_type
== PT_LOAD
2586 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2589 /* Get the segbase from the section containing the
2591 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2595 return -UNW_ENOINFO
;
2598 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2599 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2600 dip
->gp
= ia64_find_global_pointer (ip
);
2601 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2602 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2603 dip
->u
.rti
.segbase
= segbase
;
2604 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2605 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2610 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2612 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2613 int need_unwind_info
, void *arg
)
2615 struct obj_section
*sec
= find_pc_section (ip
);
2622 /* XXX This only works if the host and the target architecture are
2623 both ia64 and if the have (more or less) the same kernel
2625 if (get_kernel_table (ip
, &di
) < 0)
2626 return -UNW_ENOINFO
;
2628 if (gdbarch_debug
>= 1)
2629 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2630 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2631 "length=%s,data=0x%s)\n",
2632 paddr_nz (ip
), (char *)di
.u
.ti
.name_ptr
,
2633 paddr_nz (di
.u
.ti
.segbase
),
2634 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2636 paddr_u (di
.u
.ti
.table_len
),
2637 paddr_nz ((CORE_ADDR
)di
.u
.ti
.table_data
));
2641 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2645 if (gdbarch_debug
>= 1)
2646 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2647 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2648 "length=%s,data=0x%s)\n",
2649 paddr_nz (ip
), (char *)di
.u
.rti
.name_ptr
,
2650 paddr_nz (di
.u
.rti
.segbase
),
2651 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2653 paddr_u (di
.u
.rti
.table_len
),
2654 paddr_nz (di
.u
.rti
.table_data
));
2657 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2660 /* We no longer need the dyn info storage so free it. */
2666 /* Libunwind callback accessor function for cleanup. */
2668 ia64_put_unwind_info (unw_addr_space_t as
,
2669 unw_proc_info_t
*pip
, void *arg
)
2671 /* Nothing required for now. */
2674 /* Libunwind callback accessor function to get head of the dynamic
2675 unwind-info registration list. */
2677 ia64_get_dyn_info_list (unw_addr_space_t as
,
2678 unw_word_t
*dilap
, void *arg
)
2680 struct obj_section
*text_sec
;
2681 struct objfile
*objfile
;
2682 unw_word_t ip
, addr
;
2686 if (!libunwind_is_initialized ())
2687 return -UNW_ENOINFO
;
2689 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2693 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2694 ip
= text_sec
->addr
;
2695 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2698 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2699 /* We no longer need the dyn info storage so free it. */
2704 if (gdbarch_debug
>= 1)
2705 fprintf_unfiltered (gdb_stdlog
,
2706 "dynamic unwind table in objfile %s "
2707 "at 0x%s (gp=0x%s)\n",
2708 bfd_get_filename (objfile
->obfd
),
2709 paddr_nz (addr
), paddr_nz (di
.gp
));
2715 return -UNW_ENOINFO
;
2719 /* Frame interface functions for libunwind. */
2722 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2723 struct frame_id
*this_id
)
2728 CORE_ADDR prev_ip
, addr
;
2729 int realnum
, optimized
;
2730 enum lval_type lval
;
2733 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2734 if (frame_id_eq (id
, null_frame_id
))
2736 (*this_id
) = null_frame_id
;
2740 /* We must add the bsp as the special address for frame comparison
2742 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2743 bsp
= extract_unsigned_integer (buf
, 8);
2745 /* If the previous frame pc value is 0, then we are at the end of the stack
2746 and don't want to unwind past this frame. We return a null frame_id to
2748 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2749 &optimized
, &lval
, &addr
, &realnum
, buf
);
2750 prev_ip
= extract_unsigned_integer (buf
, 8);
2753 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2755 (*this_id
) = null_frame_id
;
2757 if (gdbarch_debug
>= 1)
2758 fprintf_unfiltered (gdb_stdlog
,
2759 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2760 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2761 paddr_nz (bsp
), next_frame
);
2765 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2767 int regnum
, int *optimizedp
,
2768 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2769 int *realnump
, gdb_byte
*valuep
)
2773 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2774 reg
= IA64_PR_REGNUM
;
2775 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2776 reg
= IA64_UNAT_REGNUM
;
2778 /* Let libunwind do most of the work. */
2779 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2780 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2782 /* No more to do if the value is not supposed to be supplied. */
2786 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2790 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2794 unsigned char buf
[MAX_REGISTER_SIZE
];
2796 /* Fetch predicate register rename base from current frame
2797 marker for this frame. */
2798 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2799 cfm
= extract_unsigned_integer (buf
, 8);
2800 rrb_pr
= (cfm
>> 32) & 0x3f;
2802 /* Adjust the register number to account for register rotation. */
2803 regnum
= VP16_REGNUM
2804 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2806 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2807 regnum
- VP0_REGNUM
, 1);
2808 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
2810 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2814 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2815 regnum
- IA64_NAT0_REGNUM
, 1);
2816 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2819 else if (regnum
== IA64_BSP_REGNUM
)
2821 char cfm_valuep
[MAX_REGISTER_SIZE
];
2824 enum lval_type cfm_lval
;
2826 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2828 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2829 This corresponds to what the hardware bsp register will be if we pop the frame
2830 back which is why we might have been called. We know that libunwind will pass us back
2831 the beginning of the current frame so we should just add sof to it. */
2832 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2833 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2834 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2835 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2836 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2838 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2842 if (gdbarch_debug
>= 1)
2843 fprintf_unfiltered (gdb_stdlog
,
2844 "libunwind prev register <%s> is 0x%s\n",
2845 (regnum
< IA64_GR32_REGNUM
2846 || (regnum
> IA64_GR127_REGNUM
2847 && regnum
< LAST_PSEUDO_REGNUM
))
2848 ? ia64_register_names
[regnum
]
2849 : (regnum
< LAST_PSEUDO_REGNUM
2850 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2852 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2855 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2858 ia64_libunwind_frame_this_id
,
2859 ia64_libunwind_frame_prev_register
2862 static const struct frame_unwind
*
2863 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2865 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2866 return &ia64_libunwind_frame_unwind
;
2872 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2873 struct frame_id
*this_id
)
2880 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2881 if (frame_id_eq (id
, null_frame_id
))
2883 (*this_id
) = null_frame_id
;
2887 /* We must add the bsp as the special address for frame comparison
2889 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2890 bsp
= extract_unsigned_integer (buf
, 8);
2892 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2893 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2895 if (gdbarch_debug
>= 1)
2896 fprintf_unfiltered (gdb_stdlog
,
2897 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2898 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2899 paddr_nz (bsp
), next_frame
);
2903 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
2905 int regnum
, int *optimizedp
,
2906 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2907 int *realnump
, gdb_byte
*valuep
)
2911 CORE_ADDR prev_ip
, addr
;
2912 int realnum
, optimized
;
2913 enum lval_type lval
;
2916 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2917 method of getting previous registers. */
2918 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2919 &optimized
, &lval
, &addr
, &realnum
, buf
);
2920 prev_ip
= extract_unsigned_integer (buf
, 8);
2924 void *tmp_cache
= NULL
;
2925 ia64_sigtramp_frame_prev_register (next_frame
, &tmp_cache
, regnum
, optimizedp
, lvalp
,
2926 addrp
, realnump
, valuep
);
2929 ia64_libunwind_frame_prev_register (next_frame
, this_cache
, regnum
, optimizedp
, lvalp
,
2930 addrp
, realnump
, valuep
);
2933 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
2936 ia64_libunwind_sigtramp_frame_this_id
,
2937 ia64_libunwind_sigtramp_frame_prev_register
2940 static const struct frame_unwind
*
2941 ia64_libunwind_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2943 if (libunwind_is_initialized ())
2945 if (libunwind_sigtramp_frame_sniffer (next_frame
))
2946 return &ia64_libunwind_sigtramp_frame_unwind
;
2950 return ia64_sigtramp_frame_sniffer (next_frame
);
2953 /* Set of libunwind callback acccessor functions. */
2954 static unw_accessors_t ia64_unw_accessors
=
2956 ia64_find_proc_info_x
,
2957 ia64_put_unwind_info
,
2958 ia64_get_dyn_info_list
,
2966 /* Set of special libunwind callback acccessor functions specific for accessing
2967 the rse registers. At the top of the stack, we want libunwind to figure out
2968 how to read r32 - r127. Though usually they are found sequentially in memory
2969 starting from $bof, this is not always true. */
2970 static unw_accessors_t ia64_unw_rse_accessors
=
2972 ia64_find_proc_info_x
,
2973 ia64_put_unwind_info
,
2974 ia64_get_dyn_info_list
,
2976 ia64_access_rse_reg
,
2982 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2983 static struct libunwind_descr ia64_libunwind_descr
=
2988 &ia64_unw_accessors
,
2989 &ia64_unw_rse_accessors
,
2992 #endif /* HAVE_LIBUNWIND_IA64_H */
2994 /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of
2995 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc and TYPE
2996 is the type (which is known to be struct, union or array). */
2998 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
3000 struct type
*float_elt_type
;
3002 /* HFAs are structures (or arrays) consisting entirely of floating
3003 point values of the same length. Up to 8 of these are returned
3004 in registers. Don't use the struct convention when this is the
3006 float_elt_type
= is_float_or_hfa_type (type
);
3007 if (float_elt_type
!= NULL
3008 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
3011 /* Other structs of length 32 or less are returned in r8-r11.
3012 Don't use the struct convention for those either. */
3013 return TYPE_LENGTH (type
) > 32;
3017 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
3020 struct type
*float_elt_type
;
3022 float_elt_type
= is_float_or_hfa_type (type
);
3023 if (float_elt_type
!= NULL
)
3025 char from
[MAX_REGISTER_SIZE
];
3027 int regnum
= IA64_FR8_REGNUM
;
3028 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3032 regcache_cooked_read (regcache
, regnum
, from
);
3033 convert_typed_floating (from
, builtin_type_ia64_ext
,
3034 (char *)valbuf
+ offset
, float_elt_type
);
3035 offset
+= TYPE_LENGTH (float_elt_type
);
3043 int regnum
= IA64_GR8_REGNUM
;
3044 int reglen
= TYPE_LENGTH (register_type (get_regcache_arch (regcache
),
3046 int n
= TYPE_LENGTH (type
) / reglen
;
3047 int m
= TYPE_LENGTH (type
) % reglen
;
3052 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3053 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3060 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3061 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3067 ia64_extract_struct_value_address (struct regcache
*regcache
)
3069 error (_("ia64_extract_struct_value_address called and cannot get struct value address"));
3075 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3077 switch (TYPE_CODE (t
))
3081 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3088 case TYPE_CODE_ARRAY
:
3090 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3093 case TYPE_CODE_STRUCT
:
3097 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3098 if (!is_float_or_hfa_type_recurse
3099 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3110 /* Determine if the given type is one of the floating point types or
3111 and HFA (which is a struct, array, or combination thereof whose
3112 bottom-most elements are all of the same floating point type). */
3114 static struct type
*
3115 is_float_or_hfa_type (struct type
*t
)
3117 struct type
*et
= 0;
3119 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3123 /* Return 1 if the alignment of T is such that the next even slot
3124 should be used. Return 0, if the next available slot should
3125 be used. (See section 8.5.1 of the IA-64 Software Conventions
3126 and Runtime manual). */
3129 slot_alignment_is_next_even (struct type
*t
)
3131 switch (TYPE_CODE (t
))
3135 if (TYPE_LENGTH (t
) > 8)
3139 case TYPE_CODE_ARRAY
:
3141 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3142 case TYPE_CODE_STRUCT
:
3146 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3147 if (slot_alignment_is_next_even
3148 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3157 /* Attempt to find (and return) the global pointer for the given
3160 This is a rather nasty bit of code searchs for the .dynamic section
3161 in the objfile corresponding to the pc of the function we're trying
3162 to call. Once it finds the addresses at which the .dynamic section
3163 lives in the child process, it scans the Elf64_Dyn entries for a
3164 DT_PLTGOT tag. If it finds one of these, the corresponding
3165 d_un.d_ptr value is the global pointer. */
3168 ia64_find_global_pointer (CORE_ADDR faddr
)
3170 struct obj_section
*faddr_sect
;
3172 faddr_sect
= find_pc_section (faddr
);
3173 if (faddr_sect
!= NULL
)
3175 struct obj_section
*osect
;
3177 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3179 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3183 if (osect
< faddr_sect
->objfile
->sections_end
)
3188 while (addr
< osect
->endaddr
)
3194 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3197 tag
= extract_signed_integer (buf
, sizeof (buf
));
3199 if (tag
== DT_PLTGOT
)
3201 CORE_ADDR global_pointer
;
3203 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3206 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
3209 return global_pointer
;
3222 /* Given a function's address, attempt to find (and return) the
3223 corresponding (canonical) function descriptor. Return 0 if
3226 find_extant_func_descr (CORE_ADDR faddr
)
3228 struct obj_section
*faddr_sect
;
3230 /* Return early if faddr is already a function descriptor. */
3231 faddr_sect
= find_pc_section (faddr
);
3232 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3235 if (faddr_sect
!= NULL
)
3237 struct obj_section
*osect
;
3238 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3240 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3244 if (osect
< faddr_sect
->objfile
->sections_end
)
3249 while (addr
< osect
->endaddr
)
3255 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3258 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
3260 if (faddr
== faddr2
)
3270 /* Attempt to find a function descriptor corresponding to the
3271 given address. If none is found, construct one on the
3272 stack using the address at fdaptr. */
3275 find_func_descr (CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3279 fdesc
= find_extant_func_descr (faddr
);
3283 CORE_ADDR global_pointer
;
3289 global_pointer
= ia64_find_global_pointer (faddr
);
3291 if (global_pointer
== 0)
3292 global_pointer
= read_register (IA64_GR1_REGNUM
);
3294 store_unsigned_integer (buf
, 8, faddr
);
3295 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
3297 write_memory (fdesc
, buf
, 16);
3303 /* Use the following routine when printing out function pointers
3304 so the user can see the function address rather than just the
3305 function descriptor. */
3307 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3308 struct target_ops
*targ
)
3310 struct obj_section
*s
;
3312 s
= find_pc_section (addr
);
3314 /* check if ADDR points to a function descriptor. */
3315 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3316 return read_memory_unsigned_integer (addr
, 8);
3318 /* There are also descriptors embedded in vtables. */
3321 struct minimal_symbol
*minsym
;
3323 minsym
= lookup_minimal_symbol_by_pc (addr
);
3325 if (minsym
&& is_vtable_name (SYMBOL_LINKAGE_NAME (minsym
)))
3326 return read_memory_unsigned_integer (addr
, 8);
3333 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3339 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3340 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3341 int nargs
, struct value
**args
, CORE_ADDR sp
,
3342 int struct_return
, CORE_ADDR struct_addr
)
3348 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3350 CORE_ADDR bsp
, cfm
, pfs
, new_bsp
, funcdescaddr
, pc
, global_pointer
;
3351 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3355 /* Count the number of slots needed for the arguments. */
3356 for (argno
= 0; argno
< nargs
; argno
++)
3359 type
= check_typedef (value_type (arg
));
3360 len
= TYPE_LENGTH (type
);
3362 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3365 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3368 nslots
+= (len
+ 7) / 8;
3371 /* Divvy up the slots between the RSE and the memory stack. */
3372 rseslots
= (nslots
> 8) ? 8 : nslots
;
3373 memslots
= nslots
- rseslots
;
3375 /* Allocate a new RSE frame. */
3376 cfm
= read_register (IA64_CFM_REGNUM
);
3378 bsp
= read_register (IA64_BSP_REGNUM
);
3379 new_bsp
= rse_address_add (bsp
, rseslots
);
3380 write_register (IA64_BSP_REGNUM
, new_bsp
);
3382 pfs
= read_register (IA64_PFS_REGNUM
);
3383 pfs
&= 0xc000000000000000LL
;
3384 pfs
|= (cfm
& 0xffffffffffffLL
);
3385 write_register (IA64_PFS_REGNUM
, pfs
);
3387 cfm
&= 0xc000000000000000LL
;
3389 write_register (IA64_CFM_REGNUM
, cfm
);
3391 /* We will attempt to find function descriptors in the .opd segment,
3392 but if we can't we'll construct them ourselves. That being the
3393 case, we'll need to reserve space on the stack for them. */
3394 funcdescaddr
= sp
- nfuncargs
* 16;
3395 funcdescaddr
&= ~0xfLL
;
3397 /* Adjust the stack pointer to it's new value. The calling conventions
3398 require us to have 16 bytes of scratch, plus whatever space is
3399 necessary for the memory slots and our function descriptors. */
3400 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3401 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3403 /* Place the arguments where they belong. The arguments will be
3404 either placed in the RSE backing store or on the memory stack.
3405 In addition, floating point arguments or HFAs are placed in
3406 floating point registers. */
3408 floatreg
= IA64_FR8_REGNUM
;
3409 for (argno
= 0; argno
< nargs
; argno
++)
3411 struct type
*float_elt_type
;
3414 type
= check_typedef (value_type (arg
));
3415 len
= TYPE_LENGTH (type
);
3417 /* Special handling for function parameters. */
3419 && TYPE_CODE (type
) == TYPE_CODE_PTR
3420 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3424 store_unsigned_integer (val_buf
, 8,
3425 find_func_descr (extract_unsigned_integer (value_contents (arg
), 8),
3427 if (slotnum
< rseslots
)
3428 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3430 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3437 /* Skip odd slot if necessary... */
3438 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3446 memset (val_buf
, 0, 8);
3447 memcpy (val_buf
, value_contents (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3449 if (slotnum
< rseslots
)
3450 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3452 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3459 /* Handle floating point types (including HFAs). */
3460 float_elt_type
= is_float_or_hfa_type (type
);
3461 if (float_elt_type
!= NULL
)
3464 len
= TYPE_LENGTH (type
);
3465 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3467 char to
[MAX_REGISTER_SIZE
];
3468 convert_typed_floating (value_contents (arg
) + argoffset
, float_elt_type
,
3469 to
, builtin_type_ia64_ext
);
3470 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3472 argoffset
+= TYPE_LENGTH (float_elt_type
);
3473 len
-= TYPE_LENGTH (float_elt_type
);
3478 /* Store the struct return value in r8 if necessary. */
3481 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3484 global_pointer
= ia64_find_global_pointer (func_addr
);
3486 if (global_pointer
!= 0)
3487 write_register (IA64_GR1_REGNUM
, global_pointer
);
3489 write_register (IA64_BR0_REGNUM
, bp_addr
);
3491 write_register (sp_regnum
, sp
);
3496 static struct frame_id
3497 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3502 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3503 sp
= extract_unsigned_integer (buf
, 8);
3505 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3506 bsp
= extract_unsigned_integer (buf
, 8);
3508 if (gdbarch_debug
>= 1)
3509 fprintf_unfiltered (gdb_stdlog
,
3510 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3511 paddr_nz (frame_pc_unwind (next_frame
)),
3512 paddr_nz (sp
), paddr_nz (bsp
));
3514 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3518 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3521 CORE_ADDR ip
, psr
, pc
;
3523 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3524 ip
= extract_unsigned_integer (buf
, 8);
3525 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3526 psr
= extract_unsigned_integer (buf
, 8);
3528 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3533 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3534 const gdb_byte
*valbuf
)
3536 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
3538 char to
[MAX_REGISTER_SIZE
];
3539 convert_typed_floating (valbuf
, type
, to
, builtin_type_ia64_ext
);
3540 regcache_cooked_write (regcache
, IA64_FR8_REGNUM
, (void *)to
);
3541 target_store_registers (IA64_FR8_REGNUM
);
3544 regcache_cooked_write (regcache
, IA64_GR8_REGNUM
, valbuf
);
3548 ia64_remote_translate_xfer_address (struct gdbarch
*gdbarch
,
3549 struct regcache
*regcache
,
3550 CORE_ADDR memaddr
, int nr_bytes
,
3551 CORE_ADDR
*targ_addr
, int *targ_len
)
3553 *targ_addr
= memaddr
;
3554 *targ_len
= nr_bytes
;
3558 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3560 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3561 return print_insn_ia64 (memaddr
, info
);
3564 static struct gdbarch
*
3565 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3567 struct gdbarch
*gdbarch
;
3568 struct gdbarch_tdep
*tdep
;
3570 /* If there is already a candidate, use it. */
3571 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3573 return arches
->gdbarch
;
3575 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3576 gdbarch
= gdbarch_alloc (&info
, tdep
);
3578 tdep
->sigcontext_register_address
= 0;
3580 /* Define the ia64 floating-point format to gdb. */
3581 builtin_type_ia64_ext
=
3582 init_type (TYPE_CODE_FLT
, 128 / 8,
3583 0, "builtin_type_ia64_ext", NULL
);
3584 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = floatformats_ia64_ext
;
3586 /* According to the ia64 specs, instructions that store long double
3587 floats in memory use a long-double format different than that
3588 used in the floating registers. The memory format matches the
3589 x86 extended float format which is 80 bits. An OS may choose to
3590 use this format (e.g. GNU/Linux) or choose to use a different
3591 format for storing long doubles (e.g. HPUX). In the latter case,
3592 the setting of the format may be moved/overridden in an
3593 OS-specific tdep file. */
3594 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3596 set_gdbarch_short_bit (gdbarch
, 16);
3597 set_gdbarch_int_bit (gdbarch
, 32);
3598 set_gdbarch_long_bit (gdbarch
, 64);
3599 set_gdbarch_long_long_bit (gdbarch
, 64);
3600 set_gdbarch_float_bit (gdbarch
, 32);
3601 set_gdbarch_double_bit (gdbarch
, 64);
3602 set_gdbarch_long_double_bit (gdbarch
, 128);
3603 set_gdbarch_ptr_bit (gdbarch
, 64);
3605 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3606 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3607 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3608 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3610 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3611 /* FIXME: Following interface should not be needed, however, without it recurse.exp
3612 gets a number of extra failures. */
3613 set_gdbarch_deprecated_register_size (gdbarch
, 8);
3614 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3616 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3617 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3618 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3619 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3620 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3621 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3622 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3624 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3626 set_gdbarch_deprecated_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
3627 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
3629 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
3630 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, ia64_extract_struct_value_address
);
3632 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3633 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3634 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3635 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3636 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3638 /* Settings for calling functions in the inferior. */
3639 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3640 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3641 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3643 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3644 #ifdef HAVE_LIBUNWIND_IA64_H
3645 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_sigtramp_frame_sniffer
);
3646 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3647 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3649 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3651 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3652 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3654 /* Settings that should be unnecessary. */
3655 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3657 set_gdbarch_remote_translate_xfer_address (
3658 gdbarch
, ia64_remote_translate_xfer_address
);
3660 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3661 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3663 /* The virtual table contains 16-byte descriptors, not pointers to
3665 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
3667 /* Hook in ABI-specific overrides, if they have been registered. */
3668 gdbarch_init_osabi (info
, gdbarch
);
3673 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3676 _initialize_ia64_tdep (void)
3678 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);