1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
26 #include "arch-utils.h"
27 #include "floatformat.h"
29 #include "reggroups.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
35 #include "gdb_assert.h"
37 #include "elf/common.h" /* for DT_PLTGOT value */
42 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
49 /* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
64 #define KERNEL_START 0xc000000000000000ULL
66 static size_t ktab_size
= 0;
67 struct ia64_table_entry
69 uint64_t start_offset
;
74 static struct ia64_table_entry
*ktab
= NULL
;
78 /* An enumeration of the different IA-64 instruction types. */
80 typedef enum instruction_type
82 A
, /* Integer ALU ; I-unit or M-unit */
83 I
, /* Non-ALU integer; I-unit */
84 M
, /* Memory ; M-unit */
85 F
, /* Floating-point ; F-unit */
86 B
, /* Branch ; B-unit */
87 L
, /* Extended (L+X) ; I-unit */
88 X
, /* Extended (L+X) ; I-unit */
89 undefined
/* undefined or reserved */
92 /* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
107 #define SLOT_MULTIPLIER 1
109 /* Length in bytes of an instruction bundle */
111 #define BUNDLE_LEN 16
113 static gdbarch_init_ftype ia64_gdbarch_init
;
115 static gdbarch_register_name_ftype ia64_register_name
;
116 static gdbarch_register_type_ftype ia64_register_type
;
117 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
118 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
119 static struct type
*is_float_or_hfa_type (struct type
*t
);
120 static CORE_ADDR
ia64_find_global_pointer (CORE_ADDR faddr
);
122 static struct type
*builtin_type_ia64_ext
;
124 #define NUM_IA64_RAW_REGS 462
126 static int sp_regnum
= IA64_GR12_REGNUM
;
127 static int fp_regnum
= IA64_VFP_REGNUM
;
128 static int lr_regnum
= IA64_VRAP_REGNUM
;
130 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
131 they may not be accessible via the ptrace register get/set interfaces. */
132 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
133 V127_REGNUM
= V32_REGNUM
+ 95,
134 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
136 /* Array of register names; There should be ia64_num_regs strings in
139 static char *ia64_register_names
[] =
140 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
143 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
144 "", "", "", "", "", "", "", "",
145 "", "", "", "", "", "", "", "",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
157 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
158 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
159 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
160 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
161 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
162 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
163 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
164 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
165 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
166 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
167 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
168 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
169 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
170 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
171 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
172 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
174 "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
183 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
187 "pr", "ip", "psr", "cfm",
189 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
190 "", "", "", "", "", "", "", "",
191 "rsc", "bsp", "bspstore", "rnat",
193 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
194 "ccv", "", "", "", "unat", "", "", "",
195 "fpsr", "", "", "", "itc",
196 "", "", "", "", "", "", "", "", "", "",
197 "", "", "", "", "", "", "", "", "",
199 "", "", "", "", "", "", "", "", "", "",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
206 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
207 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
208 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
209 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
210 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
211 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
212 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
213 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
214 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
215 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
216 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
217 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
218 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
219 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
220 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
221 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
225 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
226 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
227 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
228 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
229 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
230 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
231 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
232 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
233 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
234 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
235 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
236 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
238 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
239 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
240 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
241 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
242 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
243 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
244 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
245 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
248 struct ia64_frame_cache
250 CORE_ADDR base
; /* frame pointer base for frame */
251 CORE_ADDR pc
; /* function start pc for frame */
252 CORE_ADDR saved_sp
; /* stack pointer for frame */
253 CORE_ADDR bsp
; /* points at r32 for the current frame */
254 CORE_ADDR cfm
; /* cfm value for current frame */
255 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
257 int sof
; /* Size of frame (decoded from cfm value) */
258 int sol
; /* Size of locals (decoded from cfm value) */
259 int sor
; /* Number of rotating registers. (decoded from cfm value) */
260 CORE_ADDR after_prologue
;
261 /* Address of first instruction after the last
262 prologue instruction; Note that there may
263 be instructions from the function's body
264 intermingled with the prologue. */
265 int mem_stack_frame_size
;
266 /* Size of the memory stack frame (may be zero),
267 or -1 if it has not been determined yet. */
268 int fp_reg
; /* Register number (if any) used a frame pointer
269 for this frame. 0 if no register is being used
270 as the frame pointer. */
272 /* Saved registers. */
273 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
277 #define SIGCONTEXT_REGISTER_ADDRESS \
278 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
281 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
282 struct reggroup
*group
)
287 if (group
== all_reggroup
)
289 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
290 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
291 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
292 if (group
== float_reggroup
)
294 if (group
== vector_reggroup
)
296 if (group
== general_reggroup
)
297 return (!vector_p
&& !float_p
);
298 if (group
== save_reggroup
|| group
== restore_reggroup
)
304 ia64_register_name (int reg
)
306 return ia64_register_names
[reg
];
310 ia64_register_type (struct gdbarch
*arch
, int reg
)
312 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
313 return builtin_type_ia64_ext
;
315 return builtin_type_long
;
319 ia64_dwarf_reg_to_regnum (int reg
)
321 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
322 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
327 floatformat_valid (const struct floatformat
*fmt
, const char *from
)
332 const struct floatformat floatformat_ia64_ext
=
334 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
335 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
339 /* Extract ``len'' bits from an instruction bundle starting at
343 extract_bit_field (char *bundle
, int from
, int len
)
345 long long result
= 0LL;
347 int from_byte
= from
/ 8;
348 int to_byte
= to
/ 8;
349 unsigned char *b
= (unsigned char *) bundle
;
355 if (from_byte
== to_byte
)
356 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
357 result
= c
>> (from
% 8);
358 lshift
= 8 - (from
% 8);
360 for (i
= from_byte
+1; i
< to_byte
; i
++)
362 result
|= ((long long) b
[i
]) << lshift
;
366 if (from_byte
< to_byte
&& (to
% 8 != 0))
369 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
370 result
|= ((long long) c
) << lshift
;
376 /* Replace the specified bits in an instruction bundle */
379 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
382 int from_byte
= from
/ 8;
383 int to_byte
= to
/ 8;
384 unsigned char *b
= (unsigned char *) bundle
;
387 if (from_byte
== to_byte
)
389 unsigned char left
, right
;
391 left
= (c
>> (to
% 8)) << (to
% 8);
392 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
393 c
= (unsigned char) (val
& 0xff);
394 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
402 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
403 c
= c
| (val
<< (from
% 8));
405 val
>>= 8 - from
% 8;
407 for (i
= from_byte
+1; i
< to_byte
; i
++)
416 unsigned char cv
= (unsigned char) val
;
418 c
= c
>> (to
% 8) << (to
% 8);
419 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
425 /* Return the contents of slot N (for N = 0, 1, or 2) in
426 and instruction bundle */
429 slotN_contents (char *bundle
, int slotnum
)
431 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
434 /* Store an instruction in an instruction bundle */
437 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
439 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
442 static enum instruction_type template_encoding_table
[32][3] =
444 { M
, I
, I
}, /* 00 */
445 { M
, I
, I
}, /* 01 */
446 { M
, I
, I
}, /* 02 */
447 { M
, I
, I
}, /* 03 */
448 { M
, L
, X
}, /* 04 */
449 { M
, L
, X
}, /* 05 */
450 { undefined
, undefined
, undefined
}, /* 06 */
451 { undefined
, undefined
, undefined
}, /* 07 */
452 { M
, M
, I
}, /* 08 */
453 { M
, M
, I
}, /* 09 */
454 { M
, M
, I
}, /* 0A */
455 { M
, M
, I
}, /* 0B */
456 { M
, F
, I
}, /* 0C */
457 { M
, F
, I
}, /* 0D */
458 { M
, M
, F
}, /* 0E */
459 { M
, M
, F
}, /* 0F */
460 { M
, I
, B
}, /* 10 */
461 { M
, I
, B
}, /* 11 */
462 { M
, B
, B
}, /* 12 */
463 { M
, B
, B
}, /* 13 */
464 { undefined
, undefined
, undefined
}, /* 14 */
465 { undefined
, undefined
, undefined
}, /* 15 */
466 { B
, B
, B
}, /* 16 */
467 { B
, B
, B
}, /* 17 */
468 { M
, M
, B
}, /* 18 */
469 { M
, M
, B
}, /* 19 */
470 { undefined
, undefined
, undefined
}, /* 1A */
471 { undefined
, undefined
, undefined
}, /* 1B */
472 { M
, F
, B
}, /* 1C */
473 { M
, F
, B
}, /* 1D */
474 { undefined
, undefined
, undefined
}, /* 1E */
475 { undefined
, undefined
, undefined
}, /* 1F */
478 /* Fetch and (partially) decode an instruction at ADDR and return the
479 address of the next instruction to fetch. */
482 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
484 char bundle
[BUNDLE_LEN
];
485 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
489 /* Warn about slot numbers greater than 2. We used to generate
490 an error here on the assumption that the user entered an invalid
491 address. But, sometimes GDB itself requests an invalid address.
492 This can (easily) happen when execution stops in a function for
493 which there are no symbols. The prologue scanner will attempt to
494 find the beginning of the function - if the nearest symbol
495 happens to not be aligned on a bundle boundary (16 bytes), the
496 resulting starting address will cause GDB to think that the slot
499 So we warn about it and set the slot number to zero. It is
500 not necessarily a fatal condition, particularly if debugging
501 at the assembly language level. */
504 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
505 "Using slot 0 instead"));
511 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
516 *instr
= slotN_contents (bundle
, slotnum
);
517 template = extract_bit_field (bundle
, 0, 5);
518 *it
= template_encoding_table
[(int)template][slotnum
];
520 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
523 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
528 /* There are 5 different break instructions (break.i, break.b,
529 break.m, break.f, and break.x), but they all have the same
530 encoding. (The five bit template in the low five bits of the
531 instruction bundle distinguishes one from another.)
533 The runtime architecture manual specifies that break instructions
534 used for debugging purposes must have the upper two bits of the 21
535 bit immediate set to a 0 and a 1 respectively. A breakpoint
536 instruction encodes the most significant bit of its 21 bit
537 immediate at bit 36 of the 41 bit instruction. The penultimate msb
538 is at bit 25 which leads to the pattern below.
540 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
541 it turns out that 0x80000 was used as the syscall break in the early
542 simulators. So I changed the pattern slightly to do "break.i 0x080001"
543 instead. But that didn't work either (I later found out that this
544 pattern was used by the simulator that I was using.) So I ended up
545 using the pattern seen below. */
548 #define IA64_BREAKPOINT 0x00002000040LL
550 #define IA64_BREAKPOINT 0x00003333300LL
553 ia64_memory_insert_breakpoint (CORE_ADDR addr
, bfd_byte
*contents_cache
)
555 char bundle
[BUNDLE_LEN
];
556 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
562 error (_("Can't insert breakpoint for slot numbers greater than 2."));
566 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
568 /* Check for L type instruction in 2nd slot, if present then
569 bump up the slot number to the 3rd slot */
570 template = extract_bit_field (bundle
, 0, 5);
571 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
576 instr
= slotN_contents (bundle
, slotnum
);
577 memcpy(contents_cache
, &instr
, sizeof(instr
));
578 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
580 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
586 ia64_memory_remove_breakpoint (CORE_ADDR addr
, bfd_byte
*contents_cache
)
588 char bundle
[BUNDLE_LEN
];
589 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
596 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
598 /* Check for L type instruction in 2nd slot, if present then
599 bump up the slot number to the 3rd slot */
600 template = extract_bit_field (bundle
, 0, 5);
601 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
606 memcpy (&instr
, contents_cache
, sizeof instr
);
607 replace_slotN_contents (bundle
, instr
, slotnum
);
609 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
614 /* We don't really want to use this, but remote.c needs to call it in order
615 to figure out if Z-packets are supported or not. Oh, well. */
616 const unsigned char *
617 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
619 static unsigned char breakpoint
[] =
620 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
621 *lenptr
= sizeof (breakpoint
);
629 ia64_read_pc (ptid_t ptid
)
631 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
632 CORE_ADDR pc_value
= read_register_pid (IA64_IP_REGNUM
, ptid
);
633 int slot_num
= (psr_value
>> 41) & 3;
635 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
639 ia64_write_pc (CORE_ADDR new_pc
, ptid_t ptid
)
641 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
642 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
643 psr_value
&= ~(3LL << 41);
644 psr_value
|= (CORE_ADDR
)(slot_num
& 0x3) << 41;
648 write_register_pid (IA64_PSR_REGNUM
, psr_value
, ptid
);
649 write_register_pid (IA64_IP_REGNUM
, new_pc
, ptid
);
652 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
654 /* Returns the address of the slot that's NSLOTS slots away from
655 the address ADDR. NSLOTS may be positive or negative. */
657 rse_address_add(CORE_ADDR addr
, int nslots
)
660 int mandatory_nat_slots
= nslots
/ 63;
661 int direction
= nslots
< 0 ? -1 : 1;
663 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
665 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
666 new_addr
+= 8 * direction
;
668 if (IS_NaT_COLLECTION_ADDR(new_addr
))
669 new_addr
+= 8 * direction
;
675 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
676 int regnum
, void *buf
)
678 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
680 /* First try and use the libunwind special reg accessor, otherwise fallback to
682 if (!libunwind_is_initialized ()
683 || libunwind_get_reg_special (gdbarch
, regnum
, buf
) != 0)
685 /* The fallback position is to assume that r32-r127 are found sequentially
686 in memory starting at $bof. This isn't always true, but without libunwind,
687 this is the best we can do. */
691 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
692 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
694 /* The bsp points at the end of the register frame so we
695 subtract the size of frame from it to get start of register frame. */
696 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
698 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
700 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
701 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
702 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), reg
);
705 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), 0);
708 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
712 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
713 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
714 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), unatN_val
);
716 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
718 ULONGEST natN_val
= 0;
721 CORE_ADDR gr_addr
= 0;
722 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
723 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
725 /* The bsp points at the end of the register frame so we
726 subtract the size of frame from it to get start of register frame. */
727 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
729 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
730 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
734 /* Compute address of nat collection bits. */
735 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
736 CORE_ADDR nat_collection
;
738 /* If our nat collection address is bigger than bsp, we have to get
739 the nat collection from rnat. Otherwise, we fetch the nat
740 collection from the computed address. */
742 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
744 nat_collection
= read_memory_integer (nat_addr
, 8);
745 nat_bit
= (gr_addr
>> 3) & 0x3f;
746 natN_val
= (nat_collection
>> nat_bit
) & 1;
749 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), natN_val
);
751 else if (regnum
== VBOF_REGNUM
)
753 /* A virtual register frame start is provided for user convenience.
754 It can be calculated as the bsp - sof (sizeof frame). */
758 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
759 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
761 /* The bsp points at the end of the register frame so we
762 subtract the size of frame from it to get beginning of frame. */
763 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
764 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), vbsp
);
766 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
772 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
773 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
775 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
777 /* Fetch predicate register rename base from current frame
778 marker for this frame. */
779 int rrb_pr
= (cfm
>> 32) & 0x3f;
781 /* Adjust the register number to account for register rotation. */
783 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
785 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
786 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), prN_val
);
789 memset (buf
, 0, register_size (current_gdbarch
, regnum
));
793 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
794 int regnum
, const void *buf
)
796 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
801 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
802 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
804 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
806 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
808 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
809 write_memory (reg_addr
, (void *)buf
, 8);
812 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
814 ULONGEST unatN_val
, unat
, unatN_mask
;
815 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
816 unatN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
817 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
820 else if (unatN_val
== 1)
822 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
824 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
829 CORE_ADDR gr_addr
= 0;
830 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
831 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
833 /* The bsp points at the end of the register frame so we
834 subtract the size of frame from it to get start of register frame. */
835 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
837 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
838 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
840 natN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
842 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
844 /* Compute address of nat collection bits. */
845 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
846 CORE_ADDR nat_collection
;
847 int natN_bit
= (gr_addr
>> 3) & 0x3f;
848 ULONGEST natN_mask
= (1LL << natN_bit
);
849 /* If our nat collection address is bigger than bsp, we have to get
850 the nat collection from rnat. Otherwise, we fetch the nat
851 collection from the computed address. */
854 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
856 nat_collection
|= natN_mask
;
858 nat_collection
&= ~natN_mask
;
859 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
864 nat_collection
= read_memory_integer (nat_addr
, 8);
866 nat_collection
|= natN_mask
;
868 nat_collection
&= ~natN_mask
;
869 store_unsigned_integer (nat_buf
, register_size (current_gdbarch
, regnum
), nat_collection
);
870 write_memory (nat_addr
, nat_buf
, 8);
874 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
881 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
882 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
884 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
886 /* Fetch predicate register rename base from current frame
887 marker for this frame. */
888 int rrb_pr
= (cfm
>> 32) & 0x3f;
890 /* Adjust the register number to account for register rotation. */
892 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
894 prN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
895 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
898 else if (prN_val
== 1)
900 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
904 /* The ia64 needs to convert between various ieee floating-point formats
905 and the special ia64 floating point register format. */
908 ia64_convert_register_p (int regno
, struct type
*type
)
910 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
);
914 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
915 struct type
*valtype
, void *out
)
917 char in
[MAX_REGISTER_SIZE
];
918 frame_register_read (frame
, regnum
, in
);
919 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
923 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
924 struct type
*valtype
, const void *in
)
926 char out
[MAX_REGISTER_SIZE
];
927 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
928 put_frame_register (frame
, regnum
, out
);
932 /* Limit the number of skipped non-prologue instructions since examining
933 of the prologue is expensive. */
934 static int max_skip_non_prologue_insns
= 40;
936 /* Given PC representing the starting address of a function, and
937 LIM_PC which is the (sloppy) limit to which to scan when looking
938 for a prologue, attempt to further refine this limit by using
939 the line data in the symbol table. If successful, a better guess
940 on where the prologue ends is returned, otherwise the previous
941 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
942 which will be set to indicate whether the returned limit may be
943 used with no further scanning in the event that the function is
946 /* FIXME: cagney/2004-02-14: This function and logic have largely been
947 superseded by skip_prologue_using_sal. */
950 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
952 struct symtab_and_line prologue_sal
;
953 CORE_ADDR start_pc
= pc
;
955 /* Start off not trusting the limit. */
958 prologue_sal
= find_pc_line (pc
, 0);
959 if (prologue_sal
.line
!= 0)
962 CORE_ADDR addr
= prologue_sal
.end
;
964 /* Handle the case in which compiler's optimizer/scheduler
965 has moved instructions into the prologue. We scan ahead
966 in the function looking for address ranges whose corresponding
967 line number is less than or equal to the first one that we
968 found for the function. (It can be less than when the
969 scheduler puts a body instruction before the first prologue
971 for (i
= 2 * max_skip_non_prologue_insns
;
972 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
975 struct symtab_and_line sal
;
977 sal
= find_pc_line (addr
, 0);
980 if (sal
.line
<= prologue_sal
.line
981 && sal
.symtab
== prologue_sal
.symtab
)
988 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
990 lim_pc
= prologue_sal
.end
;
991 if (start_pc
== get_pc_function_start (lim_pc
))
998 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
999 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1000 || (14 <= (_regnum_) && (_regnum_) <= 31))
1001 #define imm9(_instr_) \
1002 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1003 | (((_instr_) & 0x00008000000LL) >> 20) \
1004 | (((_instr_) & 0x00000001fc0LL) >> 6))
1006 /* Allocate and initialize a frame cache. */
1008 static struct ia64_frame_cache
*
1009 ia64_alloc_frame_cache (void)
1011 struct ia64_frame_cache
*cache
;
1014 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1020 cache
->prev_cfm
= 0;
1026 cache
->frameless
= 1;
1028 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1029 cache
->saved_regs
[i
] = 0;
1035 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1038 CORE_ADDR last_prologue_pc
= pc
;
1039 instruction_type it
;
1044 int unat_save_reg
= 0;
1045 int pr_save_reg
= 0;
1046 int mem_stack_frame_size
= 0;
1048 CORE_ADDR spill_addr
= 0;
1051 char reg_contents
[256];
1057 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1059 memset (instores
, 0, sizeof instores
);
1060 memset (infpstores
, 0, sizeof infpstores
);
1061 memset (reg_contents
, 0, sizeof reg_contents
);
1063 if (cache
->after_prologue
!= 0
1064 && cache
->after_prologue
<= lim_pc
)
1065 return cache
->after_prologue
;
1067 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1068 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1070 /* We want to check if we have a recognizable function start before we
1071 look ahead for a prologue. */
1072 if (pc
< lim_pc
&& next_pc
1073 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1075 /* alloc - start of a regular function. */
1076 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1077 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1078 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1079 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1081 /* Verify that the current cfm matches what we think is the
1082 function start. If we have somehow jumped within a function,
1083 we do not want to interpret the prologue and calculate the
1084 addresses of various registers such as the return address.
1085 We will instead treat the frame as frameless. */
1087 (sof
== (cache
->cfm
& 0x7f) &&
1088 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1092 last_prologue_pc
= next_pc
;
1097 /* Look for a leaf routine. */
1098 if (pc
< lim_pc
&& next_pc
1099 && (it
== I
|| it
== M
)
1100 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1102 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1103 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1104 | ((instr
& 0x001f8000000LL
) >> 20)
1105 | ((instr
& 0x000000fe000LL
) >> 13));
1106 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1107 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1108 int qp
= (int) (instr
& 0x0000000003fLL
);
1109 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1111 /* mov r2, r12 - beginning of leaf routine */
1113 last_prologue_pc
= next_pc
;
1117 /* If we don't recognize a regular function or leaf routine, we are
1123 last_prologue_pc
= lim_pc
;
1127 /* Loop, looking for prologue instructions, keeping track of
1128 where preserved registers were spilled. */
1131 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1135 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1137 /* Exit loop upon hitting a non-nop branch instruction. */
1142 else if (((instr
& 0x3fLL
) != 0LL) &&
1143 (frameless
|| ret_reg
!= 0))
1145 /* Exit loop upon hitting a predicated instruction if
1146 we already have the return register or if we are frameless. */
1151 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1154 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1155 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1156 int qp
= (int) (instr
& 0x0000000003f);
1158 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1161 last_prologue_pc
= next_pc
;
1164 else if ((it
== I
|| it
== M
)
1165 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1167 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1168 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1169 | ((instr
& 0x001f8000000LL
) >> 20)
1170 | ((instr
& 0x000000fe000LL
) >> 13));
1171 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1172 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1173 int qp
= (int) (instr
& 0x0000000003fLL
);
1175 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1179 last_prologue_pc
= next_pc
;
1181 else if (qp
== 0 && rN
== 12 && rM
== 12)
1183 /* adds r12, -mem_stack_frame_size, r12 */
1184 mem_stack_frame_size
-= imm
;
1185 last_prologue_pc
= next_pc
;
1187 else if (qp
== 0 && rN
== 2
1188 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1190 char buf
[MAX_REGISTER_SIZE
];
1191 CORE_ADDR saved_sp
= 0;
1192 /* adds r2, spilloffset, rFramePointer
1194 adds r2, spilloffset, r12
1196 Get ready for stf.spill or st8.spill instructions.
1197 The address to start spilling at is loaded into r2.
1198 FIXME: Why r2? That's what gcc currently uses; it
1199 could well be different for other compilers. */
1201 /* Hmm... whether or not this will work will depend on
1202 where the pc is. If it's still early in the prologue
1203 this'll be wrong. FIXME */
1206 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1207 saved_sp
= extract_unsigned_integer (buf
, 8);
1209 spill_addr
= saved_sp
1210 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1213 last_prologue_pc
= next_pc
;
1215 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1216 rN
< 256 && imm
== 0)
1218 /* mov rN, rM where rM is an input register */
1219 reg_contents
[rN
] = rM
;
1220 last_prologue_pc
= next_pc
;
1222 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1226 last_prologue_pc
= next_pc
;
1231 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1232 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1234 /* stf.spill [rN] = fM, imm9
1236 stf.spill [rN] = fM */
1238 int imm
= imm9(instr
);
1239 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1240 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1241 int qp
= (int) (instr
& 0x0000000003fLL
);
1242 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1243 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1245 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1247 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1250 spill_addr
= 0; /* last one; must be done */
1251 last_prologue_pc
= next_pc
;
1254 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1255 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1261 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1262 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1263 int qp
= (int) (instr
& 0x0000000003fLL
);
1264 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1266 /* We have something like "mov.m r3 = ar.unat". Remember the
1267 r3 (or whatever) and watch for a store of this register... */
1269 last_prologue_pc
= next_pc
;
1272 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1275 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1276 int qp
= (int) (instr
& 0x0000000003fLL
);
1277 if (qp
== 0 && isScratch (rN
))
1280 last_prologue_pc
= next_pc
;
1284 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1285 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1289 st8 [rN] = rM, imm9 */
1290 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1291 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1292 int qp
= (int) (instr
& 0x0000000003fLL
);
1293 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1294 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1295 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1297 /* We've found a spill of either the UNAT register or the PR
1298 register. (Well, not exactly; what we've actually found is
1299 a spill of the register that UNAT or PR was moved to).
1300 Record that fact and move on... */
1301 if (rM
== unat_save_reg
)
1303 /* Track UNAT register */
1304 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1309 /* Track PR register */
1310 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1313 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1314 /* st8 [rN] = rM, imm9 */
1315 spill_addr
+= imm9(instr
);
1317 spill_addr
= 0; /* must be done spilling */
1318 last_prologue_pc
= next_pc
;
1320 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1322 /* Allow up to one store of each input register. */
1323 instores
[rM
-32] = 1;
1324 last_prologue_pc
= next_pc
;
1326 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1327 !instores
[indirect
-32])
1329 /* Allow an indirect store of an input register. */
1330 instores
[indirect
-32] = 1;
1331 last_prologue_pc
= next_pc
;
1334 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1341 Note that the st8 case is handled in the clause above.
1343 Advance over stores of input registers. One store per input
1344 register is permitted. */
1345 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1346 int qp
= (int) (instr
& 0x0000000003fLL
);
1347 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1348 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1350 instores
[rM
-32] = 1;
1351 last_prologue_pc
= next_pc
;
1353 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1354 !instores
[indirect
-32])
1356 /* Allow an indirect store of an input register. */
1357 instores
[indirect
-32] = 1;
1358 last_prologue_pc
= next_pc
;
1361 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1368 Advance over stores of floating point input registers. Again
1369 one store per register is permitted */
1370 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1371 int qp
= (int) (instr
& 0x0000000003fLL
);
1372 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1374 infpstores
[fM
-8] = 1;
1375 last_prologue_pc
= next_pc
;
1379 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1380 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1382 /* st8.spill [rN] = rM
1384 st8.spill [rN] = rM, imm9 */
1385 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1386 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1387 int qp
= (int) (instr
& 0x0000000003fLL
);
1388 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1390 /* We've found a spill of one of the preserved general purpose
1391 regs. Record the spill address and advance the spill
1392 register if appropriate. */
1393 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1394 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1395 /* st8.spill [rN] = rM, imm9 */
1396 spill_addr
+= imm9(instr
);
1398 spill_addr
= 0; /* Done spilling */
1399 last_prologue_pc
= next_pc
;
1406 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1407 registers for the previous frame which will be needed later. */
1409 if (!frameless
&& next_frame
)
1411 /* Extract the size of the rotating portion of the stack
1412 frame and the register rename base from the current
1418 rrb_gr
= (cfm
>> 18) & 0x7f;
1420 /* Find the bof (beginning of frame). */
1421 bof
= rse_address_add (cache
->bsp
, -sof
);
1423 for (i
= 0, addr
= bof
;
1427 if (IS_NaT_COLLECTION_ADDR (addr
))
1431 if (i
+32 == cfm_reg
)
1432 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1433 if (i
+32 == ret_reg
)
1434 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1436 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1439 /* For the previous argument registers we require the previous bof.
1440 If we can't find the previous cfm, then we can do nothing. */
1442 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1444 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1446 else if (cfm_reg
!= 0)
1448 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1449 cfm
= extract_unsigned_integer (buf
, 8);
1451 cache
->prev_cfm
= cfm
;
1455 sor
= ((cfm
>> 14) & 0xf) * 8;
1457 sol
= (cfm
>> 7) & 0x7f;
1458 rrb_gr
= (cfm
>> 18) & 0x7f;
1460 /* The previous bof only requires subtraction of the sol (size of locals)
1461 due to the overlap between output and input of subsequent frames. */
1462 bof
= rse_address_add (bof
, -sol
);
1464 for (i
= 0, addr
= bof
;
1468 if (IS_NaT_COLLECTION_ADDR (addr
))
1473 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1476 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1482 /* Try and trust the lim_pc value whenever possible. */
1483 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1484 last_prologue_pc
= lim_pc
;
1486 cache
->frameless
= frameless
;
1487 cache
->after_prologue
= last_prologue_pc
;
1488 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1489 cache
->fp_reg
= fp_reg
;
1491 return last_prologue_pc
;
1495 ia64_skip_prologue (CORE_ADDR pc
)
1497 struct ia64_frame_cache cache
;
1499 cache
.after_prologue
= 0;
1503 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1504 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1508 /* Normal frames. */
1510 static struct ia64_frame_cache
*
1511 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1513 struct ia64_frame_cache
*cache
;
1515 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1521 cache
= ia64_alloc_frame_cache ();
1522 *this_cache
= cache
;
1524 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1525 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1527 /* We always want the bsp to point to the end of frame.
1528 This way, we can always get the beginning of frame (bof)
1529 by subtracting frame size. */
1530 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1531 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1533 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1534 psr
= extract_unsigned_integer (buf
, 8);
1536 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1537 cfm
= extract_unsigned_integer (buf
, 8);
1539 cache
->sof
= (cfm
& 0x7f);
1540 cache
->sol
= (cfm
>> 7) & 0x7f;
1541 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1545 cache
->pc
= frame_func_unwind (next_frame
);
1548 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1550 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1556 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1557 struct frame_id
*this_id
)
1559 struct ia64_frame_cache
*cache
=
1560 ia64_frame_cache (next_frame
, this_cache
);
1562 /* If outermost frame, mark with null frame id. */
1563 if (cache
->base
== 0)
1564 (*this_id
) = null_frame_id
;
1566 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1567 if (gdbarch_debug
>= 1)
1568 fprintf_unfiltered (gdb_stdlog
,
1569 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1570 paddr_nz (this_id
->code_addr
),
1571 paddr_nz (this_id
->stack_addr
),
1572 paddr_nz (cache
->bsp
), next_frame
);
1576 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1577 int regnum
, int *optimizedp
,
1578 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1579 int *realnump
, void *valuep
)
1581 struct ia64_frame_cache
*cache
=
1582 ia64_frame_cache (next_frame
, this_cache
);
1583 char dummy_valp
[MAX_REGISTER_SIZE
];
1586 gdb_assert (regnum
>= 0);
1588 if (!target_has_registers
)
1589 error (_("No registers."));
1596 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1597 when valuep is not supplied. */
1599 valuep
= dummy_valp
;
1601 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1603 if (regnum
== SP_REGNUM
)
1605 /* Handle SP values for all frames but the topmost. */
1606 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1609 else if (regnum
== IA64_BSP_REGNUM
)
1611 char cfm_valuep
[MAX_REGISTER_SIZE
];
1614 enum lval_type cfm_lval
;
1616 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1618 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1619 This corresponds to what the hardware bsp register will be if we pop the frame
1620 back which is why we might have been called. We know the beginning of the current
1621 frame is cache->bsp - cache->sof. This value in the previous frame points to
1622 the start of the output registers. We can calculate the end of that frame by adding
1623 the size of output (sof (size of frame) - sol (size of locals)). */
1624 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1625 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1626 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1628 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1629 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1631 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1634 else if (regnum
== IA64_CFM_REGNUM
)
1636 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1640 *lvalp
= lval_memory
;
1642 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1644 else if (cache
->prev_cfm
)
1645 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), cache
->prev_cfm
);
1646 else if (cache
->frameless
)
1649 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1652 else if (regnum
== IA64_VFP_REGNUM
)
1654 /* If the function in question uses an automatic register (r32-r127)
1655 for the frame pointer, it'll be found by ia64_find_saved_register()
1656 above. If the function lacks one of these frame pointers, we can
1657 still provide a value since we know the size of the frame. */
1658 CORE_ADDR vfp
= cache
->base
;
1659 store_unsigned_integer (valuep
, register_size (current_gdbarch
, IA64_VFP_REGNUM
), vfp
);
1661 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1663 char pr_valuep
[MAX_REGISTER_SIZE
];
1666 enum lval_type pr_lval
;
1669 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1670 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1671 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1673 /* Fetch predicate register rename base from current frame
1674 marker for this frame. */
1675 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1677 /* Adjust the register number to account for register rotation. */
1678 regnum
= VP16_REGNUM
1679 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1681 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1682 regnum
- VP0_REGNUM
, 1);
1683 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
1685 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1687 char unat_valuep
[MAX_REGISTER_SIZE
];
1690 enum lval_type unat_lval
;
1691 CORE_ADDR unat_addr
;
1693 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1694 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1695 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1696 regnum
- IA64_NAT0_REGNUM
, 1);
1697 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1700 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1703 /* Find address of general register corresponding to nat bit we're
1707 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1711 /* Compute address of nat collection bits. */
1712 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1714 CORE_ADDR nat_collection
;
1716 /* If our nat collection address is bigger than bsp, we have to get
1717 the nat collection from rnat. Otherwise, we fetch the nat
1718 collection from the computed address. */
1719 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1720 bsp
= extract_unsigned_integer (buf
, 8);
1721 if (nat_addr
>= bsp
)
1723 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1724 nat_collection
= extract_unsigned_integer (buf
, 8);
1727 nat_collection
= read_memory_integer (nat_addr
, 8);
1728 nat_bit
= (gr_addr
>> 3) & 0x3f;
1729 natval
= (nat_collection
>> nat_bit
) & 1;
1732 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), natval
);
1734 else if (regnum
== IA64_IP_REGNUM
)
1737 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1741 *lvalp
= lval_memory
;
1743 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1744 pc
= extract_unsigned_integer (buf
, 8);
1746 else if (cache
->frameless
)
1748 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1749 pc
= extract_unsigned_integer (buf
, 8);
1752 store_unsigned_integer (valuep
, 8, pc
);
1754 else if (regnum
== IA64_PSR_REGNUM
)
1756 /* We don't know how to get the complete previous PSR, but we need it for
1757 the slot information when we unwind the pc (pc is formed of IP register
1758 plus slot information from PSR). To get the previous slot information,
1759 we mask it off the return address. */
1760 ULONGEST slot_num
= 0;
1763 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1765 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1766 psr
= extract_unsigned_integer (buf
, 8);
1770 *lvalp
= lval_memory
;
1772 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1773 pc
= extract_unsigned_integer (buf
, 8);
1775 else if (cache
->frameless
)
1778 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1779 pc
= extract_unsigned_integer (buf
, 8);
1781 psr
&= ~(3LL << 41);
1782 slot_num
= pc
& 0x3LL
;
1783 psr
|= (CORE_ADDR
)slot_num
<< 41;
1784 store_unsigned_integer (valuep
, 8, psr
);
1786 else if (regnum
== IA64_BR0_REGNUM
)
1789 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1792 *lvalp
= lval_memory
;
1794 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_BR0_REGNUM
));
1795 br0
= extract_unsigned_integer (buf
, 8);
1797 store_unsigned_integer (valuep
, 8, br0
);
1799 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1800 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1803 if (regnum
>= V32_REGNUM
)
1804 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1805 addr
= cache
->saved_regs
[regnum
];
1808 *lvalp
= lval_memory
;
1810 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1812 else if (cache
->frameless
)
1814 char r_valuep
[MAX_REGISTER_SIZE
];
1817 enum lval_type r_lval
;
1819 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1821 if (regnum
>= V32_REGNUM
)
1822 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1823 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1824 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1825 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1826 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1827 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1828 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1829 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1831 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1832 *lvalp
= lval_memory
;
1834 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1840 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1842 /* Fetch floating point register rename base from current
1843 frame marker for this frame. */
1844 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1846 /* Adjust the floating point register number to account for
1847 register rotation. */
1848 regnum
= IA64_FR32_REGNUM
1849 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1852 /* If we have stored a memory address, access the register. */
1853 addr
= cache
->saved_regs
[regnum
];
1856 *lvalp
= lval_memory
;
1858 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1860 /* Otherwise, punt and get the current value of the register. */
1862 frame_unwind_register (next_frame
, regnum
, valuep
);
1865 if (gdbarch_debug
>= 1)
1866 fprintf_unfiltered (gdb_stdlog
,
1867 "regular prev register <%d> <%s> is 0x%s\n", regnum
,
1868 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1869 ? ia64_register_names
[regnum
] : "r??"),
1870 paddr_nz (extract_unsigned_integer (valuep
, 8)));
1873 static const struct frame_unwind ia64_frame_unwind
=
1876 &ia64_frame_this_id
,
1877 &ia64_frame_prev_register
1880 static const struct frame_unwind
*
1881 ia64_frame_sniffer (struct frame_info
*next_frame
)
1883 return &ia64_frame_unwind
;
1886 /* Signal trampolines. */
1889 ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache
*cache
)
1891 if (SIGCONTEXT_REGISTER_ADDRESS
)
1895 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1896 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_IP_REGNUM
);
1897 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1898 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CFM_REGNUM
);
1899 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1900 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PSR_REGNUM
);
1901 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1902 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_BSP_REGNUM
);
1903 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1904 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_RNAT_REGNUM
);
1905 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1906 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CCV_REGNUM
);
1907 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1908 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_UNAT_REGNUM
);
1909 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1910 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_FPSR_REGNUM
);
1911 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1912 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PFS_REGNUM
);
1913 cache
->saved_regs
[IA64_LC_REGNUM
] =
1914 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_LC_REGNUM
);
1915 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1916 cache
->saved_regs
[regno
] =
1917 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1918 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1919 cache
->saved_regs
[regno
] =
1920 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1921 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1922 cache
->saved_regs
[regno
] =
1923 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1927 static struct ia64_frame_cache
*
1928 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1930 struct ia64_frame_cache
*cache
;
1938 cache
= ia64_alloc_frame_cache ();
1940 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1941 /* Note that frame size is hard-coded below. We cannot calculate it
1942 via prologue examination. */
1943 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1945 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1946 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1948 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1949 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1950 cache
->sof
= cache
->cfm
& 0x7f;
1952 ia64_sigtramp_frame_init_saved_regs (cache
);
1954 *this_cache
= cache
;
1959 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1960 void **this_cache
, struct frame_id
*this_id
)
1962 struct ia64_frame_cache
*cache
=
1963 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1965 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1966 if (gdbarch_debug
>= 1)
1967 fprintf_unfiltered (gdb_stdlog
,
1968 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1969 paddr_nz (this_id
->code_addr
),
1970 paddr_nz (this_id
->stack_addr
),
1971 paddr_nz (cache
->bsp
), next_frame
);
1975 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1977 int regnum
, int *optimizedp
,
1978 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1979 int *realnump
, void *valuep
)
1981 char dummy_valp
[MAX_REGISTER_SIZE
];
1982 char buf
[MAX_REGISTER_SIZE
];
1984 struct ia64_frame_cache
*cache
=
1985 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1987 gdb_assert (regnum
>= 0);
1989 if (!target_has_registers
)
1990 error (_("No registers."));
1997 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1998 when valuep is not supplied. */
2000 valuep
= dummy_valp
;
2002 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
2004 if (regnum
== IA64_IP_REGNUM
)
2007 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2011 *lvalp
= lval_memory
;
2013 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
2014 pc
= extract_unsigned_integer (buf
, 8);
2017 store_unsigned_integer (valuep
, 8, pc
);
2019 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2020 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2023 if (regnum
>= V32_REGNUM
)
2024 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2025 addr
= cache
->saved_regs
[regnum
];
2028 *lvalp
= lval_memory
;
2030 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2035 /* All other registers not listed above. */
2036 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2039 *lvalp
= lval_memory
;
2041 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2045 if (gdbarch_debug
>= 1)
2046 fprintf_unfiltered (gdb_stdlog
,
2047 "sigtramp prev register <%s> is 0x%s\n",
2048 (regnum
< IA64_GR32_REGNUM
2049 || (regnum
> IA64_GR127_REGNUM
2050 && regnum
< LAST_PSEUDO_REGNUM
))
2051 ? ia64_register_names
[regnum
]
2052 : (regnum
< LAST_PSEUDO_REGNUM
2053 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2055 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2058 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2061 ia64_sigtramp_frame_this_id
,
2062 ia64_sigtramp_frame_prev_register
2065 static const struct frame_unwind
*
2066 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2069 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2071 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2072 if (legacy_pc_in_sigtramp (pc
, name
))
2073 return &ia64_sigtramp_frame_unwind
;
2080 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2082 struct ia64_frame_cache
*cache
=
2083 ia64_frame_cache (next_frame
, this_cache
);
2088 static const struct frame_base ia64_frame_base
=
2091 ia64_frame_base_address
,
2092 ia64_frame_base_address
,
2093 ia64_frame_base_address
2096 #ifdef HAVE_LIBUNWIND_IA64_H
2098 struct ia64_unwind_table_entry
2100 unw_word_t start_offset
;
2101 unw_word_t end_offset
;
2102 unw_word_t info_offset
;
2105 static __inline__
uint64_t
2106 ia64_rse_slot_num (uint64_t addr
)
2108 return (addr
>> 3) & 0x3f;
2111 /* Skip over a designated number of registers in the backing
2112 store, remembering every 64th position is for NAT. */
2113 static __inline__
uint64_t
2114 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2116 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2120 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2123 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2124 number to a libunwind register number. */
2126 ia64_gdb2uw_regnum (int regnum
)
2128 if (regnum
== sp_regnum
)
2130 else if (regnum
== IA64_BSP_REGNUM
)
2131 return UNW_IA64_BSP
;
2132 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2133 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2134 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2135 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2136 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2137 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2138 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2140 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2141 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2142 else if (regnum
== IA64_PR_REGNUM
)
2144 else if (regnum
== IA64_IP_REGNUM
)
2146 else if (regnum
== IA64_CFM_REGNUM
)
2147 return UNW_IA64_CFM
;
2148 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2149 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2150 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2151 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2156 /* Gdb libunwind-frame callback function to convert from a libunwind register
2157 number to a ia64 gdb register number. */
2159 ia64_uw2gdb_regnum (int uw_regnum
)
2161 if (uw_regnum
== UNW_IA64_SP
)
2163 else if (uw_regnum
== UNW_IA64_BSP
)
2164 return IA64_BSP_REGNUM
;
2165 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2166 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2167 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2168 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2169 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2170 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2171 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2172 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2173 else if (uw_regnum
== UNW_IA64_PR
)
2174 return IA64_PR_REGNUM
;
2175 else if (uw_regnum
== UNW_REG_IP
)
2176 return IA64_IP_REGNUM
;
2177 else if (uw_regnum
== UNW_IA64_CFM
)
2178 return IA64_CFM_REGNUM
;
2179 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2180 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2181 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2182 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2187 /* Gdb libunwind-frame callback function to reveal if register is a float
2190 ia64_is_fpreg (int uw_regnum
)
2192 return unw_is_fpreg (uw_regnum
);
2195 /* Libunwind callback accessor function for general registers. */
2197 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2198 int write
, void *arg
)
2200 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2201 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2202 struct frame_info
*next_frame
= arg
;
2203 long new_sof
, old_sof
;
2204 char buf
[MAX_REGISTER_SIZE
];
2209 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2215 ia64_write_pc (*val
, inferior_ptid
);
2218 case UNW_IA64_AR_BSPSTORE
:
2219 write_register (IA64_BSP_REGNUM
, *val
);
2222 case UNW_IA64_AR_BSP
:
2224 /* Account for the fact that ptrace() expects bsp to point
2225 after the current register frame. */
2226 cfm
= read_register (IA64_CFM_REGNUM
);
2228 bsp
= ia64_rse_skip_regs (*val
, sof
);
2229 write_register (IA64_BSP_REGNUM
, bsp
);
2233 /* If we change CFM, we need to adjust ptrace's notion of
2234 bsp accordingly, so that the real bsp remains
2236 bsp
= read_register (IA64_BSP_REGNUM
);
2237 cfm
= read_register (IA64_CFM_REGNUM
);
2238 old_sof
= (cfm
& 0x7f);
2239 new_sof
= (*val
& 0x7f);
2240 if (old_sof
!= new_sof
)
2242 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2243 write_register (IA64_BSP_REGNUM
, bsp
);
2245 write_register (IA64_CFM_REGNUM
, *val
);
2249 write_register (regnum
, *val
);
2252 if (gdbarch_debug
>= 1)
2253 fprintf_unfiltered (gdb_stdlog
,
2254 " access_reg: to cache: %4s=0x%s\n",
2255 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2256 ? ia64_register_names
[regnum
] : "r??"),
2264 /* Libunwind expects to see the pc value which means the slot number
2265 from the psr must be merged with the ip word address. */
2266 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2267 ip
= extract_unsigned_integer (buf
, 8);
2268 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2269 psr
= extract_unsigned_integer (buf
, 8);
2270 *val
= ip
| ((psr
>> 41) & 0x3);
2273 case UNW_IA64_AR_BSP
:
2274 /* Libunwind expects to see the beginning of the current register
2275 frame so we must account for the fact that ptrace() will return a value
2276 for bsp that points *after* the current register frame. */
2277 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2278 bsp
= extract_unsigned_integer (buf
, 8);
2279 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2280 cfm
= extract_unsigned_integer (buf
, 8);
2282 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2285 case UNW_IA64_AR_BSPSTORE
:
2286 /* Libunwind wants bspstore to be after the current register frame.
2287 This is what ptrace() and gdb treats as the regular bsp value. */
2288 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2289 *val
= extract_unsigned_integer (buf
, 8);
2293 /* For all other registers, just unwind the value directly. */
2294 frame_unwind_register (next_frame
, regnum
, buf
);
2295 *val
= extract_unsigned_integer (buf
, 8);
2299 if (gdbarch_debug
>= 1)
2300 fprintf_unfiltered (gdb_stdlog
,
2301 " access_reg: from cache: %4s=0x%s\n",
2302 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2303 ? ia64_register_names
[regnum
] : "r??"),
2309 /* Libunwind callback accessor function for floating-point registers. */
2311 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2312 int write
, void *arg
)
2314 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2317 regcache_cooked_write (current_regcache
, regnum
, (char *) val
);
2319 regcache_cooked_read (current_regcache
, regnum
, (char *) val
);
2323 /* Libunwind callback accessor function for top-level rse registers. */
2325 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2326 int write
, void *arg
)
2328 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2329 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2330 long new_sof
, old_sof
;
2335 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2341 ia64_write_pc (*val
, inferior_ptid
);
2344 case UNW_IA64_AR_BSPSTORE
:
2345 write_register (IA64_BSP_REGNUM
, *val
);
2348 case UNW_IA64_AR_BSP
:
2350 /* Account for the fact that ptrace() expects bsp to point
2351 after the current register frame. */
2352 cfm
= read_register (IA64_CFM_REGNUM
);
2354 bsp
= ia64_rse_skip_regs (*val
, sof
);
2355 write_register (IA64_BSP_REGNUM
, bsp
);
2359 /* If we change CFM, we need to adjust ptrace's notion of
2360 bsp accordingly, so that the real bsp remains
2362 bsp
= read_register (IA64_BSP_REGNUM
);
2363 cfm
= read_register (IA64_CFM_REGNUM
);
2364 old_sof
= (cfm
& 0x7f);
2365 new_sof
= (*val
& 0x7f);
2366 if (old_sof
!= new_sof
)
2368 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2369 write_register (IA64_BSP_REGNUM
, bsp
);
2371 write_register (IA64_CFM_REGNUM
, *val
);
2375 write_register (regnum
, *val
);
2378 if (gdbarch_debug
>= 1)
2379 fprintf_unfiltered (gdb_stdlog
,
2380 " access_rse_reg: to cache: %4s=0x%s\n",
2381 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2382 ? ia64_register_names
[regnum
] : "r??"),
2390 /* Libunwind expects to see the pc value which means the slot number
2391 from the psr must be merged with the ip word address. */
2392 ip
= read_register (IA64_IP_REGNUM
);
2393 psr
= read_register (IA64_PSR_REGNUM
);
2394 *val
= ip
| ((psr
>> 41) & 0x3);
2397 case UNW_IA64_AR_BSP
:
2398 /* Libunwind expects to see the beginning of the current register
2399 frame so we must account for the fact that ptrace() will return a value
2400 for bsp that points *after* the current register frame. */
2401 bsp
= read_register (IA64_BSP_REGNUM
);
2402 cfm
= read_register (IA64_CFM_REGNUM
);
2404 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2407 case UNW_IA64_AR_BSPSTORE
:
2408 /* Libunwind wants bspstore to be after the current register frame.
2409 This is what ptrace() and gdb treats as the regular bsp value. */
2410 *val
= read_register (IA64_BSP_REGNUM
);
2414 /* For all other registers, just read the value directly. */
2415 *val
= read_register (regnum
);
2420 if (gdbarch_debug
>= 1)
2421 fprintf_unfiltered (gdb_stdlog
,
2422 " access_rse_reg: from cache: %4s=0x%s\n",
2423 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2424 ? ia64_register_names
[regnum
] : "r??"),
2430 /* Libunwind callback accessor function for accessing memory. */
2432 ia64_access_mem (unw_addr_space_t as
,
2433 unw_word_t addr
, unw_word_t
*val
,
2434 int write
, void *arg
)
2436 if (addr
- KERNEL_START
< ktab_size
)
2438 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2439 + (addr
- KERNEL_START
));
2448 /* XXX do we need to normalize byte-order here? */
2450 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2452 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2455 /* Call low-level function to access the kernel unwind table. */
2457 getunwind_table (void *buf
, size_t len
)
2461 /* FIXME: This is a temporary solution to backtracing syscalls in corefiles.
2462 To do this properly, the AUXV section should be used. This
2463 fix will work as long as the kernel used to generate the corefile
2464 is equivalent to the kernel used to debug the corefile. */
2465 x
= ia64_linux_xfer_unwind_table (¤t_target
,
2466 TARGET_OBJECT_UNWIND_TABLE
, NULL
,
2472 /* Get the kernel unwind table. */
2474 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2476 static struct ia64_table_entry
*etab
;
2481 size
= getunwind_table (NULL
, 0);
2483 return -UNW_ENOINFO
;
2485 ktab
= xmalloc (ktab_size
);
2486 getunwind_table (ktab
, ktab_size
);
2488 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2489 etab
->info_offset
+= KERNEL_START
;
2492 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2493 return -UNW_ENOINFO
;
2495 di
->format
= UNW_INFO_FORMAT_TABLE
;
2497 di
->start_ip
= ktab
[0].start_offset
;
2498 di
->end_ip
= etab
[-1].end_offset
;
2499 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2500 di
->u
.ti
.segbase
= 0;
2501 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2502 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2504 if (gdbarch_debug
>= 1)
2505 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2506 "segbase=0x%s, length=%s, gp=0x%s\n",
2507 (char *) di
->u
.ti
.name_ptr
,
2508 paddr_nz (di
->u
.ti
.segbase
),
2509 paddr_u (di
->u
.ti
.table_len
),
2514 /* Find the unwind table entry for a specified address. */
2516 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2517 unw_dyn_info_t
*dip
, void **buf
)
2519 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2520 Elf_Internal_Ehdr
*ehdr
;
2521 unw_word_t segbase
= 0;
2522 CORE_ADDR load_base
;
2526 bfd
= objfile
->obfd
;
2528 ehdr
= elf_tdata (bfd
)->elf_header
;
2529 phdr
= elf_tdata (bfd
)->phdr
;
2531 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2533 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2535 switch (phdr
[i
].p_type
)
2538 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2543 case PT_IA_64_UNWIND
:
2544 p_unwind
= phdr
+ i
;
2552 if (!p_text
|| !p_unwind
)
2553 return -UNW_ENOINFO
;
2555 /* Verify that the segment that contains the IP also contains
2556 the static unwind table. If not, we may be in the Linux kernel's
2557 DSO gate page in which case the unwind table is another segment.
2558 Otherwise, we are dealing with runtime-generated code, for which we
2559 have no info here. */
2560 segbase
= p_text
->p_vaddr
+ load_base
;
2562 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2565 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2567 if (phdr
[i
].p_type
== PT_LOAD
2568 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2571 /* Get the segbase from the section containing the
2573 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2577 return -UNW_ENOINFO
;
2580 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2581 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2582 dip
->gp
= ia64_find_global_pointer (ip
);
2583 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2584 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2585 dip
->u
.rti
.segbase
= segbase
;
2586 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2587 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2592 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2594 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2595 int need_unwind_info
, void *arg
)
2597 struct obj_section
*sec
= find_pc_section (ip
);
2604 /* XXX This only works if the host and the target architecture are
2605 both ia64 and if the have (more or less) the same kernel
2607 if (get_kernel_table (ip
, &di
) < 0)
2608 return -UNW_ENOINFO
;
2610 if (gdbarch_debug
>= 1)
2611 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2612 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2613 "length=%s,data=0x%s)\n",
2614 paddr_nz (ip
), (char *)di
.u
.ti
.name_ptr
,
2615 paddr_nz (di
.u
.ti
.segbase
),
2616 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2618 paddr_u (di
.u
.ti
.table_len
),
2619 paddr_nz ((CORE_ADDR
)di
.u
.ti
.table_data
));
2623 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2627 if (gdbarch_debug
>= 1)
2628 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2629 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2630 "length=%s,data=0x%s)\n",
2631 paddr_nz (ip
), (char *)di
.u
.rti
.name_ptr
,
2632 paddr_nz (di
.u
.rti
.segbase
),
2633 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2635 paddr_u (di
.u
.rti
.table_len
),
2636 paddr_nz (di
.u
.rti
.table_data
));
2639 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2642 /* We no longer need the dyn info storage so free it. */
2648 /* Libunwind callback accessor function for cleanup. */
2650 ia64_put_unwind_info (unw_addr_space_t as
,
2651 unw_proc_info_t
*pip
, void *arg
)
2653 /* Nothing required for now. */
2656 /* Libunwind callback accessor function to get head of the dynamic
2657 unwind-info registration list. */
2659 ia64_get_dyn_info_list (unw_addr_space_t as
,
2660 unw_word_t
*dilap
, void *arg
)
2662 struct obj_section
*text_sec
;
2663 struct objfile
*objfile
;
2664 unw_word_t ip
, addr
;
2668 if (!libunwind_is_initialized ())
2669 return -UNW_ENOINFO
;
2671 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2675 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2676 ip
= text_sec
->addr
;
2677 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2680 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2681 /* We no longer need the dyn info storage so free it. */
2686 if (gdbarch_debug
>= 1)
2687 fprintf_unfiltered (gdb_stdlog
,
2688 "dynamic unwind table in objfile %s "
2689 "at 0x%s (gp=0x%s)\n",
2690 bfd_get_filename (objfile
->obfd
),
2691 paddr_nz (addr
), paddr_nz (di
.gp
));
2697 return -UNW_ENOINFO
;
2701 /* Frame interface functions for libunwind. */
2704 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2705 struct frame_id
*this_id
)
2710 CORE_ADDR prev_ip
, addr
;
2711 int realnum
, optimized
;
2712 enum lval_type lval
;
2715 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2716 if (frame_id_eq (id
, null_frame_id
))
2718 (*this_id
) = null_frame_id
;
2722 /* We must add the bsp as the special address for frame comparison
2724 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2725 bsp
= extract_unsigned_integer (buf
, 8);
2727 /* If the previous frame pc value is 0, then we are at the end of the stack
2728 and don't want to unwind past this frame. We return a null frame_id to
2730 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2731 &optimized
, &lval
, &addr
, &realnum
, &prev_ip
);
2734 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2736 (*this_id
) = null_frame_id
;
2738 if (gdbarch_debug
>= 1)
2739 fprintf_unfiltered (gdb_stdlog
,
2740 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2741 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2742 paddr_nz (bsp
), next_frame
);
2746 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2748 int regnum
, int *optimizedp
,
2749 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2750 int *realnump
, void *valuep
)
2754 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2755 reg
= IA64_PR_REGNUM
;
2756 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2757 reg
= IA64_UNAT_REGNUM
;
2759 /* Let libunwind do most of the work. */
2760 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2761 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2763 /* No more to do if the value is not supposed to be supplied. */
2767 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2771 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2775 unsigned char buf
[MAX_REGISTER_SIZE
];
2777 /* Fetch predicate register rename base from current frame
2778 marker for this frame. */
2779 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2780 cfm
= extract_unsigned_integer (buf
, 8);
2781 rrb_pr
= (cfm
>> 32) & 0x3f;
2783 /* Adjust the register number to account for register rotation. */
2784 regnum
= VP16_REGNUM
2785 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2787 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2788 regnum
- VP0_REGNUM
, 1);
2789 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
2791 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2795 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2796 regnum
- IA64_NAT0_REGNUM
, 1);
2797 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2800 else if (regnum
== IA64_BSP_REGNUM
)
2802 char cfm_valuep
[MAX_REGISTER_SIZE
];
2805 enum lval_type cfm_lval
;
2807 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2809 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2810 This corresponds to what the hardware bsp register will be if we pop the frame
2811 back which is why we might have been called. We know that libunwind will pass us back
2812 the beginning of the current frame so we should just add sof to it. */
2813 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2814 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2815 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2816 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2817 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2819 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2823 if (gdbarch_debug
>= 1)
2824 fprintf_unfiltered (gdb_stdlog
,
2825 "libunwind prev register <%s> is 0x%s\n",
2826 (regnum
< IA64_GR32_REGNUM
2827 || (regnum
> IA64_GR127_REGNUM
2828 && regnum
< LAST_PSEUDO_REGNUM
))
2829 ? ia64_register_names
[regnum
]
2830 : (regnum
< LAST_PSEUDO_REGNUM
2831 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2833 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2836 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2839 ia64_libunwind_frame_this_id
,
2840 ia64_libunwind_frame_prev_register
2843 static const struct frame_unwind
*
2844 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2846 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2847 return &ia64_libunwind_frame_unwind
;
2853 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2854 struct frame_id
*this_id
)
2861 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2862 if (frame_id_eq (id
, null_frame_id
))
2864 (*this_id
) = null_frame_id
;
2868 /* We must add the bsp as the special address for frame comparison
2870 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2871 bsp
= extract_unsigned_integer (buf
, 8);
2873 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2874 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2876 if (gdbarch_debug
>= 1)
2877 fprintf_unfiltered (gdb_stdlog
,
2878 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2879 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2880 paddr_nz (bsp
), next_frame
);
2884 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
2886 int regnum
, int *optimizedp
,
2887 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2888 int *realnump
, void *valuep
)
2891 CORE_ADDR prev_ip
, addr
;
2892 int realnum
, optimized
;
2893 enum lval_type lval
;
2896 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2897 method of getting previous registers. */
2898 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2899 &optimized
, &lval
, &addr
, &realnum
, &prev_ip
);
2903 void *tmp_cache
= NULL
;
2904 ia64_sigtramp_frame_prev_register (next_frame
, &tmp_cache
, regnum
, optimizedp
, lvalp
,
2905 addrp
, realnump
, valuep
);
2908 ia64_libunwind_frame_prev_register (next_frame
, this_cache
, regnum
, optimizedp
, lvalp
,
2909 addrp
, realnump
, valuep
);
2912 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
2915 ia64_libunwind_sigtramp_frame_this_id
,
2916 ia64_libunwind_sigtramp_frame_prev_register
2919 static const struct frame_unwind
*
2920 ia64_libunwind_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2922 if (libunwind_is_initialized ())
2924 if (libunwind_sigtramp_frame_sniffer (next_frame
))
2925 return &ia64_libunwind_sigtramp_frame_unwind
;
2929 return ia64_sigtramp_frame_sniffer (next_frame
);
2932 /* Set of libunwind callback acccessor functions. */
2933 static unw_accessors_t ia64_unw_accessors
=
2935 ia64_find_proc_info_x
,
2936 ia64_put_unwind_info
,
2937 ia64_get_dyn_info_list
,
2945 /* Set of special libunwind callback acccessor functions specific for accessing
2946 the rse registers. At the top of the stack, we want libunwind to figure out
2947 how to read r32 - r127. Though usually they are found sequentially in memory
2948 starting from $bof, this is not always true. */
2949 static unw_accessors_t ia64_unw_rse_accessors
=
2951 ia64_find_proc_info_x
,
2952 ia64_put_unwind_info
,
2953 ia64_get_dyn_info_list
,
2955 ia64_access_rse_reg
,
2961 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2962 static struct libunwind_descr ia64_libunwind_descr
=
2967 &ia64_unw_accessors
,
2968 &ia64_unw_rse_accessors
,
2971 #endif /* HAVE_LIBUNWIND_IA64_H */
2973 /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of
2974 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc and TYPE
2975 is the type (which is known to be struct, union or array). */
2977 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
2979 struct type
*float_elt_type
;
2981 /* HFAs are structures (or arrays) consisting entirely of floating
2982 point values of the same length. Up to 8 of these are returned
2983 in registers. Don't use the struct convention when this is the
2985 float_elt_type
= is_float_or_hfa_type (type
);
2986 if (float_elt_type
!= NULL
2987 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
2990 /* Other structs of length 32 or less are returned in r8-r11.
2991 Don't use the struct convention for those either. */
2992 return TYPE_LENGTH (type
) > 32;
2996 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
2999 struct type
*float_elt_type
;
3001 float_elt_type
= is_float_or_hfa_type (type
);
3002 if (float_elt_type
!= NULL
)
3004 char from
[MAX_REGISTER_SIZE
];
3006 int regnum
= IA64_FR8_REGNUM
;
3007 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3011 regcache_cooked_read (regcache
, regnum
, from
);
3012 convert_typed_floating (from
, builtin_type_ia64_ext
,
3013 (char *)valbuf
+ offset
, float_elt_type
);
3014 offset
+= TYPE_LENGTH (float_elt_type
);
3022 int regnum
= IA64_GR8_REGNUM
;
3023 int reglen
= TYPE_LENGTH (ia64_register_type (NULL
, IA64_GR8_REGNUM
));
3024 int n
= TYPE_LENGTH (type
) / reglen
;
3025 int m
= TYPE_LENGTH (type
) % reglen
;
3030 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3031 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3038 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3039 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3045 ia64_extract_struct_value_address (struct regcache
*regcache
)
3047 error (_("ia64_extract_struct_value_address called and cannot get struct value address"));
3053 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3055 switch (TYPE_CODE (t
))
3059 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3066 case TYPE_CODE_ARRAY
:
3068 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3071 case TYPE_CODE_STRUCT
:
3075 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3076 if (!is_float_or_hfa_type_recurse
3077 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3088 /* Determine if the given type is one of the floating point types or
3089 and HFA (which is a struct, array, or combination thereof whose
3090 bottom-most elements are all of the same floating point type). */
3092 static struct type
*
3093 is_float_or_hfa_type (struct type
*t
)
3095 struct type
*et
= 0;
3097 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3101 /* Return 1 if the alignment of T is such that the next even slot
3102 should be used. Return 0, if the next available slot should
3103 be used. (See section 8.5.1 of the IA-64 Software Conventions
3104 and Runtime manual). */
3107 slot_alignment_is_next_even (struct type
*t
)
3109 switch (TYPE_CODE (t
))
3113 if (TYPE_LENGTH (t
) > 8)
3117 case TYPE_CODE_ARRAY
:
3119 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3120 case TYPE_CODE_STRUCT
:
3124 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3125 if (slot_alignment_is_next_even
3126 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3135 /* Attempt to find (and return) the global pointer for the given
3138 This is a rather nasty bit of code searchs for the .dynamic section
3139 in the objfile corresponding to the pc of the function we're trying
3140 to call. Once it finds the addresses at which the .dynamic section
3141 lives in the child process, it scans the Elf64_Dyn entries for a
3142 DT_PLTGOT tag. If it finds one of these, the corresponding
3143 d_un.d_ptr value is the global pointer. */
3146 ia64_find_global_pointer (CORE_ADDR faddr
)
3148 struct obj_section
*faddr_sect
;
3150 faddr_sect
= find_pc_section (faddr
);
3151 if (faddr_sect
!= NULL
)
3153 struct obj_section
*osect
;
3155 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3157 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3161 if (osect
< faddr_sect
->objfile
->sections_end
)
3166 while (addr
< osect
->endaddr
)
3172 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3175 tag
= extract_signed_integer (buf
, sizeof (buf
));
3177 if (tag
== DT_PLTGOT
)
3179 CORE_ADDR global_pointer
;
3181 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3184 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
3187 return global_pointer
;
3200 /* Given a function's address, attempt to find (and return) the
3201 corresponding (canonical) function descriptor. Return 0 if
3204 find_extant_func_descr (CORE_ADDR faddr
)
3206 struct obj_section
*faddr_sect
;
3208 /* Return early if faddr is already a function descriptor. */
3209 faddr_sect
= find_pc_section (faddr
);
3210 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3213 if (faddr_sect
!= NULL
)
3215 struct obj_section
*osect
;
3216 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3218 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3222 if (osect
< faddr_sect
->objfile
->sections_end
)
3227 while (addr
< osect
->endaddr
)
3233 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3236 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
3238 if (faddr
== faddr2
)
3248 /* Attempt to find a function descriptor corresponding to the
3249 given address. If none is found, construct one on the
3250 stack using the address at fdaptr. */
3253 find_func_descr (CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3257 fdesc
= find_extant_func_descr (faddr
);
3261 CORE_ADDR global_pointer
;
3267 global_pointer
= ia64_find_global_pointer (faddr
);
3269 if (global_pointer
== 0)
3270 global_pointer
= read_register (IA64_GR1_REGNUM
);
3272 store_unsigned_integer (buf
, 8, faddr
);
3273 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
3275 write_memory (fdesc
, buf
, 16);
3281 /* Use the following routine when printing out function pointers
3282 so the user can see the function address rather than just the
3283 function descriptor. */
3285 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3286 struct target_ops
*targ
)
3288 struct obj_section
*s
;
3290 s
= find_pc_section (addr
);
3292 /* check if ADDR points to a function descriptor. */
3293 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3294 return read_memory_unsigned_integer (addr
, 8);
3300 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3306 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3307 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3308 int nargs
, struct value
**args
, CORE_ADDR sp
,
3309 int struct_return
, CORE_ADDR struct_addr
)
3315 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3317 CORE_ADDR bsp
, cfm
, pfs
, new_bsp
, funcdescaddr
, pc
, global_pointer
;
3318 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3322 /* Count the number of slots needed for the arguments. */
3323 for (argno
= 0; argno
< nargs
; argno
++)
3326 type
= check_typedef (value_type (arg
));
3327 len
= TYPE_LENGTH (type
);
3329 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3332 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3335 nslots
+= (len
+ 7) / 8;
3338 /* Divvy up the slots between the RSE and the memory stack. */
3339 rseslots
= (nslots
> 8) ? 8 : nslots
;
3340 memslots
= nslots
- rseslots
;
3342 /* Allocate a new RSE frame. */
3343 cfm
= read_register (IA64_CFM_REGNUM
);
3345 bsp
= read_register (IA64_BSP_REGNUM
);
3346 new_bsp
= rse_address_add (bsp
, rseslots
);
3347 write_register (IA64_BSP_REGNUM
, new_bsp
);
3349 pfs
= read_register (IA64_PFS_REGNUM
);
3350 pfs
&= 0xc000000000000000LL
;
3351 pfs
|= (cfm
& 0xffffffffffffLL
);
3352 write_register (IA64_PFS_REGNUM
, pfs
);
3354 cfm
&= 0xc000000000000000LL
;
3356 write_register (IA64_CFM_REGNUM
, cfm
);
3358 /* We will attempt to find function descriptors in the .opd segment,
3359 but if we can't we'll construct them ourselves. That being the
3360 case, we'll need to reserve space on the stack for them. */
3361 funcdescaddr
= sp
- nfuncargs
* 16;
3362 funcdescaddr
&= ~0xfLL
;
3364 /* Adjust the stack pointer to it's new value. The calling conventions
3365 require us to have 16 bytes of scratch, plus whatever space is
3366 necessary for the memory slots and our function descriptors. */
3367 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3368 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3370 /* Place the arguments where they belong. The arguments will be
3371 either placed in the RSE backing store or on the memory stack.
3372 In addition, floating point arguments or HFAs are placed in
3373 floating point registers. */
3375 floatreg
= IA64_FR8_REGNUM
;
3376 for (argno
= 0; argno
< nargs
; argno
++)
3378 struct type
*float_elt_type
;
3381 type
= check_typedef (value_type (arg
));
3382 len
= TYPE_LENGTH (type
);
3384 /* Special handling for function parameters. */
3386 && TYPE_CODE (type
) == TYPE_CODE_PTR
3387 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3391 store_unsigned_integer (val_buf
, 8,
3392 find_func_descr (extract_unsigned_integer (value_contents (arg
), 8),
3394 if (slotnum
< rseslots
)
3395 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3397 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3404 /* Skip odd slot if necessary... */
3405 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3413 memset (val_buf
, 0, 8);
3414 memcpy (val_buf
, value_contents (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3416 if (slotnum
< rseslots
)
3417 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3419 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3426 /* Handle floating point types (including HFAs). */
3427 float_elt_type
= is_float_or_hfa_type (type
);
3428 if (float_elt_type
!= NULL
)
3431 len
= TYPE_LENGTH (type
);
3432 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3434 char to
[MAX_REGISTER_SIZE
];
3435 convert_typed_floating (value_contents (arg
) + argoffset
, float_elt_type
,
3436 to
, builtin_type_ia64_ext
);
3437 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3439 argoffset
+= TYPE_LENGTH (float_elt_type
);
3440 len
-= TYPE_LENGTH (float_elt_type
);
3445 /* Store the struct return value in r8 if necessary. */
3448 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3451 global_pointer
= ia64_find_global_pointer (func_addr
);
3453 if (global_pointer
!= 0)
3454 write_register (IA64_GR1_REGNUM
, global_pointer
);
3456 write_register (IA64_BR0_REGNUM
, bp_addr
);
3458 write_register (sp_regnum
, sp
);
3463 static struct frame_id
3464 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3469 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3470 sp
= extract_unsigned_integer (buf
, 8);
3472 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3473 bsp
= extract_unsigned_integer (buf
, 8);
3475 if (gdbarch_debug
>= 1)
3476 fprintf_unfiltered (gdb_stdlog
,
3477 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3478 paddr_nz (frame_pc_unwind (next_frame
)),
3479 paddr_nz (sp
), paddr_nz (bsp
));
3481 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3485 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3488 CORE_ADDR ip
, psr
, pc
;
3490 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3491 ip
= extract_unsigned_integer (buf
, 8);
3492 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3493 psr
= extract_unsigned_integer (buf
, 8);
3495 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3500 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
, const void *valbuf
)
3502 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
3504 char to
[MAX_REGISTER_SIZE
];
3505 convert_typed_floating (valbuf
, type
, to
, builtin_type_ia64_ext
);
3506 regcache_cooked_write (regcache
, IA64_FR8_REGNUM
, (void *)to
);
3507 target_store_registers (IA64_FR8_REGNUM
);
3510 regcache_cooked_write (regcache
, IA64_GR8_REGNUM
, valbuf
);
3514 ia64_remote_translate_xfer_address (struct gdbarch
*gdbarch
,
3515 struct regcache
*regcache
,
3516 CORE_ADDR memaddr
, int nr_bytes
,
3517 CORE_ADDR
*targ_addr
, int *targ_len
)
3519 *targ_addr
= memaddr
;
3520 *targ_len
= nr_bytes
;
3524 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3526 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3527 return print_insn_ia64 (memaddr
, info
);
3530 static struct gdbarch
*
3531 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3533 struct gdbarch
*gdbarch
;
3534 struct gdbarch_tdep
*tdep
;
3536 /* If there is already a candidate, use it. */
3537 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3539 return arches
->gdbarch
;
3541 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3542 gdbarch
= gdbarch_alloc (&info
, tdep
);
3544 tdep
->sigcontext_register_address
= 0;
3546 /* Define the ia64 floating-point format to gdb. */
3547 builtin_type_ia64_ext
=
3548 init_type (TYPE_CODE_FLT
, 128 / 8,
3549 0, "builtin_type_ia64_ext", NULL
);
3550 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = &floatformat_ia64_ext
;
3552 /* According to the ia64 specs, instructions that store long double
3553 floats in memory use a long-double format different than that
3554 used in the floating registers. The memory format matches the
3555 x86 extended float format which is 80 bits. An OS may choose to
3556 use this format (e.g. GNU/Linux) or choose to use a different
3557 format for storing long doubles (e.g. HPUX). In the latter case,
3558 the setting of the format may be moved/overridden in an
3559 OS-specific tdep file. */
3560 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
3562 set_gdbarch_short_bit (gdbarch
, 16);
3563 set_gdbarch_int_bit (gdbarch
, 32);
3564 set_gdbarch_long_bit (gdbarch
, 64);
3565 set_gdbarch_long_long_bit (gdbarch
, 64);
3566 set_gdbarch_float_bit (gdbarch
, 32);
3567 set_gdbarch_double_bit (gdbarch
, 64);
3568 set_gdbarch_long_double_bit (gdbarch
, 128);
3569 set_gdbarch_ptr_bit (gdbarch
, 64);
3571 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3572 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3573 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3574 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3576 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3577 /* FIXME: Following interface should not be needed, however, without it recurse.exp
3578 gets a number of extra failures. */
3579 set_gdbarch_deprecated_register_size (gdbarch
, 8);
3580 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3582 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3583 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3584 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3585 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3586 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3587 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3588 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3590 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3592 set_gdbarch_deprecated_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
3593 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
3595 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
3596 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, ia64_extract_struct_value_address
);
3598 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3599 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3600 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3601 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3602 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3604 /* Settings for calling functions in the inferior. */
3605 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3606 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3607 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3609 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3610 #ifdef HAVE_LIBUNWIND_IA64_H
3611 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_sigtramp_frame_sniffer
);
3612 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3613 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3615 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3617 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3618 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3620 /* Settings that should be unnecessary. */
3621 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3623 set_gdbarch_remote_translate_xfer_address (
3624 gdbarch
, ia64_remote_translate_xfer_address
);
3626 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3627 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3629 /* Hook in ABI-specific overrides, if they have been registered. */
3630 gdbarch_init_osabi (info
, gdbarch
);
3635 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3638 _initialize_ia64_tdep (void)
3640 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);