1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 #include "symfile.h" /* for entry_point_address */
26 #include "arch-utils.h"
27 #include "floatformat.h"
29 #include "reggroups.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
35 #include "gdb_assert.h"
37 #include "elf/common.h" /* for DT_PLTGOT value */
39 #include "elf.h" /* for PT_IA64_UNWIND value */
42 #ifdef HAVE_LIBUNWIND_IA64_H
43 #include "libunwind-frame.h"
44 #include "libunwind-ia64.h"
47 /* Hook for determining the global pointer when calling functions in
48 the inferior under AIX. The initialization code in ia64-aix-nat.c
49 sets this hook to the address of a function which will find the
50 global pointer for a given address.
52 The generic code which uses the dynamic section in the inferior for
53 finding the global pointer is not of much use on AIX since the
54 values obtained from the inferior have not been relocated. */
56 CORE_ADDR (*native_find_global_pointer
) (CORE_ADDR
) = 0;
58 /* An enumeration of the different IA-64 instruction types. */
60 typedef enum instruction_type
62 A
, /* Integer ALU ; I-unit or M-unit */
63 I
, /* Non-ALU integer; I-unit */
64 M
, /* Memory ; M-unit */
65 F
, /* Floating-point ; F-unit */
66 B
, /* Branch ; B-unit */
67 L
, /* Extended (L+X) ; I-unit */
68 X
, /* Extended (L+X) ; I-unit */
69 undefined
/* undefined or reserved */
72 /* We represent IA-64 PC addresses as the value of the instruction
73 pointer or'd with some bit combination in the low nibble which
74 represents the slot number in the bundle addressed by the
75 instruction pointer. The problem is that the Linux kernel
76 multiplies its slot numbers (for exceptions) by one while the
77 disassembler multiplies its slot numbers by 6. In addition, I've
78 heard it said that the simulator uses 1 as the multiplier.
80 I've fixed the disassembler so that the bytes_per_line field will
81 be the slot multiplier. If bytes_per_line comes in as zero, it
82 is set to six (which is how it was set up initially). -- objdump
83 displays pretty disassembly dumps with this value. For our purposes,
84 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
85 never want to also display the raw bytes the way objdump does. */
87 #define SLOT_MULTIPLIER 1
89 /* Length in bytes of an instruction bundle */
93 /* FIXME: These extern declarations should go in ia64-tdep.h. */
94 extern CORE_ADDR
ia64_linux_sigcontext_register_address (CORE_ADDR
, int);
95 extern CORE_ADDR
ia64_aix_sigcontext_register_address (CORE_ADDR
, int);
96 extern unsigned long ia64_linux_getunwind_table (void *, size_t);
98 static gdbarch_init_ftype ia64_gdbarch_init
;
100 static gdbarch_register_name_ftype ia64_register_name
;
101 static gdbarch_register_type_ftype ia64_register_type
;
102 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
103 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
104 static gdbarch_extract_return_value_ftype ia64_extract_return_value
;
105 static gdbarch_extract_struct_value_address_ftype ia64_extract_struct_value_address
;
106 static gdbarch_use_struct_convention_ftype ia64_use_struct_convention
;
107 static struct type
*is_float_or_hfa_type (struct type
*t
);
109 static struct type
*builtin_type_ia64_ext
;
111 #define NUM_IA64_RAW_REGS 462
113 static int sp_regnum
= IA64_GR12_REGNUM
;
114 static int fp_regnum
= IA64_VFP_REGNUM
;
115 static int lr_regnum
= IA64_VRAP_REGNUM
;
117 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
118 they may not be accessible via the ptrace register get/set interfaces. */
119 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
120 V127_REGNUM
= V32_REGNUM
+ 95,
121 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
123 /* Array of register names; There should be ia64_num_regs strings in
126 static char *ia64_register_names
[] =
127 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
128 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
129 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
130 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
131 "", "", "", "", "", "", "", "",
132 "", "", "", "", "", "", "", "",
133 "", "", "", "", "", "", "", "",
134 "", "", "", "", "", "", "", "",
135 "", "", "", "", "", "", "", "",
136 "", "", "", "", "", "", "", "",
137 "", "", "", "", "", "", "", "",
138 "", "", "", "", "", "", "", "",
139 "", "", "", "", "", "", "", "",
140 "", "", "", "", "", "", "", "",
141 "", "", "", "", "", "", "", "",
142 "", "", "", "", "", "", "", "",
144 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
145 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
146 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
147 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
148 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
149 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
150 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
151 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
152 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
153 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
154 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
155 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
156 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
157 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
158 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
159 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
161 "", "", "", "", "", "", "", "",
162 "", "", "", "", "", "", "", "",
163 "", "", "", "", "", "", "", "",
164 "", "", "", "", "", "", "", "",
165 "", "", "", "", "", "", "", "",
166 "", "", "", "", "", "", "", "",
167 "", "", "", "", "", "", "", "",
168 "", "", "", "", "", "", "", "",
170 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
174 "pr", "ip", "psr", "cfm",
176 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
177 "", "", "", "", "", "", "", "",
178 "rsc", "bsp", "bspstore", "rnat",
180 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
181 "ccv", "", "", "", "unat", "", "", "",
182 "fpsr", "", "", "", "itc",
183 "", "", "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "", "", "",
189 "", "", "", "", "", "", "", "", "", "",
190 "", "", "", "", "", "", "", "", "", "",
191 "", "", "", "", "", "", "", "", "", "",
193 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
194 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
195 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
196 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
197 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
198 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
199 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
200 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
201 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
202 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
203 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
204 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
205 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
206 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
207 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
208 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
212 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
213 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
214 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
215 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
216 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
217 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
218 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
219 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
220 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
221 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
222 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
223 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
225 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
226 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
227 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
228 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
229 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
230 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
231 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
232 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
235 struct ia64_frame_cache
237 CORE_ADDR base
; /* frame pointer base for frame */
238 CORE_ADDR pc
; /* function start pc for frame */
239 CORE_ADDR saved_sp
; /* stack pointer for frame */
240 CORE_ADDR bsp
; /* points at r32 for the current frame */
241 CORE_ADDR cfm
; /* cfm value for current frame */
242 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
244 int sof
; /* Size of frame (decoded from cfm value) */
245 int sol
; /* Size of locals (decoded from cfm value) */
246 int sor
; /* Number of rotating registers. (decoded from cfm value) */
247 CORE_ADDR after_prologue
;
248 /* Address of first instruction after the last
249 prologue instruction; Note that there may
250 be instructions from the function's body
251 intermingled with the prologue. */
252 int mem_stack_frame_size
;
253 /* Size of the memory stack frame (may be zero),
254 or -1 if it has not been determined yet. */
255 int fp_reg
; /* Register number (if any) used a frame pointer
256 for this frame. 0 if no register is being used
257 as the frame pointer. */
259 /* Saved registers. */
260 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
266 CORE_ADDR (*sigcontext_register_address
) (CORE_ADDR
, int);
267 /* OS specific function which, given a frame address
268 and register number, returns the offset to the
269 given register from the start of the frame. */
270 CORE_ADDR (*find_global_pointer
) (CORE_ADDR
);
273 #define SIGCONTEXT_REGISTER_ADDRESS \
274 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
275 #define FIND_GLOBAL_POINTER \
276 (gdbarch_tdep (current_gdbarch)->find_global_pointer)
279 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
280 struct reggroup
*group
)
285 if (group
== all_reggroup
)
287 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
288 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
289 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
290 if (group
== float_reggroup
)
292 if (group
== vector_reggroup
)
294 if (group
== general_reggroup
)
295 return (!vector_p
&& !float_p
);
296 if (group
== save_reggroup
|| group
== restore_reggroup
)
302 ia64_register_name (int reg
)
304 return ia64_register_names
[reg
];
308 ia64_register_type (struct gdbarch
*arch
, int reg
)
310 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
311 return builtin_type_ia64_ext
;
313 return builtin_type_long
;
317 ia64_dwarf_reg_to_regnum (int reg
)
319 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
320 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
325 floatformat_valid (const struct floatformat
*fmt
, const char *from
)
330 const struct floatformat floatformat_ia64_ext
=
332 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
333 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
337 /* Read the given register from a sigcontext structure in the
341 read_sigcontext_register (struct frame_info
*frame
, int regnum
)
346 internal_error (__FILE__
, __LINE__
,
347 "read_sigcontext_register: NULL frame");
348 if (!(get_frame_type (frame
) == SIGTRAMP_FRAME
))
349 internal_error (__FILE__
, __LINE__
,
350 "read_sigcontext_register: frame not a signal trampoline");
351 if (SIGCONTEXT_REGISTER_ADDRESS
== 0)
352 internal_error (__FILE__
, __LINE__
,
353 "read_sigcontext_register: SIGCONTEXT_REGISTER_ADDRESS is 0");
355 regaddr
= SIGCONTEXT_REGISTER_ADDRESS (get_frame_base (frame
), regnum
);
357 return read_memory_integer (regaddr
, register_size (current_gdbarch
, regnum
));
359 internal_error (__FILE__
, __LINE__
,
360 "read_sigcontext_register: Register %d not in struct sigcontext", regnum
);
363 /* Extract ``len'' bits from an instruction bundle starting at
367 extract_bit_field (char *bundle
, int from
, int len
)
369 long long result
= 0LL;
371 int from_byte
= from
/ 8;
372 int to_byte
= to
/ 8;
373 unsigned char *b
= (unsigned char *) bundle
;
379 if (from_byte
== to_byte
)
380 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
381 result
= c
>> (from
% 8);
382 lshift
= 8 - (from
% 8);
384 for (i
= from_byte
+1; i
< to_byte
; i
++)
386 result
|= ((long long) b
[i
]) << lshift
;
390 if (from_byte
< to_byte
&& (to
% 8 != 0))
393 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
394 result
|= ((long long) c
) << lshift
;
400 /* Replace the specified bits in an instruction bundle */
403 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
406 int from_byte
= from
/ 8;
407 int to_byte
= to
/ 8;
408 unsigned char *b
= (unsigned char *) bundle
;
411 if (from_byte
== to_byte
)
413 unsigned char left
, right
;
415 left
= (c
>> (to
% 8)) << (to
% 8);
416 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
417 c
= (unsigned char) (val
& 0xff);
418 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
426 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
427 c
= c
| (val
<< (from
% 8));
429 val
>>= 8 - from
% 8;
431 for (i
= from_byte
+1; i
< to_byte
; i
++)
440 unsigned char cv
= (unsigned char) val
;
442 c
= c
>> (to
% 8) << (to
% 8);
443 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
449 /* Return the contents of slot N (for N = 0, 1, or 2) in
450 and instruction bundle */
453 slotN_contents (char *bundle
, int slotnum
)
455 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
458 /* Store an instruction in an instruction bundle */
461 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
463 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
466 static enum instruction_type template_encoding_table
[32][3] =
468 { M
, I
, I
}, /* 00 */
469 { M
, I
, I
}, /* 01 */
470 { M
, I
, I
}, /* 02 */
471 { M
, I
, I
}, /* 03 */
472 { M
, L
, X
}, /* 04 */
473 { M
, L
, X
}, /* 05 */
474 { undefined
, undefined
, undefined
}, /* 06 */
475 { undefined
, undefined
, undefined
}, /* 07 */
476 { M
, M
, I
}, /* 08 */
477 { M
, M
, I
}, /* 09 */
478 { M
, M
, I
}, /* 0A */
479 { M
, M
, I
}, /* 0B */
480 { M
, F
, I
}, /* 0C */
481 { M
, F
, I
}, /* 0D */
482 { M
, M
, F
}, /* 0E */
483 { M
, M
, F
}, /* 0F */
484 { M
, I
, B
}, /* 10 */
485 { M
, I
, B
}, /* 11 */
486 { M
, B
, B
}, /* 12 */
487 { M
, B
, B
}, /* 13 */
488 { undefined
, undefined
, undefined
}, /* 14 */
489 { undefined
, undefined
, undefined
}, /* 15 */
490 { B
, B
, B
}, /* 16 */
491 { B
, B
, B
}, /* 17 */
492 { M
, M
, B
}, /* 18 */
493 { M
, M
, B
}, /* 19 */
494 { undefined
, undefined
, undefined
}, /* 1A */
495 { undefined
, undefined
, undefined
}, /* 1B */
496 { M
, F
, B
}, /* 1C */
497 { M
, F
, B
}, /* 1D */
498 { undefined
, undefined
, undefined
}, /* 1E */
499 { undefined
, undefined
, undefined
}, /* 1F */
502 /* Fetch and (partially) decode an instruction at ADDR and return the
503 address of the next instruction to fetch. */
506 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
508 char bundle
[BUNDLE_LEN
];
509 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
513 /* Warn about slot numbers greater than 2. We used to generate
514 an error here on the assumption that the user entered an invalid
515 address. But, sometimes GDB itself requests an invalid address.
516 This can (easily) happen when execution stops in a function for
517 which there are no symbols. The prologue scanner will attempt to
518 find the beginning of the function - if the nearest symbol
519 happens to not be aligned on a bundle boundary (16 bytes), the
520 resulting starting address will cause GDB to think that the slot
523 So we warn about it and set the slot number to zero. It is
524 not necessarily a fatal condition, particularly if debugging
525 at the assembly language level. */
528 warning ("Can't fetch instructions for slot numbers greater than 2.\n"
529 "Using slot 0 instead");
535 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
540 *instr
= slotN_contents (bundle
, slotnum
);
541 template = extract_bit_field (bundle
, 0, 5);
542 *it
= template_encoding_table
[(int)template][slotnum
];
544 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
547 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
552 /* There are 5 different break instructions (break.i, break.b,
553 break.m, break.f, and break.x), but they all have the same
554 encoding. (The five bit template in the low five bits of the
555 instruction bundle distinguishes one from another.)
557 The runtime architecture manual specifies that break instructions
558 used for debugging purposes must have the upper two bits of the 21
559 bit immediate set to a 0 and a 1 respectively. A breakpoint
560 instruction encodes the most significant bit of its 21 bit
561 immediate at bit 36 of the 41 bit instruction. The penultimate msb
562 is at bit 25 which leads to the pattern below.
564 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
565 it turns out that 0x80000 was used as the syscall break in the early
566 simulators. So I changed the pattern slightly to do "break.i 0x080001"
567 instead. But that didn't work either (I later found out that this
568 pattern was used by the simulator that I was using.) So I ended up
569 using the pattern seen below. */
572 #define IA64_BREAKPOINT 0x00002000040LL
574 #define IA64_BREAKPOINT 0x00003333300LL
577 ia64_memory_insert_breakpoint (CORE_ADDR addr
, char *contents_cache
)
579 char bundle
[BUNDLE_LEN
];
580 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
586 error("Can't insert breakpoint for slot numbers greater than 2.");
590 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
592 /* Check for L type instruction in 2nd slot, if present then
593 bump up the slot number to the 3rd slot */
594 template = extract_bit_field (bundle
, 0, 5);
595 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
600 instr
= slotN_contents (bundle
, slotnum
);
601 memcpy(contents_cache
, &instr
, sizeof(instr
));
602 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
604 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
610 ia64_memory_remove_breakpoint (CORE_ADDR addr
, char *contents_cache
)
612 char bundle
[BUNDLE_LEN
];
613 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
620 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
622 /* Check for L type instruction in 2nd slot, if present then
623 bump up the slot number to the 3rd slot */
624 template = extract_bit_field (bundle
, 0, 5);
625 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
630 memcpy (&instr
, contents_cache
, sizeof instr
);
631 replace_slotN_contents (bundle
, instr
, slotnum
);
633 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
638 /* We don't really want to use this, but remote.c needs to call it in order
639 to figure out if Z-packets are supported or not. Oh, well. */
640 const unsigned char *
641 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
643 static unsigned char breakpoint
[] =
644 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
645 *lenptr
= sizeof (breakpoint
);
655 /* We won't necessarily have a frame pointer and even if we do, it
656 winds up being extraordinarly messy when attempting to find the
657 frame chain. So for the purposes of creating frames (which is
658 all deprecated_read_fp() is used for), simply use the stack
659 pointer value instead. */
660 gdb_assert (SP_REGNUM
>= 0);
661 return read_register (SP_REGNUM
);
665 ia64_read_pc (ptid_t ptid
)
667 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
668 CORE_ADDR pc_value
= read_register_pid (IA64_IP_REGNUM
, ptid
);
669 int slot_num
= (psr_value
>> 41) & 3;
671 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
675 ia64_write_pc (CORE_ADDR new_pc
, ptid_t ptid
)
677 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
678 CORE_ADDR psr_value
= read_register_pid (IA64_PSR_REGNUM
, ptid
);
679 psr_value
&= ~(3LL << 41);
680 psr_value
|= (CORE_ADDR
)(slot_num
& 0x3) << 41;
684 write_register_pid (IA64_PSR_REGNUM
, psr_value
, ptid
);
685 write_register_pid (IA64_IP_REGNUM
, new_pc
, ptid
);
688 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
690 /* Returns the address of the slot that's NSLOTS slots away from
691 the address ADDR. NSLOTS may be positive or negative. */
693 rse_address_add(CORE_ADDR addr
, int nslots
)
696 int mandatory_nat_slots
= nslots
/ 63;
697 int direction
= nslots
< 0 ? -1 : 1;
699 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
701 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
702 new_addr
+= 8 * direction
;
704 if (IS_NaT_COLLECTION_ADDR(new_addr
))
705 new_addr
+= 8 * direction
;
711 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
712 int regnum
, void *buf
)
714 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
719 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
720 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
722 /* The bsp points at the end of the register frame so we
723 subtract the size of frame from it to get start of register frame. */
724 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
726 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
728 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
729 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
730 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), reg
);
733 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), 0);
735 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
739 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
740 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
741 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), unatN_val
);
743 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
745 ULONGEST natN_val
= 0;
748 CORE_ADDR gr_addr
= 0;
749 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
750 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
752 /* The bsp points at the end of the register frame so we
753 subtract the size of frame from it to get start of register frame. */
754 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
756 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
757 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
761 /* Compute address of nat collection bits. */
762 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
763 CORE_ADDR nat_collection
;
765 /* If our nat collection address is bigger than bsp, we have to get
766 the nat collection from rnat. Otherwise, we fetch the nat
767 collection from the computed address. */
769 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
771 nat_collection
= read_memory_integer (nat_addr
, 8);
772 nat_bit
= (gr_addr
>> 3) & 0x3f;
773 natN_val
= (nat_collection
>> nat_bit
) & 1;
776 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), natN_val
);
778 else if (regnum
== VBOF_REGNUM
)
780 /* A virtual register frame start is provided for user convenience.
781 It can be calculated as the bsp - sof (sizeof frame). */
785 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
786 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
788 /* The bsp points at the end of the register frame so we
789 subtract the size of frame from it to get beginning of frame. */
790 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
791 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), vbsp
);
793 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
799 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
800 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
802 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
804 /* Fetch predicate register rename base from current frame
805 marker for this frame. */
806 int rrb_pr
= (cfm
>> 32) & 0x3f;
808 /* Adjust the register number to account for register rotation. */
810 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
812 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
813 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), prN_val
);
816 memset (buf
, 0, register_size (current_gdbarch
, regnum
));
820 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
821 int regnum
, const void *buf
)
823 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
828 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
829 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
831 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
833 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
835 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
836 write_memory (reg_addr
, (void *)buf
, 8);
839 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
841 ULONGEST unatN_val
, unat
, unatN_mask
;
842 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
843 unatN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
844 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
847 else if (unatN_val
== 1)
849 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
851 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
856 CORE_ADDR gr_addr
= 0;
857 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
858 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
860 /* The bsp points at the end of the register frame so we
861 subtract the size of frame from it to get start of register frame. */
862 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
864 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
865 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
867 natN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
869 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
871 /* Compute address of nat collection bits. */
872 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
873 CORE_ADDR nat_collection
;
874 int natN_bit
= (gr_addr
>> 3) & 0x3f;
875 ULONGEST natN_mask
= (1LL << natN_bit
);
876 /* If our nat collection address is bigger than bsp, we have to get
877 the nat collection from rnat. Otherwise, we fetch the nat
878 collection from the computed address. */
881 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
883 nat_collection
|= natN_mask
;
885 nat_collection
&= ~natN_mask
;
886 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
891 nat_collection
= read_memory_integer (nat_addr
, 8);
893 nat_collection
|= natN_mask
;
895 nat_collection
&= ~natN_mask
;
896 store_unsigned_integer (nat_buf
, register_size (current_gdbarch
, regnum
), nat_collection
);
897 write_memory (nat_addr
, nat_buf
, 8);
901 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
908 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
909 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
911 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
913 /* Fetch predicate register rename base from current frame
914 marker for this frame. */
915 int rrb_pr
= (cfm
>> 32) & 0x3f;
917 /* Adjust the register number to account for register rotation. */
919 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
921 prN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
922 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
925 else if (prN_val
== 1)
927 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
931 /* The ia64 needs to convert between various ieee floating-point formats
932 and the special ia64 floating point register format. */
935 ia64_convert_register_p (int regno
, struct type
*type
)
937 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
);
941 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
942 struct type
*valtype
, void *out
)
944 char in
[MAX_REGISTER_SIZE
];
945 frame_register_read (frame
, regnum
, in
);
946 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
950 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
951 struct type
*valtype
, const void *in
)
953 char out
[MAX_REGISTER_SIZE
];
954 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
955 put_frame_register (frame
, regnum
, out
);
959 /* Limit the number of skipped non-prologue instructions since examining
960 of the prologue is expensive. */
961 static int max_skip_non_prologue_insns
= 40;
963 /* Given PC representing the starting address of a function, and
964 LIM_PC which is the (sloppy) limit to which to scan when looking
965 for a prologue, attempt to further refine this limit by using
966 the line data in the symbol table. If successful, a better guess
967 on where the prologue ends is returned, otherwise the previous
968 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
969 which will be set to indicate whether the returned limit may be
970 used with no further scanning in the event that the function is
974 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
976 struct symtab_and_line prologue_sal
;
977 CORE_ADDR start_pc
= pc
;
979 /* Start off not trusting the limit. */
982 prologue_sal
= find_pc_line (pc
, 0);
983 if (prologue_sal
.line
!= 0)
986 CORE_ADDR addr
= prologue_sal
.end
;
988 /* Handle the case in which compiler's optimizer/scheduler
989 has moved instructions into the prologue. We scan ahead
990 in the function looking for address ranges whose corresponding
991 line number is less than or equal to the first one that we
992 found for the function. (It can be less than when the
993 scheduler puts a body instruction before the first prologue
995 for (i
= 2 * max_skip_non_prologue_insns
;
996 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
999 struct symtab_and_line sal
;
1001 sal
= find_pc_line (addr
, 0);
1004 if (sal
.line
<= prologue_sal
.line
1005 && sal
.symtab
== prologue_sal
.symtab
)
1012 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1014 lim_pc
= prologue_sal
.end
;
1015 if (start_pc
== get_pc_function_start (lim_pc
))
1022 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1023 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1024 || (14 <= (_regnum_) && (_regnum_) <= 31))
1025 #define imm9(_instr_) \
1026 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1027 | (((_instr_) & 0x00008000000LL) >> 20) \
1028 | (((_instr_) & 0x00000001fc0LL) >> 6))
1030 /* Allocate and initialize a frame cache. */
1032 static struct ia64_frame_cache
*
1033 ia64_alloc_frame_cache (void)
1035 struct ia64_frame_cache
*cache
;
1038 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1044 cache
->prev_cfm
= 0;
1050 cache
->frameless
= 1;
1052 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1053 cache
->saved_regs
[i
] = 0;
1059 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1062 CORE_ADDR last_prologue_pc
= pc
;
1063 instruction_type it
;
1068 int unat_save_reg
= 0;
1069 int pr_save_reg
= 0;
1070 int mem_stack_frame_size
= 0;
1072 CORE_ADDR spill_addr
= 0;
1075 char reg_contents
[256];
1081 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1083 memset (instores
, 0, sizeof instores
);
1084 memset (infpstores
, 0, sizeof infpstores
);
1085 memset (reg_contents
, 0, sizeof reg_contents
);
1087 if (cache
->after_prologue
!= 0
1088 && cache
->after_prologue
<= lim_pc
)
1089 return cache
->after_prologue
;
1091 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1092 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1094 /* We want to check if we have a recognizable function start before we
1095 look ahead for a prologue. */
1096 if (pc
< lim_pc
&& next_pc
1097 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1099 /* alloc - start of a regular function. */
1100 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1101 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1102 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1103 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1105 /* Verify that the current cfm matches what we think is the
1106 function start. If we have somehow jumped within a function,
1107 we do not want to interpret the prologue and calculate the
1108 addresses of various registers such as the return address.
1109 We will instead treat the frame as frameless. */
1111 (sof
== (cache
->cfm
& 0x7f) &&
1112 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1116 last_prologue_pc
= next_pc
;
1121 /* Look for a leaf routine. */
1122 if (pc
< lim_pc
&& next_pc
1123 && (it
== I
|| it
== M
)
1124 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1126 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1127 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1128 | ((instr
& 0x001f8000000LL
) >> 20)
1129 | ((instr
& 0x000000fe000LL
) >> 13));
1130 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1131 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1132 int qp
= (int) (instr
& 0x0000000003fLL
);
1133 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1135 /* mov r2, r12 - beginning of leaf routine */
1137 last_prologue_pc
= next_pc
;
1141 /* If we don't recognize a regular function or leaf routine, we are
1147 last_prologue_pc
= lim_pc
;
1151 /* Loop, looking for prologue instructions, keeping track of
1152 where preserved registers were spilled. */
1155 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1159 if (it
== B
&& ((instr
& 0x1e1f800003f) != 0x04000000000))
1161 /* Exit loop upon hitting a non-nop branch instruction. */
1166 else if (((instr
& 0x3fLL
) != 0LL) &&
1167 (frameless
|| ret_reg
!= 0))
1169 /* Exit loop upon hitting a predicated instruction if
1170 we already have the return register or if we are frameless. */
1175 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1178 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1179 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1180 int qp
= (int) (instr
& 0x0000000003f);
1182 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1185 last_prologue_pc
= next_pc
;
1188 else if ((it
== I
|| it
== M
)
1189 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1191 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1192 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1193 | ((instr
& 0x001f8000000LL
) >> 20)
1194 | ((instr
& 0x000000fe000LL
) >> 13));
1195 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1196 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1197 int qp
= (int) (instr
& 0x0000000003fLL
);
1199 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1203 last_prologue_pc
= next_pc
;
1205 else if (qp
== 0 && rN
== 12 && rM
== 12)
1207 /* adds r12, -mem_stack_frame_size, r12 */
1208 mem_stack_frame_size
-= imm
;
1209 last_prologue_pc
= next_pc
;
1211 else if (qp
== 0 && rN
== 2
1212 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1214 char buf
[MAX_REGISTER_SIZE
];
1215 CORE_ADDR saved_sp
= 0;
1216 /* adds r2, spilloffset, rFramePointer
1218 adds r2, spilloffset, r12
1220 Get ready for stf.spill or st8.spill instructions.
1221 The address to start spilling at is loaded into r2.
1222 FIXME: Why r2? That's what gcc currently uses; it
1223 could well be different for other compilers. */
1225 /* Hmm... whether or not this will work will depend on
1226 where the pc is. If it's still early in the prologue
1227 this'll be wrong. FIXME */
1230 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1231 saved_sp
= extract_unsigned_integer (buf
, 8);
1233 spill_addr
= saved_sp
1234 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1237 last_prologue_pc
= next_pc
;
1239 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1240 rN
< 256 && imm
== 0)
1242 /* mov rN, rM where rM is an input register */
1243 reg_contents
[rN
] = rM
;
1244 last_prologue_pc
= next_pc
;
1246 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1250 last_prologue_pc
= next_pc
;
1255 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1256 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1258 /* stf.spill [rN] = fM, imm9
1260 stf.spill [rN] = fM */
1262 int imm
= imm9(instr
);
1263 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1264 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1265 int qp
= (int) (instr
& 0x0000000003fLL
);
1266 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1267 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1269 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1271 if ((instr
& 0x1efc0000000) == 0x0eec0000000)
1274 spill_addr
= 0; /* last one; must be done */
1275 last_prologue_pc
= next_pc
;
1278 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1279 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1285 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1286 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1287 int qp
= (int) (instr
& 0x0000000003fLL
);
1288 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1290 /* We have something like "mov.m r3 = ar.unat". Remember the
1291 r3 (or whatever) and watch for a store of this register... */
1293 last_prologue_pc
= next_pc
;
1296 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1299 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1300 int qp
= (int) (instr
& 0x0000000003fLL
);
1301 if (qp
== 0 && isScratch (rN
))
1304 last_prologue_pc
= next_pc
;
1308 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1309 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1313 st8 [rN] = rM, imm9 */
1314 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1315 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1316 int qp
= (int) (instr
& 0x0000000003fLL
);
1317 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1318 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1319 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1321 /* We've found a spill of either the UNAT register or the PR
1322 register. (Well, not exactly; what we've actually found is
1323 a spill of the register that UNAT or PR was moved to).
1324 Record that fact and move on... */
1325 if (rM
== unat_save_reg
)
1327 /* Track UNAT register */
1328 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1333 /* Track PR register */
1334 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1337 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1338 /* st8 [rN] = rM, imm9 */
1339 spill_addr
+= imm9(instr
);
1341 spill_addr
= 0; /* must be done spilling */
1342 last_prologue_pc
= next_pc
;
1344 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1346 /* Allow up to one store of each input register. */
1347 instores
[rM
-32] = 1;
1348 last_prologue_pc
= next_pc
;
1350 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1351 !instores
[indirect
-32])
1353 /* Allow an indirect store of an input register. */
1354 instores
[indirect
-32] = 1;
1355 last_prologue_pc
= next_pc
;
1358 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1365 Note that the st8 case is handled in the clause above.
1367 Advance over stores of input registers. One store per input
1368 register is permitted. */
1369 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1370 int qp
= (int) (instr
& 0x0000000003fLL
);
1371 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1372 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1374 instores
[rM
-32] = 1;
1375 last_prologue_pc
= next_pc
;
1377 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1378 !instores
[indirect
-32])
1380 /* Allow an indirect store of an input register. */
1381 instores
[indirect
-32] = 1;
1382 last_prologue_pc
= next_pc
;
1385 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1392 Advance over stores of floating point input registers. Again
1393 one store per register is permitted */
1394 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1395 int qp
= (int) (instr
& 0x0000000003fLL
);
1396 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1398 infpstores
[fM
-8] = 1;
1399 last_prologue_pc
= next_pc
;
1403 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1404 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1406 /* st8.spill [rN] = rM
1408 st8.spill [rN] = rM, imm9 */
1409 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1410 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1411 int qp
= (int) (instr
& 0x0000000003fLL
);
1412 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1414 /* We've found a spill of one of the preserved general purpose
1415 regs. Record the spill address and advance the spill
1416 register if appropriate. */
1417 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1418 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1419 /* st8.spill [rN] = rM, imm9 */
1420 spill_addr
+= imm9(instr
);
1422 spill_addr
= 0; /* Done spilling */
1423 last_prologue_pc
= next_pc
;
1430 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1431 registers for the previous frame which will be needed later. */
1433 if (!frameless
&& next_frame
)
1435 /* Extract the size of the rotating portion of the stack
1436 frame and the register rename base from the current
1442 rrb_gr
= (cfm
>> 18) & 0x7f;
1444 /* Find the bof (beginning of frame). */
1445 bof
= rse_address_add (cache
->bsp
, -sof
);
1447 for (i
= 0, addr
= bof
;
1451 if (IS_NaT_COLLECTION_ADDR (addr
))
1455 if (i
+32 == cfm_reg
)
1456 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1457 if (i
+32 == ret_reg
)
1458 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1460 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1463 /* For the previous argument registers we require the previous bof.
1464 If we can't find the previous cfm, then we can do nothing. */
1466 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1468 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1470 else if (cfm_reg
!= 0)
1472 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1473 cfm
= extract_unsigned_integer (buf
, 8);
1475 cache
->prev_cfm
= cfm
;
1479 sor
= ((cfm
>> 14) & 0xf) * 8;
1481 sol
= (cfm
>> 7) & 0x7f;
1482 rrb_gr
= (cfm
>> 18) & 0x7f;
1484 /* The previous bof only requires subtraction of the sol (size of locals)
1485 due to the overlap between output and input of subsequent frames. */
1486 bof
= rse_address_add (bof
, -sol
);
1488 for (i
= 0, addr
= bof
;
1492 if (IS_NaT_COLLECTION_ADDR (addr
))
1497 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1500 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1506 /* Try and trust the lim_pc value whenever possible. */
1507 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1508 last_prologue_pc
= lim_pc
;
1510 cache
->frameless
= frameless
;
1511 cache
->after_prologue
= last_prologue_pc
;
1512 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1513 cache
->fp_reg
= fp_reg
;
1515 return last_prologue_pc
;
1519 ia64_skip_prologue (CORE_ADDR pc
)
1521 struct ia64_frame_cache cache
;
1523 cache
.after_prologue
= 0;
1527 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1528 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1532 /* Normal frames. */
1534 static struct ia64_frame_cache
*
1535 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1537 struct ia64_frame_cache
*cache
;
1539 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1545 cache
= ia64_alloc_frame_cache ();
1546 *this_cache
= cache
;
1548 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1549 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1551 /* We always want the bsp to point to the end of frame.
1552 This way, we can always get the beginning of frame (bof)
1553 by subtracting frame size. */
1554 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1555 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1557 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1558 psr
= extract_unsigned_integer (buf
, 8);
1560 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1561 cfm
= extract_unsigned_integer (buf
, 8);
1563 cache
->sof
= (cfm
& 0x7f);
1564 cache
->sol
= (cfm
>> 7) & 0x7f;
1565 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1569 cache
->pc
= frame_func_unwind (next_frame
);
1572 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1574 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1580 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1581 struct frame_id
*this_id
)
1583 struct ia64_frame_cache
*cache
=
1584 ia64_frame_cache (next_frame
, this_cache
);
1586 /* This marks the outermost frame. */
1587 if (cache
->base
== 0)
1590 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1591 if (gdbarch_debug
>= 1)
1592 fprintf_unfiltered (gdb_stdlog
,
1593 "regular frame id: code %lx, stack %lx, special %lx, next_frame %p\n",
1594 this_id
->code_addr
, this_id
->stack_addr
, cache
->bsp
, next_frame
);
1598 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1599 int regnum
, int *optimizedp
,
1600 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1601 int *realnump
, void *valuep
)
1603 struct ia64_frame_cache
*cache
=
1604 ia64_frame_cache (next_frame
, this_cache
);
1605 char dummy_valp
[MAX_REGISTER_SIZE
];
1608 gdb_assert (regnum
>= 0);
1610 if (!target_has_registers
)
1611 error ("No registers.");
1618 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1619 when valuep is not supplied. */
1621 valuep
= dummy_valp
;
1623 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1625 if (regnum
== SP_REGNUM
)
1627 /* Handle SP values for all frames but the topmost. */
1628 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1631 else if (regnum
== IA64_BSP_REGNUM
)
1633 char cfm_valuep
[MAX_REGISTER_SIZE
];
1636 enum lval_type cfm_lval
;
1638 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1640 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1641 This corresponds to what the hardware bsp register will be if we pop the frame
1642 back which is why we might have been called. We know the beginning of the current
1643 frame is cache->bsp - cache->sof. This value in the previous frame points to
1644 the start of the output registers. We can calculate the end of that frame by adding
1645 the size of output (sof (size of frame) - sol (size of locals)). */
1646 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1647 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1648 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1650 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1651 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1653 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1656 else if (regnum
== IA64_CFM_REGNUM
)
1658 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1662 *lvalp
= lval_memory
;
1664 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1666 else if (cache
->prev_cfm
)
1667 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), cache
->prev_cfm
);
1668 else if (cache
->frameless
)
1671 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1674 else if (regnum
== IA64_VFP_REGNUM
)
1676 /* If the function in question uses an automatic register (r32-r127)
1677 for the frame pointer, it'll be found by ia64_find_saved_register()
1678 above. If the function lacks one of these frame pointers, we can
1679 still provide a value since we know the size of the frame. */
1680 CORE_ADDR vfp
= cache
->base
;
1681 store_unsigned_integer (valuep
, register_size (current_gdbarch
, IA64_VFP_REGNUM
), vfp
);
1683 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1685 char pr_valuep
[MAX_REGISTER_SIZE
];
1688 enum lval_type pr_lval
;
1691 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1692 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1693 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1695 /* Fetch predicate register rename base from current frame
1696 marker for this frame. */
1697 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1699 /* Adjust the register number to account for register rotation. */
1700 regnum
= VP16_REGNUM
1701 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1703 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1704 regnum
- VP0_REGNUM
, 1);
1705 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
1707 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1709 char unat_valuep
[MAX_REGISTER_SIZE
];
1712 enum lval_type unat_lval
;
1713 CORE_ADDR unat_addr
;
1715 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1716 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1717 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1718 regnum
- IA64_NAT0_REGNUM
, 1);
1719 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1722 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1725 /* Find address of general register corresponding to nat bit we're
1729 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1733 /* Compute address of nat collection bits. */
1734 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1736 CORE_ADDR nat_collection
;
1738 /* If our nat collection address is bigger than bsp, we have to get
1739 the nat collection from rnat. Otherwise, we fetch the nat
1740 collection from the computed address. */
1741 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1742 bsp
= extract_unsigned_integer (buf
, 8);
1743 if (nat_addr
>= bsp
)
1745 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1746 nat_collection
= extract_unsigned_integer (buf
, 8);
1749 nat_collection
= read_memory_integer (nat_addr
, 8);
1750 nat_bit
= (gr_addr
>> 3) & 0x3f;
1751 natval
= (nat_collection
>> nat_bit
) & 1;
1754 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), natval
);
1756 else if (regnum
== IA64_IP_REGNUM
)
1759 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1763 *lvalp
= lval_memory
;
1765 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1766 pc
= extract_unsigned_integer (buf
, 8);
1768 else if (cache
->frameless
)
1770 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1771 pc
= extract_unsigned_integer (buf
, 8);
1774 store_unsigned_integer (valuep
, 8, pc
);
1776 else if (regnum
== IA64_PSR_REGNUM
)
1778 /* We don't know how to get the complete previous PSR, but we need it for
1779 the slot information when we unwind the pc (pc is formed of IP register
1780 plus slot information from PSR). To get the previous slot information,
1781 we mask it off the return address. */
1782 ULONGEST slot_num
= 0;
1785 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1787 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1788 psr
= extract_unsigned_integer (buf
, 8);
1792 *lvalp
= lval_memory
;
1794 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1795 pc
= extract_unsigned_integer (buf
, 8);
1797 else if (cache
->frameless
)
1800 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1801 pc
= extract_unsigned_integer (buf
, 8);
1803 psr
&= ~(3LL << 41);
1804 slot_num
= pc
& 0x3LL
;
1805 psr
|= (CORE_ADDR
)slot_num
<< 41;
1806 store_unsigned_integer (valuep
, 8, psr
);
1808 else if (regnum
== IA64_BR0_REGNUM
)
1811 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1814 *lvalp
= lval_memory
;
1816 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_BR0_REGNUM
));
1817 br0
= extract_unsigned_integer (buf
, 8);
1819 store_unsigned_integer (valuep
, 8, br0
);
1821 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1822 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1825 if (regnum
>= V32_REGNUM
)
1826 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1827 addr
= cache
->saved_regs
[regnum
];
1830 *lvalp
= lval_memory
;
1832 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1834 else if (cache
->frameless
)
1836 char r_valuep
[MAX_REGISTER_SIZE
];
1839 enum lval_type r_lval
;
1841 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1843 if (regnum
>= V32_REGNUM
)
1844 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1845 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1846 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1847 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1848 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1849 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1850 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1851 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1853 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1854 *lvalp
= lval_memory
;
1856 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1862 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1864 /* Fetch floating point register rename base from current
1865 frame marker for this frame. */
1866 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1868 /* Adjust the floating point register number to account for
1869 register rotation. */
1870 regnum
= IA64_FR32_REGNUM
1871 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1874 /* If we have stored a memory address, access the register. */
1875 addr
= cache
->saved_regs
[regnum
];
1878 *lvalp
= lval_memory
;
1880 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1882 /* Otherwise, punt and get the current value of the register. */
1884 frame_unwind_register (next_frame
, regnum
, valuep
);
1887 if (gdbarch_debug
>= 1)
1888 fprintf_unfiltered (gdb_stdlog
,
1889 "regular prev register <%d> <%s> is %lx\n", regnum
,
1890 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1891 ? ia64_register_names
[regnum
] : "r??"), extract_unsigned_integer (valuep
, 8));
1894 static const struct frame_unwind ia64_frame_unwind
=
1897 &ia64_frame_this_id
,
1898 &ia64_frame_prev_register
1901 static const struct frame_unwind
*
1902 ia64_frame_sniffer (struct frame_info
*next_frame
)
1904 return &ia64_frame_unwind
;
1907 /* Signal trampolines. */
1910 ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache
*cache
)
1912 if (SIGCONTEXT_REGISTER_ADDRESS
)
1916 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1917 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_IP_REGNUM
);
1918 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1919 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CFM_REGNUM
);
1920 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1921 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PSR_REGNUM
);
1922 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1923 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_BSP_REGNUM
);
1924 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1925 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_RNAT_REGNUM
);
1926 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1927 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CCV_REGNUM
);
1928 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1929 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_UNAT_REGNUM
);
1930 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1931 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_FPSR_REGNUM
);
1932 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1933 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PFS_REGNUM
);
1934 cache
->saved_regs
[IA64_LC_REGNUM
] =
1935 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_LC_REGNUM
);
1936 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1937 cache
->saved_regs
[regno
] =
1938 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1939 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1940 cache
->saved_regs
[regno
] =
1941 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1942 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1943 cache
->saved_regs
[regno
] =
1944 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1948 static struct ia64_frame_cache
*
1949 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1951 struct ia64_frame_cache
*cache
;
1959 cache
= ia64_alloc_frame_cache ();
1961 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1962 /* Note that frame size is hard-coded below. We cannot calculate it
1963 via prologue examination. */
1964 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1966 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1967 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1969 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1970 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1971 cache
->sof
= cache
->cfm
& 0x7f;
1973 ia64_sigtramp_frame_init_saved_regs (cache
);
1975 *this_cache
= cache
;
1980 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1981 void **this_cache
, struct frame_id
*this_id
)
1983 struct ia64_frame_cache
*cache
=
1984 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1986 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1987 if (gdbarch_debug
>= 1)
1988 fprintf_unfiltered (gdb_stdlog
,
1989 "sigtramp frame id: code %lx, stack %lx, special %lx, next_frame %p\n",
1990 this_id
->code_addr
, this_id
->stack_addr
, cache
->bsp
, next_frame
);
1994 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1996 int regnum
, int *optimizedp
,
1997 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1998 int *realnump
, void *valuep
)
2000 char dummy_valp
[MAX_REGISTER_SIZE
];
2001 char buf
[MAX_REGISTER_SIZE
];
2003 struct ia64_frame_cache
*cache
=
2004 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
2006 gdb_assert (regnum
>= 0);
2008 if (!target_has_registers
)
2009 error ("No registers.");
2016 /* Rather than check each time if valuep is non-null, supply a dummy buffer
2017 when valuep is not supplied. */
2019 valuep
= dummy_valp
;
2021 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
2023 if (regnum
== IA64_IP_REGNUM
)
2026 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2030 *lvalp
= lval_memory
;
2032 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
2033 pc
= extract_unsigned_integer (buf
, 8);
2036 store_unsigned_integer (valuep
, 8, pc
);
2038 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2039 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2042 if (regnum
>= V32_REGNUM
)
2043 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2044 addr
= cache
->saved_regs
[regnum
];
2047 *lvalp
= lval_memory
;
2049 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2054 /* All other registers not listed above. */
2055 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2058 *lvalp
= lval_memory
;
2060 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2064 if (gdbarch_debug
>= 1)
2065 fprintf_unfiltered (gdb_stdlog
,
2066 "sigtramp prev register <%s> is %lx\n",
2067 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2068 ? ia64_register_names
[regnum
] : "r??"), extract_unsigned_integer (valuep
, 8));
2071 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2074 ia64_sigtramp_frame_this_id
,
2075 ia64_sigtramp_frame_prev_register
2078 static const struct frame_unwind
*
2079 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2082 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2084 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2085 if (PC_IN_SIGTRAMP (pc
, name
))
2086 return &ia64_sigtramp_frame_unwind
;
2093 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2095 struct ia64_frame_cache
*cache
=
2096 ia64_frame_cache (next_frame
, this_cache
);
2101 static const struct frame_base ia64_frame_base
=
2104 ia64_frame_base_address
,
2105 ia64_frame_base_address
,
2106 ia64_frame_base_address
2109 #ifdef HAVE_LIBUNWIND_IA64_H
2111 struct ia64_unwind_table_entry
2113 unw_word_t start_offset
;
2114 unw_word_t end_offset
;
2115 unw_word_t info_offset
;
2118 static __inline__
uint64_t
2119 ia64_rse_slot_num (uint64_t addr
)
2121 return (addr
>> 3) & 0x3f;
2124 /* Skip over a designated number of registers in the backing
2125 store, remembering every 64th position is for NAT. */
2126 static __inline__
uint64_t
2127 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2129 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2133 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2136 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2137 number to a libunwind register number. */
2139 ia64_gdb2uw_regnum (int regnum
)
2141 if (regnum
== sp_regnum
)
2143 else if (regnum
== IA64_BSP_REGNUM
)
2144 return UNW_IA64_BSP
;
2145 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2146 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2147 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2148 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2149 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2150 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2151 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2153 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2154 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2155 else if (regnum
== IA64_PR_REGNUM
)
2157 else if (regnum
== IA64_IP_REGNUM
)
2159 else if (regnum
== IA64_CFM_REGNUM
)
2160 return UNW_IA64_CFM
;
2161 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2162 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2163 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2164 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2169 /* Gdb libunwind-frame callback function to convert from a libunwind register
2170 number to a ia64 gdb register number. */
2172 ia64_uw2gdb_regnum (int uw_regnum
)
2174 if (uw_regnum
== UNW_IA64_SP
)
2176 else if (uw_regnum
== UNW_IA64_BSP
)
2177 return IA64_BSP_REGNUM
;
2178 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2179 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2180 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2181 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2182 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2183 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2184 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2185 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2186 else if (uw_regnum
== UNW_IA64_PR
)
2187 return IA64_PR_REGNUM
;
2188 else if (uw_regnum
== UNW_REG_IP
)
2189 return IA64_IP_REGNUM
;
2190 else if (uw_regnum
== UNW_IA64_CFM
)
2191 return IA64_CFM_REGNUM
;
2192 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2193 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2194 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2195 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2200 /* Gdb libunwind-frame callback function to reveal if register is a float
2203 ia64_is_fpreg (int uw_regnum
)
2205 return unw_is_fpreg (uw_regnum
);
2208 /* Libunwind callback accessor function for general registers. */
2210 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2211 int write
, void *arg
)
2213 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2214 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2215 struct frame_info
*next_frame
= arg
;
2216 long new_sof
, old_sof
;
2217 char buf
[MAX_REGISTER_SIZE
];
2222 /* ignore writes to pseudo-registers such as UNW_IA64_PROC_STARTI. */
2228 ia64_write_pc (*val
, inferior_ptid
);
2231 case UNW_IA64_AR_BSPSTORE
:
2232 write_register (IA64_BSP_REGNUM
, *val
);
2235 case UNW_IA64_AR_BSP
:
2237 /* Account for the fact that ptrace() expects bsp to point
2238 after the current register frame. */
2239 cfm
= read_register (IA64_CFM_REGNUM
);
2241 bsp
= ia64_rse_skip_regs (*val
, sof
);
2242 write_register (IA64_BSP_REGNUM
, bsp
);
2246 /* If we change CFM, we need to adjust ptrace's notion of
2247 bsp accordingly, so that the real bsp remains
2249 bsp
= read_register (IA64_BSP_REGNUM
);
2250 cfm
= read_register (IA64_CFM_REGNUM
);
2251 old_sof
= (cfm
& 0x7f);
2252 new_sof
= (*val
& 0x7f);
2253 if (old_sof
!= new_sof
)
2255 bsp
= ia64_rse_skip_regs (bsp
, -old_sof
+ new_sof
);
2256 write_register (IA64_BSP_REGNUM
, bsp
);
2258 write_register (IA64_CFM_REGNUM
, *val
);
2262 write_register (regnum
, *val
);
2265 if (gdbarch_debug
>= 1)
2266 fprintf_unfiltered (gdb_stdlog
,
2267 " access_reg: to cache: %4s=%016lx\n",
2268 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2269 ? ia64_register_names
[regnum
] : "r??"), *val
);
2276 /* Libunwind expects to see the pc value which means the slot number
2277 from the psr must be merged with the ip word address. */
2278 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2279 ip
= extract_unsigned_integer (buf
, 8);
2280 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2281 psr
= extract_unsigned_integer (buf
, 8);
2282 *val
= ip
| ((psr
>> 41) & 0x3);
2285 case UNW_IA64_AR_BSP
:
2286 /* Libunwind expects to see the beginning of the current register
2287 frame so we must account for the fact that ptrace() will return a value
2288 for bsp that points *after* the current register frame. */
2289 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2290 bsp
= extract_unsigned_integer (buf
, 8);
2291 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2292 cfm
= extract_unsigned_integer (buf
, 8);
2294 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2297 case UNW_IA64_AR_BSPSTORE
:
2298 /* Libunwind wants bspstore to be after the current register frame.
2299 This is what ptrace() and gdb treats as the regular bsp value. */
2300 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2301 *val
= extract_unsigned_integer (buf
, 8);
2305 /* For all other registers, just unwind the value directly. */
2306 frame_unwind_register (next_frame
, regnum
, buf
);
2307 *val
= extract_unsigned_integer (buf
, 8);
2311 if (gdbarch_debug
>= 1)
2312 fprintf_unfiltered (gdb_stdlog
,
2313 " access_reg: from cache: %4s=%016lx\n",
2314 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2315 ? ia64_register_names
[regnum
] : "r??"), *val
);
2320 /* Libunwind callback accessor function for floating-point registers. */
2322 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2323 int write
, void *arg
)
2325 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2328 regcache_cooked_write (current_regcache
, regnum
, (char *) val
);
2330 regcache_cooked_read (current_regcache
, regnum
, (char *) val
);
2334 /* Libunwind callback accessor function for accessing memory. */
2336 ia64_access_mem (unw_addr_space_t as
,
2337 unw_word_t addr
, unw_word_t
*val
,
2338 int write
, void *arg
)
2340 /* XXX do we need to normalize byte-order here? */
2342 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2344 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2347 /* Call low-level function to access the kernel unwind table. */
2349 getunwind_table (void *buf
, size_t len
)
2352 x
= target_read_partial (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
, NULL
,
2358 /* Get the kernel unwind table. */
2360 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2363 struct ia64_table_entry
2365 uint64_t start_offset
;
2366 uint64_t end_offset
;
2367 uint64_t info_offset
;
2369 static struct ia64_table_entry
*ktab
= NULL
, *etab
;
2373 size
= getunwind_table (NULL
, 0);
2375 return -UNW_ENOINFO
;
2376 ktab
= xmalloc (size
);
2377 getunwind_table (ktab
, size
);
2379 /* Determine length of kernel's unwind table and relocate
2381 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2382 etab
->info_offset
+= (uint64_t) ktab
;
2385 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2386 return -UNW_ENOINFO
;
2388 di
->format
= UNW_INFO_FORMAT_TABLE
;
2390 di
->start_ip
= ktab
[0].start_offset
;
2391 di
->end_ip
= etab
[-1].end_offset
;
2392 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2393 di
->u
.ti
.segbase
= 0;
2394 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2395 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2397 if (gdbarch_debug
>= 1)
2398 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2399 "segbase=%lx, length=%lu, gp=%lx\n",
2400 (char *) di
->u
.ti
.name_ptr
, di
->u
.ti
.segbase
,
2401 di
->u
.ti
.table_len
, di
->gp
);
2405 /* Find the unwind table entry for a specified address. */
2407 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2408 unw_dyn_info_t
*dip
, void **buf
)
2410 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2411 Elf_Internal_Ehdr
*ehdr
;
2412 unw_word_t segbase
= 0;
2413 CORE_ADDR load_base
;
2417 bfd
= objfile
->obfd
;
2419 ehdr
= elf_tdata (bfd
)->elf_header
;
2420 phdr
= elf_tdata (bfd
)->phdr
;
2422 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2424 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2426 switch (phdr
[i
].p_type
)
2429 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2434 case PT_IA_64_UNWIND
:
2435 p_unwind
= phdr
+ i
;
2443 if (!p_text
|| !p_unwind
2444 /* Verify that the segment that contains the IP also contains
2445 the static unwind table. If not, we are dealing with
2446 runtime-generated code, for which we have no info here. */
2447 || (p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2448 return -UNW_ENOINFO
;
2450 segbase
= p_text
->p_vaddr
+ load_base
;
2452 dip
->start_ip
= segbase
;
2453 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2454 dip
->gp
= FIND_GLOBAL_POINTER (ip
);
2455 dip
->format
= UNW_INFO_FORMAT_TABLE
;
2456 dip
->u
.ti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2457 dip
->u
.ti
.segbase
= segbase
;
2458 dip
->u
.ti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2460 /* The following can happen in corner cases where dynamically
2461 generated code falls into the same page that contains the
2462 data-segment and the page-offset of the code is within the first
2463 page of the executable. */
2464 if (ip
< dip
->start_ip
|| ip
>= dip
->end_ip
)
2465 return -UNW_ENOINFO
;
2467 /* Read in the libunwind table. */
2468 *buf
= xmalloc (p_unwind
->p_memsz
);
2469 target_read_memory (p_unwind
->p_vaddr
+ load_base
, (char *)(*buf
), p_unwind
->p_memsz
);
2471 dip
->u
.ti
.table_data
= (unw_word_t
*)(*buf
);
2476 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2478 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2479 int need_unwind_info
, void *arg
)
2481 struct obj_section
*sec
= find_pc_section (ip
);
2488 /* XXX This only works if the host and the target architecture are
2489 both ia64 and if the have (more or less) the same kernel
2491 if (get_kernel_table (ip
, &di
) < 0)
2492 return -UNW_ENOINFO
;
2496 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2501 if (gdbarch_debug
>= 1)
2502 fprintf_unfiltered (gdb_stdlog
, "acquire_unwind_info: %lx -> "
2503 "(name=`%s',segbase=%lx,start=%lx,end=%lx,gp=%lx,"
2504 "length=%lu,data=%p)\n", ip
, (char *)di
.u
.ti
.name_ptr
,
2505 di
.u
.ti
.segbase
, di
.start_ip
, di
.end_ip
,
2506 di
.gp
, di
.u
.ti
.table_len
, di
.u
.ti
.table_data
);
2508 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
, arg
);
2510 /* We no longer need the dyn info storage so free it. */
2516 /* Libunwind callback accessor function for cleanup. */
2518 ia64_put_unwind_info (unw_addr_space_t as
,
2519 unw_proc_info_t
*pip
, void *arg
)
2521 /* Nothing required for now. */
2524 /* Libunwind callback accessor function to get head of the dynamic
2525 unwind-info registration list. */
2527 ia64_get_dyn_info_list (unw_addr_space_t as
,
2528 unw_word_t
*dilap
, void *arg
)
2530 struct obj_section
*text_sec
;
2531 struct objfile
*objfile
;
2532 unw_word_t ip
, addr
;
2536 if (!libunwind_is_initialized ())
2537 return -UNW_ENOINFO
;
2539 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2543 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2544 ip
= text_sec
->addr
;
2545 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2548 addr
= libunwind_find_dyn_list (as
, di
.u
.ti
.table_data
,
2550 * sizeof (di
.u
.ti
.table_data
[0])),
2551 di
.u
.ti
.segbase
, di
.gp
, arg
);
2552 /* We no longer need the dyn info storage so free it. */
2557 if (gdbarch_debug
>= 1)
2558 fprintf_unfiltered (gdb_stdlog
,
2559 "dynamic unwind table in objfile %s "
2560 "at %lx (gp=%lx)\n",
2561 bfd_get_filename (objfile
->obfd
),
2568 return -UNW_ENOINFO
;
2572 /* Frame interface functions for libunwind. */
2575 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2576 struct frame_id
*this_id
)
2582 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2584 /* We must add the bsp as the special address for frame comparison purposes. */
2585 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2586 bsp
= extract_unsigned_integer (buf
, 8);
2588 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2590 if (gdbarch_debug
>= 1)
2591 fprintf_unfiltered (gdb_stdlog
,
2592 "libunwind frame id: code %lx, stack %lx, special %lx, next_frame %p\n",
2593 id
.code_addr
, id
.stack_addr
, bsp
, next_frame
);
2597 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2599 int regnum
, int *optimizedp
,
2600 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2601 int *realnump
, void *valuep
)
2605 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2606 reg
= IA64_PR_REGNUM
;
2607 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2608 reg
= IA64_UNAT_REGNUM
;
2610 /* Let libunwind do most of the work. */
2611 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2612 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2614 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2618 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2622 unsigned char buf
[MAX_REGISTER_SIZE
];
2624 /* Fetch predicate register rename base from current frame
2625 marker for this frame. */
2626 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2627 cfm
= extract_unsigned_integer (buf
, 8);
2628 rrb_pr
= (cfm
>> 32) & 0x3f;
2630 /* Adjust the register number to account for register rotation. */
2631 regnum
= VP16_REGNUM
2632 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2634 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2635 regnum
- VP0_REGNUM
, 1);
2636 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
2638 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2642 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2643 regnum
- IA64_NAT0_REGNUM
, 1);
2644 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2647 else if (regnum
== IA64_BSP_REGNUM
)
2649 char cfm_valuep
[MAX_REGISTER_SIZE
];
2652 enum lval_type cfm_lval
;
2654 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2656 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2657 This corresponds to what the hardware bsp register will be if we pop the frame
2658 back which is why we might have been called. We know that libunwind will pass us back
2659 the beginning of the current frame so we should just add sof to it. */
2660 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2661 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2662 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2663 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2664 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2666 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2670 if (gdbarch_debug
>= 1)
2671 fprintf_unfiltered (gdb_stdlog
,
2672 "libunwind prev register <%s> is %lx\n",
2673 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2674 ? ia64_register_names
[regnum
] : "r??"), extract_unsigned_integer (valuep
, 8));
2677 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2680 ia64_libunwind_frame_this_id
,
2681 ia64_libunwind_frame_prev_register
2684 static const struct frame_unwind
*
2685 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2687 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2688 return &ia64_libunwind_frame_unwind
;
2693 /* Set of libunwind callback acccessor functions. */
2694 static unw_accessors_t ia64_unw_accessors
=
2696 ia64_find_proc_info_x
,
2697 ia64_put_unwind_info
,
2698 ia64_get_dyn_info_list
,
2706 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2707 static struct libunwind_descr ia64_libunwind_descr
=
2712 &ia64_unw_accessors
,
2715 #endif /* HAVE_LIBUNWIND_IA64_H */
2717 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
2718 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
2719 and TYPE is the type (which is known to be struct, union or array). */
2721 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
2723 struct type
*float_elt_type
;
2725 /* HFAs are structures (or arrays) consisting entirely of floating
2726 point values of the same length. Up to 8 of these are returned
2727 in registers. Don't use the struct convention when this is the
2729 float_elt_type
= is_float_or_hfa_type (type
);
2730 if (float_elt_type
!= NULL
2731 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
2734 /* Other structs of length 32 or less are returned in r8-r11.
2735 Don't use the struct convention for those either. */
2736 return TYPE_LENGTH (type
) > 32;
2740 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
, void *valbuf
)
2742 struct type
*float_elt_type
;
2744 float_elt_type
= is_float_or_hfa_type (type
);
2745 if (float_elt_type
!= NULL
)
2747 char from
[MAX_REGISTER_SIZE
];
2749 int regnum
= IA64_FR8_REGNUM
;
2750 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
2754 regcache_cooked_read (regcache
, regnum
, from
);
2755 convert_typed_floating (from
, builtin_type_ia64_ext
,
2756 (char *)valbuf
+ offset
, float_elt_type
);
2757 offset
+= TYPE_LENGTH (float_elt_type
);
2765 int regnum
= IA64_GR8_REGNUM
;
2766 int reglen
= TYPE_LENGTH (ia64_register_type (NULL
, IA64_GR8_REGNUM
));
2767 int n
= TYPE_LENGTH (type
) / reglen
;
2768 int m
= TYPE_LENGTH (type
) % reglen
;
2773 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2774 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
2781 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2782 memcpy ((char *)valbuf
+ offset
, &val
, m
);
2788 ia64_extract_struct_value_address (struct regcache
*regcache
)
2790 error ("ia64_extract_struct_value_address called and cannot get struct value address");
2796 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
2798 switch (TYPE_CODE (t
))
2802 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
2809 case TYPE_CODE_ARRAY
:
2811 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
2814 case TYPE_CODE_STRUCT
:
2818 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
2819 if (!is_float_or_hfa_type_recurse
2820 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
2831 /* Determine if the given type is one of the floating point types or
2832 and HFA (which is a struct, array, or combination thereof whose
2833 bottom-most elements are all of the same floating point type). */
2835 static struct type
*
2836 is_float_or_hfa_type (struct type
*t
)
2838 struct type
*et
= 0;
2840 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
2844 /* Return 1 if the alignment of T is such that the next even slot
2845 should be used. Return 0, if the next available slot should
2846 be used. (See section 8.5.1 of the IA-64 Software Conventions
2847 and Runtime manual). */
2850 slot_alignment_is_next_even (struct type
*t
)
2852 switch (TYPE_CODE (t
))
2856 if (TYPE_LENGTH (t
) > 8)
2860 case TYPE_CODE_ARRAY
:
2862 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
2863 case TYPE_CODE_STRUCT
:
2867 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
2868 if (slot_alignment_is_next_even
2869 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
2878 /* Attempt to find (and return) the global pointer for the given
2881 This is a rather nasty bit of code searchs for the .dynamic section
2882 in the objfile corresponding to the pc of the function we're trying
2883 to call. Once it finds the addresses at which the .dynamic section
2884 lives in the child process, it scans the Elf64_Dyn entries for a
2885 DT_PLTGOT tag. If it finds one of these, the corresponding
2886 d_un.d_ptr value is the global pointer. */
2889 generic_elf_find_global_pointer (CORE_ADDR faddr
)
2891 struct obj_section
*faddr_sect
;
2893 faddr_sect
= find_pc_section (faddr
);
2894 if (faddr_sect
!= NULL
)
2896 struct obj_section
*osect
;
2898 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
2900 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
2904 if (osect
< faddr_sect
->objfile
->sections_end
)
2909 while (addr
< osect
->endaddr
)
2915 status
= target_read_memory (addr
, buf
, sizeof (buf
));
2918 tag
= extract_signed_integer (buf
, sizeof (buf
));
2920 if (tag
== DT_PLTGOT
)
2922 CORE_ADDR global_pointer
;
2924 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
2927 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
2930 return global_pointer
;
2943 /* Given a function's address, attempt to find (and return) the
2944 corresponding (canonical) function descriptor. Return 0 if
2947 find_extant_func_descr (CORE_ADDR faddr
)
2949 struct obj_section
*faddr_sect
;
2951 /* Return early if faddr is already a function descriptor. */
2952 faddr_sect
= find_pc_section (faddr
);
2953 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
2956 if (faddr_sect
!= NULL
)
2958 struct obj_section
*osect
;
2959 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
2961 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
2965 if (osect
< faddr_sect
->objfile
->sections_end
)
2970 while (addr
< osect
->endaddr
)
2976 status
= target_read_memory (addr
, buf
, sizeof (buf
));
2979 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
2981 if (faddr
== faddr2
)
2991 /* Attempt to find a function descriptor corresponding to the
2992 given address. If none is found, construct one on the
2993 stack using the address at fdaptr. */
2996 find_func_descr (CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3000 fdesc
= find_extant_func_descr (faddr
);
3004 CORE_ADDR global_pointer
;
3010 global_pointer
= FIND_GLOBAL_POINTER (faddr
);
3012 if (global_pointer
== 0)
3013 global_pointer
= read_register (IA64_GR1_REGNUM
);
3015 store_unsigned_integer (buf
, 8, faddr
);
3016 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
3018 write_memory (fdesc
, buf
, 16);
3024 /* Use the following routine when printing out function pointers
3025 so the user can see the function address rather than just the
3026 function descriptor. */
3028 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3029 struct target_ops
*targ
)
3031 struct obj_section
*s
;
3033 s
= find_pc_section (addr
);
3035 /* check if ADDR points to a function descriptor. */
3036 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3037 return read_memory_unsigned_integer (addr
, 8);
3043 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3049 ia64_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
3050 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3051 int nargs
, struct value
**args
, CORE_ADDR sp
,
3052 int struct_return
, CORE_ADDR struct_addr
)
3058 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3060 CORE_ADDR bsp
, cfm
, pfs
, new_bsp
, funcdescaddr
, pc
, global_pointer
;
3064 /* Count the number of slots needed for the arguments. */
3065 for (argno
= 0; argno
< nargs
; argno
++)
3068 type
= check_typedef (VALUE_TYPE (arg
));
3069 len
= TYPE_LENGTH (type
);
3071 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3074 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3077 nslots
+= (len
+ 7) / 8;
3080 /* Divvy up the slots between the RSE and the memory stack. */
3081 rseslots
= (nslots
> 8) ? 8 : nslots
;
3082 memslots
= nslots
- rseslots
;
3084 /* Allocate a new RSE frame. */
3085 cfm
= read_register (IA64_CFM_REGNUM
);
3087 bsp
= read_register (IA64_BSP_REGNUM
);
3088 new_bsp
= rse_address_add (bsp
, rseslots
);
3089 write_register (IA64_BSP_REGNUM
, new_bsp
);
3091 pfs
= read_register (IA64_PFS_REGNUM
);
3092 pfs
&= 0xc000000000000000LL
;
3093 pfs
|= (cfm
& 0xffffffffffffLL
);
3094 write_register (IA64_PFS_REGNUM
, pfs
);
3096 cfm
&= 0xc000000000000000LL
;
3098 write_register (IA64_CFM_REGNUM
, cfm
);
3100 /* We will attempt to find function descriptors in the .opd segment,
3101 but if we can't we'll construct them ourselves. That being the
3102 case, we'll need to reserve space on the stack for them. */
3103 funcdescaddr
= sp
- nfuncargs
* 16;
3104 funcdescaddr
&= ~0xfLL
;
3106 /* Adjust the stack pointer to it's new value. The calling conventions
3107 require us to have 16 bytes of scratch, plus whatever space is
3108 necessary for the memory slots and our function descriptors. */
3109 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3110 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3112 /* Place the arguments where they belong. The arguments will be
3113 either placed in the RSE backing store or on the memory stack.
3114 In addition, floating point arguments or HFAs are placed in
3115 floating point registers. */
3117 floatreg
= IA64_FR8_REGNUM
;
3118 for (argno
= 0; argno
< nargs
; argno
++)
3120 struct type
*float_elt_type
;
3123 type
= check_typedef (VALUE_TYPE (arg
));
3124 len
= TYPE_LENGTH (type
);
3126 /* Special handling for function parameters. */
3128 && TYPE_CODE (type
) == TYPE_CODE_PTR
3129 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3133 store_unsigned_integer (val_buf
, 8,
3134 find_func_descr (extract_unsigned_integer (VALUE_CONTENTS (arg
), 8),
3136 if (slotnum
< rseslots
)
3137 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3139 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3146 /* Skip odd slot if necessary... */
3147 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3155 memset (val_buf
, 0, 8);
3156 memcpy (val_buf
, VALUE_CONTENTS (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3158 if (slotnum
< rseslots
)
3159 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3161 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3168 /* Handle floating point types (including HFAs). */
3169 float_elt_type
= is_float_or_hfa_type (type
);
3170 if (float_elt_type
!= NULL
)
3173 len
= TYPE_LENGTH (type
);
3174 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3176 char to
[MAX_REGISTER_SIZE
];
3177 convert_typed_floating (VALUE_CONTENTS (arg
) + argoffset
, float_elt_type
,
3178 to
, builtin_type_ia64_ext
);
3179 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3181 argoffset
+= TYPE_LENGTH (float_elt_type
);
3182 len
-= TYPE_LENGTH (float_elt_type
);
3187 /* Store the struct return value in r8 if necessary. */
3190 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3193 global_pointer
= FIND_GLOBAL_POINTER (func_addr
);
3195 if (global_pointer
!= 0)
3196 write_register (IA64_GR1_REGNUM
, global_pointer
);
3198 write_register (IA64_BR0_REGNUM
, bp_addr
);
3200 write_register (sp_regnum
, sp
);
3205 static struct frame_id
3206 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3211 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3212 sp
= extract_unsigned_integer (buf
, 8);
3214 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3215 bsp
= extract_unsigned_integer (buf
, 8);
3217 if (gdbarch_debug
>= 1)
3218 fprintf_unfiltered (gdb_stdlog
,
3219 "dummy frame id: code %lx, stack %lx, special %lx\n",
3220 frame_pc_unwind (next_frame
), sp
, bsp
);
3222 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3226 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3229 CORE_ADDR ip
, psr
, pc
;
3231 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3232 ip
= extract_unsigned_integer (buf
, 8);
3233 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3234 psr
= extract_unsigned_integer (buf
, 8);
3236 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3241 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
, const void *valbuf
)
3243 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
3245 char to
[MAX_REGISTER_SIZE
];
3246 convert_typed_floating (valbuf
, type
, to
, builtin_type_ia64_ext
);
3247 regcache_cooked_write (regcache
, IA64_FR8_REGNUM
, (void *)to
);
3248 target_store_registers (IA64_FR8_REGNUM
);
3251 regcache_cooked_write (regcache
, IA64_GR8_REGNUM
, valbuf
);
3255 ia64_remote_translate_xfer_address (struct gdbarch
*gdbarch
,
3256 struct regcache
*regcache
,
3257 CORE_ADDR memaddr
, int nr_bytes
,
3258 CORE_ADDR
*targ_addr
, int *targ_len
)
3260 *targ_addr
= memaddr
;
3261 *targ_len
= nr_bytes
;
3265 process_note_abi_tag_sections (bfd
*abfd
, asection
*sect
, void *obj
)
3267 int *os_ident_ptr
= obj
;
3269 unsigned int sectsize
;
3271 name
= bfd_get_section_name (abfd
, sect
);
3272 sectsize
= bfd_section_size (abfd
, sect
);
3273 if (strcmp (name
, ".note.ABI-tag") == 0 && sectsize
> 0)
3275 unsigned int name_length
, data_length
, note_type
;
3276 char *note
= alloca (sectsize
);
3278 bfd_get_section_contents (abfd
, sect
, note
,
3279 (file_ptr
) 0, (bfd_size_type
) sectsize
);
3281 name_length
= bfd_h_get_32 (abfd
, note
);
3282 data_length
= bfd_h_get_32 (abfd
, note
+ 4);
3283 note_type
= bfd_h_get_32 (abfd
, note
+ 8);
3285 if (name_length
== 4 && data_length
== 16 && note_type
== 1
3286 && strcmp (note
+ 12, "GNU") == 0)
3288 int os_number
= bfd_h_get_32 (abfd
, note
+ 16);
3290 /* The case numbers are from abi-tags in glibc. */
3294 *os_ident_ptr
= ELFOSABI_LINUX
;
3297 *os_ident_ptr
= ELFOSABI_HURD
;
3300 *os_ident_ptr
= ELFOSABI_SOLARIS
;
3303 internal_error (__FILE__
, __LINE__
,
3304 "process_note_abi_sections: unknown OS number %d", os_number
);
3312 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3314 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3315 return print_insn_ia64 (memaddr
, info
);
3318 static struct gdbarch
*
3319 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3321 struct gdbarch
*gdbarch
;
3322 struct gdbarch_tdep
*tdep
;
3324 /* If there is already a candidate, use it. */
3325 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3327 return arches
->gdbarch
;
3329 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3330 gdbarch
= gdbarch_alloc (&info
, tdep
);
3332 /* Set the method of obtaining the sigcontext addresses at which
3333 registers are saved. The method of checking to see if
3334 native_find_global_pointer is nonzero to indicate that we're
3335 on AIX is kind of hokey, but I can't think of a better way
3337 if (info
.osabi
== GDB_OSABI_LINUX
)
3338 tdep
->sigcontext_register_address
= ia64_linux_sigcontext_register_address
;
3339 else if (native_find_global_pointer
!= 0)
3340 tdep
->sigcontext_register_address
= ia64_aix_sigcontext_register_address
;
3342 tdep
->sigcontext_register_address
= 0;
3344 /* We know that GNU/Linux won't have to resort to the
3345 native_find_global_pointer hackery. But that's the only one we
3346 know about so far, so if native_find_global_pointer is set to
3347 something non-zero, then use it. Otherwise fall back to using
3348 generic_elf_find_global_pointer. This arrangement should (in
3349 theory) allow us to cross debug GNU/Linux binaries from an AIX
3351 if (info
.osabi
== GDB_OSABI_LINUX
)
3352 tdep
->find_global_pointer
= generic_elf_find_global_pointer
;
3353 else if (native_find_global_pointer
!= 0)
3354 tdep
->find_global_pointer
= native_find_global_pointer
;
3356 tdep
->find_global_pointer
= generic_elf_find_global_pointer
;
3358 /* Define the ia64 floating-point format to gdb. */
3359 builtin_type_ia64_ext
=
3360 init_type (TYPE_CODE_FLT
, 128 / 8,
3361 0, "builtin_type_ia64_ext", NULL
);
3362 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = &floatformat_ia64_ext
;
3364 set_gdbarch_short_bit (gdbarch
, 16);
3365 set_gdbarch_int_bit (gdbarch
, 32);
3366 set_gdbarch_long_bit (gdbarch
, 64);
3367 set_gdbarch_long_long_bit (gdbarch
, 64);
3368 set_gdbarch_float_bit (gdbarch
, 32);
3369 set_gdbarch_double_bit (gdbarch
, 64);
3370 set_gdbarch_long_double_bit (gdbarch
, 128);
3371 set_gdbarch_ptr_bit (gdbarch
, 64);
3373 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3374 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3375 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3376 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3378 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3379 /* FIXME: Following interface should not be needed, however, without it recurse.exp
3380 gets a number of extra failures. */
3381 set_gdbarch_deprecated_register_size (gdbarch
, 8);
3382 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3384 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3385 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3386 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3387 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3388 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3389 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3390 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3392 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3394 set_gdbarch_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
3395 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
3397 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
3398 set_gdbarch_extract_struct_value_address (gdbarch
, ia64_extract_struct_value_address
);
3400 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3401 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3402 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3403 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3404 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3406 /* Settings for calling functions in the inferior. */
3407 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3408 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3409 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3411 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3412 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3413 #ifdef HAVE_LIBUNWIND_IA64_H
3414 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3415 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3417 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3418 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3420 /* Settings that should be unnecessary. */
3421 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3423 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
3424 set_gdbarch_function_start_offset (gdbarch
, 0);
3425 set_gdbarch_frame_args_skip (gdbarch
, 0);
3427 set_gdbarch_remote_translate_xfer_address (
3428 gdbarch
, ia64_remote_translate_xfer_address
);
3430 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3431 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3436 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3439 _initialize_ia64_tdep (void)
3441 register_gdbarch_init (bfd_arch_ia64
, ia64_gdbarch_init
);