gdb/ia64-tdep.c

   1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
   2
   3    Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
   4    2009 Free Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "defs.h"
  22 #include "inferior.h"
  23 #include "gdbcore.h"
  24 #include "arch-utils.h"
  25 #include "floatformat.h"
  26 #include "gdbtypes.h"
  27 #include "regcache.h"
  28 #include "reggroups.h"
  29 #include "frame.h"
  30 #include "frame-base.h"
  31 #include "frame-unwind.h"
  32 #include "doublest.h"
  33 #include "value.h"
  34 #include "gdb_assert.h"
  35 #include "objfiles.h"
  36 #include "elf/common.h"         /* for DT_PLTGOT value */
  37 #include "elf-bfd.h"
  38 #include "dis-asm.h"
  39 #include "infcall.h"
  40 #include "osabi.h"
  41 #include "ia64-tdep.h"
  42 #include "cp-abi.h"
  43
  44 #ifdef HAVE_LIBUNWIND_IA64_H
  45 #include "elf/ia64.h"           /* for PT_IA_64_UNWIND value */
  46 #include "libunwind-frame.h"
  47 #include "libunwind-ia64.h"
  48
  49 /* Note: KERNEL_START is supposed to be an address which is not going
  50          to ever contain any valid unwind info.  For ia64 linux, the choice
  51          of 0xc000000000000000 is fairly safe since that's uncached space.
  52
  53          We use KERNEL_START as follows: after obtaining the kernel's
  54          unwind table via getunwind(), we project its unwind data into
  55          address-range KERNEL_START-(KERNEL_START+ktab_size) and then
  56          when ia64_access_mem() sees a memory access to this
  57          address-range, we redirect it to ktab instead.
  58
  59          None of this hackery is needed with a modern kernel/libcs
  60          which uses the kernel virtual DSO to provide access to the
  61          kernel's unwind info.  In that case, ktab_size remains 0 and
  62          hence the value of KERNEL_START doesn't matter.  */
  63
  64 #define KERNEL_START 0xc000000000000000ULL
  65
  66 static size_t ktab_size = 0;
  67 struct ia64_table_entry
  68   {
  69     uint64_t start_offset;
  70     uint64_t end_offset;
  71     uint64_t info_offset;
  72   };
  73
  74 static struct ia64_table_entry *ktab = NULL;
  75
  76 #endif
  77
  78 /* An enumeration of the different IA-64 instruction types.  */
  79
  80 typedef enum instruction_type
  81 {
  82   A,                    /* Integer ALU ;    I-unit or M-unit */
  83   I,                    /* Non-ALU integer; I-unit */
  84   M,                    /* Memory ;         M-unit */
  85   F,                    /* Floating-point ; F-unit */
  86   B,                    /* Branch ;         B-unit */
  87   L,                    /* Extended (L+X) ; I-unit */
  88   X,                    /* Extended (L+X) ; I-unit */
  89   undefined             /* undefined or reserved */
  90 } instruction_type;
  91
  92 /* We represent IA-64 PC addresses as the value of the instruction
  93    pointer or'd with some bit combination in the low nibble which
  94    represents the slot number in the bundle addressed by the
  95    instruction pointer.  The problem is that the Linux kernel
  96    multiplies its slot numbers (for exceptions) by one while the
  97    disassembler multiplies its slot numbers by 6.  In addition, I've
  98    heard it said that the simulator uses 1 as the multiplier.
  99
 100    I've fixed the disassembler so that the bytes_per_line field will
 101    be the slot multiplier.  If bytes_per_line comes in as zero, it
 102    is set to six (which is how it was set up initially). -- objdump
 103    displays pretty disassembly dumps with this value.  For our purposes,
 104    we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
 105    never want to also display the raw bytes the way objdump does. */
 106
 107 #define SLOT_MULTIPLIER 1
 108
 109 /* Length in bytes of an instruction bundle */
 110
 111 #define BUNDLE_LEN 16
 112
 113 /* See the saved memory layout comment for ia64_memory_insert_breakpoint.  */
 114
 115 #if BREAKPOINT_MAX < BUNDLE_LEN - 2
 116 # error "BREAKPOINT_MAX < BUNDLE_LEN - 2"
 117 #endif
 118
 119 static gdbarch_init_ftype ia64_gdbarch_init;
 120
 121 static gdbarch_register_name_ftype ia64_register_name;
 122 static gdbarch_register_type_ftype ia64_register_type;
 123 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc;
 124 static gdbarch_skip_prologue_ftype ia64_skip_prologue;
 125 static struct type *is_float_or_hfa_type (struct type *t);
 126 static CORE_ADDR ia64_find_global_pointer (CORE_ADDR faddr);
 127
 128 #define NUM_IA64_RAW_REGS 462
 129
 130 static int sp_regnum = IA64_GR12_REGNUM;
 131 static int fp_regnum = IA64_VFP_REGNUM;
 132 static int lr_regnum = IA64_VRAP_REGNUM;
 133
 134 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
 135    they may not be accessible via the ptrace register get/set interfaces.  */
 136 enum pseudo_regs { FIRST_PSEUDO_REGNUM = NUM_IA64_RAW_REGS, VBOF_REGNUM = IA64_NAT127_REGNUM + 1, V32_REGNUM,
 137                    V127_REGNUM = V32_REGNUM + 95,
 138                    VP0_REGNUM, VP16_REGNUM = VP0_REGNUM + 16, VP63_REGNUM = VP0_REGNUM + 63, LAST_PSEUDO_REGNUM };
 139
 140 /* Array of register names; There should be ia64_num_regs strings in
 141    the initializer.  */
 142
 143 static char *ia64_register_names[] =
 144 { "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
 145   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
 146   "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
 147   "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
 148   "",     "",     "",     "",     "",     "",     "",     "",
 149   "",     "",     "",     "",     "",     "",     "",     "",
 150   "",     "",     "",     "",     "",     "",     "",     "",
 151   "",     "",     "",     "",     "",     "",     "",     "",
 152   "",     "",     "",     "",     "",     "",     "",     "",
 153   "",     "",     "",     "",     "",     "",     "",     "",
 154   "",     "",     "",     "",     "",     "",     "",     "",
 155   "",     "",     "",     "",     "",     "",     "",     "",
 156   "",     "",     "",     "",     "",     "",     "",     "",
 157   "",     "",     "",     "",     "",     "",     "",     "",
 158   "",     "",     "",     "",     "",     "",     "",     "",
 159   "",     "",     "",     "",     "",     "",     "",     "",
 160
 161   "f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7",
 162   "f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15",
 163   "f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",
 164   "f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",
 165   "f32",  "f33",  "f34",  "f35",  "f36",  "f37",  "f38",  "f39",
 166   "f40",  "f41",  "f42",  "f43",  "f44",  "f45",  "f46",  "f47",
 167   "f48",  "f49",  "f50",  "f51",  "f52",  "f53",  "f54",  "f55",
 168   "f56",  "f57",  "f58",  "f59",  "f60",  "f61",  "f62",  "f63",
 169   "f64",  "f65",  "f66",  "f67",  "f68",  "f69",  "f70",  "f71",
 170   "f72",  "f73",  "f74",  "f75",  "f76",  "f77",  "f78",  "f79",
 171   "f80",  "f81",  "f82",  "f83",  "f84",  "f85",  "f86",  "f87",
 172   "f88",  "f89",  "f90",  "f91",  "f92",  "f93",  "f94",  "f95",
 173   "f96",  "f97",  "f98",  "f99",  "f100", "f101", "f102", "f103",
 174   "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
 175   "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
 176   "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
 177
 178   "",     "",     "",     "",     "",     "",     "",     "",
 179   "",     "",     "",     "",     "",     "",     "",     "",
 180   "",     "",     "",     "",     "",     "",     "",     "",
 181   "",     "",     "",     "",     "",     "",     "",     "",
 182   "",     "",     "",     "",     "",     "",     "",     "",
 183   "",     "",     "",     "",     "",     "",     "",     "",
 184   "",     "",     "",     "",     "",     "",     "",     "",
 185   "",     "",     "",     "",     "",     "",     "",     "",
 186
 187   "b0",   "b1",   "b2",   "b3",   "b4",   "b5",   "b6",   "b7",
 188
 189   "vfp", "vrap",
 190
 191   "pr", "ip", "psr", "cfm",
 192
 193   "kr0",   "kr1",   "kr2",   "kr3",   "kr4",   "kr5",   "kr6",   "kr7",
 194   "", "", "", "", "", "", "", "",
 195   "rsc", "bsp", "bspstore", "rnat",
 196   "", "fcr", "", "",
 197   "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr",  "",
 198   "ccv", "", "", "", "unat", "", "", "",
 199   "fpsr", "", "", "", "itc",
 200   "", "", "", "", "", "", "", "", "", "",
 201   "", "", "", "", "", "", "", "", "",
 202   "pfs", "lc", "ec",
 203   "", "", "", "", "", "", "", "", "", "",
 204   "", "", "", "", "", "", "", "", "", "",
 205   "", "", "", "", "", "", "", "", "", "",
 206   "", "", "", "", "", "", "", "", "", "",
 207   "", "", "", "", "", "", "", "", "", "",
 208   "", "", "", "", "", "", "", "", "", "",
 209   "",
 210   "nat0",  "nat1",  "nat2",  "nat3",  "nat4",  "nat5",  "nat6",  "nat7",
 211   "nat8",  "nat9",  "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
 212   "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
 213   "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
 214   "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
 215   "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
 216   "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
 217   "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
 218   "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
 219   "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
 220   "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
 221   "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
 222   "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
 223   "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
 224   "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
 225   "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
 226
 227   "bof",
 228
 229   "r32",  "r33",  "r34",  "r35",  "r36",  "r37",  "r38",  "r39",
 230   "r40",  "r41",  "r42",  "r43",  "r44",  "r45",  "r46",  "r47",
 231   "r48",  "r49",  "r50",  "r51",  "r52",  "r53",  "r54",  "r55",
 232   "r56",  "r57",  "r58",  "r59",  "r60",  "r61",  "r62",  "r63",
 233   "r64",  "r65",  "r66",  "r67",  "r68",  "r69",  "r70",  "r71",
 234   "r72",  "r73",  "r74",  "r75",  "r76",  "r77",  "r78",  "r79",
 235   "r80",  "r81",  "r82",  "r83",  "r84",  "r85",  "r86",  "r87",
 236   "r88",  "r89",  "r90",  "r91",  "r92",  "r93",  "r94",  "r95",
 237   "r96",  "r97",  "r98",  "r99",  "r100", "r101", "r102", "r103",
 238   "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
 239   "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
 240   "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
 241
 242   "p0",   "p1",   "p2",   "p3",   "p4",   "p5",   "p6",   "p7",
 243   "p8",   "p9",   "p10",  "p11",  "p12",  "p13",  "p14",  "p15",
 244   "p16",  "p17",  "p18",  "p19",  "p20",  "p21",  "p22",  "p23",
 245   "p24",  "p25",  "p26",  "p27",  "p28",  "p29",  "p30",  "p31",
 246   "p32",  "p33",  "p34",  "p35",  "p36",  "p37",  "p38",  "p39",
 247   "p40",  "p41",  "p42",  "p43",  "p44",  "p45",  "p46",  "p47",
 248   "p48",  "p49",  "p50",  "p51",  "p52",  "p53",  "p54",  "p55",
 249   "p56",  "p57",  "p58",  "p59",  "p60",  "p61",  "p62",  "p63",
 250 };
 251
 252 struct ia64_frame_cache
 253 {
 254   CORE_ADDR base;       /* frame pointer base for frame */
 255   CORE_ADDR pc;         /* function start pc for frame */
 256   CORE_ADDR saved_sp;   /* stack pointer for frame */
 257   CORE_ADDR bsp;        /* points at r32 for the current frame */
 258   CORE_ADDR cfm;        /* cfm value for current frame */
 259   CORE_ADDR prev_cfm;   /* cfm value for previous frame */
 260   int   frameless;
 261   int   sof;            /* Size of frame  (decoded from cfm value) */
 262   int   sol;            /* Size of locals (decoded from cfm value) */
 263   int   sor;            /* Number of rotating registers. (decoded from cfm value) */
 264   CORE_ADDR after_prologue;
 265   /* Address of first instruction after the last
 266      prologue instruction;  Note that there may
 267      be instructions from the function's body
 268      intermingled with the prologue. */
 269   int mem_stack_frame_size;
 270   /* Size of the memory stack frame (may be zero),
 271      or -1 if it has not been determined yet. */
 272   int   fp_reg;         /* Register number (if any) used a frame pointer
 273                            for this frame.  0 if no register is being used
 274                            as the frame pointer. */
 275
 276   /* Saved registers.  */
 277   CORE_ADDR saved_regs[NUM_IA64_RAW_REGS];
 278
 279 };
 280
 281 static int
 282 floatformat_valid (const struct floatformat *fmt, const void *from)
 283 {
 284   return 1;
 285 }
 286
 287 static const struct floatformat floatformat_ia64_ext =
 288 {
 289   floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
 290   floatformat_intbit_yes, "floatformat_ia64_ext", floatformat_valid, NULL
 291 };
 292
 293 static const struct floatformat *floatformats_ia64_ext[2] =
 294 {
 295   &floatformat_ia64_ext,
 296   &floatformat_ia64_ext
 297 };
 298
 299 static struct type *
 300 ia64_ext_type (struct gdbarch *gdbarch)
 301 {
 302   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 303
 304   if (!tdep->ia64_ext_type)
 305     tdep->ia64_ext_type
 306       = arch_float_type (gdbarch, 128, "builtin_type_ia64_ext",
 307                          floatformats_ia64_ext);
 308
 309   return tdep->ia64_ext_type;
 310 }
 311
 312 static int
 313 ia64_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 314                           struct reggroup *group)
 315 {
 316   int vector_p;
 317   int float_p;
 318   int raw_p;
 319   if (group == all_reggroup)
 320     return 1;
 321   vector_p = TYPE_VECTOR (register_type (gdbarch, regnum));
 322   float_p = TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT;
 323   raw_p = regnum < NUM_IA64_RAW_REGS;
 324   if (group == float_reggroup)
 325     return float_p;
 326   if (group == vector_reggroup)
 327     return vector_p;
 328   if (group == general_reggroup)
 329     return (!vector_p && !float_p);
 330   if (group == save_reggroup || group == restore_reggroup)
 331     return raw_p;
 332   return 0;
 333 }
 334
 335 static const char *
 336 ia64_register_name (struct gdbarch *gdbarch, int reg)
 337 {
 338   return ia64_register_names[reg];
 339 }
 340
 341 struct type *
 342 ia64_register_type (struct gdbarch *arch, int reg)
 343 {
 344   if (reg >= IA64_FR0_REGNUM && reg <= IA64_FR127_REGNUM)
 345     return ia64_ext_type (arch);
 346   else
 347     return builtin_type (arch)->builtin_long;
 348 }
 349
 350 static int
 351 ia64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
 352 {
 353   if (reg >= IA64_GR32_REGNUM && reg <= IA64_GR127_REGNUM)
 354     return V32_REGNUM + (reg - IA64_GR32_REGNUM);
 355   return reg;
 356 }
 357
 358
 359 /* Extract ``len'' bits from an instruction bundle starting at
 360    bit ``from''.  */
 361
 362 static long long
 363 extract_bit_field (const char *bundle, int from, int len)
 364 {
 365   long long result = 0LL;
 366   int to = from + len;
 367   int from_byte = from / 8;
 368   int to_byte = to / 8;
 369   unsigned char *b = (unsigned char *) bundle;
 370   unsigned char c;
 371   int lshift;
 372   int i;
 373
 374   c = b[from_byte];
 375   if (from_byte == to_byte)
 376     c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
 377   result = c >> (from % 8);
 378   lshift = 8 - (from % 8);
 379
 380   for (i = from_byte+1; i < to_byte; i++)
 381     {
 382       result |= ((long long) b[i]) << lshift;
 383       lshift += 8;
 384     }
 385
 386   if (from_byte < to_byte && (to % 8 != 0))
 387     {
 388       c = b[to_byte];
 389       c = ((unsigned char) (c << (8 - to % 8))) >> (8 - to % 8);
 390       result |= ((long long) c) << lshift;
 391     }
 392
 393   return result;
 394 }
 395
 396 /* Replace the specified bits in an instruction bundle */
 397
 398 static void
 399 replace_bit_field (char *bundle, long long val, int from, int len)
 400 {
 401   int to = from + len;
 402   int from_byte = from / 8;
 403   int to_byte = to / 8;
 404   unsigned char *b = (unsigned char *) bundle;
 405   unsigned char c;
 406
 407   if (from_byte == to_byte)
 408     {
 409       unsigned char left, right;
 410       c = b[from_byte];
 411       left = (c >> (to % 8)) << (to % 8);
 412       right = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
 413       c = (unsigned char) (val & 0xff);
 414       c = (unsigned char) (c << (from % 8 + 8 - to % 8)) >> (8 - to % 8);
 415       c |= right | left;
 416       b[from_byte] = c;
 417     }
 418   else
 419     {
 420       int i;
 421       c = b[from_byte];
 422       c = ((unsigned char) (c << (8 - from % 8))) >> (8 - from % 8);
 423       c = c | (val << (from % 8));
 424       b[from_byte] = c;
 425       val >>= 8 - from % 8;
 426
 427       for (i = from_byte+1; i < to_byte; i++)
 428         {
 429           c = val & 0xff;
 430           val >>= 8;
 431           b[i] = c;
 432         }
 433
 434       if (to % 8 != 0)
 435         {
 436           unsigned char cv = (unsigned char) val;
 437           c = b[to_byte];
 438           c = c >> (to % 8) << (to % 8);
 439           c |= ((unsigned char) (cv << (8 - to % 8))) >> (8 - to % 8);
 440           b[to_byte] = c;
 441         }
 442     }
 443 }
 444
 445 /* Return the contents of slot N (for N = 0, 1, or 2) in
 446    and instruction bundle */
 447
 448 static long long
 449 slotN_contents (char *bundle, int slotnum)
 450 {
 451   return extract_bit_field (bundle, 5+41*slotnum, 41);
 452 }
 453
 454 /* Store an instruction in an instruction bundle */
 455
 456 static void
 457 replace_slotN_contents (char *bundle, long long instr, int slotnum)
 458 {
 459   replace_bit_field (bundle, instr, 5+41*slotnum, 41);
 460 }
 461
 462 static const enum instruction_type template_encoding_table[32][3] =
 463 {
 464   { M, I, I },                          /* 00 */
 465   { M, I, I },                          /* 01 */
 466   { M, I, I },                          /* 02 */
 467   { M, I, I },                          /* 03 */
 468   { M, L, X },                          /* 04 */
 469   { M, L, X },                          /* 05 */
 470   { undefined, undefined, undefined },  /* 06 */
 471   { undefined, undefined, undefined },  /* 07 */
 472   { M, M, I },                          /* 08 */
 473   { M, M, I },                          /* 09 */
 474   { M, M, I },                          /* 0A */
 475   { M, M, I },                          /* 0B */
 476   { M, F, I },                          /* 0C */
 477   { M, F, I },                          /* 0D */
 478   { M, M, F },                          /* 0E */
 479   { M, M, F },                          /* 0F */
 480   { M, I, B },                          /* 10 */
 481   { M, I, B },                          /* 11 */
 482   { M, B, B },                          /* 12 */
 483   { M, B, B },                          /* 13 */
 484   { undefined, undefined, undefined },  /* 14 */
 485   { undefined, undefined, undefined },  /* 15 */
 486   { B, B, B },                          /* 16 */
 487   { B, B, B },                          /* 17 */
 488   { M, M, B },                          /* 18 */
 489   { M, M, B },                          /* 19 */
 490   { undefined, undefined, undefined },  /* 1A */
 491   { undefined, undefined, undefined },  /* 1B */
 492   { M, F, B },                          /* 1C */
 493   { M, F, B },                          /* 1D */
 494   { undefined, undefined, undefined },  /* 1E */
 495   { undefined, undefined, undefined },  /* 1F */
 496 };
 497
 498 /* Fetch and (partially) decode an instruction at ADDR and return the
 499    address of the next instruction to fetch.  */
 500
 501 static CORE_ADDR
 502 fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr)
 503 {
 504   char bundle[BUNDLE_LEN];
 505   int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
 506   long long template;
 507   int val;
 508
 509   /* Warn about slot numbers greater than 2.  We used to generate
 510      an error here on the assumption that the user entered an invalid
 511      address.  But, sometimes GDB itself requests an invalid address.
 512      This can (easily) happen when execution stops in a function for
 513      which there are no symbols.  The prologue scanner will attempt to
 514      find the beginning of the function - if the nearest symbol
 515      happens to not be aligned on a bundle boundary (16 bytes), the
 516      resulting starting address will cause GDB to think that the slot
 517      number is too large.
 518
 519      So we warn about it and set the slot number to zero.  It is
 520      not necessarily a fatal condition, particularly if debugging
 521      at the assembly language level.  */
 522   if (slotnum > 2)
 523     {
 524       warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
 525                "Using slot 0 instead"));
 526       slotnum = 0;
 527     }
 528
 529   addr &= ~0x0f;
 530
 531   val = target_read_memory (addr, bundle, BUNDLE_LEN);
 532
 533   if (val != 0)
 534     return 0;
 535
 536   *instr = slotN_contents (bundle, slotnum);
 537   template = extract_bit_field (bundle, 0, 5);
 538   *it = template_encoding_table[(int)template][slotnum];
 539
 540   if (slotnum == 2 || (slotnum == 1 && *it == L))
 541     addr += 16;
 542   else
 543     addr += (slotnum + 1) * SLOT_MULTIPLIER;
 544
 545   return addr;
 546 }
 547
 548 /* There are 5 different break instructions (break.i, break.b,
 549    break.m, break.f, and break.x), but they all have the same
 550    encoding.  (The five bit template in the low five bits of the
 551    instruction bundle distinguishes one from another.)
 552
 553    The runtime architecture manual specifies that break instructions
 554    used for debugging purposes must have the upper two bits of the 21
 555    bit immediate set to a 0 and a 1 respectively.  A breakpoint
 556    instruction encodes the most significant bit of its 21 bit
 557    immediate at bit 36 of the 41 bit instruction.  The penultimate msb
 558    is at bit 25 which leads to the pattern below.
 559
 560    Originally, I had this set up to do, e.g, a "break.i 0x80000"  But
 561    it turns out that 0x80000 was used as the syscall break in the early
 562    simulators.  So I changed the pattern slightly to do "break.i 0x080001"
 563    instead.  But that didn't work either (I later found out that this
 564    pattern was used by the simulator that I was using.)  So I ended up
 565    using the pattern seen below.
 566
 567    SHADOW_CONTENTS has byte-based addressing (PLACED_ADDRESS and SHADOW_LEN)
 568    while we need bit-based addressing as the instructions length is 41 bits and
 569    we must not modify/corrupt the adjacent slots in the same bundle.
 570    Fortunately we may store larger memory incl. the adjacent bits with the
 571    original memory content (not the possibly already stored breakpoints there).
 572    We need to be careful in ia64_memory_remove_breakpoint to always restore
 573    only the specific bits of this instruction ignoring any adjacent stored
 574    bits.
 575
 576    We use the original addressing with the low nibble in the range <0..2> which
 577    gets incorrectly interpreted by generic non-ia64 breakpoint_restore_shadows
 578    as the direct byte offset of SHADOW_CONTENTS.  We store whole BUNDLE_LEN
 579    bytes just without these two possibly skipped bytes to not to exceed to the
 580    next bundle.
 581
 582    If we would like to store the whole bundle to SHADOW_CONTENTS we would have
 583    to store already the base address (`address & ~0x0f') into PLACED_ADDRESS.
 584    In such case there is no other place where to store
 585    SLOTNUM (`adress & 0x0f', value in the range <0..2>).  We need to know
 586    SLOTNUM in ia64_memory_remove_breakpoint.
 587
 588    ia64 16-byte bundle layout:
 589    | 5 bits | slot 0 with 41 bits | slot 1 with 41 bits | slot 2 with 41 bits |
 590
 591    The current addressing used by the code below:
 592    original PC   placed_address   placed_size             required    covered
 593                                   == bp_tgt->shadow_len   reqd \subset covered
 594    0xABCDE0      0xABCDE0         0xE                     <0x0...0x5> <0x0..0xD>
 595    0xABCDE1      0xABCDE1         0xE                     <0x5...0xA> <0x1..0xE>
 596    0xABCDE2      0xABCDE2         0xE                     <0xA...0xF> <0x2..0xF>
 597
 598    `objdump -d' and some other tools show a bit unjustified offsets:
 599    original PC   byte where starts the instruction   objdump offset
 600    0xABCDE0      0xABCDE0                            0xABCDE0
 601    0xABCDE1      0xABCDE5                            0xABCDE6
 602    0xABCDE2      0xABCDEA                            0xABCDEC
 603    */
 604
 605 #define IA64_BREAKPOINT 0x00003333300LL
 606
 607 static int
 608 ia64_memory_insert_breakpoint (struct gdbarch *gdbarch,
 609                                struct bp_target_info *bp_tgt)
 610 {
 611   CORE_ADDR addr = bp_tgt->placed_address;
 612   gdb_byte bundle[BUNDLE_LEN];
 613   int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER;
 614   long long instr_breakpoint;
 615   int val;
 616   int template;
 617   struct cleanup *cleanup;
 618
 619   if (slotnum > 2)
 620     error (_("Can't insert breakpoint for slot numbers greater than 2."));
 621
 622   addr &= ~0x0f;
 623
 624   /* Disable the automatic memory restoration from breakpoints while
 625      we read our instruction bundle.  Otherwise, the general restoration
 626      mechanism kicks in and we would possibly remove parts of the adjacent
 627      placed breakpoints.  It is due to our SHADOW_CONTENTS overlapping the real
 628      breakpoint instruction bits region.  */
 629   cleanup = make_show_memory_breakpoints_cleanup (1);
 630   val = target_read_memory (addr, bundle, BUNDLE_LEN);
 631
 632   /* Check for L type instruction in slot 1, if present then bump up the slot
 633      number to the slot 2.  */
 634   template = extract_bit_field (bundle, 0, 5);
 635   if (slotnum == 1 && template_encoding_table[template][slotnum] == L)
 636     slotnum = 2;
 637
 638   /* Slot number 2 may skip at most 2 bytes at the beginning.  */
 639   bp_tgt->placed_size = bp_tgt->shadow_len = BUNDLE_LEN - 2;
 640
 641   /* Store the whole bundle, except for the initial skipped bytes by the slot
 642      number interpreted as bytes offset in PLACED_ADDRESS.  */
 643   memcpy (bp_tgt->shadow_contents, bundle + slotnum, bp_tgt->shadow_len);
 644
 645   /* Breakpoints already present in the code will get deteacted and not get
 646      reinserted by bp_loc_is_permanent.  Multiple breakpoints at the same
 647      location cannot induce the internal error as they are optimized into
 648      a single instance by update_global_location_list.  */
 649   instr_breakpoint = slotN_contents (bundle, slotnum);
 650   if (instr_breakpoint == IA64_BREAKPOINT)
 651     internal_error (__FILE__, __LINE__,
 652                     _("Address %s already contains a breakpoint."),
 653                     paddr_nz (bp_tgt->placed_address));
 654   replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum);
 655
 656   if (val == 0)
 657     val = target_write_memory (addr + slotnum, bundle + slotnum,
 658                                bp_tgt->shadow_len);
 659
 660   do_cleanups (cleanup);
 661   return val;
 662 }
 663
 664 static int
 665 ia64_memory_remove_breakpoint (struct gdbarch *gdbarch,
 666                                struct bp_target_info *bp_tgt)
 667 {
 668   CORE_ADDR addr = bp_tgt->placed_address;
 669   gdb_byte bundle_mem[BUNDLE_LEN], bundle_saved[BUNDLE_LEN];
 670   int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER;
 671   long long instr_breakpoint, instr_saved;
 672   int val;
 673   int template;
 674   struct cleanup *cleanup;
 675
 676   addr &= ~0x0f;
 677
 678   /* Disable the automatic memory restoration from breakpoints while
 679      we read our instruction bundle.  Otherwise, the general restoration
 680      mechanism kicks in and we would possibly remove parts of the adjacent
 681      placed breakpoints.  It is due to our SHADOW_CONTENTS overlapping the real
 682      breakpoint instruction bits region.  */
 683   cleanup = make_show_memory_breakpoints_cleanup (1);
 684   val = target_read_memory (addr, bundle_mem, BUNDLE_LEN);
 685
 686   /* Check for L type instruction in slot 1, if present then bump up the slot
 687      number to the slot 2.  */
 688   template = extract_bit_field (bundle_mem, 0, 5);
 689   if (slotnum == 1 && template_encoding_table[template][slotnum] == L)
 690     slotnum = 2;
 691
 692   gdb_assert (bp_tgt->placed_size == BUNDLE_LEN - 2);
 693   gdb_assert (bp_tgt->placed_size == bp_tgt->shadow_len);
 694
 695   instr_breakpoint = slotN_contents (bundle_mem, slotnum);
 696   if (instr_breakpoint != IA64_BREAKPOINT)
 697     {
 698       warning (_("Cannot remove breakpoint at address %s, "
 699                  "no break instruction at such address."),
 700                paddr_nz (bp_tgt->placed_address));
 701       return -1;
 702     }
 703
 704   /* Extract the original saved instruction from SLOTNUM normalizing its
 705      bit-shift for INSTR_SAVED.  */
 706   memcpy (bundle_saved, bundle_mem, BUNDLE_LEN);
 707   memcpy (bundle_saved + slotnum, bp_tgt->shadow_contents, bp_tgt->shadow_len);
 708   instr_saved = slotN_contents (bundle_saved, slotnum);
 709
 710   /* In BUNDLE_MEM be careful to modify only the bits belonging to SLOTNUM and
 711      never any other possibly also stored in SHADOW_CONTENTS.  */
 712   replace_slotN_contents (bundle_mem, instr_saved, slotnum);
 713   if (val == 0)
 714     val = target_write_memory (addr, bundle_mem, BUNDLE_LEN);
 715
 716   do_cleanups (cleanup);
 717   return val;
 718 }
 719
 720 /* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
 721    instruction slots ranges are bit-granular (41 bits) we have to provide an
 722    extended range as described for ia64_memory_insert_breakpoint.  We also take
 723    care of preserving the `break' instruction 21-bit (or 62-bit) parameter to
 724    make a match for permanent breakpoints.  */
 725
 726 static const gdb_byte *
 727 ia64_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
 728 {
 729   CORE_ADDR addr = *pcptr;
 730   static gdb_byte bundle[BUNDLE_LEN];
 731   int slotnum = (int) (*pcptr & 0x0f) / SLOT_MULTIPLIER;
 732   long long instr_fetched;
 733   int val;
 734   int template;
 735   struct cleanup *cleanup;
 736
 737   if (slotnum > 2)
 738     error (_("Can't insert breakpoint for slot numbers greater than 2."));
 739
 740   addr &= ~0x0f;
 741
 742   /* Enable the automatic memory restoration from breakpoints while
 743      we read our instruction bundle to match bp_loc_is_permanent.  */
 744   cleanup = make_show_memory_breakpoints_cleanup (0);
 745   val = target_read_memory (addr, bundle, BUNDLE_LEN);
 746   do_cleanups (cleanup);
 747
 748   /* The memory might be unreachable.  This can happen, for instance,
 749      when the user inserts a breakpoint at an invalid address.  */
 750   if (val != 0)
 751     return NULL;
 752
 753   /* Check for L type instruction in slot 1, if present then bump up the slot
 754      number to the slot 2.  */
 755   template = extract_bit_field (bundle, 0, 5);
 756   if (slotnum == 1 && template_encoding_table[template][slotnum] == L)
 757     slotnum = 2;
 758
 759   /* A break instruction has its all its opcode bits cleared except for
 760      the parameter value.  For L+X slot pair we are at the X slot (slot 2) so
 761      we should not touch the L slot - the upper 41 bits of the parameter.  */
 762   instr_fetched = slotN_contents (bundle, slotnum);
 763   instr_fetched &= 0x1003ffffc0LL;
 764   replace_slotN_contents (bundle, instr_fetched, slotnum);
 765
 766   *lenptr = BUNDLE_LEN - 2;
 767
 768   /* SLOTNUM is possibly already locally modified - use caller's *PCPTR.  */
 769   return bundle + (*pcptr & 0x0f);
 770 }
 771
 772 static CORE_ADDR
 773 ia64_read_pc (struct regcache *regcache)
 774 {
 775   ULONGEST psr_value, pc_value;
 776   int slot_num;
 777
 778   regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value);
 779   regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &pc_value);
 780   slot_num = (psr_value >> 41) & 3;
 781
 782   return pc_value | (slot_num * SLOT_MULTIPLIER);
 783 }
 784
 785 void
 786 ia64_write_pc (struct regcache *regcache, CORE_ADDR new_pc)
 787 {
 788   int slot_num = (int) (new_pc & 0xf) / SLOT_MULTIPLIER;
 789   ULONGEST psr_value;
 790
 791   regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value);
 792   psr_value &= ~(3LL << 41);
 793   psr_value |= (ULONGEST)(slot_num & 0x3) << 41;
 794
 795   new_pc &= ~0xfLL;
 796
 797   regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr_value);
 798   regcache_cooked_write_unsigned (regcache, IA64_IP_REGNUM, new_pc);
 799 }
 800
 801 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
 802
 803 /* Returns the address of the slot that's NSLOTS slots away from
 804    the address ADDR. NSLOTS may be positive or negative. */
 805 static CORE_ADDR
 806 rse_address_add(CORE_ADDR addr, int nslots)
 807 {
 808   CORE_ADDR new_addr;
 809   int mandatory_nat_slots = nslots / 63;
 810   int direction = nslots < 0 ? -1 : 1;
 811
 812   new_addr = addr + 8 * (nslots + mandatory_nat_slots);
 813
 814   if ((new_addr >> 9)  != ((addr + 8 * 64 * mandatory_nat_slots) >> 9))
 815     new_addr += 8 * direction;
 816
 817   if (IS_NaT_COLLECTION_ADDR(new_addr))
 818     new_addr += 8 * direction;
 819
 820   return new_addr;
 821 }
 822
 823 static void
 824 ia64_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
 825                            int regnum, gdb_byte *buf)
 826 {
 827   if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
 828     {
 829 #ifdef HAVE_LIBUNWIND_IA64_H
 830       /* First try and use the libunwind special reg accessor, otherwise fallback to
 831          standard logic.  */
 832       if (!libunwind_is_initialized ()
 833           || libunwind_get_reg_special (gdbarch, regcache, regnum, buf) != 0)
 834 #endif
 835         {
 836           /* The fallback position is to assume that r32-r127 are found sequentially
 837              in memory starting at $bof.  This isn't always true, but without libunwind,
 838              this is the best we can do.  */
 839           ULONGEST cfm;
 840           ULONGEST bsp;
 841           CORE_ADDR reg;
 842           regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
 843           regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
 844
 845           /* The bsp points at the end of the register frame so we
 846              subtract the size of frame from it to get start of register frame.  */
 847           bsp = rse_address_add (bsp, -(cfm & 0x7f));
 848
 849           if ((cfm & 0x7f) > regnum - V32_REGNUM)
 850             {
 851               ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
 852               reg = read_memory_integer ((CORE_ADDR)reg_addr, 8);
 853               store_unsigned_integer (buf, register_size (gdbarch, regnum), reg);
 854             }
 855           else
 856             store_unsigned_integer (buf, register_size (gdbarch, regnum), 0);
 857         }
 858     }
 859   else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
 860     {
 861       ULONGEST unatN_val;
 862       ULONGEST unat;
 863       regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat);
 864       unatN_val = (unat & (1LL << (regnum - IA64_NAT0_REGNUM))) != 0;
 865       store_unsigned_integer (buf, register_size (gdbarch, regnum), unatN_val);
 866     }
 867   else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
 868     {
 869       ULONGEST natN_val = 0;
 870       ULONGEST bsp;
 871       ULONGEST cfm;
 872       CORE_ADDR gr_addr = 0;
 873       regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
 874       regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
 875
 876       /* The bsp points at the end of the register frame so we
 877          subtract the size of frame from it to get start of register frame.  */
 878       bsp = rse_address_add (bsp, -(cfm & 0x7f));
 879
 880       if ((cfm & 0x7f) > regnum - V32_REGNUM)
 881         gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
 882
 883       if (gr_addr != 0)
 884         {
 885           /* Compute address of nat collection bits.  */
 886           CORE_ADDR nat_addr = gr_addr | 0x1f8;
 887           CORE_ADDR nat_collection;
 888           int nat_bit;
 889           /* If our nat collection address is bigger than bsp, we have to get
 890              the nat collection from rnat.  Otherwise, we fetch the nat
 891              collection from the computed address.  */
 892           if (nat_addr >= bsp)
 893             regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection);
 894           else
 895             nat_collection = read_memory_integer (nat_addr, 8);
 896           nat_bit = (gr_addr >> 3) & 0x3f;
 897           natN_val = (nat_collection >> nat_bit) & 1;
 898         }
 899
 900       store_unsigned_integer (buf, register_size (gdbarch, regnum), natN_val);
 901     }
 902   else if (regnum == VBOF_REGNUM)
 903     {
 904       /* A virtual register frame start is provided for user convenience.
 905          It can be calculated as the bsp - sof (sizeof frame). */
 906       ULONGEST bsp, vbsp;
 907       ULONGEST cfm;
 908       CORE_ADDR reg;
 909       regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
 910       regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
 911
 912       /* The bsp points at the end of the register frame so we
 913          subtract the size of frame from it to get beginning of frame.  */
 914       vbsp = rse_address_add (bsp, -(cfm & 0x7f));
 915       store_unsigned_integer (buf, register_size (gdbarch, regnum), vbsp);
 916     }
 917   else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
 918     {
 919       ULONGEST pr;
 920       ULONGEST cfm;
 921       ULONGEST prN_val;
 922       CORE_ADDR reg;
 923       regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr);
 924       regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
 925
 926       if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
 927         {
 928           /* Fetch predicate register rename base from current frame
 929              marker for this frame. */
 930           int rrb_pr = (cfm >> 32) & 0x3f;
 931
 932           /* Adjust the register number to account for register rotation. */
 933           regnum = VP16_REGNUM
 934                  + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
 935         }
 936       prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0;
 937       store_unsigned_integer (buf, register_size (gdbarch, regnum), prN_val);
 938     }
 939   else
 940     memset (buf, 0, register_size (gdbarch, regnum));
 941 }
 942
 943 static void
 944 ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
 945                             int regnum, const gdb_byte *buf)
 946 {
 947   if (regnum >= V32_REGNUM && regnum <= V127_REGNUM)
 948     {
 949       ULONGEST bsp;
 950       ULONGEST cfm;
 951       CORE_ADDR reg;
 952       regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
 953       regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
 954
 955       bsp = rse_address_add (bsp, -(cfm & 0x7f));
 956
 957       if ((cfm & 0x7f) > regnum - V32_REGNUM)
 958         {
 959           ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
 960           write_memory (reg_addr, (void *)buf, 8);
 961         }
 962     }
 963   else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
 964     {
 965       ULONGEST unatN_val, unat, unatN_mask;
 966       regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat);
 967       unatN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum));
 968       unatN_mask = (1LL << (regnum - IA64_NAT0_REGNUM));
 969       if (unatN_val == 0)
 970         unat &= ~unatN_mask;
 971       else if (unatN_val == 1)
 972         unat |= unatN_mask;
 973       regcache_cooked_write_unsigned (regcache, IA64_UNAT_REGNUM, unat);
 974     }
 975   else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
 976     {
 977       ULONGEST natN_val;
 978       ULONGEST bsp;
 979       ULONGEST cfm;
 980       CORE_ADDR gr_addr = 0;
 981       regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
 982       regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
 983
 984       /* The bsp points at the end of the register frame so we
 985          subtract the size of frame from it to get start of register frame.  */
 986       bsp = rse_address_add (bsp, -(cfm & 0x7f));
 987
 988       if ((cfm & 0x7f) > regnum - V32_REGNUM)
 989         gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
 990
 991       natN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum));
 992
 993       if (gr_addr != 0 && (natN_val == 0 || natN_val == 1))
 994         {
 995           /* Compute address of nat collection bits.  */
 996           CORE_ADDR nat_addr = gr_addr | 0x1f8;
 997           CORE_ADDR nat_collection;
 998           int natN_bit = (gr_addr >> 3) & 0x3f;
 999           ULONGEST natN_mask = (1LL << natN_bit);
1000           /* If our nat collection address is bigger than bsp, we have to get
1001              the nat collection from rnat.  Otherwise, we fetch the nat
1002              collection from the computed address.  */
1003           if (nat_addr >= bsp)
1004             {
1005               regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection);
1006               if (natN_val)
1007                 nat_collection |= natN_mask;
1008               else
1009                 nat_collection &= ~natN_mask;
1010               regcache_cooked_write_unsigned (regcache, IA64_RNAT_REGNUM, nat_collection);
1011             }
1012           else
1013             {
1014               char nat_buf[8];
1015               nat_collection = read_memory_integer (nat_addr, 8);
1016               if (natN_val)
1017                 nat_collection |= natN_mask;
1018               else
1019                 nat_collection &= ~natN_mask;
1020               store_unsigned_integer (nat_buf, register_size (gdbarch, regnum), nat_collection);
1021               write_memory (nat_addr, nat_buf, 8);
1022             }
1023         }
1024     }
1025   else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
1026     {
1027       ULONGEST pr;
1028       ULONGEST cfm;
1029       ULONGEST prN_val;
1030       ULONGEST prN_mask;
1031
1032       regcache_cooked_read_unsigned (regcache, IA64_PR_REGNUM, &pr);
1033       regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
1034
1035       if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
1036         {
1037           /* Fetch predicate register rename base from current frame
1038              marker for this frame. */
1039           int rrb_pr = (cfm >> 32) & 0x3f;
1040
1041           /* Adjust the register number to account for register rotation. */
1042           regnum = VP16_REGNUM
1043                  + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
1044         }
1045       prN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum));
1046       prN_mask = (1LL << (regnum - VP0_REGNUM));
1047       if (prN_val == 0)
1048         pr &= ~prN_mask;
1049       else if (prN_val == 1)
1050         pr |= prN_mask;
1051       regcache_cooked_write_unsigned (regcache, IA64_PR_REGNUM, pr);
1052     }
1053 }
1054
1055 /* The ia64 needs to convert between various ieee floating-point formats
1056    and the special ia64 floating point register format.  */
1057
1058 static int
1059 ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
1060 {
1061   return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM
1062           && type != ia64_ext_type (gdbarch));
1063 }
1064
1065 static void
1066 ia64_register_to_value (struct frame_info *frame, int regnum,
1067                          struct type *valtype, gdb_byte *out)
1068 {
1069   struct gdbarch *gdbarch = get_frame_arch (frame);
1070   char in[MAX_REGISTER_SIZE];
1071   frame_register_read (frame, regnum, in);
1072   convert_typed_floating (in, ia64_ext_type (gdbarch), out, valtype);
1073 }
1074
1075 static void
1076 ia64_value_to_register (struct frame_info *frame, int regnum,
1077                          struct type *valtype, const gdb_byte *in)
1078 {
1079   struct gdbarch *gdbarch = get_frame_arch (frame);
1080   char out[MAX_REGISTER_SIZE];
1081   convert_typed_floating (in, valtype, out, ia64_ext_type (gdbarch));
1082   put_frame_register (frame, regnum, out);
1083 }
1084
1085
1086 /* Limit the number of skipped non-prologue instructions since examining
1087    of the prologue is expensive.  */
1088 static int max_skip_non_prologue_insns = 40;
1089
1090 /* Given PC representing the starting address of a function, and
1091    LIM_PC which is the (sloppy) limit to which to scan when looking
1092    for a prologue, attempt to further refine this limit by using
1093    the line data in the symbol table.  If successful, a better guess
1094    on where the prologue ends is returned, otherwise the previous
1095    value of lim_pc is returned.  TRUST_LIMIT is a pointer to a flag
1096    which will be set to indicate whether the returned limit may be
1097    used with no further scanning in the event that the function is
1098    frameless.  */
1099
1100 /* FIXME: cagney/2004-02-14: This function and logic have largely been
1101    superseded by skip_prologue_using_sal.  */
1102
1103 static CORE_ADDR
1104 refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit)
1105 {
1106   struct symtab_and_line prologue_sal;
1107   CORE_ADDR start_pc = pc;
1108   CORE_ADDR end_pc;
1109
1110   /* The prologue can not possibly go past the function end itself,
1111      so we can already adjust LIM_PC accordingly.  */
1112   if (find_pc_partial_function (pc, NULL, NULL, &end_pc) && end_pc < lim_pc)
1113     lim_pc = end_pc;
1114
1115   /* Start off not trusting the limit.  */
1116   *trust_limit = 0;
1117
1118   prologue_sal = find_pc_line (pc, 0);
1119   if (prologue_sal.line != 0)
1120     {
1121       int i;
1122       CORE_ADDR addr = prologue_sal.end;
1123
1124       /* Handle the case in which compiler's optimizer/scheduler
1125          has moved instructions into the prologue.  We scan ahead
1126          in the function looking for address ranges whose corresponding
1127          line number is less than or equal to the first one that we
1128          found for the function.  (It can be less than when the
1129          scheduler puts a body instruction before the first prologue
1130          instruction.)  */
1131       for (i = 2 * max_skip_non_prologue_insns;
1132            i > 0 && (lim_pc == 0 || addr < lim_pc);
1133            i--)
1134         {
1135           struct symtab_and_line sal;
1136
1137           sal = find_pc_line (addr, 0);
1138           if (sal.line == 0)
1139             break;
1140           if (sal.line <= prologue_sal.line
1141               && sal.symtab == prologue_sal.symtab)
1142             {
1143               prologue_sal = sal;
1144             }
1145           addr = sal.end;
1146         }
1147
1148       if (lim_pc == 0 || prologue_sal.end < lim_pc)
1149         {
1150           lim_pc = prologue_sal.end;
1151           if (start_pc == get_pc_function_start (lim_pc))
1152             *trust_limit = 1;
1153         }
1154     }
1155   return lim_pc;
1156 }
1157
1158 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1159   || (8 <= (_regnum_) && (_regnum_) <= 11) \
1160   || (14 <= (_regnum_) && (_regnum_) <= 31))
1161 #define imm9(_instr_) \
1162   ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1163    | (((_instr_) & 0x00008000000LL) >> 20) \
1164    | (((_instr_) & 0x00000001fc0LL) >> 6))
1165
1166 /* Allocate and initialize a frame cache.  */
1167
1168 static struct ia64_frame_cache *
1169 ia64_alloc_frame_cache (void)
1170 {
1171   struct ia64_frame_cache *cache;
1172   int i;
1173
1174   cache = FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache);
1175
1176   /* Base address.  */
1177   cache->base = 0;
1178   cache->pc = 0;
1179   cache->cfm = 0;
1180   cache->prev_cfm = 0;
1181   cache->sof = 0;
1182   cache->sol = 0;
1183   cache->sor = 0;
1184   cache->bsp = 0;
1185   cache->fp_reg = 0;
1186   cache->frameless = 1;
1187
1188   for (i = 0; i < NUM_IA64_RAW_REGS; i++)
1189     cache->saved_regs[i] = 0;
1190
1191   return cache;
1192 }
1193
1194 static CORE_ADDR
1195 examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc,
1196                   struct frame_info *this_frame,
1197                   struct ia64_frame_cache *cache)
1198 {
1199   CORE_ADDR next_pc;
1200   CORE_ADDR last_prologue_pc = pc;
1201   instruction_type it;
1202   long long instr;
1203   int cfm_reg  = 0;
1204   int ret_reg  = 0;
1205   int fp_reg   = 0;
1206   int unat_save_reg = 0;
1207   int pr_save_reg = 0;
1208   int mem_stack_frame_size = 0;
1209   int spill_reg   = 0;
1210   CORE_ADDR spill_addr = 0;
1211   char instores[8];
1212   char infpstores[8];
1213   char reg_contents[256];
1214   int trust_limit;
1215   int frameless = 1;
1216   int i;
1217   CORE_ADDR addr;
1218   char buf[8];
1219   CORE_ADDR bof, sor, sol, sof, cfm, rrb_gr;
1220
1221   memset (instores, 0, sizeof instores);
1222   memset (infpstores, 0, sizeof infpstores);
1223   memset (reg_contents, 0, sizeof reg_contents);
1224
1225   if (cache->after_prologue != 0
1226       && cache->after_prologue <= lim_pc)
1227     return cache->after_prologue;
1228
1229   lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit);
1230   next_pc = fetch_instruction (pc, &it, &instr);
1231
1232   /* We want to check if we have a recognizable function start before we
1233      look ahead for a prologue.  */
1234   if (pc < lim_pc && next_pc
1235       && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
1236     {
1237       /* alloc - start of a regular function.  */
1238       int sor = (int) ((instr & 0x00078000000LL) >> 27);
1239       int sol = (int) ((instr & 0x00007f00000LL) >> 20);
1240       int sof = (int) ((instr & 0x000000fe000LL) >> 13);
1241       int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1242
1243       /* Verify that the current cfm matches what we think is the
1244          function start.  If we have somehow jumped within a function,
1245          we do not want to interpret the prologue and calculate the
1246          addresses of various registers such as the return address.
1247          We will instead treat the frame as frameless. */
1248       if (!this_frame ||
1249           (sof == (cache->cfm & 0x7f) &&
1250            sol == ((cache->cfm >> 7) & 0x7f)))
1251         frameless = 0;
1252
1253       cfm_reg = rN;
1254       last_prologue_pc = next_pc;
1255       pc = next_pc;
1256     }
1257   else
1258     {
1259       /* Look for a leaf routine.  */
1260       if (pc < lim_pc && next_pc
1261           && (it == I || it == M)
1262           && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
1263         {
1264           /* adds rN = imm14, rM   (or mov rN, rM  when imm14 is 0) */
1265           int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
1266                            | ((instr & 0x001f8000000LL) >> 20)
1267                            | ((instr & 0x000000fe000LL) >> 13));
1268           int rM = (int) ((instr & 0x00007f00000LL) >> 20);
1269           int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1270           int qp = (int) (instr & 0x0000000003fLL);
1271           if (qp == 0 && rN == 2 && imm == 0 && rM == 12 && fp_reg == 0)
1272             {
1273               /* mov r2, r12 - beginning of leaf routine */
1274               fp_reg = rN;
1275               last_prologue_pc = next_pc;
1276             }
1277         }
1278
1279       /* If we don't recognize a regular function or leaf routine, we are
1280          done.  */
1281       if (!fp_reg)
1282         {
1283           pc = lim_pc;
1284           if (trust_limit)
1285             last_prologue_pc = lim_pc;
1286         }
1287     }
1288
1289   /* Loop, looking for prologue instructions, keeping track of
1290      where preserved registers were spilled. */
1291   while (pc < lim_pc)
1292     {
1293       next_pc = fetch_instruction (pc, &it, &instr);
1294       if (next_pc == 0)
1295         break;
1296
1297       if (it == B && ((instr & 0x1e1f800003fLL) != 0x04000000000LL))
1298         {
1299           /* Exit loop upon hitting a non-nop branch instruction. */
1300           if (trust_limit)
1301             lim_pc = pc;
1302           break;
1303         }
1304       else if (((instr & 0x3fLL) != 0LL) &&
1305                (frameless || ret_reg != 0))
1306         {
1307           /* Exit loop upon hitting a predicated instruction if
1308              we already have the return register or if we are frameless.  */
1309           if (trust_limit)
1310             lim_pc = pc;
1311           break;
1312         }
1313       else if (it == I && ((instr & 0x1eff8000000LL) == 0x00188000000LL))
1314         {
1315           /* Move from BR */
1316           int b2 = (int) ((instr & 0x0000000e000LL) >> 13);
1317           int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1318           int qp = (int) (instr & 0x0000000003f);
1319
1320           if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
1321             {
1322               ret_reg = rN;
1323               last_prologue_pc = next_pc;
1324             }
1325         }
1326       else if ((it == I || it == M)
1327           && ((instr & 0x1ee00000000LL) == 0x10800000000LL))
1328         {
1329           /* adds rN = imm14, rM   (or mov rN, rM  when imm14 is 0) */
1330           int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
1331                            | ((instr & 0x001f8000000LL) >> 20)
1332                            | ((instr & 0x000000fe000LL) >> 13));
1333           int rM = (int) ((instr & 0x00007f00000LL) >> 20);
1334           int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
1335           int qp = (int) (instr & 0x0000000003fLL);
1336
1337           if (qp == 0 && rN >= 32 && imm == 0 && rM == 12 && fp_reg == 0)
1338             {
1339               /* mov rN, r12 */
1340               fp_reg = rN;
1341               last_prologue_pc = next_pc;
1342             }
1343           else if (qp == 0 && rN == 12 && rM == 12)
1344             {
1345               /* adds r12, -mem_stack_frame_size, r12 */
1346               mem_stack_frame_size -= imm;
1347               last_prologue_pc = next_pc;
1348             }
1349           else if (qp == 0 && rN == 2
1350                 && ((rM == fp_reg && fp_reg != 0) || rM == 12))
1351             {
1352               char buf[MAX_REGISTER_SIZE];
1353               CORE_ADDR saved_sp = 0;
1354               /* adds r2, spilloffset, rFramePointer
1355                    or
1356                  adds r2, spilloffset, r12
1357
1358                  Get ready for stf.spill or st8.spill instructions.
1359                  The address to start spilling at is loaded into r2.
1360                  FIXME:  Why r2?  That's what gcc currently uses; it
1361                  could well be different for other compilers.  */
1362
1363               /* Hmm... whether or not this will work will depend on
1364                  where the pc is.  If it's still early in the prologue
1365                  this'll be wrong.  FIXME */
1366               if (this_frame)
1367                 {
1368                   get_frame_register (this_frame, sp_regnum, buf);
1369                   saved_sp = extract_unsigned_integer (buf, 8);
1370                 }
1371               spill_addr  = saved_sp
1372                           + (rM == 12 ? 0 : mem_stack_frame_size)
1373                           + imm;
1374               spill_reg   = rN;
1375               last_prologue_pc = next_pc;
1376             }
1377           else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM-32] &&
1378                    rN < 256 && imm == 0)
1379             {
1380               /* mov rN, rM where rM is an input register */
1381               reg_contents[rN] = rM;
1382               last_prologue_pc = next_pc;
1383             }
1384           else if (frameless && qp == 0 && rN == fp_reg && imm == 0 &&
1385                    rM == 2)
1386             {
1387               /* mov r12, r2 */
1388               last_prologue_pc = next_pc;
1389               break;
1390             }
1391         }
1392       else if (it == M
1393             && (   ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
1394                 || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
1395         {
1396           /* stf.spill [rN] = fM, imm9
1397              or
1398              stf.spill [rN] = fM  */
1399
1400           int imm = imm9(instr);
1401           int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1402           int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1403           int qp = (int) (instr & 0x0000000003fLL);
1404           if (qp == 0 && rN == spill_reg && spill_addr != 0
1405               && ((2 <= fM && fM <= 5) || (16 <= fM && fM <= 31)))
1406             {
1407               cache->saved_regs[IA64_FR0_REGNUM + fM] = spill_addr;
1408
1409               if ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
1410                 spill_addr += imm;
1411               else
1412                 spill_addr = 0;         /* last one; must be done */
1413               last_prologue_pc = next_pc;
1414             }
1415         }
1416       else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL))
1417             || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) )
1418         {
1419           /* mov.m rN = arM
1420                or
1421              mov.i rN = arM */
1422
1423           int arM = (int) ((instr & 0x00007f00000LL) >> 20);
1424           int rN  = (int) ((instr & 0x00000001fc0LL) >> 6);
1425           int qp  = (int) (instr & 0x0000000003fLL);
1426           if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */)
1427             {
1428               /* We have something like "mov.m r3 = ar.unat".  Remember the
1429                  r3 (or whatever) and watch for a store of this register... */
1430               unat_save_reg = rN;
1431               last_prologue_pc = next_pc;
1432             }
1433         }
1434       else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL))
1435         {
1436           /* mov rN = pr */
1437           int rN  = (int) ((instr & 0x00000001fc0LL) >> 6);
1438           int qp  = (int) (instr & 0x0000000003fLL);
1439           if (qp == 0 && isScratch (rN))
1440             {
1441               pr_save_reg = rN;
1442               last_prologue_pc = next_pc;
1443             }
1444         }
1445       else if (it == M
1446             && (   ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
1447                 || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
1448         {
1449           /* st8 [rN] = rM
1450               or
1451              st8 [rN] = rM, imm9 */
1452           int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1453           int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1454           int qp = (int) (instr & 0x0000000003fLL);
1455           int indirect = rM < 256 ? reg_contents[rM] : 0;
1456           if (qp == 0 && rN == spill_reg && spill_addr != 0
1457               && (rM == unat_save_reg || rM == pr_save_reg))
1458             {
1459               /* We've found a spill of either the UNAT register or the PR
1460                  register.  (Well, not exactly; what we've actually found is
1461                  a spill of the register that UNAT or PR was moved to).
1462                  Record that fact and move on... */
1463               if (rM == unat_save_reg)
1464                 {
1465                   /* Track UNAT register */
1466                   cache->saved_regs[IA64_UNAT_REGNUM] = spill_addr;
1467                   unat_save_reg = 0;
1468                 }
1469               else
1470                 {
1471                   /* Track PR register */
1472                   cache->saved_regs[IA64_PR_REGNUM] = spill_addr;
1473                   pr_save_reg = 0;
1474                 }
1475               if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)
1476                 /* st8 [rN] = rM, imm9 */
1477                 spill_addr += imm9(instr);
1478               else
1479                 spill_addr = 0;         /* must be done spilling */
1480               last_prologue_pc = next_pc;
1481             }
1482           else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1483             {
1484               /* Allow up to one store of each input register. */
1485               instores[rM-32] = 1;
1486               last_prologue_pc = next_pc;
1487             }
1488           else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1489                    !instores[indirect-32])
1490             {
1491               /* Allow an indirect store of an input register.  */
1492               instores[indirect-32] = 1;
1493               last_prologue_pc = next_pc;
1494             }
1495         }
1496       else if (it == M && ((instr & 0x1ff08000000LL) == 0x08c00000000LL))
1497         {
1498           /* One of
1499                st1 [rN] = rM
1500                st2 [rN] = rM
1501                st4 [rN] = rM
1502                st8 [rN] = rM
1503              Note that the st8 case is handled in the clause above.
1504
1505              Advance over stores of input registers. One store per input
1506              register is permitted. */
1507           int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1508           int qp = (int) (instr & 0x0000000003fLL);
1509           int indirect = rM < 256 ? reg_contents[rM] : 0;
1510           if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32])
1511             {
1512               instores[rM-32] = 1;
1513               last_prologue_pc = next_pc;
1514             }
1515           else if (qp == 0 && 32 <= indirect && indirect < 40 &&
1516                    !instores[indirect-32])
1517             {
1518               /* Allow an indirect store of an input register.  */
1519               instores[indirect-32] = 1;
1520               last_prologue_pc = next_pc;
1521             }
1522         }
1523       else if (it == M && ((instr & 0x1ff88000000LL) == 0x0cc80000000LL))
1524         {
1525           /* Either
1526                stfs [rN] = fM
1527              or
1528                stfd [rN] = fM
1529
1530              Advance over stores of floating point input registers.  Again
1531              one store per register is permitted */
1532           int fM = (int) ((instr & 0x000000fe000LL) >> 13);
1533           int qp = (int) (instr & 0x0000000003fLL);
1534           if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8])
1535             {
1536               infpstores[fM-8] = 1;
1537               last_prologue_pc = next_pc;
1538             }
1539         }
1540       else if (it == M
1541             && (   ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
1542                 || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
1543         {
1544           /* st8.spill [rN] = rM
1545                or
1546              st8.spill [rN] = rM, imm9 */
1547           int rN = (int) ((instr & 0x00007f00000LL) >> 20);
1548           int rM = (int) ((instr & 0x000000fe000LL) >> 13);
1549           int qp = (int) (instr & 0x0000000003fLL);
1550           if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
1551             {
1552               /* We've found a spill of one of the preserved general purpose
1553                  regs.  Record the spill address and advance the spill
1554                  register if appropriate. */
1555               cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
1556               if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
1557                 /* st8.spill [rN] = rM, imm9 */
1558                 spill_addr += imm9(instr);
1559               else
1560                 spill_addr = 0;         /* Done spilling */
1561               last_prologue_pc = next_pc;
1562             }
1563         }
1564
1565       pc = next_pc;
1566     }
1567
1568   /* If not frameless and we aren't called by skip_prologue, then we need
1569      to calculate registers for the previous frame which will be needed
1570      later.  */
1571
1572   if (!frameless && this_frame)
1573     {
1574       /* Extract the size of the rotating portion of the stack
1575          frame and the register rename base from the current
1576          frame marker. */
1577       cfm = cache->cfm;
1578       sor = cache->sor;
1579       sof = cache->sof;
1580       sol = cache->sol;
1581       rrb_gr = (cfm >> 18) & 0x7f;
1582
1583       /* Find the bof (beginning of frame).  */
1584       bof = rse_address_add (cache->bsp, -sof);
1585
1586       for (i = 0, addr = bof;
1587            i < sof;
1588            i++, addr += 8)
1589         {
1590           if (IS_NaT_COLLECTION_ADDR (addr))
1591             {
1592               addr += 8;
1593             }
1594           if (i+32 == cfm_reg)
1595             cache->saved_regs[IA64_CFM_REGNUM] = addr;
1596           if (i+32 == ret_reg)
1597             cache->saved_regs[IA64_VRAP_REGNUM] = addr;
1598           if (i+32 == fp_reg)
1599             cache->saved_regs[IA64_VFP_REGNUM] = addr;
1600         }
1601
1602       /* For the previous argument registers we require the previous bof.
1603          If we can't find the previous cfm, then we can do nothing.  */
1604       cfm = 0;
1605       if (cache->saved_regs[IA64_CFM_REGNUM] != 0)
1606         {
1607           cfm = read_memory_integer (cache->saved_regs[IA64_CFM_REGNUM], 8);
1608         }
1609       else if (cfm_reg != 0)
1610         {
1611           get_frame_register (this_frame, cfm_reg, buf);
1612           cfm = extract_unsigned_integer (buf, 8);
1613         }
1614       cache->prev_cfm = cfm;
1615
1616       if (cfm != 0)
1617         {
1618           sor = ((cfm >> 14) & 0xf) * 8;
1619           sof = (cfm & 0x7f);
1620           sol = (cfm >> 7) & 0x7f;
1621           rrb_gr = (cfm >> 18) & 0x7f;
1622
1623           /* The previous bof only requires subtraction of the sol (size of
1624              locals) due to the overlap between output and input of
1625              subsequent frames.  */
1626           bof = rse_address_add (bof, -sol);
1627
1628           for (i = 0, addr = bof;
1629                i < sof;
1630                i++, addr += 8)
1631             {
1632               if (IS_NaT_COLLECTION_ADDR (addr))
1633                 {
1634                   addr += 8;
1635                 }
1636               if (i < sor)
1637                 cache->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)]
1638                   = addr;
1639               else
1640                 cache->saved_regs[IA64_GR32_REGNUM + i] = addr;
1641             }
1642
1643         }
1644     }
1645
1646   /* Try and trust the lim_pc value whenever possible.  */
1647   if (trust_limit && lim_pc >= last_prologue_pc)
1648     last_prologue_pc = lim_pc;
1649
1650   cache->frameless = frameless;
1651   cache->after_prologue = last_prologue_pc;
1652   cache->mem_stack_frame_size = mem_stack_frame_size;
1653   cache->fp_reg = fp_reg;
1654
1655   return last_prologue_pc;
1656 }
1657
1658 CORE_ADDR
1659 ia64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1660 {
1661   struct ia64_frame_cache cache;
1662   cache.base = 0;
1663   cache.after_prologue = 0;
1664   cache.cfm = 0;
1665   cache.bsp = 0;
1666
1667   /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send.  */
1668   return examine_prologue (pc, pc+1024, 0, &cache);
1669 }
1670
1671
1672 /* Normal frames.  */
1673
1674 static struct ia64_frame_cache *
1675 ia64_frame_cache (struct frame_info *this_frame, void **this_cache)
1676 {
1677   struct ia64_frame_cache *cache;
1678   char buf[8];
1679   CORE_ADDR cfm, sof, sol, bsp, psr;
1680   int i;
1681
1682   if (*this_cache)
1683     return *this_cache;
1684
1685   cache = ia64_alloc_frame_cache ();
1686   *this_cache = cache;
1687
1688   get_frame_register (this_frame, sp_regnum, buf);
1689   cache->saved_sp = extract_unsigned_integer (buf, 8);
1690
1691   /* We always want the bsp to point to the end of frame.
1692      This way, we can always get the beginning of frame (bof)
1693      by subtracting frame size.  */
1694   get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
1695   cache->bsp = extract_unsigned_integer (buf, 8);
1696
1697   get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
1698   psr = extract_unsigned_integer (buf, 8);
1699
1700   get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
1701   cfm = extract_unsigned_integer (buf, 8);
1702
1703   cache->sof = (cfm & 0x7f);
1704   cache->sol = (cfm >> 7) & 0x7f;
1705   cache->sor = ((cfm >> 14) & 0xf) * 8;
1706
1707   cache->cfm = cfm;
1708
1709   cache->pc = get_frame_func (this_frame);
1710
1711   if (cache->pc != 0)
1712     examine_prologue (cache->pc, get_frame_pc (this_frame), this_frame, cache);
1713
1714   cache->base = cache->saved_sp + cache->mem_stack_frame_size;
1715
1716   return cache;
1717 }
1718
1719 static void
1720 ia64_frame_this_id (struct frame_info *this_frame, void **this_cache,
1721                     struct frame_id *this_id)
1722 {
1723   struct ia64_frame_cache *cache =
1724     ia64_frame_cache (this_frame, this_cache);
1725
1726   /* If outermost frame, mark with null frame id.  */
1727   if (cache->base == 0)
1728     (*this_id) = null_frame_id;
1729   else
1730     (*this_id) = frame_id_build_special (cache->base, cache->pc, cache->bsp);
1731   if (gdbarch_debug >= 1)
1732     fprintf_unfiltered (gdb_stdlog,
1733                         "regular frame id: code 0x%s, stack 0x%s, special 0x%s, this_frame %s\n",
1734                         paddr_nz (this_id->code_addr),
1735                         paddr_nz (this_id->stack_addr),
1736                         paddr_nz (cache->bsp),
1737                         host_address_to_string (this_frame));
1738 }
1739
1740 static struct value *
1741 ia64_frame_prev_register (struct frame_info *this_frame, void **this_cache,
1742                           int regnum)
1743 {
1744   struct gdbarch *gdbarch = get_frame_arch (this_frame);
1745   struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache);
1746   char buf[8];
1747
1748   gdb_assert (regnum >= 0);
1749
1750   if (!target_has_registers)
1751     error (_("No registers."));
1752
1753   if (regnum == gdbarch_sp_regnum (gdbarch))
1754     return frame_unwind_got_constant (this_frame, regnum, cache->base);
1755
1756   else if (regnum == IA64_BSP_REGNUM)
1757     {
1758       struct value *val;
1759       CORE_ADDR prev_cfm, bsp, prev_bsp;
1760
1761       /* We want to calculate the previous bsp as the end of the previous
1762          register stack frame.  This corresponds to what the hardware bsp
1763          register will be if we pop the frame back which is why we might
1764          have been called.  We know the beginning of the current frame is
1765          cache->bsp - cache->sof.  This value in the previous frame points
1766          to the start of the output registers.  We can calculate the end of
1767          that frame by adding the size of output:
1768             (sof (size of frame) - sol (size of locals)).  */
1769       val = ia64_frame_prev_register (this_frame, this_cache, IA64_CFM_REGNUM);
1770       prev_cfm = extract_unsigned_integer (value_contents_all (val), 8);
1771       bsp = rse_address_add (cache->bsp, -(cache->sof));
1772       prev_bsp =
1773         rse_address_add (bsp, (prev_cfm & 0x7f) - ((prev_cfm >> 7) & 0x7f));
1774
1775       return frame_unwind_got_constant (this_frame, regnum, prev_bsp);
1776     }
1777
1778   else if (regnum == IA64_CFM_REGNUM)
1779     {
1780       CORE_ADDR addr = cache->saved_regs[IA64_CFM_REGNUM];
1781
1782       if (addr != 0)
1783         return frame_unwind_got_memory (this_frame, regnum, addr);
1784
1785       if (cache->prev_cfm)
1786         return frame_unwind_got_constant (this_frame, regnum, cache->prev_cfm);
1787
1788       if (cache->frameless)
1789         return frame_unwind_got_register (this_frame, IA64_PFS_REGNUM,
1790                                           IA64_PFS_REGNUM);
1791       return frame_unwind_got_register (this_frame, regnum, 0);
1792     }
1793
1794   else if (regnum == IA64_VFP_REGNUM)
1795     {
1796       /* If the function in question uses an automatic register (r32-r127)
1797          for the frame pointer, it'll be found by ia64_find_saved_register()
1798          above.  If the function lacks one of these frame pointers, we can
1799          still provide a value since we know the size of the frame.  */
1800       return frame_unwind_got_constant (this_frame, regnum, cache->base);
1801     }
1802
1803   else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
1804     {
1805       struct value *pr_val;
1806       ULONGEST prN;
1807
1808       pr_val = ia64_frame_prev_register (this_frame, this_cache,
1809                                          IA64_PR_REGNUM);
1810       if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
1811         {
1812           /* Fetch predicate register rename base from current frame
1813              marker for this frame.  */
1814           int rrb_pr = (cache->cfm >> 32) & 0x3f;
1815
1816           /* Adjust the register number to account for register rotation.  */
1817           regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
1818         }
1819       prN = extract_bit_field (value_contents_all (pr_val),
1820                                regnum - VP0_REGNUM, 1);
1821       return frame_unwind_got_constant (this_frame, regnum, prN);
1822     }
1823
1824   else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
1825     {
1826       struct value *unat_val;
1827       ULONGEST unatN;
1828       unat_val = ia64_frame_prev_register (this_frame, this_cache,
1829                                            IA64_UNAT_REGNUM);
1830       unatN = extract_bit_field (value_contents_all (unat_val),
1831                                  regnum - IA64_NAT0_REGNUM, 1);
1832       return frame_unwind_got_constant (this_frame, regnum, unatN);
1833     }
1834
1835   else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
1836     {
1837       int natval = 0;
1838       /* Find address of general register corresponding to nat bit we're
1839          interested in.  */
1840       CORE_ADDR gr_addr;
1841
1842       gr_addr = cache->saved_regs[regnum - IA64_NAT0_REGNUM + IA64_GR0_REGNUM];
1843
1844       if (gr_addr != 0)
1845         {
1846           /* Compute address of nat collection bits.  */
1847           CORE_ADDR nat_addr = gr_addr | 0x1f8;
1848           CORE_ADDR bsp;
1849           CORE_ADDR nat_collection;
1850           int nat_bit;
1851
1852           /* If our nat collection address is bigger than bsp, we have to get
1853              the nat collection from rnat.  Otherwise, we fetch the nat
1854              collection from the computed address.  */
1855           get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
1856           bsp = extract_unsigned_integer (buf, 8);
1857           if (nat_addr >= bsp)
1858             {
1859               get_frame_register (this_frame, IA64_RNAT_REGNUM, buf);
1860               nat_collection = extract_unsigned_integer (buf, 8);
1861             }
1862           else
1863             nat_collection = read_memory_integer (nat_addr, 8);
1864           nat_bit = (gr_addr >> 3) & 0x3f;
1865           natval = (nat_collection >> nat_bit) & 1;
1866         }
1867
1868       return frame_unwind_got_constant (this_frame, regnum, natval);
1869     }
1870
1871   else if (regnum == IA64_IP_REGNUM)
1872     {
1873       CORE_ADDR pc = 0;
1874       CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
1875
1876       if (addr != 0)
1877         {
1878           read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
1879           pc = extract_unsigned_integer (buf, 8);
1880         }
1881       else if (cache->frameless)
1882         {
1883           get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
1884           pc = extract_unsigned_integer (buf, 8);
1885         }
1886       pc &= ~0xf;
1887       return frame_unwind_got_constant (this_frame, regnum, pc);
1888     }
1889
1890   else if (regnum == IA64_PSR_REGNUM)
1891     {
1892       /* We don't know how to get the complete previous PSR, but we need it
1893          for the slot information when we unwind the pc (pc is formed of IP
1894          register plus slot information from PSR).  To get the previous
1895          slot information, we mask it off the return address.  */
1896       ULONGEST slot_num = 0;
1897       CORE_ADDR pc = 0;
1898       CORE_ADDR psr = 0;
1899       CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
1900
1901       get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
1902       psr = extract_unsigned_integer (buf, 8);
1903
1904       if (addr != 0)
1905         {
1906           read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
1907           pc = extract_unsigned_integer (buf, 8);
1908         }
1909       else if (cache->frameless)
1910         {
1911           get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
1912           pc = extract_unsigned_integer (buf, 8);
1913         }
1914       psr &= ~(3LL << 41);
1915       slot_num = pc & 0x3LL;
1916       psr |= (CORE_ADDR)slot_num << 41;
1917       return frame_unwind_got_constant (this_frame, regnum, psr);
1918     }
1919
1920   else if (regnum == IA64_BR0_REGNUM)
1921     {
1922       CORE_ADDR addr = cache->saved_regs[IA64_BR0_REGNUM];
1923
1924       if (addr != 0)
1925         return frame_unwind_got_memory (this_frame, regnum, addr);
1926
1927       return frame_unwind_got_constant (this_frame, regnum, 0);
1928     }
1929
1930   else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
1931            || (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
1932     {
1933       CORE_ADDR addr = 0;
1934
1935       if (regnum >= V32_REGNUM)
1936         regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
1937       addr = cache->saved_regs[regnum];
1938       if (addr != 0)
1939         return frame_unwind_got_memory (this_frame, regnum, addr);
1940
1941       if (cache->frameless)
1942         {
1943           struct value *reg_val;
1944           CORE_ADDR prev_cfm, prev_bsp, prev_bof;
1945
1946           /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
1947              with the same code above?  */
1948           if (regnum >= V32_REGNUM)
1949             regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
1950           reg_val = ia64_frame_prev_register (this_frame, this_cache,
1951                                               IA64_CFM_REGNUM);
1952           prev_cfm = extract_unsigned_integer (value_contents_all (reg_val),
1953                                                8);
1954           reg_val = ia64_frame_prev_register (this_frame, this_cache,
1955                                               IA64_BSP_REGNUM);
1956           prev_bsp = extract_unsigned_integer (value_contents_all (reg_val),
1957                                                8);
1958           prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f));
1959
1960           addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM));
1961           return frame_unwind_got_memory (this_frame, regnum, addr);
1962         }
1963
1964       return frame_unwind_got_constant (this_frame, regnum, 0);
1965     }
1966
1967   else /* All other registers.  */
1968     {
1969       CORE_ADDR addr = 0;
1970
1971       if (IA64_FR32_REGNUM <= regnum && regnum <= IA64_FR127_REGNUM)
1972         {
1973           /* Fetch floating point register rename base from current
1974              frame marker for this frame.  */
1975           int rrb_fr = (cache->cfm >> 25) & 0x7f;
1976
1977           /* Adjust the floating point register number to account for
1978              register rotation.  */
1979           regnum = IA64_FR32_REGNUM
1980                  + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96;
1981         }
1982
1983       /* If we have stored a memory address, access the register.  */
1984       addr = cache->saved_regs[regnum];
1985       if (addr != 0)
1986         return frame_unwind_got_memory (this_frame, regnum, addr);
1987       /* Otherwise, punt and get the current value of the register.  */
1988       else
1989         return frame_unwind_got_register (this_frame, regnum, regnum);
1990     }
1991 }
1992
1993 static const struct frame_unwind ia64_frame_unwind =
1994 {
1995   NORMAL_FRAME,
1996   &ia64_frame_this_id,
1997   &ia64_frame_prev_register,
1998   NULL,
1999   default_frame_sniffer
2000 };
2001
2002 /* Signal trampolines.  */
2003
2004 static void
2005 ia64_sigtramp_frame_init_saved_regs (struct frame_info *this_frame,
2006                                      struct ia64_frame_cache *cache)
2007 {
2008   struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
2009
2010   if (tdep->sigcontext_register_address)
2011     {
2012       int regno;
2013
2014       cache->saved_regs[IA64_VRAP_REGNUM] =
2015         tdep->sigcontext_register_address (cache->base, IA64_IP_REGNUM);
2016       cache->saved_regs[IA64_CFM_REGNUM] =
2017         tdep->sigcontext_register_address (cache->base, IA64_CFM_REGNUM);
2018       cache->saved_regs[IA64_PSR_REGNUM] =
2019         tdep->sigcontext_register_address (cache->base, IA64_PSR_REGNUM);
2020       cache->saved_regs[IA64_BSP_REGNUM] =
2021         tdep->sigcontext_register_address (cache->base, IA64_BSP_REGNUM);
2022       cache->saved_regs[IA64_RNAT_REGNUM] =
2023         tdep->sigcontext_register_address (cache->base, IA64_RNAT_REGNUM);
2024       cache->saved_regs[IA64_CCV_REGNUM] =
2025         tdep->sigcontext_register_address (cache->base, IA64_CCV_REGNUM);
2026       cache->saved_regs[IA64_UNAT_REGNUM] =
2027         tdep->sigcontext_register_address (cache->base, IA64_UNAT_REGNUM);
2028       cache->saved_regs[IA64_FPSR_REGNUM] =
2029         tdep->sigcontext_register_address (cache->base, IA64_FPSR_REGNUM);
2030       cache->saved_regs[IA64_PFS_REGNUM] =
2031         tdep->sigcontext_register_address (cache->base, IA64_PFS_REGNUM);
2032       cache->saved_regs[IA64_LC_REGNUM] =
2033         tdep->sigcontext_register_address (cache->base, IA64_LC_REGNUM);
2034       for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++)
2035         cache->saved_regs[regno] =
2036           tdep->sigcontext_register_address (cache->base, regno);
2037       for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++)
2038         cache->saved_regs[regno] =
2039           tdep->sigcontext_register_address (cache->base, regno);
2040       for (regno = IA64_FR2_REGNUM; regno <= IA64_FR31_REGNUM; regno++)
2041         cache->saved_regs[regno] =
2042           tdep->sigcontext_register_address (cache->base, regno);
2043     }
2044 }
2045
2046 static struct ia64_frame_cache *
2047 ia64_sigtramp_frame_cache (struct frame_info *this_frame, void **this_cache)
2048 {
2049   struct ia64_frame_cache *cache;
2050   CORE_ADDR addr;
2051   char buf[8];
2052   int i;
2053
2054   if (*this_cache)
2055     return *this_cache;
2056
2057   cache = ia64_alloc_frame_cache ();
2058
2059   get_frame_register (this_frame, sp_regnum, buf);
2060   /* Note that frame size is hard-coded below.  We cannot calculate it
2061      via prologue examination.  */
2062   cache->base = extract_unsigned_integer (buf, 8) + 16;
2063
2064   get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2065   cache->bsp = extract_unsigned_integer (buf, 8);
2066
2067   get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
2068   cache->cfm = extract_unsigned_integer (buf, 8);
2069   cache->sof = cache->cfm & 0x7f;
2070
2071   ia64_sigtramp_frame_init_saved_regs (this_frame, cache);
2072
2073   *this_cache = cache;
2074   return cache;
2075 }
2076
2077 static void
2078 ia64_sigtramp_frame_this_id (struct frame_info *this_frame,
2079                              void **this_cache, struct frame_id *this_id)
2080 {
2081   struct ia64_frame_cache *cache =
2082     ia64_sigtramp_frame_cache (this_frame, this_cache);
2083
2084   (*this_id) = frame_id_build_special (cache->base,
2085                                        get_frame_pc (this_frame),
2086                                        cache->bsp);
2087   if (gdbarch_debug >= 1)
2088     fprintf_unfiltered (gdb_stdlog,
2089                         "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, this_frame %s\n",
2090                         paddr_nz (this_id->code_addr),
2091                         paddr_nz (this_id->stack_addr),
2092                         paddr_nz (cache->bsp),
2093                         host_address_to_string (this_frame));
2094 }
2095
2096 static struct value *
2097 ia64_sigtramp_frame_prev_register (struct frame_info *this_frame,
2098                                    void **this_cache, int regnum)
2099 {
2100   char buf[MAX_REGISTER_SIZE];
2101
2102   struct gdbarch *gdbarch = get_frame_arch (this_frame);
2103   struct ia64_frame_cache *cache =
2104     ia64_sigtramp_frame_cache (this_frame, this_cache);
2105
2106   gdb_assert (regnum >= 0);
2107
2108   if (!target_has_registers)
2109     error (_("No registers."));
2110
2111   if (regnum == IA64_IP_REGNUM)
2112     {
2113       CORE_ADDR pc = 0;
2114       CORE_ADDR addr = cache->saved_regs[IA64_VRAP_REGNUM];
2115
2116       if (addr != 0)
2117         {
2118           read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
2119           pc = extract_unsigned_integer (buf, 8);
2120         }
2121       pc &= ~0xf;
2122       return frame_unwind_got_constant (this_frame, regnum, pc);
2123     }
2124
2125   else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
2126            || (regnum >= V32_REGNUM && regnum <= V127_REGNUM))
2127     {
2128       CORE_ADDR addr = 0;
2129
2130       if (regnum >= V32_REGNUM)
2131         regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM);
2132       addr = cache->saved_regs[regnum];
2133       if (addr != 0)
2134         return frame_unwind_got_memory (this_frame, regnum, addr);
2135
2136       return frame_unwind_got_constant (this_frame, regnum, 0);
2137     }
2138
2139   else  /* All other registers not listed above.  */
2140     {
2141       CORE_ADDR addr = cache->saved_regs[regnum];
2142
2143       if (addr != 0)
2144         return frame_unwind_got_memory (this_frame, regnum, addr);
2145
2146       return frame_unwind_got_constant (this_frame, regnum, 0);
2147     }
2148 }
2149
2150 static int
2151 ia64_sigtramp_frame_sniffer (const struct frame_unwind *self,
2152                              struct frame_info *this_frame,
2153                              void **this_cache)
2154 {
2155   struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
2156   if (tdep->pc_in_sigtramp)
2157     {
2158       CORE_ADDR pc = get_frame_pc (this_frame);
2159
2160       if (tdep->pc_in_sigtramp (pc))
2161         return 1;
2162     }
2163
2164   return 0;
2165 }
2166
2167 static const struct frame_unwind ia64_sigtramp_frame_unwind =
2168 {
2169   SIGTRAMP_FRAME,
2170   ia64_sigtramp_frame_this_id,
2171   ia64_sigtramp_frame_prev_register,
2172   NULL,
2173   ia64_sigtramp_frame_sniffer
2174 };
2175
2176 \f
2177
2178 static CORE_ADDR
2179 ia64_frame_base_address (struct frame_info *this_frame, void **this_cache)
2180 {
2181   struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache);
2182
2183   return cache->base;
2184 }
2185
2186 static const struct frame_base ia64_frame_base =
2187 {
2188   &ia64_frame_unwind,
2189   ia64_frame_base_address,
2190   ia64_frame_base_address,
2191   ia64_frame_base_address
2192 };
2193
2194 #ifdef HAVE_LIBUNWIND_IA64_H
2195
2196 struct ia64_unwind_table_entry
2197   {
2198     unw_word_t start_offset;
2199     unw_word_t end_offset;
2200     unw_word_t info_offset;
2201   };
2202
2203 static __inline__ uint64_t
2204 ia64_rse_slot_num (uint64_t addr)
2205 {
2206   return (addr >> 3) & 0x3f;
2207 }
2208
2209 /* Skip over a designated number of registers in the backing
2210    store, remembering every 64th position is for NAT.  */
2211 static __inline__ uint64_t
2212 ia64_rse_skip_regs (uint64_t addr, long num_regs)
2213 {
2214   long delta = ia64_rse_slot_num(addr) + num_regs;
2215
2216   if (num_regs < 0)
2217     delta -= 0x3e;
2218   return addr + ((num_regs + delta/0x3f) << 3);
2219 }
2220
2221 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2222    number to a libunwind register number.  */
2223 static int
2224 ia64_gdb2uw_regnum (int regnum)
2225 {
2226   if (regnum == sp_regnum)
2227     return UNW_IA64_SP;
2228   else if (regnum == IA64_BSP_REGNUM)
2229     return UNW_IA64_BSP;
2230   else if ((unsigned) (regnum - IA64_GR0_REGNUM) < 128)
2231     return UNW_IA64_GR + (regnum - IA64_GR0_REGNUM);
2232   else if ((unsigned) (regnum - V32_REGNUM) < 95)
2233     return UNW_IA64_GR + 32 + (regnum - V32_REGNUM);
2234   else if ((unsigned) (regnum - IA64_FR0_REGNUM) < 128)
2235     return UNW_IA64_FR + (regnum - IA64_FR0_REGNUM);
2236   else if ((unsigned) (regnum - IA64_PR0_REGNUM) < 64)
2237     return -1;
2238   else if ((unsigned) (regnum - IA64_BR0_REGNUM) < 8)
2239     return UNW_IA64_BR + (regnum - IA64_BR0_REGNUM);
2240   else if (regnum == IA64_PR_REGNUM)
2241     return UNW_IA64_PR;
2242   else if (regnum == IA64_IP_REGNUM)
2243     return UNW_REG_IP;
2244   else if (regnum == IA64_CFM_REGNUM)
2245     return UNW_IA64_CFM;
2246   else if ((unsigned) (regnum - IA64_AR0_REGNUM) < 128)
2247     return UNW_IA64_AR + (regnum - IA64_AR0_REGNUM);
2248   else if ((unsigned) (regnum - IA64_NAT0_REGNUM) < 128)
2249     return UNW_IA64_NAT + (regnum - IA64_NAT0_REGNUM);
2250   else
2251     return -1;
2252 }
2253
2254 /* Gdb libunwind-frame callback function to convert from a libunwind register
2255    number to a ia64 gdb register number.  */
2256 static int
2257 ia64_uw2gdb_regnum (int uw_regnum)
2258 {
2259   if (uw_regnum == UNW_IA64_SP)
2260     return sp_regnum;
2261   else if (uw_regnum == UNW_IA64_BSP)
2262     return IA64_BSP_REGNUM;
2263   else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 32)
2264     return IA64_GR0_REGNUM + (uw_regnum - UNW_IA64_GR);
2265   else if ((unsigned) (uw_regnum - UNW_IA64_GR) < 128)
2266     return V32_REGNUM + (uw_regnum - (IA64_GR0_REGNUM + 32));
2267   else if ((unsigned) (uw_regnum - UNW_IA64_FR) < 128)
2268     return IA64_FR0_REGNUM + (uw_regnum - UNW_IA64_FR);
2269   else if ((unsigned) (uw_regnum - UNW_IA64_BR) < 8)
2270     return IA64_BR0_REGNUM + (uw_regnum - UNW_IA64_BR);
2271   else if (uw_regnum == UNW_IA64_PR)
2272     return IA64_PR_REGNUM;
2273   else if (uw_regnum == UNW_REG_IP)
2274     return IA64_IP_REGNUM;
2275   else if (uw_regnum == UNW_IA64_CFM)
2276     return IA64_CFM_REGNUM;
2277   else if ((unsigned) (uw_regnum - UNW_IA64_AR) < 128)
2278     return IA64_AR0_REGNUM + (uw_regnum - UNW_IA64_AR);
2279   else if ((unsigned) (uw_regnum - UNW_IA64_NAT) < 128)
2280     return IA64_NAT0_REGNUM + (uw_regnum - UNW_IA64_NAT);
2281   else
2282     return -1;
2283 }
2284
2285 /* Gdb libunwind-frame callback function to reveal if register is a float
2286    register or not.  */
2287 static int
2288 ia64_is_fpreg (int uw_regnum)
2289 {
2290   return unw_is_fpreg (uw_regnum);
2291 }
2292
2293 /* Libunwind callback accessor function for general registers.  */
2294 static int
2295 ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val,
2296                  int write, void *arg)
2297 {
2298   int regnum = ia64_uw2gdb_regnum (uw_regnum);
2299   unw_word_t bsp, sof, sol, cfm, psr, ip;
2300   struct frame_info *this_frame = arg;
2301   long new_sof, old_sof;
2302   char buf[MAX_REGISTER_SIZE];
2303
2304   /* We never call any libunwind routines that need to write registers.  */
2305   gdb_assert (!write);
2306
2307   switch (uw_regnum)
2308     {
2309       case UNW_REG_IP:
2310         /* Libunwind expects to see the pc value which means the slot number
2311            from the psr must be merged with the ip word address.  */
2312         get_frame_register (this_frame, IA64_IP_REGNUM, buf);
2313         ip = extract_unsigned_integer (buf, 8);
2314         get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
2315         psr = extract_unsigned_integer (buf, 8);
2316         *val = ip | ((psr >> 41) & 0x3);
2317         break;
2318
2319       case UNW_IA64_AR_BSP:
2320         /* Libunwind expects to see the beginning of the current register
2321            frame so we must account for the fact that ptrace() will return a value
2322            for bsp that points *after* the current register frame.  */
2323         get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2324         bsp = extract_unsigned_integer (buf, 8);
2325         get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
2326         cfm = extract_unsigned_integer (buf, 8);
2327         sof = (cfm & 0x7f);
2328         *val = ia64_rse_skip_regs (bsp, -sof);
2329         break;
2330
2331       case UNW_IA64_AR_BSPSTORE:
2332         /* Libunwind wants bspstore to be after the current register frame.
2333            This is what ptrace() and gdb treats as the regular bsp value.  */
2334         get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2335         *val = extract_unsigned_integer (buf, 8);
2336         break;
2337
2338       default:
2339         /* For all other registers, just unwind the value directly.  */
2340         get_frame_register (this_frame, regnum, buf);
2341         *val = extract_unsigned_integer (buf, 8);
2342         break;
2343     }
2344
2345   if (gdbarch_debug >= 1)
2346     fprintf_unfiltered (gdb_stdlog,
2347                         "  access_reg: from cache: %4s=0x%s\n",
2348                         (((unsigned) regnum <= IA64_NAT127_REGNUM)
2349                         ? ia64_register_names[regnum] : "r??"),
2350                         paddr_nz (*val));
2351   return 0;
2352 }
2353
2354 /* Libunwind callback accessor function for floating-point registers.  */
2355 static int
2356 ia64_access_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_fpreg_t *val,
2357                    int write, void *arg)
2358 {
2359   int regnum = ia64_uw2gdb_regnum (uw_regnum);
2360   struct frame_info *this_frame = arg;
2361
2362   /* We never call any libunwind routines that need to write registers.  */
2363   gdb_assert (!write);
2364
2365   get_frame_register (this_frame, regnum, (char *) val);
2366
2367   return 0;
2368 }
2369
2370 /* Libunwind callback accessor function for top-level rse registers.  */
2371 static int
2372 ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val,
2373                      int write, void *arg)
2374 {
2375   int regnum = ia64_uw2gdb_regnum (uw_regnum);
2376   unw_word_t bsp, sof, sol, cfm, psr, ip;
2377   struct regcache *regcache = arg;
2378   long new_sof, old_sof;
2379   char buf[MAX_REGISTER_SIZE];
2380
2381   /* We never call any libunwind routines that need to write registers.  */
2382   gdb_assert (!write);
2383
2384   switch (uw_regnum)
2385     {
2386       case UNW_REG_IP:
2387         /* Libunwind expects to see the pc value which means the slot number
2388            from the psr must be merged with the ip word address.  */
2389         regcache_cooked_read (regcache, IA64_IP_REGNUM, buf);
2390         ip = extract_unsigned_integer (buf, 8);
2391         regcache_cooked_read (regcache, IA64_PSR_REGNUM, buf);
2392         psr = extract_unsigned_integer (buf, 8);
2393         *val = ip | ((psr >> 41) & 0x3);
2394         break;
2395
2396       case UNW_IA64_AR_BSP:
2397         /* Libunwind expects to see the beginning of the current register
2398            frame so we must account for the fact that ptrace() will return a value
2399            for bsp that points *after* the current register frame.  */
2400         regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf);
2401         bsp = extract_unsigned_integer (buf, 8);
2402         regcache_cooked_read (regcache, IA64_CFM_REGNUM, buf);
2403         cfm = extract_unsigned_integer (buf, 8);
2404         sof = (cfm & 0x7f);
2405         *val = ia64_rse_skip_regs (bsp, -sof);
2406         break;
2407
2408       case UNW_IA64_AR_BSPSTORE:
2409         /* Libunwind wants bspstore to be after the current register frame.
2410            This is what ptrace() and gdb treats as the regular bsp value.  */
2411         regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf);
2412         *val = extract_unsigned_integer (buf, 8);
2413         break;
2414
2415       default:
2416         /* For all other registers, just unwind the value directly.  */
2417         regcache_cooked_read (regcache, regnum, buf);
2418         *val = extract_unsigned_integer (buf, 8);
2419         break;
2420     }
2421
2422   if (gdbarch_debug >= 1)
2423     fprintf_unfiltered (gdb_stdlog,
2424                         "  access_rse_reg: from cache: %4s=0x%s\n",
2425                         (((unsigned) regnum <= IA64_NAT127_REGNUM)
2426                          ? ia64_register_names[regnum] : "r??"),
2427                         paddr_nz (*val));
2428
2429   return 0;
2430 }
2431
2432 /* Libunwind callback accessor function for top-level fp registers.  */
2433 static int
2434 ia64_access_rse_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum,
2435                        unw_fpreg_t *val, int write, void *arg)
2436 {
2437   int regnum = ia64_uw2gdb_regnum (uw_regnum);
2438   struct regcache *regcache = arg;
2439
2440   /* We never call any libunwind routines that need to write registers.  */
2441   gdb_assert (!write);
2442
2443   regcache_cooked_read (regcache, regnum, (char *) val);
2444
2445   return 0;
2446 }
2447
2448 /* Libunwind callback accessor function for accessing memory.  */
2449 static int
2450 ia64_access_mem (unw_addr_space_t as,
2451                  unw_word_t addr, unw_word_t *val,
2452                  int write, void *arg)
2453 {
2454   if (addr - KERNEL_START < ktab_size)
2455     {
2456       unw_word_t *laddr = (unw_word_t*) ((char *) ktab
2457                           + (addr - KERNEL_START));
2458
2459       if (write)
2460         *laddr = *val;
2461       else
2462         *val = *laddr;
2463       return 0;
2464     }
2465
2466   /* XXX do we need to normalize byte-order here?  */
2467   if (write)
2468     return target_write_memory (addr, (char *) val, sizeof (unw_word_t));
2469   else
2470     return target_read_memory (addr, (char *) val, sizeof (unw_word_t));
2471 }
2472
2473 /* Call low-level function to access the kernel unwind table.  */
2474 static LONGEST
2475 getunwind_table (gdb_byte **buf_p)
2476 {
2477   LONGEST x;
2478
2479   /* FIXME drow/2005-09-10: This code used to call
2480      ia64_linux_xfer_unwind_table directly to fetch the unwind table
2481      for the currently running ia64-linux kernel.  That data should
2482      come from the core file and be accessed via the auxv vector; if
2483      we want to preserve fall back to the running kernel's table, then
2484      we should find a way to override the corefile layer's
2485      xfer_partial method.  */
2486
2487   x = target_read_alloc (&current_target, TARGET_OBJECT_UNWIND_TABLE,
2488                          NULL, buf_p);
2489
2490   return x;
2491 }
2492
2493 /* Get the kernel unwind table.  */
2494 static int
2495 get_kernel_table (unw_word_t ip, unw_dyn_info_t *di)
2496 {
2497   static struct ia64_table_entry *etab;
2498
2499   if (!ktab)
2500     {
2501       gdb_byte *ktab_buf;
2502       LONGEST size;
2503
2504       size = getunwind_table (&ktab_buf);
2505       if (size <= 0)
2506         return -UNW_ENOINFO;
2507
2508       ktab = (struct ia64_table_entry *) ktab_buf;
2509       ktab_size = size;
2510
2511       for (etab = ktab; etab->start_offset; ++etab)
2512         etab->info_offset += KERNEL_START;
2513     }
2514
2515   if (ip < ktab[0].start_offset || ip >= etab[-1].end_offset)
2516     return -UNW_ENOINFO;
2517
2518   di->format = UNW_INFO_FORMAT_TABLE;
2519   di->gp = 0;
2520   di->start_ip = ktab[0].start_offset;
2521   di->end_ip = etab[-1].end_offset;
2522   di->u.ti.name_ptr = (unw_word_t) "<kernel>";
2523   di->u.ti.segbase = 0;
2524   di->u.ti.table_len = ((char *) etab - (char *) ktab) / sizeof (unw_word_t);
2525   di->u.ti.table_data = (unw_word_t *) ktab;
2526
2527   if (gdbarch_debug >= 1)
2528     fprintf_unfiltered (gdb_stdlog, "get_kernel_table: found table `%s': "
2529                         "segbase=0x%s, length=%s, gp=0x%s\n",
2530                         (char *) di->u.ti.name_ptr,
2531                         paddr_nz (di->u.ti.segbase),
2532                         pulongest (di->u.ti.table_len),
2533                         paddr_nz (di->gp));
2534   return 0;
2535 }
2536
2537 /* Find the unwind table entry for a specified address.  */
2538 static int
2539 ia64_find_unwind_table (struct objfile *objfile, unw_word_t ip,
2540                         unw_dyn_info_t *dip, void **buf)
2541 {
2542   Elf_Internal_Phdr *phdr, *p_text = NULL, *p_unwind = NULL;
2543   Elf_Internal_Ehdr *ehdr;
2544   unw_word_t segbase = 0;
2545   CORE_ADDR load_base;
2546   bfd *bfd;
2547   int i;
2548
2549   bfd = objfile->obfd;
2550
2551   ehdr = elf_tdata (bfd)->elf_header;
2552   phdr = elf_tdata (bfd)->phdr;
2553
2554   load_base = ANOFFSET (objfile->section_offsets, SECT_OFF_TEXT (objfile));
2555
2556   for (i = 0; i < ehdr->e_phnum; ++i)
2557     {
2558       switch (phdr[i].p_type)
2559         {
2560         case PT_LOAD:
2561           if ((unw_word_t) (ip - load_base - phdr[i].p_vaddr)
2562               < phdr[i].p_memsz)
2563             p_text = phdr + i;
2564           break;
2565
2566         case PT_IA_64_UNWIND:
2567           p_unwind = phdr + i;
2568           break;
2569
2570         default:
2571           break;
2572         }
2573     }
2574
2575   if (!p_text || !p_unwind)
2576     return -UNW_ENOINFO;
2577
2578   /* Verify that the segment that contains the IP also contains
2579      the static unwind table.  If not, we may be in the Linux kernel's
2580      DSO gate page in which case the unwind table is another segment.
2581      Otherwise, we are dealing with runtime-generated code, for which we
2582      have no info here.  */
2583   segbase = p_text->p_vaddr + load_base;
2584
2585   if ((p_unwind->p_vaddr - p_text->p_vaddr) >= p_text->p_memsz)
2586     {
2587       int ok = 0;
2588       for (i = 0; i < ehdr->e_phnum; ++i)
2589         {
2590           if (phdr[i].p_type == PT_LOAD
2591               && (p_unwind->p_vaddr - phdr[i].p_vaddr) < phdr[i].p_memsz)
2592             {
2593               ok = 1;
2594               /* Get the segbase from the section containing the
2595                  libunwind table.  */
2596               segbase = phdr[i].p_vaddr + load_base;
2597             }
2598         }
2599       if (!ok)
2600         return -UNW_ENOINFO;
2601     }
2602
2603   dip->start_ip = p_text->p_vaddr + load_base;
2604   dip->end_ip = dip->start_ip + p_text->p_memsz;
2605   dip->gp = ia64_find_global_pointer (ip);
2606   dip->format = UNW_INFO_FORMAT_REMOTE_TABLE;
2607   dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd);
2608   dip->u.rti.segbase = segbase;
2609   dip->u.rti.table_len = p_unwind->p_memsz / sizeof (unw_word_t);
2610   dip->u.rti.table_data = p_unwind->p_vaddr + load_base;
2611
2612   return 0;
2613 }
2614
2615 /* Libunwind callback accessor function to acquire procedure unwind-info.  */
2616 static int
2617 ia64_find_proc_info_x (unw_addr_space_t as, unw_word_t ip, unw_proc_info_t *pi,
2618                        int need_unwind_info, void *arg)
2619 {
2620   struct obj_section *sec = find_pc_section (ip);
2621   unw_dyn_info_t di;
2622   int ret;
2623   void *buf = NULL;
2624
2625   if (!sec)
2626     {
2627       /* XXX This only works if the host and the target architecture are
2628          both ia64 and if the have (more or less) the same kernel
2629          version.  */
2630       if (get_kernel_table (ip, &di) < 0)
2631         return -UNW_ENOINFO;
2632
2633       if (gdbarch_debug >= 1)
2634         fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: 0x%s -> "
2635                             "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2636                             "length=%s,data=0x%s)\n",
2637                             paddr_nz (ip), (char *)di.u.ti.name_ptr,
2638                             paddr_nz (di.u.ti.segbase),
2639                             paddr_nz (di.start_ip), paddr_nz (di.end_ip),
2640                             paddr_nz (di.gp),
2641                             pulongest (di.u.ti.table_len),
2642                             paddr_nz ((CORE_ADDR)di.u.ti.table_data));
2643     }
2644   else
2645     {
2646       ret = ia64_find_unwind_table (sec->objfile, ip, &di, &buf);
2647       if (ret < 0)
2648         return ret;
2649
2650       if (gdbarch_debug >= 1)
2651         fprintf_unfiltered (gdb_stdlog, "ia64_find_proc_info_x: 0x%s -> "
2652                             "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2653                             "length=%s,data=0x%s)\n",
2654                             paddr_nz (ip), (char *)di.u.rti.name_ptr,
2655                             paddr_nz (di.u.rti.segbase),
2656                             paddr_nz (di.start_ip), paddr_nz (di.end_ip),
2657                             paddr_nz (di.gp),
2658                             pulongest (di.u.rti.table_len),
2659                             paddr_nz (di.u.rti.table_data));
2660     }
2661
2662   ret = libunwind_search_unwind_table (&as, ip, &di, pi, need_unwind_info,
2663                                        arg);
2664
2665   /* We no longer need the dyn info storage so free it.  */
2666   xfree (buf);
2667
2668   return ret;
2669 }
2670
2671 /* Libunwind callback accessor function for cleanup.  */
2672 static void
2673 ia64_put_unwind_info (unw_addr_space_t as,
2674                       unw_proc_info_t *pip, void *arg)
2675 {
2676   /* Nothing required for now.  */
2677 }
2678
2679 /* Libunwind callback accessor function to get head of the dynamic
2680    unwind-info registration list.  */
2681 static int
2682 ia64_get_dyn_info_list (unw_addr_space_t as,
2683                         unw_word_t *dilap, void *arg)
2684 {
2685   struct obj_section *text_sec;
2686   struct objfile *objfile;
2687   unw_word_t ip, addr;
2688   unw_dyn_info_t di;
2689   int ret;
2690
2691   if (!libunwind_is_initialized ())
2692     return -UNW_ENOINFO;
2693
2694   for (objfile = object_files; objfile; objfile = objfile->next)
2695     {
2696       void *buf = NULL;
2697
2698       text_sec = objfile->sections + SECT_OFF_TEXT (objfile);
2699       ip = obj_section_addr (text_sec);
2700       ret = ia64_find_unwind_table (objfile, ip, &di, &buf);
2701       if (ret >= 0)
2702         {
2703           addr = libunwind_find_dyn_list (as, &di, arg);
2704           /* We no longer need the dyn info storage so free it.  */
2705           xfree (buf);
2706
2707           if (addr)
2708             {
2709               if (gdbarch_debug >= 1)
2710                 fprintf_unfiltered (gdb_stdlog,
2711                                     "dynamic unwind table in objfile %s "
2712                                     "at 0x%s (gp=0x%s)\n",
2713                                     bfd_get_filename (objfile->obfd),
2714                                     paddr_nz (addr), paddr_nz (di.gp));
2715               *dilap = addr;
2716               return 0;
2717             }
2718         }
2719     }
2720   return -UNW_ENOINFO;
2721 }
2722
2723
2724 /* Frame interface functions for libunwind.  */
2725
2726 static void
2727 ia64_libunwind_frame_this_id (struct frame_info *this_frame, void **this_cache,
2728                               struct frame_id *this_id)
2729 {
2730   struct frame_id id;
2731   char buf[8];
2732   CORE_ADDR bsp;
2733
2734
2735   libunwind_frame_this_id (this_frame, this_cache, &id);
2736   if (frame_id_eq (id, null_frame_id))
2737     {
2738       (*this_id) = null_frame_id;
2739       return;
2740     }
2741
2742   /* We must add the bsp as the special address for frame comparison
2743      purposes.  */
2744   get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2745   bsp = extract_unsigned_integer (buf, 8);
2746
2747   (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
2748
2749   if (gdbarch_debug >= 1)
2750     fprintf_unfiltered (gdb_stdlog,
2751                         "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, this_frame %s\n",
2752                         paddr_nz (id.code_addr), paddr_nz (id.stack_addr),
2753                         paddr_nz (bsp),
2754                         host_address_to_string (this_frame));
2755 }
2756
2757 static struct value *
2758 ia64_libunwind_frame_prev_register (struct frame_info *this_frame,
2759                                     void **this_cache, int regnum)
2760 {
2761   int reg = regnum;
2762   struct gdbarch *gdbarch = get_frame_arch (this_frame);
2763   struct value *val;
2764
2765   if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
2766     reg = IA64_PR_REGNUM;
2767   else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
2768     reg = IA64_UNAT_REGNUM;
2769
2770   /* Let libunwind do most of the work.  */
2771   val = libunwind_frame_prev_register (this_frame, this_cache, reg);
2772
2773   if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
2774     {
2775       ULONGEST prN_val;
2776
2777       if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
2778         {
2779           int rrb_pr = 0;
2780           ULONGEST cfm;
2781           unsigned char buf[MAX_REGISTER_SIZE];
2782
2783           /* Fetch predicate register rename base from current frame
2784              marker for this frame.  */
2785           get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
2786           cfm = extract_unsigned_integer (buf, 8);
2787           rrb_pr = (cfm >> 32) & 0x3f;
2788
2789           /* Adjust the register number to account for register rotation.  */
2790           regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
2791         }
2792       prN_val = extract_bit_field (value_contents_all (val),
2793                                    regnum - VP0_REGNUM, 1);
2794       return frame_unwind_got_constant (this_frame, regnum, prN_val);
2795     }
2796
2797   else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
2798     {
2799       ULONGEST unatN_val;
2800
2801       unatN_val = extract_bit_field (value_contents_all (val),
2802                                      regnum - IA64_NAT0_REGNUM, 1);
2803       return frame_unwind_got_constant (this_frame, regnum, unatN_val);
2804     }
2805
2806   else if (regnum == IA64_BSP_REGNUM)
2807     {
2808       struct value *cfm_val;
2809       CORE_ADDR prev_bsp, prev_cfm;
2810
2811       /* We want to calculate the previous bsp as the end of the previous
2812          register stack frame.  This corresponds to what the hardware bsp
2813          register will be if we pop the frame back which is why we might
2814          have been called.  We know that libunwind will pass us back the
2815          beginning of the current frame so we should just add sof to it. */
2816       prev_bsp = extract_unsigned_integer (value_contents_all (val), 8);
2817       cfm_val = libunwind_frame_prev_register (this_frame, this_cache,
2818                                                IA64_CFM_REGNUM);
2819       prev_cfm = extract_unsigned_integer (value_contents_all (cfm_val), 8);
2820       prev_bsp = rse_address_add (prev_bsp, (prev_cfm & 0x7f));
2821
2822       return frame_unwind_got_constant (this_frame, regnum, prev_bsp);
2823     }
2824   else
2825     return val;
2826 }
2827
2828 static int
2829 ia64_libunwind_frame_sniffer (const struct frame_unwind *self,
2830                               struct frame_info *this_frame,
2831                               void **this_cache)
2832 {
2833   if (libunwind_is_initialized ()
2834       && libunwind_frame_sniffer (self, this_frame, this_cache))
2835     return 1;
2836
2837   return 0;
2838 }
2839
2840 static const struct frame_unwind ia64_libunwind_frame_unwind =
2841 {
2842   NORMAL_FRAME,
2843   ia64_libunwind_frame_this_id,
2844   ia64_libunwind_frame_prev_register,
2845   NULL,
2846   ia64_libunwind_frame_sniffer,
2847   libunwind_frame_dealloc_cache
2848 };
2849
2850 static void
2851 ia64_libunwind_sigtramp_frame_this_id (struct frame_info *this_frame,
2852                                        void **this_cache,
2853                                        struct frame_id *this_id)
2854 {
2855   char buf[8];
2856   CORE_ADDR bsp;
2857   struct frame_id id;
2858   CORE_ADDR prev_ip;
2859
2860   libunwind_frame_this_id (this_frame, this_cache, &id);
2861   if (frame_id_eq (id, null_frame_id))
2862     {
2863       (*this_id) = null_frame_id;
2864       return;
2865     }
2866
2867   /* We must add the bsp as the special address for frame comparison
2868      purposes.  */
2869   get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
2870   bsp = extract_unsigned_integer (buf, 8);
2871
2872   /* For a sigtramp frame, we don't make the check for previous ip being 0.  */
2873   (*this_id) = frame_id_build_special (id.stack_addr, id.code_addr, bsp);
2874
2875   if (gdbarch_debug >= 1)
2876     fprintf_unfiltered (gdb_stdlog,
2877                         "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, this_frame %s\n",
2878                         paddr_nz (id.code_addr), paddr_nz (id.stack_addr),
2879                         paddr_nz (bsp),
2880                         host_address_to_string (this_frame));
2881 }
2882
2883 static struct value *
2884 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info *this_frame,
2885                                              void **this_cache, int regnum)
2886 {
2887   struct value *prev_ip_val;
2888   CORE_ADDR prev_ip;
2889
2890   /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2891      method of getting previous registers.  */
2892   prev_ip_val = libunwind_frame_prev_register (this_frame, this_cache,
2893                                                IA64_IP_REGNUM);
2894   prev_ip = extract_unsigned_integer (value_contents_all (prev_ip_val), 8);
2895
2896   if (prev_ip == 0)
2897     {
2898       void *tmp_cache = NULL;
2899       return ia64_sigtramp_frame_prev_register (this_frame, &tmp_cache,
2900                                                 regnum);
2901     }
2902   else
2903     return ia64_libunwind_frame_prev_register (this_frame, this_cache, regnum);
2904 }
2905
2906 static int
2907 ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind *self,
2908                                        struct frame_info *this_frame,
2909                                        void **this_cache)
2910 {
2911   if (libunwind_is_initialized ())
2912     {
2913       if (libunwind_sigtramp_frame_sniffer (self, this_frame, this_cache))
2914         return 1;
2915       return 0;
2916     }
2917   else
2918     return ia64_sigtramp_frame_sniffer (self, this_frame, this_cache);
2919 }
2920
2921 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind =
2922 {
2923   SIGTRAMP_FRAME,
2924   ia64_libunwind_sigtramp_frame_this_id,
2925   ia64_libunwind_sigtramp_frame_prev_register,
2926   NULL,
2927   ia64_libunwind_sigtramp_frame_sniffer
2928 };
2929
2930 /* Set of libunwind callback acccessor functions.  */
2931 static unw_accessors_t ia64_unw_accessors =
2932 {
2933   ia64_find_proc_info_x,
2934   ia64_put_unwind_info,
2935   ia64_get_dyn_info_list,
2936   ia64_access_mem,
2937   ia64_access_reg,
2938   ia64_access_fpreg,
2939   /* resume */
2940   /* get_proc_name */
2941 };
2942
2943 /* Set of special libunwind callback acccessor functions specific for accessing
2944    the rse registers.  At the top of the stack, we want libunwind to figure out
2945    how to read r32 - r127.  Though usually they are found sequentially in memory
2946    starting from $bof, this is not always true.  */
2947 static unw_accessors_t ia64_unw_rse_accessors =
2948 {
2949   ia64_find_proc_info_x,
2950   ia64_put_unwind_info,
2951   ia64_get_dyn_info_list,
2952   ia64_access_mem,
2953   ia64_access_rse_reg,
2954   ia64_access_rse_fpreg,
2955   /* resume */
2956   /* get_proc_name */
2957 };
2958
2959 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use.  */
2960 static struct libunwind_descr ia64_libunwind_descr =
2961 {
2962   ia64_gdb2uw_regnum,
2963   ia64_uw2gdb_regnum,
2964   ia64_is_fpreg,
2965   &ia64_unw_accessors,
2966   &ia64_unw_rse_accessors,
2967 };
2968
2969 #endif /* HAVE_LIBUNWIND_IA64_H  */
2970
2971 static int
2972 ia64_use_struct_convention (struct type *type)
2973 {
2974   struct type *float_elt_type;
2975
2976   /* Don't use the struct convention for anything but structure,
2977      union, or array types.  */
2978   if (!(TYPE_CODE (type) == TYPE_CODE_STRUCT
2979         || TYPE_CODE (type) == TYPE_CODE_UNION
2980         || TYPE_CODE (type) == TYPE_CODE_ARRAY))
2981     return 0;
2982
2983   /* HFAs are structures (or arrays) consisting entirely of floating
2984      point values of the same length.  Up to 8 of these are returned
2985      in registers.  Don't use the struct convention when this is the
2986      case.  */
2987   float_elt_type = is_float_or_hfa_type (type);
2988   if (float_elt_type != NULL
2989       && TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type) <= 8)
2990     return 0;
2991
2992   /* Other structs of length 32 or less are returned in r8-r11.
2993      Don't use the struct convention for those either.  */
2994   return TYPE_LENGTH (type) > 32;
2995 }
2996
2997 static void
2998 ia64_extract_return_value (struct type *type, struct regcache *regcache,
2999                            gdb_byte *valbuf)
3000 {
3001   struct gdbarch *gdbarch = get_regcache_arch (regcache);
3002   struct type *float_elt_type;
3003
3004   float_elt_type = is_float_or_hfa_type (type);
3005   if (float_elt_type != NULL)
3006     {
3007       char from[MAX_REGISTER_SIZE];
3008       int offset = 0;
3009       int regnum = IA64_FR8_REGNUM;
3010       int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
3011
3012       while (n-- > 0)
3013         {
3014           regcache_cooked_read (regcache, regnum, from);
3015           convert_typed_floating (from, ia64_ext_type (gdbarch),
3016                                   (char *)valbuf + offset, float_elt_type);
3017           offset += TYPE_LENGTH (float_elt_type);
3018           regnum++;
3019         }
3020     }
3021   else
3022     {
3023       ULONGEST val;
3024       int offset = 0;
3025       int regnum = IA64_GR8_REGNUM;
3026       int reglen = TYPE_LENGTH (register_type (gdbarch, IA64_GR8_REGNUM));
3027       int n = TYPE_LENGTH (type) / reglen;
3028       int m = TYPE_LENGTH (type) % reglen;
3029
3030       while (n-- > 0)
3031         {
3032           ULONGEST val;
3033           regcache_cooked_read_unsigned (regcache, regnum, &val);
3034           memcpy ((char *)valbuf + offset, &val, reglen);
3035           offset += reglen;
3036           regnum++;
3037         }
3038
3039       if (m)
3040         {
3041           regcache_cooked_read_unsigned (regcache, regnum, &val);
3042           memcpy ((char *)valbuf + offset, &val, m);
3043         }
3044     }
3045 }
3046
3047 static void
3048 ia64_store_return_value (struct type *type, struct regcache *regcache,
3049                          const gdb_byte *valbuf)
3050 {
3051   struct gdbarch *gdbarch = get_regcache_arch (regcache);
3052   struct type *float_elt_type;
3053
3054   float_elt_type = is_float_or_hfa_type (type);
3055   if (float_elt_type != NULL)
3056     {
3057       char to[MAX_REGISTER_SIZE];
3058       int offset = 0;
3059       int regnum = IA64_FR8_REGNUM;
3060       int n = TYPE_LENGTH (type) / TYPE_LENGTH (float_elt_type);
3061
3062       while (n-- > 0)
3063         {
3064           convert_typed_floating ((char *)valbuf + offset, float_elt_type,
3065                                   to, ia64_ext_type (gdbarch));
3066           regcache_cooked_write (regcache, regnum, to);
3067           offset += TYPE_LENGTH (float_elt_type);
3068           regnum++;
3069         }
3070     }
3071   else
3072     {
3073       ULONGEST val;
3074       int offset = 0;
3075       int regnum = IA64_GR8_REGNUM;
3076       int reglen = TYPE_LENGTH (register_type (gdbarch, IA64_GR8_REGNUM));
3077       int n = TYPE_LENGTH (type) / reglen;
3078       int m = TYPE_LENGTH (type) % reglen;
3079
3080       while (n-- > 0)
3081         {
3082           ULONGEST val;
3083           memcpy (&val, (char *)valbuf + offset, reglen);
3084           regcache_cooked_write_unsigned (regcache, regnum, val);
3085           offset += reglen;
3086           regnum++;
3087         }
3088
3089       if (m)
3090         {
3091           memcpy (&val, (char *)valbuf + offset, m);
3092           regcache_cooked_write_unsigned (regcache, regnum, val);
3093         }
3094     }
3095 }
3096
3097 static enum return_value_convention
3098 ia64_return_value (struct gdbarch *gdbarch, struct type *func_type,
3099                    struct type *valtype, struct regcache *regcache,
3100                    gdb_byte *readbuf, const gdb_byte *writebuf)
3101 {
3102   int struct_return = ia64_use_struct_convention (valtype);
3103
3104   if (writebuf != NULL)
3105     {
3106       gdb_assert (!struct_return);
3107       ia64_store_return_value (valtype, regcache, writebuf);
3108     }
3109
3110   if (readbuf != NULL)
3111     {
3112       gdb_assert (!struct_return);
3113       ia64_extract_return_value (valtype, regcache, readbuf);
3114     }
3115
3116   if (struct_return)
3117     return RETURN_VALUE_STRUCT_CONVENTION;
3118   else
3119     return RETURN_VALUE_REGISTER_CONVENTION;
3120 }
3121
3122 static int
3123 is_float_or_hfa_type_recurse (struct type *t, struct type **etp)
3124 {
3125   switch (TYPE_CODE (t))
3126     {
3127     case TYPE_CODE_FLT:
3128       if (*etp)
3129         return TYPE_LENGTH (*etp) == TYPE_LENGTH (t);
3130       else
3131         {
3132           *etp = t;
3133           return 1;
3134         }
3135       break;
3136     case TYPE_CODE_ARRAY:
3137       return
3138         is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t)),
3139                                       etp);
3140       break;
3141     case TYPE_CODE_STRUCT:
3142       {
3143         int i;
3144
3145         for (i = 0; i < TYPE_NFIELDS (t); i++)
3146           if (!is_float_or_hfa_type_recurse
3147               (check_typedef (TYPE_FIELD_TYPE (t, i)), etp))
3148             return 0;
3149         return 1;
3150       }
3151       break;
3152     default:
3153       return 0;
3154       break;
3155     }
3156 }
3157
3158 /* Determine if the given type is one of the floating point types or
3159    and HFA (which is a struct, array, or combination thereof whose
3160    bottom-most elements are all of the same floating point type).  */
3161
3162 static struct type *
3163 is_float_or_hfa_type (struct type *t)
3164 {
3165   struct type *et = 0;
3166
3167   return is_float_or_hfa_type_recurse (t, &et) ? et : 0;
3168 }
3169
3170
3171 /* Return 1 if the alignment of T is such that the next even slot
3172    should be used.  Return 0, if the next available slot should
3173    be used.  (See section 8.5.1 of the IA-64 Software Conventions
3174    and Runtime manual).  */
3175
3176 static int
3177 slot_alignment_is_next_even (struct type *t)
3178 {
3179   switch (TYPE_CODE (t))
3180     {
3181     case TYPE_CODE_INT:
3182     case TYPE_CODE_FLT:
3183       if (TYPE_LENGTH (t) > 8)
3184         return 1;
3185       else
3186         return 0;
3187     case TYPE_CODE_ARRAY:
3188       return
3189         slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t)));
3190     case TYPE_CODE_STRUCT:
3191       {
3192         int i;
3193
3194         for (i = 0; i < TYPE_NFIELDS (t); i++)
3195           if (slot_alignment_is_next_even
3196               (check_typedef (TYPE_FIELD_TYPE (t, i))))
3197             return 1;
3198         return 0;
3199       }
3200     default:
3201       return 0;
3202     }
3203 }
3204
3205 /* Attempt to find (and return) the global pointer for the given
3206    function.
3207
3208    This is a rather nasty bit of code searchs for the .dynamic section
3209    in the objfile corresponding to the pc of the function we're trying
3210    to call.  Once it finds the addresses at which the .dynamic section
3211    lives in the child process, it scans the Elf64_Dyn entries for a
3212    DT_PLTGOT tag.  If it finds one of these, the corresponding
3213    d_un.d_ptr value is the global pointer.  */
3214
3215 static CORE_ADDR
3216 ia64_find_global_pointer (CORE_ADDR faddr)
3217 {
3218   struct obj_section *faddr_sect;
3219
3220   faddr_sect = find_pc_section (faddr);
3221   if (faddr_sect != NULL)
3222     {
3223       struct obj_section *osect;
3224
3225       ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
3226         {
3227           if (strcmp (osect->the_bfd_section->name, ".dynamic") == 0)
3228             break;
3229         }
3230
3231       if (osect < faddr_sect->objfile->sections_end)
3232         {
3233           CORE_ADDR addr, endaddr;
3234
3235           addr = obj_section_addr (osect);
3236           endaddr = obj_section_endaddr (osect);
3237
3238           while (addr < endaddr)
3239             {
3240               int status;
3241               LONGEST tag;
3242               char buf[8];
3243
3244               status = target_read_memory (addr, buf, sizeof (buf));
3245               if (status != 0)
3246                 break;
3247               tag = extract_signed_integer (buf, sizeof (buf));
3248
3249               if (tag == DT_PLTGOT)
3250                 {
3251                   CORE_ADDR global_pointer;
3252
3253                   status = target_read_memory (addr + 8, buf, sizeof (buf));
3254                   if (status != 0)
3255                     break;
3256                   global_pointer = extract_unsigned_integer (buf, sizeof (buf));
3257
3258                   /* The payoff... */
3259                   return global_pointer;
3260                 }
3261
3262               if (tag == DT_NULL)
3263                 break;
3264
3265               addr += 16;
3266             }
3267         }
3268     }
3269   return 0;
3270 }
3271
3272 /* Given a function's address, attempt to find (and return) the
3273    corresponding (canonical) function descriptor.  Return 0 if
3274    not found.  */
3275 static CORE_ADDR
3276 find_extant_func_descr (CORE_ADDR faddr)
3277 {
3278   struct obj_section *faddr_sect;
3279
3280   /* Return early if faddr is already a function descriptor.  */
3281   faddr_sect = find_pc_section (faddr);
3282   if (faddr_sect && strcmp (faddr_sect->the_bfd_section->name, ".opd") == 0)
3283     return faddr;
3284
3285   if (faddr_sect != NULL)
3286     {
3287       struct obj_section *osect;
3288       ALL_OBJFILE_OSECTIONS (faddr_sect->objfile, osect)
3289         {
3290           if (strcmp (osect->the_bfd_section->name, ".opd") == 0)
3291             break;
3292         }
3293
3294       if (osect < faddr_sect->objfile->sections_end)
3295         {
3296           CORE_ADDR addr, endaddr;
3297
3298           addr = obj_section_addr (osect);
3299           endaddr = obj_section_endaddr (osect);
3300
3301           while (addr < endaddr)
3302             {
3303               int status;
3304               LONGEST faddr2;
3305               char buf[8];
3306
3307               status = target_read_memory (addr, buf, sizeof (buf));
3308               if (status != 0)
3309                 break;
3310               faddr2 = extract_signed_integer (buf, sizeof (buf));
3311
3312               if (faddr == faddr2)
3313                 return addr;
3314
3315               addr += 16;
3316             }
3317         }
3318     }
3319   return 0;
3320 }
3321
3322 /* Attempt to find a function descriptor corresponding to the
3323    given address.  If none is found, construct one on the
3324    stack using the address at fdaptr.  */
3325
3326 static CORE_ADDR
3327 find_func_descr (struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr)
3328 {
3329   CORE_ADDR fdesc;
3330
3331   fdesc = find_extant_func_descr (faddr);
3332
3333   if (fdesc == 0)
3334     {
3335       ULONGEST global_pointer;
3336       char buf[16];
3337
3338       fdesc = *fdaptr;
3339       *fdaptr += 16;
3340
3341       global_pointer = ia64_find_global_pointer (faddr);
3342
3343       if (global_pointer == 0)
3344         regcache_cooked_read_unsigned (regcache,
3345                                        IA64_GR1_REGNUM, &global_pointer);
3346
3347       store_unsigned_integer (buf, 8, faddr);
3348       store_unsigned_integer (buf + 8, 8, global_pointer);
3349
3350       write_memory (fdesc, buf, 16);
3351     }
3352
3353   return fdesc;
3354 }
3355
3356 /* Use the following routine when printing out function pointers
3357    so the user can see the function address rather than just the
3358    function descriptor.  */
3359 static CORE_ADDR
3360 ia64_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
3361                                  struct target_ops *targ)
3362 {
3363   struct obj_section *s;
3364
3365   s = find_pc_section (addr);
3366
3367   /* check if ADDR points to a function descriptor.  */
3368   if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
3369     return read_memory_unsigned_integer (addr, 8);
3370
3371   /* Normally, functions live inside a section that is executable.
3372      So, if ADDR points to a non-executable section, then treat it
3373      as a function descriptor and return the target address iff
3374      the target address itself points to a section that is executable.  */
3375   if (s && (s->the_bfd_section->flags & SEC_CODE) == 0)
3376     {
3377       CORE_ADDR pc = read_memory_unsigned_integer (addr, 8);
3378       struct obj_section *pc_section = find_pc_section (pc);
3379
3380       if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
3381         return pc;
3382     }
3383
3384   /* There are also descriptors embedded in vtables.  */
3385   if (s)
3386     {
3387       struct minimal_symbol *minsym;
3388
3389       minsym = lookup_minimal_symbol_by_pc (addr);
3390
3391       if (minsym && is_vtable_name (SYMBOL_LINKAGE_NAME (minsym)))
3392         return read_memory_unsigned_integer (addr, 8);
3393     }
3394
3395   return addr;
3396 }
3397
3398 static CORE_ADDR
3399 ia64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
3400 {
3401   return sp & ~0xfLL;
3402 }
3403
3404 static CORE_ADDR
3405 ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
3406                       struct regcache *regcache, CORE_ADDR bp_addr,
3407                       int nargs, struct value **args, CORE_ADDR sp,
3408                       int struct_return, CORE_ADDR struct_addr)
3409 {
3410   int argno;
3411   struct value *arg;
3412   struct type *type;
3413   int len, argoffset;
3414   int nslots, rseslots, memslots, slotnum, nfuncargs;
3415   int floatreg;
3416   ULONGEST bsp, cfm, pfs, new_bsp;
3417   CORE_ADDR funcdescaddr, pc, global_pointer;
3418   CORE_ADDR func_addr = find_function_addr (function, NULL);
3419
3420   nslots = 0;
3421   nfuncargs = 0;
3422   /* Count the number of slots needed for the arguments.  */
3423   for (argno = 0; argno < nargs; argno++)
3424     {
3425       arg = args[argno];
3426       type = check_typedef (value_type (arg));
3427       len = TYPE_LENGTH (type);
3428
3429       if ((nslots & 1) && slot_alignment_is_next_even (type))
3430         nslots++;
3431
3432       if (TYPE_CODE (type) == TYPE_CODE_FUNC)
3433         nfuncargs++;
3434
3435       nslots += (len + 7) / 8;
3436     }
3437
3438   /* Divvy up the slots between the RSE and the memory stack.  */
3439   rseslots = (nslots > 8) ? 8 : nslots;
3440   memslots = nslots - rseslots;
3441
3442   /* Allocate a new RSE frame.  */
3443   regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
3444
3445   regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
3446   new_bsp = rse_address_add (bsp, rseslots);
3447   regcache_cooked_write_unsigned (regcache, IA64_BSP_REGNUM, new_bsp);
3448
3449   regcache_cooked_read_unsigned (regcache, IA64_PFS_REGNUM, &pfs);
3450   pfs &= 0xc000000000000000LL;
3451   pfs |= (cfm & 0xffffffffffffLL);
3452   regcache_cooked_write_unsigned (regcache, IA64_PFS_REGNUM, pfs);
3453
3454   cfm &= 0xc000000000000000LL;
3455   cfm |= rseslots;
3456   regcache_cooked_write_unsigned (regcache, IA64_CFM_REGNUM, cfm);
3457
3458   /* We will attempt to find function descriptors in the .opd segment,
3459      but if we can't we'll construct them ourselves.  That being the
3460      case, we'll need to reserve space on the stack for them.  */
3461   funcdescaddr = sp - nfuncargs * 16;
3462   funcdescaddr &= ~0xfLL;
3463
3464   /* Adjust the stack pointer to it's new value.  The calling conventions
3465      require us to have 16 bytes of scratch, plus whatever space is
3466      necessary for the memory slots and our function descriptors.  */
3467   sp = sp - 16 - (memslots + nfuncargs) * 8;
3468   sp &= ~0xfLL;                         /* Maintain 16 byte alignment.  */
3469
3470   /* Place the arguments where they belong.  The arguments will be
3471      either placed in the RSE backing store or on the memory stack.
3472      In addition, floating point arguments or HFAs are placed in
3473      floating point registers.  */
3474   slotnum = 0;
3475   floatreg = IA64_FR8_REGNUM;
3476   for (argno = 0; argno < nargs; argno++)
3477     {
3478       struct type *float_elt_type;
3479
3480       arg = args[argno];
3481       type = check_typedef (value_type (arg));
3482       len = TYPE_LENGTH (type);
3483
3484       /* Special handling for function parameters.  */
3485       if (len == 8
3486           && TYPE_CODE (type) == TYPE_CODE_PTR
3487           && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
3488         {
3489           char val_buf[8];
3490           ULONGEST faddr = extract_unsigned_integer (value_contents (arg), 8);
3491           store_unsigned_integer (val_buf, 8,
3492                                   find_func_descr (regcache, faddr,
3493                                                    &funcdescaddr));
3494           if (slotnum < rseslots)
3495             write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
3496           else
3497             write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
3498           slotnum++;
3499           continue;
3500         }
3501
3502       /* Normal slots.  */
3503
3504       /* Skip odd slot if necessary...  */
3505       if ((slotnum & 1) && slot_alignment_is_next_even (type))
3506         slotnum++;
3507
3508       argoffset = 0;
3509       while (len > 0)
3510         {
3511           char val_buf[8];
3512
3513           memset (val_buf, 0, 8);
3514           memcpy (val_buf, value_contents (arg) + argoffset, (len > 8) ? 8 : len);
3515
3516           if (slotnum < rseslots)
3517             write_memory (rse_address_add (bsp, slotnum), val_buf, 8);
3518           else
3519             write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8);
3520
3521           argoffset += 8;
3522           len -= 8;
3523           slotnum++;
3524         }
3525
3526       /* Handle floating point types (including HFAs).  */
3527       float_elt_type = is_float_or_hfa_type (type);
3528       if (float_elt_type != NULL)
3529         {
3530           argoffset = 0;
3531           len = TYPE_LENGTH (type);
3532           while (len > 0 && floatreg < IA64_FR16_REGNUM)
3533             {
3534               char to[MAX_REGISTER_SIZE];
3535               convert_typed_floating (value_contents (arg) + argoffset, float_elt_type,
3536                                       to, ia64_ext_type (gdbarch));
3537               regcache_cooked_write (regcache, floatreg, (void *)to);
3538               floatreg++;
3539               argoffset += TYPE_LENGTH (float_elt_type);
3540               len -= TYPE_LENGTH (float_elt_type);
3541             }
3542         }
3543     }
3544
3545   /* Store the struct return value in r8 if necessary.  */
3546   if (struct_return)
3547     {
3548       regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM, (ULONGEST)struct_addr);
3549     }
3550
3551   global_pointer = ia64_find_global_pointer (func_addr);
3552
3553   if (global_pointer != 0)
3554     regcache_cooked_write_unsigned (regcache, IA64_GR1_REGNUM, global_pointer);
3555
3556   regcache_cooked_write_unsigned (regcache, IA64_BR0_REGNUM, bp_addr);
3557
3558   regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
3559
3560   return sp;
3561 }
3562
3563 static struct frame_id
3564 ia64_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
3565 {
3566   char buf[8];
3567   CORE_ADDR sp, bsp;
3568
3569   get_frame_register (this_frame, sp_regnum, buf);
3570   sp = extract_unsigned_integer (buf, 8);
3571
3572   get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
3573   bsp = extract_unsigned_integer (buf, 8);
3574
3575   if (gdbarch_debug >= 1)
3576     fprintf_unfiltered (gdb_stdlog,
3577                         "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3578                         paddr_nz (get_frame_pc (this_frame)),
3579                         paddr_nz (sp), paddr_nz (bsp));
3580
3581   return frame_id_build_special (sp, get_frame_pc (this_frame), bsp);
3582 }
3583
3584 static CORE_ADDR
3585 ia64_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
3586 {
3587   char buf[8];
3588   CORE_ADDR ip, psr, pc;
3589
3590   frame_unwind_register (next_frame, IA64_IP_REGNUM, buf);
3591   ip = extract_unsigned_integer (buf, 8);
3592   frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf);
3593   psr = extract_unsigned_integer (buf, 8);
3594
3595   pc = (ip & ~0xf) | ((psr >> 41) & 3);
3596   return pc;
3597 }
3598
3599 static int
3600 ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info)
3601 {
3602   info->bytes_per_line = SLOT_MULTIPLIER;
3603   return print_insn_ia64 (memaddr, info);
3604 }
3605
3606 static struct gdbarch *
3607 ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
3608 {
3609   struct gdbarch *gdbarch;
3610   struct gdbarch_tdep *tdep;
3611
3612   /* If there is already a candidate, use it.  */
3613   arches = gdbarch_list_lookup_by_info (arches, &info);
3614   if (arches != NULL)
3615     return arches->gdbarch;
3616
3617   tdep = xmalloc (sizeof (struct gdbarch_tdep));
3618   gdbarch = gdbarch_alloc (&info, tdep);
3619
3620   tdep->sigcontext_register_address = 0;
3621   tdep->pc_in_sigtramp = 0;
3622
3623   /* According to the ia64 specs, instructions that store long double
3624      floats in memory use a long-double format different than that
3625      used in the floating registers.  The memory format matches the
3626      x86 extended float format which is 80 bits.  An OS may choose to
3627      use this format (e.g. GNU/Linux) or choose to use a different
3628      format for storing long doubles (e.g. HPUX).  In the latter case,
3629      the setting of the format may be moved/overridden in an
3630      OS-specific tdep file.  */
3631   set_gdbarch_long_double_format (gdbarch, floatformats_i387_ext);
3632
3633   set_gdbarch_short_bit (gdbarch, 16);
3634   set_gdbarch_int_bit (gdbarch, 32);
3635   set_gdbarch_long_bit (gdbarch, 64);
3636   set_gdbarch_long_long_bit (gdbarch, 64);
3637   set_gdbarch_float_bit (gdbarch, 32);
3638   set_gdbarch_double_bit (gdbarch, 64);
3639   set_gdbarch_long_double_bit (gdbarch, 128);
3640   set_gdbarch_ptr_bit (gdbarch, 64);
3641
3642   set_gdbarch_num_regs (gdbarch, NUM_IA64_RAW_REGS);
3643   set_gdbarch_num_pseudo_regs (gdbarch, LAST_PSEUDO_REGNUM - FIRST_PSEUDO_REGNUM);
3644   set_gdbarch_sp_regnum (gdbarch, sp_regnum);
3645   set_gdbarch_fp0_regnum (gdbarch, IA64_FR0_REGNUM);
3646
3647   set_gdbarch_register_name (gdbarch, ia64_register_name);
3648   set_gdbarch_register_type (gdbarch, ia64_register_type);
3649
3650   set_gdbarch_pseudo_register_read (gdbarch, ia64_pseudo_register_read);
3651   set_gdbarch_pseudo_register_write (gdbarch, ia64_pseudo_register_write);
3652   set_gdbarch_dwarf2_reg_to_regnum (gdbarch, ia64_dwarf_reg_to_regnum);
3653   set_gdbarch_register_reggroup_p (gdbarch, ia64_register_reggroup_p);
3654   set_gdbarch_convert_register_p (gdbarch, ia64_convert_register_p);
3655   set_gdbarch_register_to_value (gdbarch, ia64_register_to_value);
3656   set_gdbarch_value_to_register (gdbarch, ia64_value_to_register);
3657
3658   set_gdbarch_skip_prologue (gdbarch, ia64_skip_prologue);
3659
3660   set_gdbarch_return_value (gdbarch, ia64_return_value);
3661
3662   set_gdbarch_memory_insert_breakpoint (gdbarch, ia64_memory_insert_breakpoint);
3663   set_gdbarch_memory_remove_breakpoint (gdbarch, ia64_memory_remove_breakpoint);
3664   set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
3665   set_gdbarch_read_pc (gdbarch, ia64_read_pc);
3666   set_gdbarch_write_pc (gdbarch, ia64_write_pc);
3667
3668   /* Settings for calling functions in the inferior.  */
3669   set_gdbarch_push_dummy_call (gdbarch, ia64_push_dummy_call);
3670   set_gdbarch_frame_align (gdbarch, ia64_frame_align);
3671   set_gdbarch_dummy_id (gdbarch, ia64_dummy_id);
3672
3673   set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc);
3674 #ifdef HAVE_LIBUNWIND_IA64_H
3675   frame_unwind_append_unwinder (gdbarch,
3676                                 &ia64_libunwind_sigtramp_frame_unwind);
3677   frame_unwind_append_unwinder (gdbarch, &ia64_libunwind_frame_unwind);
3678   frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind);
3679   libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr);
3680 #else
3681   frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind);
3682 #endif
3683   frame_unwind_append_unwinder (gdbarch, &ia64_frame_unwind);
3684   frame_base_set_default (gdbarch, &ia64_frame_base);
3685
3686   /* Settings that should be unnecessary.  */
3687   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
3688
3689   set_gdbarch_print_insn (gdbarch, ia64_print_insn);
3690   set_gdbarch_convert_from_func_ptr_addr (gdbarch, ia64_convert_from_func_ptr_addr);
3691
3692   /* The virtual table contains 16-byte descriptors, not pointers to
3693      descriptors.  */
3694   set_gdbarch_vtable_function_descriptors (gdbarch, 1);
3695
3696   /* Hook in ABI-specific overrides, if they have been registered.  */
3697   gdbarch_init_osabi (info, gdbarch);
3698
3699   return gdbarch;
3700 }
3701
3702 extern initialize_file_ftype _initialize_ia64_tdep; /* -Wmissing-prototypes */
3703
3704 void
3705 _initialize_ia64_tdep (void)
3706 {
3707   gdbarch_register (bfd_arch_ia64, ia64_gdbarch_init, NULL);
3708 }