1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "arch-utils.h"
25 #include "floatformat.h"
28 #include "reggroups.h"
30 #include "frame-base.h"
31 #include "frame-unwind.h"
34 #include "gdb_assert.h"
36 #include "elf/common.h" /* for DT_PLTGOT value */
41 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
49 /* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
64 #define KERNEL_START 0xc000000000000000ULL
66 static size_t ktab_size
= 0;
67 struct ia64_table_entry
69 uint64_t start_offset
;
74 static struct ia64_table_entry
*ktab
= NULL
;
78 /* An enumeration of the different IA-64 instruction types. */
80 typedef enum instruction_type
82 A
, /* Integer ALU ; I-unit or M-unit */
83 I
, /* Non-ALU integer; I-unit */
84 M
, /* Memory ; M-unit */
85 F
, /* Floating-point ; F-unit */
86 B
, /* Branch ; B-unit */
87 L
, /* Extended (L+X) ; I-unit */
88 X
, /* Extended (L+X) ; I-unit */
89 undefined
/* undefined or reserved */
92 /* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
107 #define SLOT_MULTIPLIER 1
109 /* Length in bytes of an instruction bundle */
111 #define BUNDLE_LEN 16
113 static gdbarch_init_ftype ia64_gdbarch_init
;
115 static gdbarch_register_name_ftype ia64_register_name
;
116 static gdbarch_register_type_ftype ia64_register_type
;
117 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
118 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
119 static struct type
*is_float_or_hfa_type (struct type
*t
);
120 static CORE_ADDR
ia64_find_global_pointer (CORE_ADDR faddr
);
122 static struct type
*builtin_type_ia64_ext
;
124 #define NUM_IA64_RAW_REGS 462
126 static int sp_regnum
= IA64_GR12_REGNUM
;
127 static int fp_regnum
= IA64_VFP_REGNUM
;
128 static int lr_regnum
= IA64_VRAP_REGNUM
;
130 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
131 they may not be accessible via the ptrace register get/set interfaces. */
132 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
133 V127_REGNUM
= V32_REGNUM
+ 95,
134 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
136 /* Array of register names; There should be ia64_num_regs strings in
139 static char *ia64_register_names
[] =
140 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
143 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
144 "", "", "", "", "", "", "", "",
145 "", "", "", "", "", "", "", "",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
157 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
158 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
159 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
160 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
161 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
162 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
163 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
164 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
165 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
166 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
167 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
168 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
169 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
170 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
171 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
172 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
174 "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
183 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
187 "pr", "ip", "psr", "cfm",
189 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
190 "", "", "", "", "", "", "", "",
191 "rsc", "bsp", "bspstore", "rnat",
193 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
194 "ccv", "", "", "", "unat", "", "", "",
195 "fpsr", "", "", "", "itc",
196 "", "", "", "", "", "", "", "", "", "",
197 "", "", "", "", "", "", "", "", "",
199 "", "", "", "", "", "", "", "", "", "",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
206 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
207 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
208 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
209 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
210 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
211 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
212 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
213 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
214 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
215 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
216 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
217 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
218 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
219 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
220 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
221 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
225 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
226 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
227 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
228 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
229 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
230 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
231 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
232 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
233 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
234 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
235 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
236 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
238 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
239 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
240 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
241 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
242 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
243 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
244 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
245 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
248 struct ia64_frame_cache
250 CORE_ADDR base
; /* frame pointer base for frame */
251 CORE_ADDR pc
; /* function start pc for frame */
252 CORE_ADDR saved_sp
; /* stack pointer for frame */
253 CORE_ADDR bsp
; /* points at r32 for the current frame */
254 CORE_ADDR cfm
; /* cfm value for current frame */
255 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
257 int sof
; /* Size of frame (decoded from cfm value) */
258 int sol
; /* Size of locals (decoded from cfm value) */
259 int sor
; /* Number of rotating registers. (decoded from cfm value) */
260 CORE_ADDR after_prologue
;
261 /* Address of first instruction after the last
262 prologue instruction; Note that there may
263 be instructions from the function's body
264 intermingled with the prologue. */
265 int mem_stack_frame_size
;
266 /* Size of the memory stack frame (may be zero),
267 or -1 if it has not been determined yet. */
268 int fp_reg
; /* Register number (if any) used a frame pointer
269 for this frame. 0 if no register is being used
270 as the frame pointer. */
272 /* Saved registers. */
273 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
278 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
279 struct reggroup
*group
)
284 if (group
== all_reggroup
)
286 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
287 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
288 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
289 if (group
== float_reggroup
)
291 if (group
== vector_reggroup
)
293 if (group
== general_reggroup
)
294 return (!vector_p
&& !float_p
);
295 if (group
== save_reggroup
|| group
== restore_reggroup
)
301 ia64_register_name (int reg
)
303 return ia64_register_names
[reg
];
307 ia64_register_type (struct gdbarch
*arch
, int reg
)
309 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
310 return builtin_type_ia64_ext
;
312 return builtin_type_long
;
316 ia64_dwarf_reg_to_regnum (int reg
)
318 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
319 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
324 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
329 const struct floatformat floatformat_ia64_ext
=
331 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
332 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
335 const struct floatformat
*floatformats_ia64_ext
[2] =
337 &floatformat_ia64_ext
,
338 &floatformat_ia64_ext
342 /* Extract ``len'' bits from an instruction bundle starting at
346 extract_bit_field (char *bundle
, int from
, int len
)
348 long long result
= 0LL;
350 int from_byte
= from
/ 8;
351 int to_byte
= to
/ 8;
352 unsigned char *b
= (unsigned char *) bundle
;
358 if (from_byte
== to_byte
)
359 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
360 result
= c
>> (from
% 8);
361 lshift
= 8 - (from
% 8);
363 for (i
= from_byte
+1; i
< to_byte
; i
++)
365 result
|= ((long long) b
[i
]) << lshift
;
369 if (from_byte
< to_byte
&& (to
% 8 != 0))
372 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
373 result
|= ((long long) c
) << lshift
;
379 /* Replace the specified bits in an instruction bundle */
382 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
385 int from_byte
= from
/ 8;
386 int to_byte
= to
/ 8;
387 unsigned char *b
= (unsigned char *) bundle
;
390 if (from_byte
== to_byte
)
392 unsigned char left
, right
;
394 left
= (c
>> (to
% 8)) << (to
% 8);
395 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
396 c
= (unsigned char) (val
& 0xff);
397 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
405 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
406 c
= c
| (val
<< (from
% 8));
408 val
>>= 8 - from
% 8;
410 for (i
= from_byte
+1; i
< to_byte
; i
++)
419 unsigned char cv
= (unsigned char) val
;
421 c
= c
>> (to
% 8) << (to
% 8);
422 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
428 /* Return the contents of slot N (for N = 0, 1, or 2) in
429 and instruction bundle */
432 slotN_contents (char *bundle
, int slotnum
)
434 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
437 /* Store an instruction in an instruction bundle */
440 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
442 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
445 static enum instruction_type template_encoding_table
[32][3] =
447 { M
, I
, I
}, /* 00 */
448 { M
, I
, I
}, /* 01 */
449 { M
, I
, I
}, /* 02 */
450 { M
, I
, I
}, /* 03 */
451 { M
, L
, X
}, /* 04 */
452 { M
, L
, X
}, /* 05 */
453 { undefined
, undefined
, undefined
}, /* 06 */
454 { undefined
, undefined
, undefined
}, /* 07 */
455 { M
, M
, I
}, /* 08 */
456 { M
, M
, I
}, /* 09 */
457 { M
, M
, I
}, /* 0A */
458 { M
, M
, I
}, /* 0B */
459 { M
, F
, I
}, /* 0C */
460 { M
, F
, I
}, /* 0D */
461 { M
, M
, F
}, /* 0E */
462 { M
, M
, F
}, /* 0F */
463 { M
, I
, B
}, /* 10 */
464 { M
, I
, B
}, /* 11 */
465 { M
, B
, B
}, /* 12 */
466 { M
, B
, B
}, /* 13 */
467 { undefined
, undefined
, undefined
}, /* 14 */
468 { undefined
, undefined
, undefined
}, /* 15 */
469 { B
, B
, B
}, /* 16 */
470 { B
, B
, B
}, /* 17 */
471 { M
, M
, B
}, /* 18 */
472 { M
, M
, B
}, /* 19 */
473 { undefined
, undefined
, undefined
}, /* 1A */
474 { undefined
, undefined
, undefined
}, /* 1B */
475 { M
, F
, B
}, /* 1C */
476 { M
, F
, B
}, /* 1D */
477 { undefined
, undefined
, undefined
}, /* 1E */
478 { undefined
, undefined
, undefined
}, /* 1F */
481 /* Fetch and (partially) decode an instruction at ADDR and return the
482 address of the next instruction to fetch. */
485 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
487 char bundle
[BUNDLE_LEN
];
488 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
492 /* Warn about slot numbers greater than 2. We used to generate
493 an error here on the assumption that the user entered an invalid
494 address. But, sometimes GDB itself requests an invalid address.
495 This can (easily) happen when execution stops in a function for
496 which there are no symbols. The prologue scanner will attempt to
497 find the beginning of the function - if the nearest symbol
498 happens to not be aligned on a bundle boundary (16 bytes), the
499 resulting starting address will cause GDB to think that the slot
502 So we warn about it and set the slot number to zero. It is
503 not necessarily a fatal condition, particularly if debugging
504 at the assembly language level. */
507 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
508 "Using slot 0 instead"));
514 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
519 *instr
= slotN_contents (bundle
, slotnum
);
520 template = extract_bit_field (bundle
, 0, 5);
521 *it
= template_encoding_table
[(int)template][slotnum
];
523 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
526 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
531 /* There are 5 different break instructions (break.i, break.b,
532 break.m, break.f, and break.x), but they all have the same
533 encoding. (The five bit template in the low five bits of the
534 instruction bundle distinguishes one from another.)
536 The runtime architecture manual specifies that break instructions
537 used for debugging purposes must have the upper two bits of the 21
538 bit immediate set to a 0 and a 1 respectively. A breakpoint
539 instruction encodes the most significant bit of its 21 bit
540 immediate at bit 36 of the 41 bit instruction. The penultimate msb
541 is at bit 25 which leads to the pattern below.
543 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
544 it turns out that 0x80000 was used as the syscall break in the early
545 simulators. So I changed the pattern slightly to do "break.i 0x080001"
546 instead. But that didn't work either (I later found out that this
547 pattern was used by the simulator that I was using.) So I ended up
548 using the pattern seen below. */
551 #define IA64_BREAKPOINT 0x00002000040LL
553 #define IA64_BREAKPOINT 0x00003333300LL
556 ia64_memory_insert_breakpoint (struct bp_target_info
*bp_tgt
)
558 CORE_ADDR addr
= bp_tgt
->placed_address
;
559 char bundle
[BUNDLE_LEN
];
560 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
566 error (_("Can't insert breakpoint for slot numbers greater than 2."));
570 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
572 /* Check for L type instruction in 2nd slot, if present then
573 bump up the slot number to the 3rd slot */
574 template = extract_bit_field (bundle
, 0, 5);
575 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
580 instr
= slotN_contents (bundle
, slotnum
);
581 memcpy (bp_tgt
->shadow_contents
, &instr
, sizeof (instr
));
582 bp_tgt
->placed_size
= bp_tgt
->shadow_len
= sizeof (instr
);
583 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
585 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
591 ia64_memory_remove_breakpoint (struct bp_target_info
*bp_tgt
)
593 CORE_ADDR addr
= bp_tgt
->placed_address
;
594 char bundle
[BUNDLE_LEN
];
595 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
602 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
604 /* Check for L type instruction in 2nd slot, if present then
605 bump up the slot number to the 3rd slot */
606 template = extract_bit_field (bundle
, 0, 5);
607 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
612 memcpy (&instr
, bp_tgt
->shadow_contents
, sizeof instr
);
613 replace_slotN_contents (bundle
, instr
, slotnum
);
615 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
620 /* We don't really want to use this, but remote.c needs to call it in order
621 to figure out if Z-packets are supported or not. Oh, well. */
622 const unsigned char *
623 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
625 static unsigned char breakpoint
[] =
626 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
627 *lenptr
= sizeof (breakpoint
);
635 ia64_read_pc (struct regcache
*regcache
)
637 ULONGEST psr_value
, pc_value
;
640 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
641 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &pc_value
);
642 slot_num
= (psr_value
>> 41) & 3;
644 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
648 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
650 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
653 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
654 psr_value
&= ~(3LL << 41);
655 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
659 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
660 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
663 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
665 /* Returns the address of the slot that's NSLOTS slots away from
666 the address ADDR. NSLOTS may be positive or negative. */
668 rse_address_add(CORE_ADDR addr
, int nslots
)
671 int mandatory_nat_slots
= nslots
/ 63;
672 int direction
= nslots
< 0 ? -1 : 1;
674 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
676 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
677 new_addr
+= 8 * direction
;
679 if (IS_NaT_COLLECTION_ADDR(new_addr
))
680 new_addr
+= 8 * direction
;
686 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
687 int regnum
, gdb_byte
*buf
)
689 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
691 #ifdef HAVE_LIBUNWIND_IA64_H
692 /* First try and use the libunwind special reg accessor, otherwise fallback to
694 if (!libunwind_is_initialized ()
695 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
698 /* The fallback position is to assume that r32-r127 are found sequentially
699 in memory starting at $bof. This isn't always true, but without libunwind,
700 this is the best we can do. */
704 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
705 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
707 /* The bsp points at the end of the register frame so we
708 subtract the size of frame from it to get start of register frame. */
709 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
711 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
713 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
714 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
715 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), reg
);
718 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), 0);
721 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
725 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
726 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
727 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), unatN_val
);
729 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
731 ULONGEST natN_val
= 0;
734 CORE_ADDR gr_addr
= 0;
735 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
736 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
738 /* The bsp points at the end of the register frame so we
739 subtract the size of frame from it to get start of register frame. */
740 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
742 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
743 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
747 /* Compute address of nat collection bits. */
748 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
749 CORE_ADDR nat_collection
;
751 /* If our nat collection address is bigger than bsp, we have to get
752 the nat collection from rnat. Otherwise, we fetch the nat
753 collection from the computed address. */
755 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
757 nat_collection
= read_memory_integer (nat_addr
, 8);
758 nat_bit
= (gr_addr
>> 3) & 0x3f;
759 natN_val
= (nat_collection
>> nat_bit
) & 1;
762 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), natN_val
);
764 else if (regnum
== VBOF_REGNUM
)
766 /* A virtual register frame start is provided for user convenience.
767 It can be calculated as the bsp - sof (sizeof frame). */
771 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
772 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
774 /* The bsp points at the end of the register frame so we
775 subtract the size of frame from it to get beginning of frame. */
776 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
777 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), vbsp
);
779 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
785 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
786 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
788 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
790 /* Fetch predicate register rename base from current frame
791 marker for this frame. */
792 int rrb_pr
= (cfm
>> 32) & 0x3f;
794 /* Adjust the register number to account for register rotation. */
796 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
798 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
799 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
), prN_val
);
802 memset (buf
, 0, register_size (gdbarch
, regnum
));
806 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
807 int regnum
, const gdb_byte
*buf
)
809 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
814 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
815 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
817 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
819 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
821 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
822 write_memory (reg_addr
, (void *)buf
, 8);
825 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
827 ULONGEST unatN_val
, unat
, unatN_mask
;
828 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
829 unatN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
));
830 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
833 else if (unatN_val
== 1)
835 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
837 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
842 CORE_ADDR gr_addr
= 0;
843 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
844 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
846 /* The bsp points at the end of the register frame so we
847 subtract the size of frame from it to get start of register frame. */
848 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
850 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
851 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
853 natN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
));
855 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
857 /* Compute address of nat collection bits. */
858 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
859 CORE_ADDR nat_collection
;
860 int natN_bit
= (gr_addr
>> 3) & 0x3f;
861 ULONGEST natN_mask
= (1LL << natN_bit
);
862 /* If our nat collection address is bigger than bsp, we have to get
863 the nat collection from rnat. Otherwise, we fetch the nat
864 collection from the computed address. */
867 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
869 nat_collection
|= natN_mask
;
871 nat_collection
&= ~natN_mask
;
872 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
877 nat_collection
= read_memory_integer (nat_addr
, 8);
879 nat_collection
|= natN_mask
;
881 nat_collection
&= ~natN_mask
;
882 store_unsigned_integer (nat_buf
, register_size (gdbarch
, regnum
), nat_collection
);
883 write_memory (nat_addr
, nat_buf
, 8);
887 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
894 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
895 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
897 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
899 /* Fetch predicate register rename base from current frame
900 marker for this frame. */
901 int rrb_pr
= (cfm
>> 32) & 0x3f;
903 /* Adjust the register number to account for register rotation. */
905 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
907 prN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
));
908 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
911 else if (prN_val
== 1)
913 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
917 /* The ia64 needs to convert between various ieee floating-point formats
918 and the special ia64 floating point register format. */
921 ia64_convert_register_p (int regno
, struct type
*type
)
923 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
);
927 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
928 struct type
*valtype
, gdb_byte
*out
)
930 char in
[MAX_REGISTER_SIZE
];
931 frame_register_read (frame
, regnum
, in
);
932 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
936 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
937 struct type
*valtype
, const gdb_byte
*in
)
939 char out
[MAX_REGISTER_SIZE
];
940 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
941 put_frame_register (frame
, regnum
, out
);
945 /* Limit the number of skipped non-prologue instructions since examining
946 of the prologue is expensive. */
947 static int max_skip_non_prologue_insns
= 40;
949 /* Given PC representing the starting address of a function, and
950 LIM_PC which is the (sloppy) limit to which to scan when looking
951 for a prologue, attempt to further refine this limit by using
952 the line data in the symbol table. If successful, a better guess
953 on where the prologue ends is returned, otherwise the previous
954 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
955 which will be set to indicate whether the returned limit may be
956 used with no further scanning in the event that the function is
959 /* FIXME: cagney/2004-02-14: This function and logic have largely been
960 superseded by skip_prologue_using_sal. */
963 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
965 struct symtab_and_line prologue_sal
;
966 CORE_ADDR start_pc
= pc
;
969 /* The prologue can not possibly go past the function end itself,
970 so we can already adjust LIM_PC accordingly. */
971 if (find_pc_partial_function (pc
, NULL
, NULL
, &end_pc
) && end_pc
< lim_pc
)
974 /* Start off not trusting the limit. */
977 prologue_sal
= find_pc_line (pc
, 0);
978 if (prologue_sal
.line
!= 0)
981 CORE_ADDR addr
= prologue_sal
.end
;
983 /* Handle the case in which compiler's optimizer/scheduler
984 has moved instructions into the prologue. We scan ahead
985 in the function looking for address ranges whose corresponding
986 line number is less than or equal to the first one that we
987 found for the function. (It can be less than when the
988 scheduler puts a body instruction before the first prologue
990 for (i
= 2 * max_skip_non_prologue_insns
;
991 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
994 struct symtab_and_line sal
;
996 sal
= find_pc_line (addr
, 0);
999 if (sal
.line
<= prologue_sal
.line
1000 && sal
.symtab
== prologue_sal
.symtab
)
1007 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1009 lim_pc
= prologue_sal
.end
;
1010 if (start_pc
== get_pc_function_start (lim_pc
))
1017 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1018 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1019 || (14 <= (_regnum_) && (_regnum_) <= 31))
1020 #define imm9(_instr_) \
1021 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1022 | (((_instr_) & 0x00008000000LL) >> 20) \
1023 | (((_instr_) & 0x00000001fc0LL) >> 6))
1025 /* Allocate and initialize a frame cache. */
1027 static struct ia64_frame_cache
*
1028 ia64_alloc_frame_cache (void)
1030 struct ia64_frame_cache
*cache
;
1033 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1039 cache
->prev_cfm
= 0;
1045 cache
->frameless
= 1;
1047 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1048 cache
->saved_regs
[i
] = 0;
1054 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1057 CORE_ADDR last_prologue_pc
= pc
;
1058 instruction_type it
;
1063 int unat_save_reg
= 0;
1064 int pr_save_reg
= 0;
1065 int mem_stack_frame_size
= 0;
1067 CORE_ADDR spill_addr
= 0;
1070 char reg_contents
[256];
1076 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1078 memset (instores
, 0, sizeof instores
);
1079 memset (infpstores
, 0, sizeof infpstores
);
1080 memset (reg_contents
, 0, sizeof reg_contents
);
1082 if (cache
->after_prologue
!= 0
1083 && cache
->after_prologue
<= lim_pc
)
1084 return cache
->after_prologue
;
1086 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1087 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1089 /* We want to check if we have a recognizable function start before we
1090 look ahead for a prologue. */
1091 if (pc
< lim_pc
&& next_pc
1092 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1094 /* alloc - start of a regular function. */
1095 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1096 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1097 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1098 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1100 /* Verify that the current cfm matches what we think is the
1101 function start. If we have somehow jumped within a function,
1102 we do not want to interpret the prologue and calculate the
1103 addresses of various registers such as the return address.
1104 We will instead treat the frame as frameless. */
1106 (sof
== (cache
->cfm
& 0x7f) &&
1107 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1111 last_prologue_pc
= next_pc
;
1116 /* Look for a leaf routine. */
1117 if (pc
< lim_pc
&& next_pc
1118 && (it
== I
|| it
== M
)
1119 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1121 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1122 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1123 | ((instr
& 0x001f8000000LL
) >> 20)
1124 | ((instr
& 0x000000fe000LL
) >> 13));
1125 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1126 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1127 int qp
= (int) (instr
& 0x0000000003fLL
);
1128 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1130 /* mov r2, r12 - beginning of leaf routine */
1132 last_prologue_pc
= next_pc
;
1136 /* If we don't recognize a regular function or leaf routine, we are
1142 last_prologue_pc
= lim_pc
;
1146 /* Loop, looking for prologue instructions, keeping track of
1147 where preserved registers were spilled. */
1150 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1154 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1156 /* Exit loop upon hitting a non-nop branch instruction. */
1161 else if (((instr
& 0x3fLL
) != 0LL) &&
1162 (frameless
|| ret_reg
!= 0))
1164 /* Exit loop upon hitting a predicated instruction if
1165 we already have the return register or if we are frameless. */
1170 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1173 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1174 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1175 int qp
= (int) (instr
& 0x0000000003f);
1177 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1180 last_prologue_pc
= next_pc
;
1183 else if ((it
== I
|| it
== M
)
1184 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1186 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1187 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1188 | ((instr
& 0x001f8000000LL
) >> 20)
1189 | ((instr
& 0x000000fe000LL
) >> 13));
1190 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1191 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1192 int qp
= (int) (instr
& 0x0000000003fLL
);
1194 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1198 last_prologue_pc
= next_pc
;
1200 else if (qp
== 0 && rN
== 12 && rM
== 12)
1202 /* adds r12, -mem_stack_frame_size, r12 */
1203 mem_stack_frame_size
-= imm
;
1204 last_prologue_pc
= next_pc
;
1206 else if (qp
== 0 && rN
== 2
1207 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1209 char buf
[MAX_REGISTER_SIZE
];
1210 CORE_ADDR saved_sp
= 0;
1211 /* adds r2, spilloffset, rFramePointer
1213 adds r2, spilloffset, r12
1215 Get ready for stf.spill or st8.spill instructions.
1216 The address to start spilling at is loaded into r2.
1217 FIXME: Why r2? That's what gcc currently uses; it
1218 could well be different for other compilers. */
1220 /* Hmm... whether or not this will work will depend on
1221 where the pc is. If it's still early in the prologue
1222 this'll be wrong. FIXME */
1225 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1226 saved_sp
= extract_unsigned_integer (buf
, 8);
1228 spill_addr
= saved_sp
1229 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1232 last_prologue_pc
= next_pc
;
1234 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1235 rN
< 256 && imm
== 0)
1237 /* mov rN, rM where rM is an input register */
1238 reg_contents
[rN
] = rM
;
1239 last_prologue_pc
= next_pc
;
1241 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1245 last_prologue_pc
= next_pc
;
1250 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1251 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1253 /* stf.spill [rN] = fM, imm9
1255 stf.spill [rN] = fM */
1257 int imm
= imm9(instr
);
1258 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1259 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1260 int qp
= (int) (instr
& 0x0000000003fLL
);
1261 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1262 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1264 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1266 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1269 spill_addr
= 0; /* last one; must be done */
1270 last_prologue_pc
= next_pc
;
1273 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1274 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1280 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1281 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1282 int qp
= (int) (instr
& 0x0000000003fLL
);
1283 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1285 /* We have something like "mov.m r3 = ar.unat". Remember the
1286 r3 (or whatever) and watch for a store of this register... */
1288 last_prologue_pc
= next_pc
;
1291 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1294 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1295 int qp
= (int) (instr
& 0x0000000003fLL
);
1296 if (qp
== 0 && isScratch (rN
))
1299 last_prologue_pc
= next_pc
;
1303 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1304 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1308 st8 [rN] = rM, imm9 */
1309 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1310 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1311 int qp
= (int) (instr
& 0x0000000003fLL
);
1312 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1313 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1314 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1316 /* We've found a spill of either the UNAT register or the PR
1317 register. (Well, not exactly; what we've actually found is
1318 a spill of the register that UNAT or PR was moved to).
1319 Record that fact and move on... */
1320 if (rM
== unat_save_reg
)
1322 /* Track UNAT register */
1323 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1328 /* Track PR register */
1329 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1332 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1333 /* st8 [rN] = rM, imm9 */
1334 spill_addr
+= imm9(instr
);
1336 spill_addr
= 0; /* must be done spilling */
1337 last_prologue_pc
= next_pc
;
1339 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1341 /* Allow up to one store of each input register. */
1342 instores
[rM
-32] = 1;
1343 last_prologue_pc
= next_pc
;
1345 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1346 !instores
[indirect
-32])
1348 /* Allow an indirect store of an input register. */
1349 instores
[indirect
-32] = 1;
1350 last_prologue_pc
= next_pc
;
1353 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1360 Note that the st8 case is handled in the clause above.
1362 Advance over stores of input registers. One store per input
1363 register is permitted. */
1364 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1365 int qp
= (int) (instr
& 0x0000000003fLL
);
1366 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1367 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1369 instores
[rM
-32] = 1;
1370 last_prologue_pc
= next_pc
;
1372 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1373 !instores
[indirect
-32])
1375 /* Allow an indirect store of an input register. */
1376 instores
[indirect
-32] = 1;
1377 last_prologue_pc
= next_pc
;
1380 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1387 Advance over stores of floating point input registers. Again
1388 one store per register is permitted */
1389 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1390 int qp
= (int) (instr
& 0x0000000003fLL
);
1391 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1393 infpstores
[fM
-8] = 1;
1394 last_prologue_pc
= next_pc
;
1398 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1399 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1401 /* st8.spill [rN] = rM
1403 st8.spill [rN] = rM, imm9 */
1404 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1405 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1406 int qp
= (int) (instr
& 0x0000000003fLL
);
1407 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1409 /* We've found a spill of one of the preserved general purpose
1410 regs. Record the spill address and advance the spill
1411 register if appropriate. */
1412 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1413 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1414 /* st8.spill [rN] = rM, imm9 */
1415 spill_addr
+= imm9(instr
);
1417 spill_addr
= 0; /* Done spilling */
1418 last_prologue_pc
= next_pc
;
1425 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1426 registers for the previous frame which will be needed later. */
1428 if (!frameless
&& next_frame
)
1430 /* Extract the size of the rotating portion of the stack
1431 frame and the register rename base from the current
1437 rrb_gr
= (cfm
>> 18) & 0x7f;
1439 /* Find the bof (beginning of frame). */
1440 bof
= rse_address_add (cache
->bsp
, -sof
);
1442 for (i
= 0, addr
= bof
;
1446 if (IS_NaT_COLLECTION_ADDR (addr
))
1450 if (i
+32 == cfm_reg
)
1451 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1452 if (i
+32 == ret_reg
)
1453 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1455 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1458 /* For the previous argument registers we require the previous bof.
1459 If we can't find the previous cfm, then we can do nothing. */
1461 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1463 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1465 else if (cfm_reg
!= 0)
1467 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1468 cfm
= extract_unsigned_integer (buf
, 8);
1470 cache
->prev_cfm
= cfm
;
1474 sor
= ((cfm
>> 14) & 0xf) * 8;
1476 sol
= (cfm
>> 7) & 0x7f;
1477 rrb_gr
= (cfm
>> 18) & 0x7f;
1479 /* The previous bof only requires subtraction of the sol (size of locals)
1480 due to the overlap between output and input of subsequent frames. */
1481 bof
= rse_address_add (bof
, -sol
);
1483 for (i
= 0, addr
= bof
;
1487 if (IS_NaT_COLLECTION_ADDR (addr
))
1492 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1495 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1501 /* Try and trust the lim_pc value whenever possible. */
1502 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1503 last_prologue_pc
= lim_pc
;
1505 cache
->frameless
= frameless
;
1506 cache
->after_prologue
= last_prologue_pc
;
1507 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1508 cache
->fp_reg
= fp_reg
;
1510 return last_prologue_pc
;
1514 ia64_skip_prologue (CORE_ADDR pc
)
1516 struct ia64_frame_cache cache
;
1518 cache
.after_prologue
= 0;
1522 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1523 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1527 /* Normal frames. */
1529 static struct ia64_frame_cache
*
1530 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1532 struct ia64_frame_cache
*cache
;
1534 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1540 cache
= ia64_alloc_frame_cache ();
1541 *this_cache
= cache
;
1543 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1544 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1546 /* We always want the bsp to point to the end of frame.
1547 This way, we can always get the beginning of frame (bof)
1548 by subtracting frame size. */
1549 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1550 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1552 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1553 psr
= extract_unsigned_integer (buf
, 8);
1555 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1556 cfm
= extract_unsigned_integer (buf
, 8);
1558 cache
->sof
= (cfm
& 0x7f);
1559 cache
->sol
= (cfm
>> 7) & 0x7f;
1560 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1564 cache
->pc
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
1567 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1569 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1575 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1576 struct frame_id
*this_id
)
1578 struct ia64_frame_cache
*cache
=
1579 ia64_frame_cache (next_frame
, this_cache
);
1581 /* If outermost frame, mark with null frame id. */
1582 if (cache
->base
== 0)
1583 (*this_id
) = null_frame_id
;
1585 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1586 if (gdbarch_debug
>= 1)
1587 fprintf_unfiltered (gdb_stdlog
,
1588 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1589 paddr_nz (this_id
->code_addr
),
1590 paddr_nz (this_id
->stack_addr
),
1591 paddr_nz (cache
->bsp
), next_frame
);
1595 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1596 int regnum
, int *optimizedp
,
1597 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1598 int *realnump
, gdb_byte
*valuep
)
1600 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
1601 struct ia64_frame_cache
*cache
=
1602 ia64_frame_cache (next_frame
, this_cache
);
1603 char dummy_valp
[MAX_REGISTER_SIZE
];
1606 gdb_assert (regnum
>= 0);
1608 if (!target_has_registers
)
1609 error (_("No registers."));
1616 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1617 when valuep is not supplied. */
1619 valuep
= dummy_valp
;
1621 memset (valuep
, 0, register_size (gdbarch
, regnum
));
1623 if (regnum
== gdbarch_sp_regnum (gdbarch
))
1625 /* Handle SP values for all frames but the topmost. */
1626 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
),
1629 else if (regnum
== IA64_BSP_REGNUM
)
1631 char cfm_valuep
[MAX_REGISTER_SIZE
];
1634 enum lval_type cfm_lval
;
1636 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1638 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1639 This corresponds to what the hardware bsp register will be if we pop the frame
1640 back which is why we might have been called. We know the beginning of the current
1641 frame is cache->bsp - cache->sof. This value in the previous frame points to
1642 the start of the output registers. We can calculate the end of that frame by adding
1643 the size of output (sof (size of frame) - sol (size of locals)). */
1644 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1645 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1646 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1648 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1649 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1651 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
),
1654 else if (regnum
== IA64_CFM_REGNUM
)
1656 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1660 *lvalp
= lval_memory
;
1662 read_memory (addr
, valuep
, register_size (gdbarch
, regnum
));
1664 else if (cache
->prev_cfm
)
1665 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
), cache
->prev_cfm
);
1666 else if (cache
->frameless
)
1669 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1672 else if (regnum
== IA64_VFP_REGNUM
)
1674 /* If the function in question uses an automatic register (r32-r127)
1675 for the frame pointer, it'll be found by ia64_find_saved_register()
1676 above. If the function lacks one of these frame pointers, we can
1677 still provide a value since we know the size of the frame. */
1678 CORE_ADDR vfp
= cache
->base
;
1679 store_unsigned_integer (valuep
, register_size (gdbarch
, IA64_VFP_REGNUM
), vfp
);
1681 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1683 char pr_valuep
[MAX_REGISTER_SIZE
];
1686 enum lval_type pr_lval
;
1689 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1690 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1691 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1693 /* Fetch predicate register rename base from current frame
1694 marker for this frame. */
1695 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1697 /* Adjust the register number to account for register rotation. */
1698 regnum
= VP16_REGNUM
1699 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1701 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1702 regnum
- VP0_REGNUM
, 1);
1703 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
), prN_val
);
1705 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1707 char unat_valuep
[MAX_REGISTER_SIZE
];
1710 enum lval_type unat_lval
;
1711 CORE_ADDR unat_addr
;
1713 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1714 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1715 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1716 regnum
- IA64_NAT0_REGNUM
, 1);
1717 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
),
1720 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1723 /* Find address of general register corresponding to nat bit we're
1727 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1731 /* Compute address of nat collection bits. */
1732 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1734 CORE_ADDR nat_collection
;
1736 /* If our nat collection address is bigger than bsp, we have to get
1737 the nat collection from rnat. Otherwise, we fetch the nat
1738 collection from the computed address. */
1739 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1740 bsp
= extract_unsigned_integer (buf
, 8);
1741 if (nat_addr
>= bsp
)
1743 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1744 nat_collection
= extract_unsigned_integer (buf
, 8);
1747 nat_collection
= read_memory_integer (nat_addr
, 8);
1748 nat_bit
= (gr_addr
>> 3) & 0x3f;
1749 natval
= (nat_collection
>> nat_bit
) & 1;
1752 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
), natval
);
1754 else if (regnum
== IA64_IP_REGNUM
)
1757 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1761 *lvalp
= lval_memory
;
1763 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
1764 pc
= extract_unsigned_integer (buf
, 8);
1766 else if (cache
->frameless
)
1768 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1769 pc
= extract_unsigned_integer (buf
, 8);
1772 store_unsigned_integer (valuep
, 8, pc
);
1774 else if (regnum
== IA64_PSR_REGNUM
)
1776 /* We don't know how to get the complete previous PSR, but we need it for
1777 the slot information when we unwind the pc (pc is formed of IP register
1778 plus slot information from PSR). To get the previous slot information,
1779 we mask it off the return address. */
1780 ULONGEST slot_num
= 0;
1783 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1785 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1786 psr
= extract_unsigned_integer (buf
, 8);
1790 *lvalp
= lval_memory
;
1792 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
1793 pc
= extract_unsigned_integer (buf
, 8);
1795 else if (cache
->frameless
)
1798 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1799 pc
= extract_unsigned_integer (buf
, 8);
1801 psr
&= ~(3LL << 41);
1802 slot_num
= pc
& 0x3LL
;
1803 psr
|= (CORE_ADDR
)slot_num
<< 41;
1804 store_unsigned_integer (valuep
, 8, psr
);
1806 else if (regnum
== IA64_BR0_REGNUM
)
1809 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1812 *lvalp
= lval_memory
;
1814 read_memory (addr
, buf
, register_size (gdbarch
, IA64_BR0_REGNUM
));
1815 br0
= extract_unsigned_integer (buf
, 8);
1817 store_unsigned_integer (valuep
, 8, br0
);
1819 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1820 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1823 if (regnum
>= V32_REGNUM
)
1824 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1825 addr
= cache
->saved_regs
[regnum
];
1828 *lvalp
= lval_memory
;
1830 read_memory (addr
, valuep
, register_size (gdbarch
, regnum
));
1832 else if (cache
->frameless
)
1834 char r_valuep
[MAX_REGISTER_SIZE
];
1837 enum lval_type r_lval
;
1839 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1841 if (regnum
>= V32_REGNUM
)
1842 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1843 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1844 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1845 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1846 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1847 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1848 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1849 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1851 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1852 *lvalp
= lval_memory
;
1854 read_memory (addr
, valuep
, register_size (gdbarch
, regnum
));
1860 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1862 /* Fetch floating point register rename base from current
1863 frame marker for this frame. */
1864 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1866 /* Adjust the floating point register number to account for
1867 register rotation. */
1868 regnum
= IA64_FR32_REGNUM
1869 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1872 /* If we have stored a memory address, access the register. */
1873 addr
= cache
->saved_regs
[regnum
];
1876 *lvalp
= lval_memory
;
1878 read_memory (addr
, valuep
, register_size (gdbarch
, regnum
));
1880 /* Otherwise, punt and get the current value of the register. */
1882 frame_unwind_register (next_frame
, regnum
, valuep
);
1885 if (gdbarch_debug
>= 1)
1886 fprintf_unfiltered (gdb_stdlog
,
1887 "regular prev register <%d> <%s> is 0x%s\n", regnum
,
1888 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1889 ? ia64_register_names
[regnum
] : "r??"),
1890 paddr_nz (extract_unsigned_integer (valuep
, 8)));
1893 static const struct frame_unwind ia64_frame_unwind
=
1896 &ia64_frame_this_id
,
1897 &ia64_frame_prev_register
1900 static const struct frame_unwind
*
1901 ia64_frame_sniffer (struct frame_info
*next_frame
)
1903 return &ia64_frame_unwind
;
1906 /* Signal trampolines. */
1909 ia64_sigtramp_frame_init_saved_regs (struct frame_info
*next_frame
,
1910 struct ia64_frame_cache
*cache
)
1912 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1914 if (tdep
->sigcontext_register_address
)
1918 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1919 tdep
->sigcontext_register_address (cache
->base
, IA64_IP_REGNUM
);
1920 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1921 tdep
->sigcontext_register_address (cache
->base
, IA64_CFM_REGNUM
);
1922 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1923 tdep
->sigcontext_register_address (cache
->base
, IA64_PSR_REGNUM
);
1924 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1925 tdep
->sigcontext_register_address (cache
->base
, IA64_BSP_REGNUM
);
1926 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1927 tdep
->sigcontext_register_address (cache
->base
, IA64_RNAT_REGNUM
);
1928 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1929 tdep
->sigcontext_register_address (cache
->base
, IA64_CCV_REGNUM
);
1930 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1931 tdep
->sigcontext_register_address (cache
->base
, IA64_UNAT_REGNUM
);
1932 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1933 tdep
->sigcontext_register_address (cache
->base
, IA64_FPSR_REGNUM
);
1934 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1935 tdep
->sigcontext_register_address (cache
->base
, IA64_PFS_REGNUM
);
1936 cache
->saved_regs
[IA64_LC_REGNUM
] =
1937 tdep
->sigcontext_register_address (cache
->base
, IA64_LC_REGNUM
);
1938 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1939 cache
->saved_regs
[regno
] =
1940 tdep
->sigcontext_register_address (cache
->base
, regno
);
1941 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1942 cache
->saved_regs
[regno
] =
1943 tdep
->sigcontext_register_address (cache
->base
, regno
);
1944 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1945 cache
->saved_regs
[regno
] =
1946 tdep
->sigcontext_register_address (cache
->base
, regno
);
1950 static struct ia64_frame_cache
*
1951 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1953 struct ia64_frame_cache
*cache
;
1961 cache
= ia64_alloc_frame_cache ();
1963 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1964 /* Note that frame size is hard-coded below. We cannot calculate it
1965 via prologue examination. */
1966 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1968 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1969 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1971 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1972 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1973 cache
->sof
= cache
->cfm
& 0x7f;
1975 ia64_sigtramp_frame_init_saved_regs (next_frame
, cache
);
1977 *this_cache
= cache
;
1982 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1983 void **this_cache
, struct frame_id
*this_id
)
1985 struct ia64_frame_cache
*cache
=
1986 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1988 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1989 if (gdbarch_debug
>= 1)
1990 fprintf_unfiltered (gdb_stdlog
,
1991 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1992 paddr_nz (this_id
->code_addr
),
1993 paddr_nz (this_id
->stack_addr
),
1994 paddr_nz (cache
->bsp
), next_frame
);
1998 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
2000 int regnum
, int *optimizedp
,
2001 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2002 int *realnump
, gdb_byte
*valuep
)
2004 char dummy_valp
[MAX_REGISTER_SIZE
];
2005 char buf
[MAX_REGISTER_SIZE
];
2007 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
2008 struct ia64_frame_cache
*cache
=
2009 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
2011 gdb_assert (regnum
>= 0);
2013 if (!target_has_registers
)
2014 error (_("No registers."));
2021 /* Rather than check each time if valuep is non-null, supply a dummy buffer
2022 when valuep is not supplied. */
2024 valuep
= dummy_valp
;
2026 memset (valuep
, 0, register_size (gdbarch
, regnum
));
2028 if (regnum
== IA64_IP_REGNUM
)
2031 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2035 *lvalp
= lval_memory
;
2037 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2038 pc
= extract_unsigned_integer (buf
, 8);
2041 store_unsigned_integer (valuep
, 8, pc
);
2043 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2044 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2047 if (regnum
>= V32_REGNUM
)
2048 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2049 addr
= cache
->saved_regs
[regnum
];
2052 *lvalp
= lval_memory
;
2054 read_memory (addr
, valuep
, register_size (gdbarch
, regnum
));
2059 /* All other registers not listed above. */
2060 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2063 *lvalp
= lval_memory
;
2065 read_memory (addr
, valuep
, register_size (gdbarch
, regnum
));
2069 if (gdbarch_debug
>= 1)
2070 fprintf_unfiltered (gdb_stdlog
,
2071 "sigtramp prev register <%s> is 0x%s\n",
2072 (regnum
< IA64_GR32_REGNUM
2073 || (regnum
> IA64_GR127_REGNUM
2074 && regnum
< LAST_PSEUDO_REGNUM
))
2075 ? ia64_register_names
[regnum
]
2076 : (regnum
< LAST_PSEUDO_REGNUM
2077 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2079 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2082 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2085 ia64_sigtramp_frame_this_id
,
2086 ia64_sigtramp_frame_prev_register
2089 static const struct frame_unwind
*
2090 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2092 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
2093 if (tdep
->pc_in_sigtramp
)
2095 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2097 if (tdep
->pc_in_sigtramp (pc
))
2098 return &ia64_sigtramp_frame_unwind
;
2106 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2108 struct ia64_frame_cache
*cache
=
2109 ia64_frame_cache (next_frame
, this_cache
);
2114 static const struct frame_base ia64_frame_base
=
2117 ia64_frame_base_address
,
2118 ia64_frame_base_address
,
2119 ia64_frame_base_address
2122 #ifdef HAVE_LIBUNWIND_IA64_H
2124 struct ia64_unwind_table_entry
2126 unw_word_t start_offset
;
2127 unw_word_t end_offset
;
2128 unw_word_t info_offset
;
2131 static __inline__
uint64_t
2132 ia64_rse_slot_num (uint64_t addr
)
2134 return (addr
>> 3) & 0x3f;
2137 /* Skip over a designated number of registers in the backing
2138 store, remembering every 64th position is for NAT. */
2139 static __inline__
uint64_t
2140 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2142 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2146 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2149 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2150 number to a libunwind register number. */
2152 ia64_gdb2uw_regnum (int regnum
)
2154 if (regnum
== sp_regnum
)
2156 else if (regnum
== IA64_BSP_REGNUM
)
2157 return UNW_IA64_BSP
;
2158 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2159 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2160 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2161 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2162 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2163 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2164 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2166 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2167 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2168 else if (regnum
== IA64_PR_REGNUM
)
2170 else if (regnum
== IA64_IP_REGNUM
)
2172 else if (regnum
== IA64_CFM_REGNUM
)
2173 return UNW_IA64_CFM
;
2174 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2175 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2176 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2177 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2182 /* Gdb libunwind-frame callback function to convert from a libunwind register
2183 number to a ia64 gdb register number. */
2185 ia64_uw2gdb_regnum (int uw_regnum
)
2187 if (uw_regnum
== UNW_IA64_SP
)
2189 else if (uw_regnum
== UNW_IA64_BSP
)
2190 return IA64_BSP_REGNUM
;
2191 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2192 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2193 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2194 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2195 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2196 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2197 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2198 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2199 else if (uw_regnum
== UNW_IA64_PR
)
2200 return IA64_PR_REGNUM
;
2201 else if (uw_regnum
== UNW_REG_IP
)
2202 return IA64_IP_REGNUM
;
2203 else if (uw_regnum
== UNW_IA64_CFM
)
2204 return IA64_CFM_REGNUM
;
2205 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2206 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2207 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2208 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2213 /* Gdb libunwind-frame callback function to reveal if register is a float
2216 ia64_is_fpreg (int uw_regnum
)
2218 return unw_is_fpreg (uw_regnum
);
2221 /* Libunwind callback accessor function for general registers. */
2223 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2224 int write
, void *arg
)
2226 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2227 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2228 struct frame_info
*next_frame
= arg
;
2229 long new_sof
, old_sof
;
2230 char buf
[MAX_REGISTER_SIZE
];
2232 /* We never call any libunwind routines that need to write registers. */
2233 gdb_assert (!write
);
2238 /* Libunwind expects to see the pc value which means the slot number
2239 from the psr must be merged with the ip word address. */
2240 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2241 ip
= extract_unsigned_integer (buf
, 8);
2242 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2243 psr
= extract_unsigned_integer (buf
, 8);
2244 *val
= ip
| ((psr
>> 41) & 0x3);
2247 case UNW_IA64_AR_BSP
:
2248 /* Libunwind expects to see the beginning of the current register
2249 frame so we must account for the fact that ptrace() will return a value
2250 for bsp that points *after* the current register frame. */
2251 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2252 bsp
= extract_unsigned_integer (buf
, 8);
2253 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2254 cfm
= extract_unsigned_integer (buf
, 8);
2256 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2259 case UNW_IA64_AR_BSPSTORE
:
2260 /* Libunwind wants bspstore to be after the current register frame.
2261 This is what ptrace() and gdb treats as the regular bsp value. */
2262 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2263 *val
= extract_unsigned_integer (buf
, 8);
2267 /* For all other registers, just unwind the value directly. */
2268 frame_unwind_register (next_frame
, regnum
, buf
);
2269 *val
= extract_unsigned_integer (buf
, 8);
2273 if (gdbarch_debug
>= 1)
2274 fprintf_unfiltered (gdb_stdlog
,
2275 " access_reg: from cache: %4s=0x%s\n",
2276 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2277 ? ia64_register_names
[regnum
] : "r??"),
2282 /* Libunwind callback accessor function for floating-point registers. */
2284 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2285 int write
, void *arg
)
2287 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2288 struct frame_info
*next_frame
= arg
;
2290 /* We never call any libunwind routines that need to write registers. */
2291 gdb_assert (!write
);
2293 frame_unwind_register (next_frame
, regnum
, (char *) val
);
2298 /* Libunwind callback accessor function for top-level rse registers. */
2300 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2301 int write
, void *arg
)
2303 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2304 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2305 struct regcache
*regcache
= arg
;
2306 long new_sof
, old_sof
;
2307 char buf
[MAX_REGISTER_SIZE
];
2309 /* We never call any libunwind routines that need to write registers. */
2310 gdb_assert (!write
);
2315 /* Libunwind expects to see the pc value which means the slot number
2316 from the psr must be merged with the ip word address. */
2317 regcache_cooked_read (regcache
, IA64_IP_REGNUM
, buf
);
2318 ip
= extract_unsigned_integer (buf
, 8);
2319 regcache_cooked_read (regcache
, IA64_PSR_REGNUM
, buf
);
2320 psr
= extract_unsigned_integer (buf
, 8);
2321 *val
= ip
| ((psr
>> 41) & 0x3);
2324 case UNW_IA64_AR_BSP
:
2325 /* Libunwind expects to see the beginning of the current register
2326 frame so we must account for the fact that ptrace() will return a value
2327 for bsp that points *after* the current register frame. */
2328 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2329 bsp
= extract_unsigned_integer (buf
, 8);
2330 regcache_cooked_read (regcache
, IA64_CFM_REGNUM
, buf
);
2331 cfm
= extract_unsigned_integer (buf
, 8);
2333 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2336 case UNW_IA64_AR_BSPSTORE
:
2337 /* Libunwind wants bspstore to be after the current register frame.
2338 This is what ptrace() and gdb treats as the regular bsp value. */
2339 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2340 *val
= extract_unsigned_integer (buf
, 8);
2344 /* For all other registers, just unwind the value directly. */
2345 regcache_cooked_read (regcache
, regnum
, buf
);
2346 *val
= extract_unsigned_integer (buf
, 8);
2350 if (gdbarch_debug
>= 1)
2351 fprintf_unfiltered (gdb_stdlog
,
2352 " access_rse_reg: from cache: %4s=0x%s\n",
2353 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2354 ? ia64_register_names
[regnum
] : "r??"),
2360 /* Libunwind callback accessor function for top-level fp registers. */
2362 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2363 unw_fpreg_t
*val
, int write
, void *arg
)
2365 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2366 struct regcache
*regcache
= arg
;
2368 /* We never call any libunwind routines that need to write registers. */
2369 gdb_assert (!write
);
2371 regcache_cooked_read (regcache
, regnum
, (char *) val
);
2376 /* Libunwind callback accessor function for accessing memory. */
2378 ia64_access_mem (unw_addr_space_t as
,
2379 unw_word_t addr
, unw_word_t
*val
,
2380 int write
, void *arg
)
2382 if (addr
- KERNEL_START
< ktab_size
)
2384 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2385 + (addr
- KERNEL_START
));
2394 /* XXX do we need to normalize byte-order here? */
2396 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2398 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2401 /* Call low-level function to access the kernel unwind table. */
2403 getunwind_table (gdb_byte
**buf_p
)
2407 /* FIXME drow/2005-09-10: This code used to call
2408 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2409 for the currently running ia64-linux kernel. That data should
2410 come from the core file and be accessed via the auxv vector; if
2411 we want to preserve fall back to the running kernel's table, then
2412 we should find a way to override the corefile layer's
2413 xfer_partial method. */
2415 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2421 /* Get the kernel unwind table. */
2423 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2425 static struct ia64_table_entry
*etab
;
2432 size
= getunwind_table (&ktab_buf
);
2434 return -UNW_ENOINFO
;
2436 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2439 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2440 etab
->info_offset
+= KERNEL_START
;
2443 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2444 return -UNW_ENOINFO
;
2446 di
->format
= UNW_INFO_FORMAT_TABLE
;
2448 di
->start_ip
= ktab
[0].start_offset
;
2449 di
->end_ip
= etab
[-1].end_offset
;
2450 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2451 di
->u
.ti
.segbase
= 0;
2452 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2453 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2455 if (gdbarch_debug
>= 1)
2456 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2457 "segbase=0x%s, length=%s, gp=0x%s\n",
2458 (char *) di
->u
.ti
.name_ptr
,
2459 paddr_nz (di
->u
.ti
.segbase
),
2460 paddr_u (di
->u
.ti
.table_len
),
2465 /* Find the unwind table entry for a specified address. */
2467 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2468 unw_dyn_info_t
*dip
, void **buf
)
2470 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2471 Elf_Internal_Ehdr
*ehdr
;
2472 unw_word_t segbase
= 0;
2473 CORE_ADDR load_base
;
2477 bfd
= objfile
->obfd
;
2479 ehdr
= elf_tdata (bfd
)->elf_header
;
2480 phdr
= elf_tdata (bfd
)->phdr
;
2482 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2484 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2486 switch (phdr
[i
].p_type
)
2489 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2494 case PT_IA_64_UNWIND
:
2495 p_unwind
= phdr
+ i
;
2503 if (!p_text
|| !p_unwind
)
2504 return -UNW_ENOINFO
;
2506 /* Verify that the segment that contains the IP also contains
2507 the static unwind table. If not, we may be in the Linux kernel's
2508 DSO gate page in which case the unwind table is another segment.
2509 Otherwise, we are dealing with runtime-generated code, for which we
2510 have no info here. */
2511 segbase
= p_text
->p_vaddr
+ load_base
;
2513 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2516 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2518 if (phdr
[i
].p_type
== PT_LOAD
2519 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2522 /* Get the segbase from the section containing the
2524 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2528 return -UNW_ENOINFO
;
2531 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2532 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2533 dip
->gp
= ia64_find_global_pointer (ip
);
2534 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2535 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2536 dip
->u
.rti
.segbase
= segbase
;
2537 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2538 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2543 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2545 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2546 int need_unwind_info
, void *arg
)
2548 struct obj_section
*sec
= find_pc_section (ip
);
2555 /* XXX This only works if the host and the target architecture are
2556 both ia64 and if the have (more or less) the same kernel
2558 if (get_kernel_table (ip
, &di
) < 0)
2559 return -UNW_ENOINFO
;
2561 if (gdbarch_debug
>= 1)
2562 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2563 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2564 "length=%s,data=0x%s)\n",
2565 paddr_nz (ip
), (char *)di
.u
.ti
.name_ptr
,
2566 paddr_nz (di
.u
.ti
.segbase
),
2567 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2569 paddr_u (di
.u
.ti
.table_len
),
2570 paddr_nz ((CORE_ADDR
)di
.u
.ti
.table_data
));
2574 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2578 if (gdbarch_debug
>= 1)
2579 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2580 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2581 "length=%s,data=0x%s)\n",
2582 paddr_nz (ip
), (char *)di
.u
.rti
.name_ptr
,
2583 paddr_nz (di
.u
.rti
.segbase
),
2584 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2586 paddr_u (di
.u
.rti
.table_len
),
2587 paddr_nz (di
.u
.rti
.table_data
));
2590 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2593 /* We no longer need the dyn info storage so free it. */
2599 /* Libunwind callback accessor function for cleanup. */
2601 ia64_put_unwind_info (unw_addr_space_t as
,
2602 unw_proc_info_t
*pip
, void *arg
)
2604 /* Nothing required for now. */
2607 /* Libunwind callback accessor function to get head of the dynamic
2608 unwind-info registration list. */
2610 ia64_get_dyn_info_list (unw_addr_space_t as
,
2611 unw_word_t
*dilap
, void *arg
)
2613 struct obj_section
*text_sec
;
2614 struct objfile
*objfile
;
2615 unw_word_t ip
, addr
;
2619 if (!libunwind_is_initialized ())
2620 return -UNW_ENOINFO
;
2622 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2626 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2627 ip
= text_sec
->addr
;
2628 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2631 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2632 /* We no longer need the dyn info storage so free it. */
2637 if (gdbarch_debug
>= 1)
2638 fprintf_unfiltered (gdb_stdlog
,
2639 "dynamic unwind table in objfile %s "
2640 "at 0x%s (gp=0x%s)\n",
2641 bfd_get_filename (objfile
->obfd
),
2642 paddr_nz (addr
), paddr_nz (di
.gp
));
2648 return -UNW_ENOINFO
;
2652 /* Frame interface functions for libunwind. */
2655 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2656 struct frame_id
*this_id
)
2661 CORE_ADDR prev_ip
, addr
;
2662 int realnum
, optimized
;
2663 enum lval_type lval
;
2666 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2667 if (frame_id_eq (id
, null_frame_id
))
2669 (*this_id
) = null_frame_id
;
2673 /* We must add the bsp as the special address for frame comparison
2675 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2676 bsp
= extract_unsigned_integer (buf
, 8);
2678 /* If the previous frame pc value is 0, then we are at the end of the stack
2679 and don't want to unwind past this frame. We return a null frame_id to
2681 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2682 &optimized
, &lval
, &addr
, &realnum
, buf
);
2683 prev_ip
= extract_unsigned_integer (buf
, 8);
2686 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2688 (*this_id
) = null_frame_id
;
2690 if (gdbarch_debug
>= 1)
2691 fprintf_unfiltered (gdb_stdlog
,
2692 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2693 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2694 paddr_nz (bsp
), next_frame
);
2698 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2700 int regnum
, int *optimizedp
,
2701 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2702 int *realnump
, gdb_byte
*valuep
)
2706 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
2707 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2708 reg
= IA64_PR_REGNUM
;
2709 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2710 reg
= IA64_UNAT_REGNUM
;
2712 /* Let libunwind do most of the work. */
2713 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2714 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2716 /* No more to do if the value is not supposed to be supplied. */
2720 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2724 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2728 unsigned char buf
[MAX_REGISTER_SIZE
];
2730 /* Fetch predicate register rename base from current frame
2731 marker for this frame. */
2732 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2733 cfm
= extract_unsigned_integer (buf
, 8);
2734 rrb_pr
= (cfm
>> 32) & 0x3f;
2736 /* Adjust the register number to account for register rotation. */
2737 regnum
= VP16_REGNUM
2738 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2740 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2741 regnum
- VP0_REGNUM
, 1);
2742 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
), prN_val
);
2744 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2748 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2749 regnum
- IA64_NAT0_REGNUM
, 1);
2750 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
),
2753 else if (regnum
== IA64_BSP_REGNUM
)
2755 char cfm_valuep
[MAX_REGISTER_SIZE
];
2758 enum lval_type cfm_lval
;
2760 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2762 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2763 This corresponds to what the hardware bsp register will be if we pop the frame
2764 back which is why we might have been called. We know that libunwind will pass us back
2765 the beginning of the current frame so we should just add sof to it. */
2766 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2767 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2768 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2769 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2770 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2772 store_unsigned_integer (valuep
, register_size (gdbarch
, regnum
),
2776 if (gdbarch_debug
>= 1)
2777 fprintf_unfiltered (gdb_stdlog
,
2778 "libunwind prev register <%s> is 0x%s\n",
2779 (regnum
< IA64_GR32_REGNUM
2780 || (regnum
> IA64_GR127_REGNUM
2781 && regnum
< LAST_PSEUDO_REGNUM
))
2782 ? ia64_register_names
[regnum
]
2783 : (regnum
< LAST_PSEUDO_REGNUM
2784 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2786 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2789 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2792 ia64_libunwind_frame_this_id
,
2793 ia64_libunwind_frame_prev_register
,
2797 libunwind_frame_dealloc_cache
2800 static const struct frame_unwind
*
2801 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2803 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2804 return &ia64_libunwind_frame_unwind
;
2810 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2811 struct frame_id
*this_id
)
2818 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2819 if (frame_id_eq (id
, null_frame_id
))
2821 (*this_id
) = null_frame_id
;
2825 /* We must add the bsp as the special address for frame comparison
2827 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2828 bsp
= extract_unsigned_integer (buf
, 8);
2830 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2831 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2833 if (gdbarch_debug
>= 1)
2834 fprintf_unfiltered (gdb_stdlog
,
2835 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2836 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2837 paddr_nz (bsp
), next_frame
);
2841 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
2843 int regnum
, int *optimizedp
,
2844 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2845 int *realnump
, gdb_byte
*valuep
)
2849 CORE_ADDR prev_ip
, addr
;
2850 int realnum
, optimized
;
2851 enum lval_type lval
;
2854 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2855 method of getting previous registers. */
2856 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2857 &optimized
, &lval
, &addr
, &realnum
, buf
);
2858 prev_ip
= extract_unsigned_integer (buf
, 8);
2862 void *tmp_cache
= NULL
;
2863 ia64_sigtramp_frame_prev_register (next_frame
, &tmp_cache
, regnum
, optimizedp
, lvalp
,
2864 addrp
, realnump
, valuep
);
2867 ia64_libunwind_frame_prev_register (next_frame
, this_cache
, regnum
, optimizedp
, lvalp
,
2868 addrp
, realnump
, valuep
);
2871 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
2874 ia64_libunwind_sigtramp_frame_this_id
,
2875 ia64_libunwind_sigtramp_frame_prev_register
2878 static const struct frame_unwind
*
2879 ia64_libunwind_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2881 if (libunwind_is_initialized ())
2883 if (libunwind_sigtramp_frame_sniffer (next_frame
))
2884 return &ia64_libunwind_sigtramp_frame_unwind
;
2888 return ia64_sigtramp_frame_sniffer (next_frame
);
2891 /* Set of libunwind callback acccessor functions. */
2892 static unw_accessors_t ia64_unw_accessors
=
2894 ia64_find_proc_info_x
,
2895 ia64_put_unwind_info
,
2896 ia64_get_dyn_info_list
,
2904 /* Set of special libunwind callback acccessor functions specific for accessing
2905 the rse registers. At the top of the stack, we want libunwind to figure out
2906 how to read r32 - r127. Though usually they are found sequentially in memory
2907 starting from $bof, this is not always true. */
2908 static unw_accessors_t ia64_unw_rse_accessors
=
2910 ia64_find_proc_info_x
,
2911 ia64_put_unwind_info
,
2912 ia64_get_dyn_info_list
,
2914 ia64_access_rse_reg
,
2915 ia64_access_rse_fpreg
,
2920 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2921 static struct libunwind_descr ia64_libunwind_descr
=
2926 &ia64_unw_accessors
,
2927 &ia64_unw_rse_accessors
,
2930 #endif /* HAVE_LIBUNWIND_IA64_H */
2933 ia64_use_struct_convention (struct type
*type
)
2935 struct type
*float_elt_type
;
2937 /* Don't use the struct convention for anything but structure,
2938 union, or array types. */
2939 if (!(TYPE_CODE (type
) == TYPE_CODE_STRUCT
2940 || TYPE_CODE (type
) == TYPE_CODE_UNION
2941 || TYPE_CODE (type
) == TYPE_CODE_ARRAY
))
2944 /* HFAs are structures (or arrays) consisting entirely of floating
2945 point values of the same length. Up to 8 of these are returned
2946 in registers. Don't use the struct convention when this is the
2948 float_elt_type
= is_float_or_hfa_type (type
);
2949 if (float_elt_type
!= NULL
2950 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
2953 /* Other structs of length 32 or less are returned in r8-r11.
2954 Don't use the struct convention for those either. */
2955 return TYPE_LENGTH (type
) > 32;
2959 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
2962 struct type
*float_elt_type
;
2964 float_elt_type
= is_float_or_hfa_type (type
);
2965 if (float_elt_type
!= NULL
)
2967 char from
[MAX_REGISTER_SIZE
];
2969 int regnum
= IA64_FR8_REGNUM
;
2970 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
2974 regcache_cooked_read (regcache
, regnum
, from
);
2975 convert_typed_floating (from
, builtin_type_ia64_ext
,
2976 (char *)valbuf
+ offset
, float_elt_type
);
2977 offset
+= TYPE_LENGTH (float_elt_type
);
2985 int regnum
= IA64_GR8_REGNUM
;
2986 int reglen
= TYPE_LENGTH (register_type (get_regcache_arch (regcache
),
2988 int n
= TYPE_LENGTH (type
) / reglen
;
2989 int m
= TYPE_LENGTH (type
) % reglen
;
2994 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2995 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
3002 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3003 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3009 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3010 const gdb_byte
*valbuf
)
3012 struct type
*float_elt_type
;
3014 float_elt_type
= is_float_or_hfa_type (type
);
3015 if (float_elt_type
!= NULL
)
3017 char to
[MAX_REGISTER_SIZE
];
3019 int regnum
= IA64_FR8_REGNUM
;
3020 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3024 convert_typed_floating ((char *)valbuf
+ offset
, float_elt_type
,
3025 to
, builtin_type_ia64_ext
);
3026 regcache_cooked_write (regcache
, regnum
, to
);
3027 offset
+= TYPE_LENGTH (float_elt_type
);
3035 int regnum
= IA64_GR8_REGNUM
;
3036 int reglen
= TYPE_LENGTH (register_type (get_regcache_arch (regcache
),
3038 int n
= TYPE_LENGTH (type
) / reglen
;
3039 int m
= TYPE_LENGTH (type
) % reglen
;
3044 memcpy (&val
, (char *)valbuf
+ offset
, reglen
);
3045 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3052 memcpy (&val
, (char *)valbuf
+ offset
, m
);
3053 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3058 static enum return_value_convention
3059 ia64_return_value (struct gdbarch
*gdbarch
, struct type
*valtype
,
3060 struct regcache
*regcache
, gdb_byte
*readbuf
,
3061 const gdb_byte
*writebuf
)
3063 int struct_return
= ia64_use_struct_convention (valtype
);
3065 if (writebuf
!= NULL
)
3067 gdb_assert (!struct_return
);
3068 ia64_store_return_value (valtype
, regcache
, writebuf
);
3071 if (readbuf
!= NULL
)
3073 gdb_assert (!struct_return
);
3074 ia64_extract_return_value (valtype
, regcache
, readbuf
);
3078 return RETURN_VALUE_STRUCT_CONVENTION
;
3080 return RETURN_VALUE_REGISTER_CONVENTION
;
3084 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3086 switch (TYPE_CODE (t
))
3090 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3097 case TYPE_CODE_ARRAY
:
3099 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3102 case TYPE_CODE_STRUCT
:
3106 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3107 if (!is_float_or_hfa_type_recurse
3108 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3119 /* Determine if the given type is one of the floating point types or
3120 and HFA (which is a struct, array, or combination thereof whose
3121 bottom-most elements are all of the same floating point type). */
3123 static struct type
*
3124 is_float_or_hfa_type (struct type
*t
)
3126 struct type
*et
= 0;
3128 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3132 /* Return 1 if the alignment of T is such that the next even slot
3133 should be used. Return 0, if the next available slot should
3134 be used. (See section 8.5.1 of the IA-64 Software Conventions
3135 and Runtime manual). */
3138 slot_alignment_is_next_even (struct type
*t
)
3140 switch (TYPE_CODE (t
))
3144 if (TYPE_LENGTH (t
) > 8)
3148 case TYPE_CODE_ARRAY
:
3150 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3151 case TYPE_CODE_STRUCT
:
3155 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3156 if (slot_alignment_is_next_even
3157 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3166 /* Attempt to find (and return) the global pointer for the given
3169 This is a rather nasty bit of code searchs for the .dynamic section
3170 in the objfile corresponding to the pc of the function we're trying
3171 to call. Once it finds the addresses at which the .dynamic section
3172 lives in the child process, it scans the Elf64_Dyn entries for a
3173 DT_PLTGOT tag. If it finds one of these, the corresponding
3174 d_un.d_ptr value is the global pointer. */
3177 ia64_find_global_pointer (CORE_ADDR faddr
)
3179 struct obj_section
*faddr_sect
;
3181 faddr_sect
= find_pc_section (faddr
);
3182 if (faddr_sect
!= NULL
)
3184 struct obj_section
*osect
;
3186 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3188 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3192 if (osect
< faddr_sect
->objfile
->sections_end
)
3197 while (addr
< osect
->endaddr
)
3203 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3206 tag
= extract_signed_integer (buf
, sizeof (buf
));
3208 if (tag
== DT_PLTGOT
)
3210 CORE_ADDR global_pointer
;
3212 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3215 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
3218 return global_pointer
;
3231 /* Given a function's address, attempt to find (and return) the
3232 corresponding (canonical) function descriptor. Return 0 if
3235 find_extant_func_descr (CORE_ADDR faddr
)
3237 struct obj_section
*faddr_sect
;
3239 /* Return early if faddr is already a function descriptor. */
3240 faddr_sect
= find_pc_section (faddr
);
3241 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3244 if (faddr_sect
!= NULL
)
3246 struct obj_section
*osect
;
3247 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3249 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3253 if (osect
< faddr_sect
->objfile
->sections_end
)
3258 while (addr
< osect
->endaddr
)
3264 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3267 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
3269 if (faddr
== faddr2
)
3279 /* Attempt to find a function descriptor corresponding to the
3280 given address. If none is found, construct one on the
3281 stack using the address at fdaptr. */
3284 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3288 fdesc
= find_extant_func_descr (faddr
);
3292 ULONGEST global_pointer
;
3298 global_pointer
= ia64_find_global_pointer (faddr
);
3300 if (global_pointer
== 0)
3301 regcache_cooked_read_unsigned (regcache
,
3302 IA64_GR1_REGNUM
, &global_pointer
);
3304 store_unsigned_integer (buf
, 8, faddr
);
3305 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
3307 write_memory (fdesc
, buf
, 16);
3313 /* Use the following routine when printing out function pointers
3314 so the user can see the function address rather than just the
3315 function descriptor. */
3317 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3318 struct target_ops
*targ
)
3320 struct obj_section
*s
;
3322 s
= find_pc_section (addr
);
3324 /* check if ADDR points to a function descriptor. */
3325 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3326 return read_memory_unsigned_integer (addr
, 8);
3328 /* There are also descriptors embedded in vtables. */
3331 struct minimal_symbol
*minsym
;
3333 minsym
= lookup_minimal_symbol_by_pc (addr
);
3335 if (minsym
&& is_vtable_name (SYMBOL_LINKAGE_NAME (minsym
)))
3336 return read_memory_unsigned_integer (addr
, 8);
3343 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3349 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3350 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3351 int nargs
, struct value
**args
, CORE_ADDR sp
,
3352 int struct_return
, CORE_ADDR struct_addr
)
3358 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3360 ULONGEST bsp
, cfm
, pfs
, new_bsp
;
3361 CORE_ADDR funcdescaddr
, pc
, global_pointer
;
3362 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3366 /* Count the number of slots needed for the arguments. */
3367 for (argno
= 0; argno
< nargs
; argno
++)
3370 type
= check_typedef (value_type (arg
));
3371 len
= TYPE_LENGTH (type
);
3373 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3376 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3379 nslots
+= (len
+ 7) / 8;
3382 /* Divvy up the slots between the RSE and the memory stack. */
3383 rseslots
= (nslots
> 8) ? 8 : nslots
;
3384 memslots
= nslots
- rseslots
;
3386 /* Allocate a new RSE frame. */
3387 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3389 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3390 new_bsp
= rse_address_add (bsp
, rseslots
);
3391 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3393 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3394 pfs
&= 0xc000000000000000LL
;
3395 pfs
|= (cfm
& 0xffffffffffffLL
);
3396 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3398 cfm
&= 0xc000000000000000LL
;
3400 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3402 /* We will attempt to find function descriptors in the .opd segment,
3403 but if we can't we'll construct them ourselves. That being the
3404 case, we'll need to reserve space on the stack for them. */
3405 funcdescaddr
= sp
- nfuncargs
* 16;
3406 funcdescaddr
&= ~0xfLL
;
3408 /* Adjust the stack pointer to it's new value. The calling conventions
3409 require us to have 16 bytes of scratch, plus whatever space is
3410 necessary for the memory slots and our function descriptors. */
3411 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3412 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3414 /* Place the arguments where they belong. The arguments will be
3415 either placed in the RSE backing store or on the memory stack.
3416 In addition, floating point arguments or HFAs are placed in
3417 floating point registers. */
3419 floatreg
= IA64_FR8_REGNUM
;
3420 for (argno
= 0; argno
< nargs
; argno
++)
3422 struct type
*float_elt_type
;
3425 type
= check_typedef (value_type (arg
));
3426 len
= TYPE_LENGTH (type
);
3428 /* Special handling for function parameters. */
3430 && TYPE_CODE (type
) == TYPE_CODE_PTR
3431 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3434 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
), 8);
3435 store_unsigned_integer (val_buf
, 8,
3436 find_func_descr (regcache
, faddr
,
3438 if (slotnum
< rseslots
)
3439 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3441 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3448 /* Skip odd slot if necessary... */
3449 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3457 memset (val_buf
, 0, 8);
3458 memcpy (val_buf
, value_contents (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3460 if (slotnum
< rseslots
)
3461 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3463 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3470 /* Handle floating point types (including HFAs). */
3471 float_elt_type
= is_float_or_hfa_type (type
);
3472 if (float_elt_type
!= NULL
)
3475 len
= TYPE_LENGTH (type
);
3476 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3478 char to
[MAX_REGISTER_SIZE
];
3479 convert_typed_floating (value_contents (arg
) + argoffset
, float_elt_type
,
3480 to
, builtin_type_ia64_ext
);
3481 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3483 argoffset
+= TYPE_LENGTH (float_elt_type
);
3484 len
-= TYPE_LENGTH (float_elt_type
);
3489 /* Store the struct return value in r8 if necessary. */
3492 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3495 global_pointer
= ia64_find_global_pointer (func_addr
);
3497 if (global_pointer
!= 0)
3498 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3500 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3502 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3507 static struct frame_id
3508 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3513 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3514 sp
= extract_unsigned_integer (buf
, 8);
3516 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3517 bsp
= extract_unsigned_integer (buf
, 8);
3519 if (gdbarch_debug
>= 1)
3520 fprintf_unfiltered (gdb_stdlog
,
3521 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3522 paddr_nz (frame_pc_unwind (next_frame
)),
3523 paddr_nz (sp
), paddr_nz (bsp
));
3525 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3529 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3532 CORE_ADDR ip
, psr
, pc
;
3534 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3535 ip
= extract_unsigned_integer (buf
, 8);
3536 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3537 psr
= extract_unsigned_integer (buf
, 8);
3539 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3544 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3546 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3547 return print_insn_ia64 (memaddr
, info
);
3550 static struct gdbarch
*
3551 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3553 struct gdbarch
*gdbarch
;
3554 struct gdbarch_tdep
*tdep
;
3556 /* If there is already a candidate, use it. */
3557 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3559 return arches
->gdbarch
;
3561 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3562 gdbarch
= gdbarch_alloc (&info
, tdep
);
3564 tdep
->sigcontext_register_address
= 0;
3565 tdep
->pc_in_sigtramp
= 0;
3567 /* Define the ia64 floating-point format to gdb. */
3568 builtin_type_ia64_ext
=
3569 init_type (TYPE_CODE_FLT
, 128 / 8,
3570 0, "builtin_type_ia64_ext", NULL
);
3571 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = floatformats_ia64_ext
;
3573 /* According to the ia64 specs, instructions that store long double
3574 floats in memory use a long-double format different than that
3575 used in the floating registers. The memory format matches the
3576 x86 extended float format which is 80 bits. An OS may choose to
3577 use this format (e.g. GNU/Linux) or choose to use a different
3578 format for storing long doubles (e.g. HPUX). In the latter case,
3579 the setting of the format may be moved/overridden in an
3580 OS-specific tdep file. */
3581 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3583 set_gdbarch_short_bit (gdbarch
, 16);
3584 set_gdbarch_int_bit (gdbarch
, 32);
3585 set_gdbarch_long_bit (gdbarch
, 64);
3586 set_gdbarch_long_long_bit (gdbarch
, 64);
3587 set_gdbarch_float_bit (gdbarch
, 32);
3588 set_gdbarch_double_bit (gdbarch
, 64);
3589 set_gdbarch_long_double_bit (gdbarch
, 128);
3590 set_gdbarch_ptr_bit (gdbarch
, 64);
3592 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3593 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3594 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3595 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3597 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3598 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3600 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3601 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3602 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3603 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3604 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3605 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3606 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3608 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3610 set_gdbarch_return_value (gdbarch
, ia64_return_value
);
3612 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3613 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3614 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3615 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3616 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3618 /* Settings for calling functions in the inferior. */
3619 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3620 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3621 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3623 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3624 #ifdef HAVE_LIBUNWIND_IA64_H
3625 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_sigtramp_frame_sniffer
);
3626 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3627 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3629 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3631 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3632 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3634 /* Settings that should be unnecessary. */
3635 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3637 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3638 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3640 /* The virtual table contains 16-byte descriptors, not pointers to
3642 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
3644 /* Hook in ABI-specific overrides, if they have been registered. */
3645 gdbarch_init_osabi (info
, gdbarch
);
3650 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3653 _initialize_ia64_tdep (void)
3655 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);